WO2001010032A1 - Automatische offset-korrektur für einen ad-wandler entsprechend der patentschrift de 43 33 908 - Google Patents
Automatische offset-korrektur für einen ad-wandler entsprechend der patentschrift de 43 33 908 Download PDFInfo
- Publication number
- WO2001010032A1 WO2001010032A1 PCT/DE2000/002089 DE0002089W WO0110032A1 WO 2001010032 A1 WO2001010032 A1 WO 2001010032A1 DE 0002089 W DE0002089 W DE 0002089W WO 0110032 A1 WO0110032 A1 WO 0110032A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- offset
- signal
- analog
- patent document
- carrier signal
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
- H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
- H03M1/0607—Offset or drift compensation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
Definitions
- the invention relates to an automatic offset correction method for an AD converter based on the principle of patent specification DE 43 33 908.
- AD converters according to patent specification DE 43 33 908 can be designed for different input signal sizes. To do this, the offset of the reference signal (sine signal) must be kept constant. This is particularly problematic when the reference signal has small amplitude values.
- the object of the present invention is to keep the offset of the reference signal constant by automatic control.
- the offset control according to the invention requires no adjustment and does not require precision elements.
- An AD converter according to the method from DE 43 33 908 results from a linear pulse modulation. This pulse modulation is based on the comparison of a sinusoidal carrier signal (S (t)) with the analog input signal (Sm (t)) (FIG. 1). If both signals match, a uniform pulse (Dirac pulse) is generated. The frequency spectrum of this pulse sequence P (t) (FIG. 1) is shown in FIG. 2. This special type of pulse modulation converts the original low-pass signal (input signal) into a band-pass signal with the carrier signal frequency (S (t)) as the center frequency.
- Fig. 3 shows a block diagram of the AD converter.
- the converter essentially consists of the sine generator, the comparator (CMOS gate) and the RF counters with a downstream FIR filter.
- the reference signal (sine signal) is superimposed on the input signal.
- the amplitude of the carrier signal (reference signal) must be reduced accordingly, the direct component (offset) of the carrier signal not changing.
- resistors and capacitors can only be implemented with limited accuracy in integrated technology.
- the offset control according to the invention ensures a costly position (constant offset) of the carrier signal, as a result of which the full modulation range of the converter is retained.
- the invention is based on the fact that the offset of the carrier signal can be determined via the position of the Dirac impulses (counting results). A constant component is superimposed on the sinusoidal carrier signal by a control, so that the distances between the Dirac pulses are the same when there is no input signal.
- the direct component of the carrier signal corresponds exactly to the switching threshold of the comparator (CMOS gate), and the converter can be driven up to the level of the sinusoidal signal (max. Modulation range). If there is no input signal, the smallest difference between two count results can be used to determine the offset.
- the phase position (phase offset) of the carrier signal in relation to the system clock should be determined beforehand, so that an offset determination with sign (+/-) is possible.
- the phase position of the carrier signal can also be calculated using the counting results. For this purpose, for example, the start signal for the two counters (FIG. 5) has to be shifted such that the first counter (counter a, FIG.
- CMOS gate a falling edge of the comparator
- the phase position can then be determined from the averaged values of two adjacent count results with the smallest distance. A phase accuracy of 10 ° is generally sufficient.
- the entire calibration process, both for the DC component offset and for the phase offset of the carrier signal, can be implemented with a simple controller or by logic.
- the DC voltage to be superimposed for the offset control can be generated with a simple DA converter, for example a sigma-delta DA converter (pulse duration modulator).
- An embodiment of the invention is shown in Fig. 4. It shows a block diagram of the AD converter with the essential components for offset control.
- the offset controller first receives its input data from the RF counters.
- the offset controller shifts the phase of the sinusoidal signal until, for example, after the start signal for the counters (FIG. 5), counter a is stopped by a falling edge of the gate and the two following averaged counter values correspond to the correct phase position. Then the A suitable correction voltage is generated by the DA converter with the result of counting, so that the 'low' and 'high' times of the gate are of equal length. This then means that the DC component of the sine signal corresponds to the threshold value of the gate. This entire calibration process normally takes place without an input signal. If this calibration process is to be started with an input signal during normal operation, the corrections must then be determined using statistical methods.
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU64259/00A AU6425900A (en) | 1999-07-30 | 2000-06-27 | Automatic offset compensation for an analog-digital converter according to patent document de 43 33 908 |
DE10082248T DE10082248D2 (de) | 1999-07-30 | 2000-06-27 | Automatische Offset-Korrektur für einen AD-Wandler |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19936039.1 | 1999-07-30 | ||
DE1999136039 DE19936039A1 (de) | 1999-07-30 | 1999-07-30 | Automatische Offset-Korrektur für einen AD-Wandler entsprechend der Patentschrift |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2001010032A1 true WO2001010032A1 (de) | 2001-02-08 |
Family
ID=7916717
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2000/002089 WO2001010032A1 (de) | 1999-07-30 | 2000-06-27 | Automatische offset-korrektur für einen ad-wandler entsprechend der patentschrift de 43 33 908 |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU6425900A (de) |
DE (2) | DE19936039A1 (de) |
WO (1) | WO2001010032A1 (de) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4241702A1 (en) * | 1991-12-10 | 1993-07-01 | Sankyo Seiki Seisakusho Kk | Analogue=to=digital converter for electric motor speed control - counts clock pulses produced during period of PWM signal obtd. from error comparison with triangular wave |
DE4333908A1 (de) * | 1993-10-05 | 1995-04-06 | Christoph Braun | Analog/Digital-Umsetzer |
-
1999
- 1999-07-30 DE DE1999136039 patent/DE19936039A1/de not_active Withdrawn
-
2000
- 2000-06-27 WO PCT/DE2000/002089 patent/WO2001010032A1/de active Application Filing
- 2000-06-27 DE DE10082248T patent/DE10082248D2/de not_active Ceased
- 2000-06-27 AU AU64259/00A patent/AU6425900A/en not_active Abandoned
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4241702A1 (en) * | 1991-12-10 | 1993-07-01 | Sankyo Seiki Seisakusho Kk | Analogue=to=digital converter for electric motor speed control - counts clock pulses produced during period of PWM signal obtd. from error comparison with triangular wave |
DE4333908A1 (de) * | 1993-10-05 | 1995-04-06 | Christoph Braun | Analog/Digital-Umsetzer |
Also Published As
Publication number | Publication date |
---|---|
AU6425900A (en) | 2001-02-19 |
DE10082248D2 (de) | 2001-10-18 |
DE19936039A1 (de) | 2001-02-01 |
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