WO2001001470A1 - Procede et appareil permettant de graver du verre de silicate organique dope au carbone - Google Patents

Procede et appareil permettant de graver du verre de silicate organique dope au carbone Download PDF

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Publication number
WO2001001470A1
WO2001001470A1 PCT/US2000/016555 US0016555W WO0101470A1 WO 2001001470 A1 WO2001001470 A1 WO 2001001470A1 US 0016555 W US0016555 W US 0016555W WO 0101470 A1 WO0101470 A1 WO 0101470A1
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WIPO (PCT)
Prior art keywords
gas
high selectivity
recited
insulating layer
organic silicate
Prior art date
Application number
PCT/US2000/016555
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English (en)
Inventor
Tuquiang Ni
Nancy Tran
Original Assignee
Lam Research Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Research Corporation filed Critical Lam Research Corporation
Priority to KR1020017016645A priority Critical patent/KR20020010728A/ko
Priority to AU54928/00A priority patent/AU5492800A/en
Publication of WO2001001470A1 publication Critical patent/WO2001001470A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching

Definitions

  • the present invention relates generally to semiconductor processing and, more particularly to methods for etching carbon-doped Organic Silicate Glass insulating layers.
  • the present day semiconductor industry continually strives to increase device performance by reducing device dimensions and increasing device packing densities. For a given chip size, increasing the device packing density can be achieved by reducing the vertical and lateral distance separating active devices, with a resulting reduction in dielectric thickness (often referred to as inter-metal oxide or IMO) between layers. Unfortunately, reducing dielectric thickness increases interlayer capacitance, which results in diminished high frequency performance of the integrated circuit.
  • dielectric thickness often referred to as inter-metal oxide or IMO
  • conventional insulating layers such as silicon dioxide and silicon nitride
  • dielectric constants "k" of about 3.9 and above.
  • the dielectric constant of silicon dioxide is about 3.9
  • the dielectric constant of silicon nitride is about 9.0.
  • One type of low-k dielectric layer structure is a carbon-doped Organic Silicate Glass (OSG) insulating layer disposed above a Si 3 N 4 barrier layer.
  • the carbon-doped OSG insulating layer has a dielectric constant "k" less than 3.0, making it well suited for use as a low-k dielectric insulating layer for integrated circuit fabrication.
  • the carbon-doped OSG insulating layer presents problems during a conventional etch process. Most notably, conventional etching of a carbon-doped OSG insulating layer results in very poor selectivity with respect to underlying barrier layers of silicon nitride.
  • Figure 1 A is an illustration showing a cross-sectional view of a prior art integrated circuit structure 10 prior to a plasma etch.
  • the integrated circuit structure 10 includes a silicon dioxide dielectric insulating layer 12, a silicon nitride barrier layer 14 disposed below the silicon dioxide layer 12, and an organic resist mask 16 formed above the silicon dioxide layer 12.
  • Figure IB is an illustration showing a cross-sectional view of a prior art integrated circuit structure 10 after etching the silicon dioxide layer 12.
  • the silicon dioxide layer 12 is etched using a fluorine-based gas such as CF 4 .
  • gases suitable for etching silicon dioxide insulating layers include CF 4 F 8 , C 2 F 6 , CHF 3 , and SF 6 .
  • the insulating layer to be etched, and the underlying barrier layer below the insulating layer being etched, are subject to attack by the etchant.
  • the ratio of etch the rates of the different materials used in the various layers is known as the selectivity of the etch process.
  • the selectivity with respect to the substrate materials are important characteristics of an etch process.
  • the selectivity with respect to the substrate, S fs can impact performance and yield.
  • Film thickness and etch rate non-uniformities increase the required value of S fS because the etch processes need to be continued beyond the point at which the mean film thickness is completely etched (removed). Such additional etching is referred to as overetch. Due to overetch requirements, when contact holes are to be etched in silicon dioxide it is desirable that the etch rate decrease when the silicon substrate is reached. In this case, a process with high selectivity with respect to substrate is necessary.
  • the fluorine-based gas used in a conventional silicon dioxide etch process dissociates and forms a polymer film at the etch surface.
  • This polymer film greatly slows down the etching of the silicon nitride barrier layer 14. Therefore, good etch selectivity of the silicon dioxide layer 12 to silicon nitride layer 14 is achieved.
  • the result is a silicon dioxide via wherein the underlying silicon nitride barrier layer 14 is essentially intact, as shown in Figure IB.
  • the desirable selectivity of insulating layers to underlying barrier layers is therefore attainable with silicon dioxide insulating layers, as is well know to those skilled in the art.
  • FIG. 1C is an illustration showing a cross-sectional view of a prior art integrated circuit structure 20 after etching a carbon-doped OSG insulating layer 22 using a fluorine-based gas.
  • the integrated circuit structure 20 includes a carbon-doped OSG insulating layer 22, a silicon nitride barrier layer 14 disposed below the carbon-doped OSG layer 22, and an organic resist mask 16 formed above the carbon-doped OSG layer 22.
  • the carbon- doped OSG insulating layer contains a significant amount of carbon in order to have a small dielectric constant "k" of less than 3.0.
  • the fluorine-based gases as used in a conventional silicon dioxide dielectric layer etch cannot etch a carbon-doped OSG layer alone. Thus, gases such as O 2 or CO must be added to the etchant to etch the carbon. However, since both the OSG insulating layer and the polymer film contain carbon, the fluorine-based gases with added O 2 or CO attack the polymer film at the same time they etch the OSG insulating layer 22. Without the polymer film, fluorine-based gases etch the underlying silicon nitride layer 14 very fast. Therefore, the conventional dielectric material etch chemistry cannot achieve reasonable selectivity with respect to the silicon nitride barrier layer 14. The result is overetch 24 into the silicon nitride barrier layer 14, as shown in Figure 1C.
  • the present invention meets the aforementioned requirements by providing a process that etches carbon-doped OSG insulating layers utilizing a high selectivity gas having a bromine and chlorine-based chemistry.
  • the bromine and chlorine atoms in the high selectivity gas react with carbon, silicon, and hydrogen in the carbon-doped OSG layer, thus achieving a good etch of the carbon-doped OSG insulating layer.
  • the bromine and chlorine-based chemistry etches the underlying silicon nitride barrier layer very slowly, thereby achieving good selectivity between the carbon-doped OSG insulating layer and the silicon nitride barrier layer.
  • the result is a carbon-doped OSG insulating layer via wherein the underlying silicon nitride barrier layer is essentially intact.
  • One aspect of the present invention teaches a method for anisotropically etching an organic silicate insulating layer through an aperture in a mask layer.
  • a substrate, with an organic silicate insulating layer and an overlying mask layer having an aperture is introduced into a processing chamber.
  • a plasma is then developed within the chamber from an oxidizing gas and a high selectivity gas.
  • the high selectivity gas is preferably either a bromine containing gas, or a chlorine containing gas, or both.
  • the oxidizing gas to the high selectivity gas ratio is preferably no less than 4:1.
  • an inert carrier gas may be provided.
  • the plasma is used to etch the organic silicate insulating layer through the mask layer.
  • Another aspect of the present invention teaches an etch system for organic silicate layers.
  • the organic etch system includes a chamber which is receptive to a substrate provided with an organic silicate insulating layer to be etched. Also included is a gas inlet mechanism connecting an oxidizing gas and a high selectivity gas source.
  • the high selectivity gas is derived from the group including bromine containing gases and chlorine containing gases.
  • the ratio of the oxidizing gas to the high selectivity gas is preferably no less than 4:1.
  • a pair of electrodes disposed within the chamber, and an RF generator coupled to the electrode pair so that a plasma is formed, derived from the oxidizing gas and the high selectivity gas, which etches exposed portions of the organic silicate layer.
  • high carbon-doped OSG to silicon nitride selectivity can be achieved, resulting in carbon-doped OSG insulating layer vias, trenches, etc., wherein the underlying silicon nitride barrier layer is essentially intact.
  • the ability to produce vias in carbon- doped OSG insulating layers wherein the underlying barrier layer is intact allows the use of low- k OSG insulating layers in integrated circuit fabrication.
  • the low-k OSG insulating layers lower the interlayer capacitance, and thereby increase high frequency performance of the integrated circuit.
  • FIGURE 1 A is an illustration showing a cross-sectional view of a prior art integrated circuit structure having a silicon dioxide insulating layer prior to a plasma etch;
  • FIGURE IB is an illustration showing a cross-sectional view of the prior art integrated circuit structure after etching the silicon dioxide insulating layer using a. fluorine-based gas;
  • FIGURE 1C is an illustration showing a cross-sectional view of a prior art integrated circuit structure having a carbon-doped OSG insulating layer after etching the carbon-doped OSG layer using a fluorine-based gas;
  • FIGURE 2A is an illustration showing a cross-sectional view of an integrated circuit structure prior to etch a carbon-doped OSG insulating layer in accordance with one embodiment of the present invention
  • FIGURE 2B is an illustration showing a cross-sectional view an integrated circuit structure after etching a carbon-doped OSG film layer using a bromine and chlorine-based chemistry in accordance with one embodiment of the present invention
  • FIGURE 3 is a flowchart showing a method for etching an organic silicate insulating layer through an aperture in a mask layer in accordance with one embodiment of the present invention
  • FIGURE 4 is an illustration showing an organic silicate glass layer etching system in accordance with one embodiment of the present invention.
  • Figure 5 is an illustration showing an organic silicate glass etching system having multiple gas inlets in accordance with one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Figures 1A-1C were described in terms of the prior art. A preferred embodiment of the present invention will now be described with reference to Figures 2 A and 2B.
  • Figure 2 A is an illustration showing a cross-sectional view of an integrated circuit structure 30 prior to a plasma etch in accordance with one embodiment of the present invention.
  • the integrated circuit structure 30 includes a carbon-doped OSG insulating layer 32, a silicon nitride barrier layer 34 disposed below the carbon-doped OSG insulating layer 32, and an organic resist mask 36 formed above the carbon-doped OSG insulating layer 32.
  • a high degree of selectivity is a desirable feature of an etch process for fine feature patterning since in such applications very little etch bias can be permitted.
  • a high degree of selectivity with respect to underlying materials is necessary in order to prevent removal of previously processed portions of the circuit.
  • the necessary selectivity with respect to a substrate, Sf S is calculated by considering the worst-case condition. That is it is assumed the thinnest part of the film to be etched lies over the region of the substrate that experiences the highest etch rate. This assumption is used to calculate a uniformity factor, U fS .
  • the uniformity factor, U fS is then multiplied by the ratio h f h s (where h f is the mean film thickness, and h s is the maximum allowable penetration depth of the substrate layer) to arrive at the required S fs , or:
  • ⁇ f is a dimensionless parameter of value 0 ⁇ ⁇ f ⁇ 1
  • ⁇ is a fractional overetch time
  • ⁇ is a dimensionless parameter with a value 0 ⁇ ⁇ ⁇ 1.
  • the present invention achieves good selectivity by utilizing a bromine and chlorine-based chemistry to etch carbon-doped OSG dielectric insulating layers.
  • a process in accordance with the present invention provides an oxide etch of the organic silicate insulating layer 32 using a mixture of a high selectivity gas and an oxidizing gas formed in a plasma to anisotropically etch the orgamc silicate insulating layer 32 through an aperture 35 in the mask layer 36, as shown in Figure 2B.
  • the high selectivity gas can be either a chlorine-based gas such as Cl 2 , a bromine- based gas such as HBr, or a combination chlorine and bromine-based gas such as HBr, Cl 2 , or BC1 3 .
  • bromine and chlorine atoms in the high selectivity gas react with carbon, silicon, and hydrogen in the carbon-doped OSG insulating layer, forming volatile etch products such as SiBr x , SiCl x , HCL, and CC1 X , thus achieving a good etch of the carbon-doped OSG insulating layer 32.
  • the bromine and chlorine- based chemistry etches the silicon nitride barrier layer 34 very slowly, thereby achieving good selectivity between the carbon-doped OSG insulating layer 32 and the silicon nitride barrier layer
  • an integrated circuit is prepared for the organic silicate film etch process 100.
  • a resist layer is formed on the IC above the carbon-doped OSG insulating layer.
  • the IC is generally spin-coated with either a filtered optical photoresist, such as AZ-1370, KODAK 820, or an e-beam resist such as PMMA or COP.
  • a thick resist coat or a thinner resist coat may be applied depending on whether improved line size control is desired or better resolution is desired. Thick resist coatings (-0.5 ⁇ m) result in improved line size control and pinhole protection, while thinner resists (0.2-0.3 ⁇ m) result in better resolution.
  • the carbon-doped OSG insulating layer is etched using a mixture of a high selectivity gas and an oxidizing gas, in an operation 104.
  • the high selectivity gas can be either a chlorine-based gas such as Cl 2 , a bromine-based gas such as HBr, or a combination chlorine and bromine-based gas such as HBr, Cl 2 , or BC1 3 .
  • the high selectivity gas is combined with an oxidizing gas in a plasma in a ratio of oxidizing gas to high selectivity gas of preferably no less than 4:1.
  • Another embodiment of the present invention utilize an oxidizing gas to high selectivity gas ratio of no less than 10:1, and still other embodiments of the present invention utilize an oxidizing gas to high selectivity gas ratio of no less than 50:1.
  • An “oxidizing gas”, as described herein, is gas containing oxygen. Such gases aid in the removal of carbon from carbon doped OSG layers, resulting in an increased etch rate. In addition, such gases decrease the etch rate of the under layers due to Cl, Br and other reactive gases.
  • bromine and chlorine atoms in the high selectivity gas react with carbon, silicon, and hydrogen in the carbon-doped OSG insulating layer, forming volatile etch products such as SiBr x , SiCl x , HCL, and CC1 X resulting in a good etch of the carbon-doped OSG insulating layer.
  • the bromine and chlorine- based chemistry etches the underlying silicon nitride barrier layer very slowly, thus achieving good selectivity between the carbon-doped OSG layer and the silicon nitride barrier layer.
  • the result is a carbon-doped OSG insulating layer via wherein the underlying silicon nitride barrier layer is essentially intact.
  • the carbon-doped OSG insulating layer etch process 100 is stopped when the etch reaches an end point.
  • Dry etch equipment used in a typical semiconductor production environment requires the availability of effective diagnostic and etch end point detection tools.
  • Four common methods for determining the end point of dry etch processes are: laser reflectivity; optical emission spectroscopy; direct observation of the etched surface through a viewing port on the chamber, by a human operator; and mass spectroscopy.
  • FIG. 4 is an illustration showing an organic silicate layer etching system 50 in accordance with one embodiment of the present invention.
  • the organic silicate layer etching system 50 includes a chamber 52 receptive to a substrate 62 provided with an organic silicate insulating layer to be etched, a gas inlet mechanism 54 connecting to an oxidizing gas and a high selectivity gas source 56, a pair of electrodes 58 disposed within the chamber 50, and an RF generator 60 coupled to the electrodes 58.
  • the upper electrode can be omitted by grounding the RF generator 60 to the chamber 52.
  • the substrate 62 is prepared for the carbon-doped OSG insulating layer etch, it is placed in the chamber 52.
  • the gas inlet mechanism 54 is then used to release, into the chamber 52, the oxidizing gas and the high selectivity gas from the gas source 56.
  • the high selectivity gas is combined with an oxidizing gas in the chamber 52 in a ratio of oxidizing gas to high selectivity gas of preferably no less than 4:1.
  • Another embodiment of the present invention utilize an oxidizing gas to high selectivity gas ratio of no less than 10:1, and still other embodiments of the present invention utilize an oxidizing gas to high selectivity gas ratio of no less than 50:1.
  • the RF generator 60 is then used to form a plasma including the oxidizing and high selectivity gases in the chamber 52.
  • bromine and chlorine atoms in the high selectivity gas react with the carbon, silicon, and hydrogen in the carbon-doped OSG layer, forming volatile etch products such as SiBr x , SiCl x , HCL, and CC1 X , thus achieving a good etch of the carbon-doped OSG insulating layer.
  • the bromine and chlorine-based chemistry etches the underlying silicon nitride barrier layer very slowly, thus achieving good selectivity between the carbon-doped OSG layer and the silicon nitride barrier layer.
  • the result is a carbon-doped OSG insulating layer via wherein the underlying silicon nitride barrier layer is essentially intact.
  • FIG. 5 is an illustration showing an organic silicate layer etching system 70 having multiple gas inlets in accordance with one embodiment of the present invention.
  • the organic silicate layer etching system 70 includes a chamber 52 receptive to a substrate 62 provided with an organic silicate insulating layer to be etched, multiple gas inlet mechanisms 54 connecting to an oxidizing gas source 56A and a high selectivity gas source 56B, a pair of electrodes 58 disposed within the chamber 50, and an RF generator 60 coupled to the electrodes 58.
  • the upper electrode can be omitted by grounding the RF generator 60 to the chamber 52.
  • the gas inlet mechanisms 54 are used to release the oxidizing gas and the high selectivity gas into the plasma containing chamber 52 in the proper ratio, usually under automated (e.g., computer) control.
  • the ratio of oxidizing gas to high selectivity gas in the plasma preferably is no less than 4:1. However, this ratio is typically no less than 10: 1 and sometimes no less than 50:1.

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  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

Cette invention concerne un procédé permettant de graver une couche isolante faite de verre de silicate organique dopé au carbone sur un dispositif à semi-conducteur. Ce procédé consiste à introduire dans une chambre de traitement un substrat comportant la couche isolante de verre de silicate organique dopé au carbone ainsi qu'une couche formant un masque sus-jacent et comportant une ouverture. On génère ensuite dans la chambre un plasma à partir d'un gaz oxydant et d'un gaz à sélectivité élevée. Le gaz à sélectivité élevée consiste de préférence en des gaz contenant du brome ou en des gaz contenant du chlore ou les deux. Le rapport entre le gaz oxydant et le gaz à sélectivité élevée ne dépasse pas 4 : 1 de préférence. Un gaz porteur inerte peut en outre être utilisé. On utilise ensuite le plasma afin de graver la couche isolante de verre de silicate organique à travers la couche servant de masque. On forme ainsi une voie dans la couche isolante de verre de silicate organique alors que la couche barrière de nitrure de silicium sous-jacente reste essentiellement intacte.
PCT/US2000/016555 1999-06-28 2000-06-14 Procede et appareil permettant de graver du verre de silicate organique dope au carbone WO2001001470A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020017016645A KR20020010728A (ko) 1999-06-28 2000-06-14 탄소-도프된 유기 규산염 유리를 에칭하기 위한 방법 및장치
AU54928/00A AU5492800A (en) 1999-06-28 2000-06-14 A method and apparatus for etching carbon-doped organic silicate glass

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US34094399A 1999-06-28 1999-06-28
US09/340,943 1999-06-28

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WO2001001470A1 true WO2001001470A1 (fr) 2001-01-04

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CN (1) CN1367935A (fr)
AU (1) AU5492800A (fr)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7122479B2 (en) * 2002-06-19 2006-10-17 Hitachi High-Technologies Corporation Etching processing method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1326791C (zh) * 2005-05-26 2007-07-18 上海交通大学 在硼硅玻璃表面加工微槽阵列的方法

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US5356515A (en) * 1990-10-19 1994-10-18 Tokyo Electron Limited Dry etching method
EP0820093A1 (fr) * 1996-07-15 1998-01-21 Applied Materials, Inc. Gravure d'une couche antiréfléchissante organique d'un substrat
WO1999021217A1 (fr) * 1997-10-22 1999-04-29 Interuniversitair Micro-Elektronica Centrum Attaque anisotropique de couches isolantes contenant des composes organiques
WO1999052135A1 (fr) * 1998-04-02 1999-10-14 Applied Materials, Inc. Procede de gravure de materiaux dielectriques a faible constante dielectrique
US6040248A (en) * 1998-06-24 2000-03-21 Taiwan Semiconductor Manufacturing Company Chemistry for etching organic low-k materials
WO2000031775A2 (fr) * 1998-11-18 2000-06-02 Koninklijke Philips Electronics N.V. Procede de fabrication d'un dispositif electronique comprenant deux couches de materiau contenant des elements organiques

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Publication number Priority date Publication date Assignee Title
US5356515A (en) * 1990-10-19 1994-10-18 Tokyo Electron Limited Dry etching method
EP0820093A1 (fr) * 1996-07-15 1998-01-21 Applied Materials, Inc. Gravure d'une couche antiréfléchissante organique d'un substrat
WO1999021217A1 (fr) * 1997-10-22 1999-04-29 Interuniversitair Micro-Elektronica Centrum Attaque anisotropique de couches isolantes contenant des composes organiques
WO1999052135A1 (fr) * 1998-04-02 1999-10-14 Applied Materials, Inc. Procede de gravure de materiaux dielectriques a faible constante dielectrique
US6040248A (en) * 1998-06-24 2000-03-21 Taiwan Semiconductor Manufacturing Company Chemistry for etching organic low-k materials
WO2000031775A2 (fr) * 1998-11-18 2000-06-02 Koninklijke Philips Electronics N.V. Procede de fabrication d'un dispositif electronique comprenant deux couches de materiau contenant des elements organiques

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NISHIZAWA A ET AL: "DRY ETCHING OF BOTTOM ANTI-REFLECTIVE-COAT AND ITS APPLICATION TO GATE LENGTH CONTROL", IEEE INTERNATIONAL SYMPOSIUM ON SEMICONDUCTOR MANUFACTURING,US,NEW YORK, NY: IEEE, 6 October 1997 (1997-10-06), pages F13 - F16, XP000849638, ISBN: 0-7803-3753-0 *

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7122479B2 (en) * 2002-06-19 2006-10-17 Hitachi High-Technologies Corporation Etching processing method

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TW455986B (en) 2001-09-21
CN1367935A (zh) 2002-09-04
AU5492800A (en) 2001-01-31

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