WO2001001341A1 - Element support pour module a circuit integre - Google Patents

Element support pour module a circuit integre Download PDF

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Publication number
WO2001001341A1
WO2001001341A1 PCT/DE2000/002018 DE0002018W WO0101341A1 WO 2001001341 A1 WO2001001341 A1 WO 2001001341A1 DE 0002018 W DE0002018 W DE 0002018W WO 0101341 A1 WO0101341 A1 WO 0101341A1
Authority
WO
WIPO (PCT)
Prior art keywords
carrier element
adhesive
carrier
pressure
module
Prior art date
Application number
PCT/DE2000/002018
Other languages
German (de)
English (en)
Inventor
Roland Isberner
Original Assignee
Orga Kartensysteme Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Orga Kartensysteme Gmbh filed Critical Orga Kartensysteme Gmbh
Priority to EP00951232A priority Critical patent/EP1105838A1/fr
Priority to AU64253/00A priority patent/AU6425300A/en
Publication of WO2001001341A1 publication Critical patent/WO2001001341A1/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H05K3/305—Affixing by adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10439—Position of a single component
    • H05K2201/10477—Inverted
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10727—Leadless chip carrier [LCC], e.g. chip-modules for cards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to a carrier element for an IC module for installation in a chip card with a plate-shaped support body, on the front flat side of which metallic contact surfaces are arranged and on the other rear flat side of which the IC module is arranged, from a protective layer covering the IC module a potting material and an adhesive surface applied to the back of the support body for fixing the carrier element to the chip card and a method for its production.
  • Carrier elements of the generic type are usually manufactured as mass components in the context of modular belts on which a large number of carrier elements are processed at the same time, equipped with the IC component and wired and then arranged in a separate operation on corresponding chip cards, the chip cards increasing Dimensions can be used in all areas of daily life, for example in the form of telephone cards, access authorization cards for mobile telephones, bank cards, etc.
  • the carrier elements used for the chip cards are inserted into the cards so that the front side of the plate-shaped carrier body with its metallic contact surfaces forms a contact field for connecting the IC component arranged on the carrier element to external data transmission or reading devices.
  • the IC component as
  • the computer module is protected on the back of the carrier body of the carrier element in a recess in the chip card.
  • the support body is designed in such a way that there is an adhesive surface on its back around the IC module.
  • the middle region of the carrier plate, in which the IC component and a protective layer covering it from a potting material are arranged, is kept free from the adhesive applied in the edge regions according to the prior art.
  • the application of the adhesive for fastening the support body within the chip card is usually carried out with the aid of an adhesive film for this purpose, holes are provided in a separate work step, in which the IC component and the potting material are to be arranged later.
  • Such a construction of the carrier element contains two serious disadvantages.
  • the carrier element is designed in such a way that the adhesive surface as a full-surface adhesive layer covers the entire rear surface of the carrier element.
  • the method according to the invention for producing a carrier element according to the main claim provides that the full-surface adhesive layer is fixed to the carrier element by a pressing process by means of a pressure device with a pressure surface made of an elastic material, the pressure surface being so flexible that the carrier element with its entire surface the IC module and the back covering covering it can dip into the pressure pocket.
  • the adhesive layer is designed as a multilayer laminate coating with at least one adhesive coating facing the carrier element and at least one carrier layer covering the adhesive coating on the side facing away from the carrier element.
  • the laminate coating reliably prevents adhesion between the pressure surface and the adhesive layer during the pressing process for the adhesive layer.
  • the outer shape of the pressure surface can be realized in different ways. It has proven to be advantageous to design the pressure surface as a pressure roller, which permits continuous transport of the module belt provided with the individual carrier elements and, under certain circumstances, can additionally support this continuous transport as a driven pressure roller.
  • the pressure roller used has a diameter of 10 to 40 mm. , 4th
  • FIG. 1 a cross section of a carrier element according to the invention
  • FIG. 2 the carrier element according to the invention from FIG. 1 installed in a chip card and
  • the carrier element designated 1 in its entirety in FIG. 1 has an inner plate-shaped support body 2 which has a plurality of metallic contact surfaces 5 on its front flat side. In their entirety, the metallic contact surfaces 5 form a contact field, the contact surfaces being separated from one another by gaps 17.
  • An IC module 3 is arranged on the rear side facing away from the front flat side of the supporting body 2. The circuits of this component 3 are connected to the contact surfaces 5 via a plurality of connecting wires 15. For this purpose, there are several bores 16 in the support body 2 through which the individual connecting wires 15 are guided.
  • the IC module 3 is covered with a protective layer 6 made of a potting material after being wired to the contact areas 5.
  • the protective layer 6 is in turn enclosed by an adhesive layer 7 which extends over the entire surface of the entire rear surface of the carrier element. Due to the design according to the invention, punching out the adhesive surface of the carrier element in the area of the protective layer 6 is now superfluous, as a result of which the production costs can be significantly reduced. In addition, according to the invention, the shape of the "hill" of the potting material covering the IC module 3 is no longer relevant, so that control measures before applying the adhesive layer 7 are unnecessary. It can also be seen from FIG. 1 that the adhesive layer 7 as a laminate is provided with an internal adhesive coating 9 facing the support body 2 and a carrier layer 8 applied to the outside of the adhesive coating 9.
  • the carrier layer 8 allows the adhesive layer 7 to be easily applied to the rear of the carrier element 1, as will be explained in detail in the description of the method.
  • FIG. 1 thus represents a single carrier element which is used as an overall component in a chip card.
  • a chip card 4 with the carrier element 1 inserted therein is shown in section in FIG. 2.
  • the carrier element 1 is placed in a step-shaped recess 14 within the chip card 4.
  • the recess 14 has an internal recess 18 and a stepped collar area 19 on which the edge of the support body 2 rests.
  • the adhesive bond between the support body 2 and the chip card 4 takes place exclusively in this collar region 19, since the depth 18 of the recess 18 is dimensioned such that a gap, albeit small, remains between the outer surface of the adhesive coating 9 and the bottom of the recess 18.
  • FIGS. 3 a and b it is shown schematically how a connection between the carrier element 1 or the protective layer 6 and the carrier body 2 and the adhesive layer 7 can be brought about with the aid of a pressure surface 20 by a pressing process.
  • the method for producing a carrier element of the type described above provides that the individual carrier elements are combined to form modular belts on which a large number of individual carrier elements are located at the same time.
  • the above-mentioned adhesive layer 7 is placed on the outside of the protective layer 6, and in such a way that the adhesive layer 7 consisting of the carrier layer 8 and the adhesive coating 9 faces with its adhesive side to the protective layer 6 or to the support body 2. Then with the help of an elastic material existing pressure surface brings about a permanent bond between the adhesive layer 7 and the carrier element 1. To implement this method step, it is necessary that the elastic material of the pressure surface is so flexible that the support element 1 with its back side provided with the IC module and the protective layer 6 covering it can be completely immersed in the pressure surface. Only through complete immersion is it ensured that the adhesive layer 7 is also connected to the supporting body material 2 in the depressions located between the individual “hills” of the modular belt.
  • the pressure surface 20 is shown as a pressure pad 21 which is pressed onto the module belt with a force F, a counter-holder 23 preventing the module belt from escaping in the direction of the direction of action of the force F.
  • the pressing force F is to be dimensioned such that a sufficient pressing force for permanent fixation between the support body 2 and the adhesive layer 7 is brought about even in the depressions located between the "hills" of the modular belt.
  • FIG. 3 b A further embodiment variant of the pressure surface 20 is shown in FIG. 3 b.
  • the pressure surface is designed as a circumferential pressure roller 22, a counter-holder 23 in turn preventing the module belt from escaping in the direction of the force F.
  • the distance from the center of the pressure roller 22 is dimensioned in this embodiment such that the lower areas between the support elements are also touched.
  • the configuration with a pressure roller 22 has the advantage that a continuous transport movement of the module belt with the individual support elements 1 can be carried out.
  • Foam and rubber with a correspondingly necessary softness are particularly suitable as advantageous material for the pressure roller 22 and the pressure pad 21.
  • the pressure device for the method according to the invention with special additional features.
  • Essential to the invention is the coordination of the material properties of the pressure roller or the pressure pad with regard to the material properties of the potting compound for the IC module in such a way that the pressure surface is softer than the potting compound.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

L'invention concerne un élément support pour module à circuit intégré à monter dans une carte à puce, comportant : un corps support sous forme de plaque sur la face plate avant de laquelle sont aménagées des surfaces de contact métalliques, le module à circuit intégré étant monté sur sa face plate arrière ; une couche de protection en matériau de remplissage recouvrant le module à circuit intégré et une surface adhésive appliquée sur la face arrière du corps support et destinée à fixer l'élément support sur la carte à puce. En tant que couche adhésive en nappe, la surface adhésive recouvre l'ensemble de la surface arrière de l'élément support. Cette structure permet de réduire de manière non négligeable les frais de production de l'élément support objet de l'invention. l'invention concerne en outre un procédé permettant de produire un élément support de ce type, selon lequel la couche adhésive qui couvre toute la surface est fixée sur l'élément support par compression à l'aide d'un dispositif de compression à surface de compression réalisée dans un matériau élastique. La surface de compression est si souple que l'élément support peut s'enfoncer en elle, par sa face arrière munie du module à circuit intégré et de la couche de protection le recouvrant.
PCT/DE2000/002018 1999-06-29 2000-06-27 Element support pour module a circuit integre WO2001001341A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP00951232A EP1105838A1 (fr) 1999-06-29 2000-06-27 Element support pour module a circuit integre
AU64253/00A AU6425300A (en) 1999-06-29 2000-06-27 Support element for an integrated circuit module

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19929912.9 1999-06-29
DE19929912A DE19929912A1 (de) 1999-06-29 1999-06-29 Trägerelement für einen IC-Baustein

Publications (1)

Publication Number Publication Date
WO2001001341A1 true WO2001001341A1 (fr) 2001-01-04

Family

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PCT/DE2000/002018 WO2001001341A1 (fr) 1999-06-29 2000-06-27 Element support pour module a circuit integre

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CN100435170C (zh) 2001-04-02 2008-11-19 株式会社日立制作所 存储卡
FR2826154B1 (fr) * 2001-06-14 2004-07-23 A S K Carte a puce sans contact avec un support d'antenne et un support de puce en materiau fibreux
DE10147140A1 (de) * 2001-09-25 2003-04-17 Giesecke & Devrient Gmbh Chipkarte mit Display
DE10203827C2 (de) * 2002-01-31 2003-12-18 P21 Power For The 21St Century Leiterplattenanordnung sowie elektrisches Bauteil
DE10327746A1 (de) 2003-06-18 2005-01-05 Giesecke & Devrient Gmbh Verfahren zum Fixieren einer Beschichtung auf einem Trägerband
EP3836010B1 (fr) 2019-12-12 2024-07-24 Fingerprint Cards Anacatum IP AB Module de capteur biométrique pour l'intégration dans une carte

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US4897534A (en) * 1986-11-20 1990-01-30 Gao Gesellschaft Fur Automation Und Organisation Mbh Data carrier having an integrated circuit and a method for producing the same
JPH02301155A (ja) * 1989-05-16 1990-12-13 Citizen Watch Co Ltd Ｉｃモジュールの固定方法
EP0493738A1 (fr) * 1990-12-19 1992-07-08 GAO Gesellschaft für Automation und Organisation mbH Support d'information avec circuit intégré
EP0846743A1 (fr) * 1996-12-03 1998-06-10 Beiersdorf Aktiengesellschaft Feuille autocollante thermoplastique
EP0869452A1 (fr) * 1997-04-02 1998-10-07 ODS R. Oldenbourg Datensysteme GmbH & Co. KG Mini carte à puce et méthode de production

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US4897534A (en) * 1986-11-20 1990-01-30 Gao Gesellschaft Fur Automation Und Organisation Mbh Data carrier having an integrated circuit and a method for producing the same
JPH02301155A (ja) * 1989-05-16 1990-12-13 Citizen Watch Co Ltd Ｉｃモジュールの固定方法
EP0493738A1 (fr) * 1990-12-19 1992-07-08 GAO Gesellschaft für Automation und Organisation mbH Support d'information avec circuit intégré
EP0846743A1 (fr) * 1996-12-03 1998-06-10 Beiersdorf Aktiengesellschaft Feuille autocollante thermoplastique
EP0869452A1 (fr) * 1997-04-02 1998-10-07 ODS R. Oldenbourg Datensysteme GmbH & Co. KG Mini carte à puce et méthode de production

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EP1105838A1 (fr) 2001-06-13
DE19929912A1 (de) 2001-01-18

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