WO2000072597A1 - Dispositif de commutateur d'images et dispositifs de sortie d'images - Google Patents
Dispositif de commutateur d'images et dispositifs de sortie d'images Download PDFInfo
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- WO2000072597A1 WO2000072597A1 PCT/JP2000/003271 JP0003271W WO0072597A1 WO 2000072597 A1 WO2000072597 A1 WO 2000072597A1 JP 0003271 W JP0003271 W JP 0003271W WO 0072597 A1 WO0072597 A1 WO 0072597A1
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- video
- signal
- transmitted
- camera
- switching device
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40052—High-speed IEEE 1394 serial bus
- H04L12/40058—Isochronous transmission
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40052—High-speed IEEE 1394 serial bus
- H04L12/40071—Packet processing; Packet format
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40052—High-speed IEEE 1394 serial bus
- H04L12/40117—Interconnection of audio or video/imaging devices
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/422—Input-only peripherals, i.e. input devices connected to specially adapted client devices, e.g. global positioning system [GPS]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
- H04N21/43615—Interfacing a Home Network, e.g. for connecting the client to a plurality of peripherals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
- H04N21/4363—Adapting the video or multiplex stream to a specific local network, e.g. a IEEE 1394 or Bluetooth® network
- H04N21/43632—Adapting the video or multiplex stream to a specific local network, e.g. a IEEE 1394 or Bluetooth® network involving a wired protocol, e.g. IEEE 1394
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/06—Generation of synchronising signals
- H04N5/067—Arrangements or circuits at the transmitter end
- H04N5/073—Arrangements or circuits at the transmitter end for mutually locking plural sources of synchronising signals, e.g. studios or relay stations
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
- H04N7/181—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast for receiving images from a plurality of remote sources
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/426—Internal components of the client ; Characteristics thereof
Definitions
- a plurality of video signals output from a video output device such as a television camera are switched by using a digital interface such as an IEEE 1394 bus, and a desired video signal is selected.
- the present invention relates to a video switching device for outputting to a VTR or a display, and a video output device connected to the video switching device.
- FIG. 17 is a block diagram of a video recording / reproducing apparatus for performing monitoring and the like using a conventionally well-known video switching apparatus.
- each video signal extracted from a plurality of cameras CM 1 to CMN is controlled by a control circuit 7 on a frame-by-frame basis by a switch (SW) 1 as a frame switcher.
- the signals are sequentially switched based on the signal and input to the recording signal processing circuit 3.
- the recording signal processing circuit 3 performs signal processing such as maintaining the continuity of odd and even fields and subcarriers on the fetched video signal, and converts it into a recording signal for recording on the VTR 6. I do.
- the recording signal extracted from the recording signal processing circuit 3 is input to the superimposition circuit 4, and the camera number identification signal output from the control circuit 7 is superimposed in the superposition circuit 4 during the vertical blanking period of the recording signal. .
- Camera number identification signal extracted from control circuit 7 Is an identification signal corresponding to the camera to be output in synchronization with the switch 1.
- the recording signal on which the camera number identification signal is superimposed is output from the superimposing circuit 4 and recorded on the VTR 6.
- a switch (SW) 2 independent of the switch 1 can be used to select a video signal of a camera different from that recorded on the VTR 6 and monitor it by the monitor 5.
- Reference numeral 8 indicates the switch (S W) 1 and the switch (S W) 2 as one switch device.
- a video switching device and a video output device there is a device disclosed in Japanese Patent Application Laid-Open No. 5-83636. This device is equipped with a frame switch that switches and outputs video signals from a plurality of television cameras every frame.
- a frame switcher for sequentially selecting the desired camera video signals is required. Is required. If the desired camera is to be monitored simultaneously while recording the video signal output from each camera, an independent frame switcher must be prepared. That is, the frame switcher must have two systems, a switch for sequentially selecting and a switch for arbitrarily selecting video output from a desired camera.
- the present invention connects a plurality of video output devices (for example, cameras) to a VTR or a monitor, synchronizes the plurality of video output devices, and sequentially
- An object of the present invention is to provide a video switching device having a switcher function for selecting a video signal output from a video output device, and a video output device connectable to the video switching device. That is, the present invention is characterized by two devices, a video switching device and a video output device.
- the video switching device is connected to a plurality of video output devices via a digital interface.
- the digital interface is preferably an IEEE 1394 bus according to the IEEE 1394 standard.
- the video switching device includes video switching control means.
- the video switching control means outputs a desired output device from among the plurality of video output devices, that is, a desired video signal via a digital video interface, and performs video switching control data for switching. Is output.
- the video switching control data includes data as to which video output device is to be used to output a stream from a plurality of video output devices (for example, a force camera) and which channel is not to be output. . That is, the video switching control data includes a device number for identifying and distinguishing a plurality of video output devices, a channel to be streamed, and information on or off of the stream. It is transmitted by Sono-Ross bucket communication or Synchro-no-Socket bucket communication.
- stream means that a video switching device and a video output device are connected via a digital interface.
- a video signal used for transmission or reception with the device corresponds to the video signal.
- the video switching device further includes a video signal selection unit that selects and receives a video signal transmitted from the video output device in response to the switching control data, in addition to the video switching control unit.
- a video signal selection means a digital interface, especially a wireless packet communication or a asynchronous packet communication suitable for the IEEE 1394 bus conforming to the IEEE 1394 standard is used. Is adopted.
- the video switching device of the present invention includes a synchronization signal transmitting unit for transmitting a synchronization timing signal for synchronizing the video output devices, in addition to the video switching control unit and the video signal selecting unit.
- the video signal selecting means constituting the video switching apparatus of the present invention includes a receiving means for a wireless packet communication or a wireless packet communication.
- the synchronization signal transmitting means for transmitting the synchronization timing signal can use, for example, a frame synchronization signal having a frequency of 30 Hz as a reference signal.
- another video output device of the present invention is a device connected to the video switching device via a digital interface, and receiving means for receiving video switching control data transmitted from the video switching device.
- a synchronizing signal reproducing means for reproducing the synchronizing timing signal transmitted from the video switching device; synchronizing the video signal with the synchronizing signal from the synchronizing signal reproducing means;
- a video signal transmitting means for transmitting in response to video switching control data from the device is provided.
- the video output device of the present invention is also preferably connected to the IEEE 1394 bus.
- the receiving means for receiving the video switching control data and the video signal transmitting means for transmitting in response to the video switching control data from the video switching device are transmitted by isochronous packet communication. That is, the transmission and reception of the synchronization timing signal, the video signal, and the video switching control data between the video output device of the present invention and the video switching device are performed via the digital interface.
- the video switching control data is performed by Sochrono packet communication.
- the video switching control data may be transmitted by syncrono packet communication.
- the video output device of the present invention is connected to a video interface via a digital interface, in particular, an IEEE1394 bus, and the video output device is disclosed in the present invention. It is preferable to use a roller image switching device.
- FIG. 1 is a block diagram showing a configuration of a video switching device according to Embodiment 1 of the present invention
- FIG. 2 is a block diagram showing a configuration of a video output device in Embodiment 1
- FIG. 4 is a diagram showing a format of an isochronous communication bucket in the IEEE 13944 standard.
- FIG. 4 is a block diagram showing a configuration of a video synchronization signal reproducing unit according to the first embodiment of the present invention.
- Fig. 5 is a block diagram showing the configuration of the video signal transmission unit of the camera according to the first embodiment of the present invention
- Fig. 6 is a concept showing the state of the isochronous communication in the IEEE1394 standard.
- FIG. 1 is a block diagram showing a configuration of a video switching device according to Embodiment 1 of the present invention
- FIG. 2 is a block diagram showing a configuration of a video output device in Embodiment 1
- FIG. 4 is a diagram showing a format of an isochronous
- FIG. 7 is a conceptual diagram showing the timing of adding the time information on the transmission side to the data header in the first embodiment of the present invention.
- FIG. 8 is a synchronizing signal of the video switching device in the first embodiment of the present invention.
- FIG. 9 is a block diagram showing a configuration of a transmission unit
- FIG. 9 is a block diagram showing a configuration of a synchronization signal reproducing unit of the video switching device
- FIG. 10 is a block diagram on a reception side according to Embodiment 1 of the present invention.
- FIG. 11 is a conceptual diagram showing the timing of generating a reference signal.
- FIG. 11 is a conceptual diagram showing channels and connection states in the IEEE 1394 bus according to the first embodiment.
- FIG. 12 is a conceptual diagram showing the first embodiment.
- FIG. 13 is a diagram showing operation timing when video switching is performed on three channels in FIG. 13.
- FIG. 13 is a diagram showing operation timing when video switching is performed on five channels in the first embodiment.
- 4 is a block diagram showing the configuration of a video switching device according to Embodiment 2 of the present invention.
- FIG. 17 is a block diagram showing the configuration of a conventional video switching device.
- FIG. 1 is a block diagram showing a configuration of a video switching device and a video output device according to Embodiment 1 of the present invention.
- a video switching device and a video output device are described using a camera, and the present invention can be applied to other media or devices that handle various video signals such as a VTR and an HDD. Please understand this.
- DIF 114 is an IEEE 1394 bus, preferably based on the IEEE 1394 standard.
- the camera switching device 105 corresponds to the video switching device of the present invention, and specifically, a camera that outputs camera video switching control data for switching between the cameras 101 to 104.
- the asynchronous video packetizing circuit 107 for converting the camera video switching control data into the asynchronous communication packet
- the cameras 101 to 104 Synchronous signal transmitting unit 108 for transmitting the synchronous timing signal of the first and second isochronous buckets for converting the synchronous timing signal extracted from the synchronous signal transmitting unit 108 into an isochronous communication bucket I / O circuit 113 for inputting / outputting each bucket data via the DIF 114, and an isochronous communication bucket from the I / O circuit 113
- FIG. 2 shows a specific block diagram of the DIF 114 shown in FIG. 1 and the cameras 101 to 104 connected thereto. As shown in FIG. 2, an input / output circuit 120 for performing packet communication via the DIF 114, and an apparatus for receiving the isochronous communication bucket from the input / output circuit 120.
- Isochronous packet receiving circuit 1 2 1, asyncronos for receiving asyncronos communication packet
- a packet receiving circuit 1 2 2 a synchronizing signal reproducing section 1 2 3 for reproducing a synchronizing signal from the received isochronous communication packet, and a video signal from an imaging section (not shown) 1 2
- a video signal transmitting section 124 that outputs a video signal synchronized with the synchronization signal from 3 and an isochronous bucket that converts the video signal from the video signal transmitting section 124 into an isochronous bucket.
- Fig. 3 shows the format of the Isochronous communication bucket defined in the IEEE1394 standard.
- the file transfer packet consists of a 4-byte bucket header 201 and a 4-byte header CRC (Cyc 1 ic Redundancy Check) 202, a data area 203, and a 4-byte data CRC 204 for checking the presence or absence of a transmission error in the data area 203.
- CRC Cyc 1 ic Redundancy Check
- a plurality of devices can transmit a plurality of isochronous communication buckets in a time-division manner about every 125 ⁇ sec (hereinafter referred to as cycle time).
- cycle time a channel number is assigned to the bucket header 201 of the isochronous communication packet.
- control commands and the like are transmitted using an asynchronous communication packet (asynchronous packet).
- the camera 101 when transmitting the video signal of the camera 101 to another node, for example, the camera switching device 105, the camera 101
- the video signal extracted from the DIF 114 is sent to the DIF 114 via the video signal transmitter 124, the isochronous bucket circuit 125, and the input / output circuit 120.
- I Sok In the mouth bucketing circuit 125 the video data is divided into a predetermined number of bytes that can be transmitted in one cycle time, and a data header indicating the type of video data is added thereto.
- 3 9 4 Adds the information necessary to compose a standard isochronous communication bucket and sends it.
- This packet is transmitted using a clock that is asynchronous with the video signal output from the video signal transmission unit 124.
- the camera switching control is performed by controlling the input / output circuit 114 of the camera 101 based on the video switching control data received by the asynchronous communication packet.
- the input / output circuit 113 of the camera switching unit 105 receives an iso-nox communication bucket to which a channel number to be received is added.
- the channel number is transmitted in the asynchronous communication packet, for example, transmitted from the camera switching device 105 to the input / output circuit 113.
- the input / output circuit 113 is restored from the wireless communication packet.
- the synchronization signal and the video data are transmitted to the isochronous packet receiving circuit 111, and the synchronizing signal is transmitted from the synchronous signal reproducing unit 110, and the video data is transmitted to the isochronous packet receiving circuit 1. Output from 1 and 1 respectively.
- These output synchronization signals and video data can be sent to a video output device or a receiving device (not shown).
- the transmission of the synchronization timing signal is at least one of the isochronous bucket communication and the asynchronous sync packet communication that does not include the video data, and is all cascaded by the DIF 114. It is preferable to send to the camera 101 to 104. By not putting video data on the IEEE1394 node, the IEEE1394 bandwidth can be used effectively.
- DIF 1 1 4 The camera that receives the synchronization timing signal via the
- the synchronization signal reproducing section 123 restores the frame synchronization timing signal via the syncrono packet receiving circuit 122 and the syncrono packet receiving circuit 122.
- this frame synchronization timing signal the video signals output from the cameras 101 to 104 can be synchronized with each other, whereby the cameras 101 to 104 can be synchronized.
- the video signal captured by each is synchronized with the frame synchronization timing signal.
- the camera switching control unit 106 selects a camera to be transmitted to the IEEE1394 bus for each frame unit, and the video switching control data is synced by the synchro-no-bucket conversion circuit 107. Lonos communication Packetized and transmitted.
- FIG. 4 is a block diagram showing the configuration of the synchronization signal reproducing unit 123
- FIG. 5 is a block diagram showing the configuration of the video signal transmitting unit 124. First, the operation at the time of transmission will be described.
- the time information generating circuit 130 uses a cycle time register specified by the IEEE1394 standard.
- the cycle time register is a 32 bit counter. From 0 to 3071, the clock counts at 24.576 MHz clock. The next upper 13 bits are a counter that counts 8 kHz cycles, counting from 0 to 7999. In addition, the next 7 most significant bits are a count that counts from 0 to 127 every second. All the devices connected to the IEE 1394 bus have such a time information generating circuit 130.
- One of the IEEE1394 bus devices is cycled As a master, it transmits a cycle packet 4001 to all nodes approximately every 125 ⁇ sec as shown in Fig. 6.
- a node that performs isochronous communication transmits a cycle start bucket 401 and then an isochronous communication bucket 402.
- the value of the time information generation circuit 130 in the cycle master device is transmitted to all IEEE 1394 nos devices by the cycle restart packet 401.
- the device that has received the cycle start packet 401 changes the value of its own time information generation circuit 130 to the value of the time information in the cycle start packet 410. Therefore, the values of the time information generation circuit 130 of all devices of the IEEE1394 bus are almost always the same.
- the block circuit 1336 in FIG. 5 divides the video signal by a predetermined number of bytes to be transmitted in one cycle, and outputs the video signal to the multiplex circuit 1337 for each number of bytes.
- the frame synchronization detection circuit 1338 detects a frame synchronization timing signal from the video signal and outputs the signal to the latch circuit 1339.
- the time information generating circuit 130 outputs 20 bits out of the 32 bits of the generated time information to the latch circuit 1339.
- the latch circuit 1339 latches the output value of the time information generation circuit 130 at the beginning of the frame by the frame synchronization timing signal detected by the frame synchronization detection circuit 1338. I do.
- the latched value is output to the data header generating circuit 140.
- the data header generating circuit 140 arranges the time information latched by the latch circuit 1339 at a predetermined position in the data header, and outputs the time information to the multiplexing circuit 1337.
- the multiplexing circuit 1337 adds a data header to the beginning of the block data input from the blocking circuit 13 6 and Output to the Sokurono packetization circuit 1 25.
- the isochronous bucketing circuit 125 adds a bucket header 201, a header CRC 202, and a data CRC 204 according to the IEEE 1394 standard as shown in FIG. , Output to the input / output circuit 120.
- the time information generating circuit 130, the latch circuit 1339, and the data header generating circuit 140 will be described in more detail with reference to FIG.
- the vertical axis in Fig. 7 shows the count value during the cycle evening and the horizontal axis shows the count time.
- (1) shows the frame synchronization detection signal
- (2) shows the output of the multiplex circuit 1337.
- the time information generating circuit 130 of the transmitting device that is, the value of the cycle time register, counts up with time, as shown in FIG.
- the rising pulse of the frame synchronization detection signal indicates that the timing is at the beginning of the frame.
- the latch circuit 1339 latches the value of the time information generating circuit 130.
- Figure 7 shows that the time to send the first packet of one frame is X or Y.
- the data header creation circuit 140 adds the value of the latched time information generation circuit 130 to the data header added to the first packet of the frame, and does not add it to the other packet headers.
- the values X and Y are added to the header only for the first bucket of the frame.
- the operation at the time of reception will be described.
- only the isochronous communication bucket to be received from the data input via the input / output circuit 120 is an isochronous bucket.
- the data is received by the data receiving circuit 12 1, confirms that there is no error in the bucket, and is output to the data header detecting circuit 13 1.
- the data header detecting circuit 13 1 extracts the time information in the data header added to the received packet, and outputs the time information to the adding circuit 13 2.
- the addition circuit 1332 adds a predetermined value to the time information input from the data header detection circuit 131, and outputs the added value to the reference signal generation circuit 133.
- the time information generating circuit 130 outputs its own time information to the reference signal generating circuit 133.
- the reference signal generating circuit 1333 compares the added value input from the adding circuit 1332 with the time information input from the time information generating circuit 130, and outputs the signal from the time information generating circuit 130. A predetermined pulse is generated when the input time information matches the added value. Since the time information input from the adder circuit 1332 indicates the timing of the beginning of the frame on the transmitting side, the frame synchronization generator circuit 134 outputs the time information from the reference signal generator circuit 1333. Generates a frame synchronization signal using the input pulse as a reference signal.
- the external synchronizing video signal generating circuit 135 outputs a video signal synchronized with the frame synchronizing signal.
- the asynchronous communication packet is received by the asynchronous packet receiving circuit 122 for each frame, and the video switching control data is input / output. Output to circuit 120.
- the isochronous packet to be transmitted to the IEEE1394 bus is selected for each frame according to the video switching control data.
- FIG. 9 is a block diagram showing the configuration of the synchronization signal transmission unit 108
- FIG. 9 is a block diagram showing the configuration of the synchronization signal reproduction unit 110. First, the operation at the time of transmission will be described.
- the time information generating circuit 150 uses a cycle time register specified in the IEEE1394 standard.
- the video synchronization signal which is the reference signal, is supplied to the latch circuit 15 1.
- the time information generating circuit 150 outputs 20 bits of the 32 bits of the time information to the latch circuit 151.
- the latch circuit 1501 latches the output value of the time information generating circuit 150 by a video synchronization signal (reference signal).
- the latched value is output to the data header creation circuit 152, and the data head creation circuit 152 is latched at a predetermined position in the data header by the latch circuit 151.
- the time information is arranged and output to the non-synchronous bucket forming circuit 109.
- the packet packing circuit 109 adds a packet header 201, a header CRC 202, and a data 204, according to the IEEE 1394 standard, as shown in FIG. Output to output circuit 113.
- the camera switching device 105 adds the frame synchronization timing signal based on the predetermined reference signal to the data header of the isochronous communication packet in which video data is not multiplexed. By doing so, it transmits to all of the cameras 10:! To 10 4 connected via the DIF 114.
- the video switching control data output by the camera switching control unit 106 is input to the asynchronous losing packetizing circuit 107 for each frame, and is input and output by the asynchronous losing communication packet. circuit It is transmitted to IEEE 1394 bus via 113.
- the data header detecting circuit 153 extracts the time information in the data header added to the received packet, and outputs the time information to the adding circuit 154.
- the addition circuit 154 adds a predetermined value to the time information input from the data header detection circuit 153, and outputs the added value to the reference signal generation circuit 155.
- the time information generating circuit 150 outputs its own time information to the reference signal generating circuit 150.
- the reference signal generation circuit 155 compares the added value input from the addition circuit 154 with the time information input from the time information generation circuit 150, and receives the input from the time information generation circuit 150.
- a predetermined pulse is generated when the time information matches the added value. Since the time information input from the adder circuit 154 indicates the timing of the beginning of the frame on the transmitting side, the frame synchronization generator circuit 156 is input from the reference signal generator circuit 155.
- a predetermined synchronizing signal synchronized with the frame synchronizing signal used inside the device is generated using the pulse as a reference signal.
- the asynchronous packet receiving circuit 112 has the function of the video signal selecting means of the present invention together with the input / output circuit 113.
- the vertical axis indicates the value of the time information of the receiver, and the horizontal axis indicates the time.
- FIG. The respective period signals are shown. Since the time information originally shows the same value in all devices, when the receiving device receives, the time information of the receiving device is latched and added at the time of transmission due to the transmission delay on the IEEE1394 bus. It already indicates a value greater than the time information in the packet.
- the transmitting device latches the value X of the time information added in the bucket.
- the value of the time information of the receiving device is X + DLY1, so that the time information of the internal time information is obtained from the time information of the received bucket.
- the reference signal generation circuit 155 indicates that the value of the time information of the receiving device matches the value of the time information added to the received bucket. Then, a rising pulse is generated as a reference signal. Therefore, at the time of reception, the value of the time information inside the device has already become larger than the value of the received time information, so that the reference signal generation circuit 155 cannot generate a pulse.
- the addition circuit 154 adds the time DLY2, which is equivalent to the time from when the transmitting side latches the time information of the transmitting device to when the receiving device compares the time information with the reference signal generating circuit 155, with the adding circuit 154.
- the reference signal generation circuit 155 compares the added value with the value of the time information inside the receiving device. As a result, the reference signal generation circuit 155 generates a rising pulse as a reference signal at time T3.
- the cameras 101 to 104 are sequentially switched for each frame from the camera switching device 105 and received, and a specific camera is connected to a specific receiving device (for example, a monitor or the like). ), And the case of constant monitoring will be described with reference to FIGS. 11 and 12.
- the IEEE 13944 standard provides 64 transmission channels, from 0 to 63, through which the IEEE 1394 bus is transmitted from a specific node. There are a broadcast mode in which data is transmitted to all nodes connected to a specific node, and a mode in which a specific node is connected to a specific node.
- a video signal (video data) from a camera 101 to 103 is transmitted to a camera switching device 10 via a communication channel CH2 by a wireless communication packet. Sent to 5.
- the video data from the camera 104 is transmitted to the camera switching device 105 and the receiving device 160 via the communication path CH3 by a wireless communication packet.
- the camera synchronization timing signal is transmitted in broadcast mode via the communication channel CH1 by the isochronous communication packet, and each camera 101 to 104 and the receiving device are transmitted. Transmitting to 160.
- Fig. 1 and 2 show the operation.
- (1) is a video switching signal transmitted by asynchronous
- (2) is a stream transmitted by CH2
- (3) is CH3.
- (4) is the channel received by the camera switching device 105
- (5) is the video received by the camera switching device 105
- (6) is the receiving device 160.
- the receiving channel (7) at is the video received by the receiving device 160.
- each camera 101 is transmitted from the camera switching device 105 by an isochronous communication bucket based on the synchronization signal transmitted to each camera in the broadcast mode.
- 1104 transmit synchronized video data.
- the video switching signal is transmitted from the force camera switching device 105 in the asynchronous communication bucket.
- the video switching signal indicates the channel to be transmitted by each camera and the number of frames to be output. For example, in the first frame, camera 101 has 1 (zero) frame in CH2, camera 102 has 0 (zero) in CH2, and camera 103 has 0 (zero) in CH2. ) Frame and camera 104 are set to output 1 frame on CH3.
- the video data of camera 101 is output to CH 2 in the second frame based on the camera switching signal set in the first frame.
- One frame is transmitted on CH2, and on the third frame, the video data of camera 101 is stopped based on the camera switching signal set in the second frame, and camera 102 is stopped. Is transmitted one frame on CH2.
- Camera 104 is always output to CH3.
- the receiving channel of the camera switching device 105 is changed to CH2, CH2, CH2 and CH3 as shown in Fig. 12 (4).
- cameras 101 to 104 can be switched to a sequencer every frame, including camera 104, which is always output on CH3, and output.
- the output of the camera 104 can always be obtained.
- the second frame is transmitted by one frame of camera 101, and the next third frame is transmitted by camera 10
- camera switching device 105 at camera frame 104 displays the image of camera 104 at CH
- camera 103 transmits frame 103 again for 1 frame.
- the same is repeated.
- the camera switching device 105 has the camera 2 from the second frame to the fourth frame with CH2.
- camera 104 receives 1 to 103 and changes the receiving channel from CH2 to CH3 and receives.
- the receiving device 160 can always receive the camera 104 with the CH 3 as shown in FIGS. 11 and 12 (6) and (7).
- the cameras 101 to 10 The video signal from 3 is time-division-multiplexed.
- the output channels of the cameras 101 to 104 can be used. May be set to CH2 to CH5, respectively, and may be realized only by the receiving channel.
- FIG. 13 shows a specific example of this.
- the camera switching device 105 sends the signals to the cameras 101 to 104, respectively.
- a video switching signal is transmitted by an asynchronous communication packet so that transmission is performed for each frame on CH2 to CH5.
- the signals of each camera are transmitted to each channel.
- the receiving channels are switched as shown in FIG. 13 (6), and as shown in FIG. 13 (7), the cameras 101 to: L 0 Output 4 can be switched sequentially and output.
- channel 5 CH5
- the camera will always be selected as shown in FIG. 13 (9). 104 images can be received.
- FIG. 14 is a block diagram showing a configuration of cameras 101 to 104 and a video switching device 118 according to Embodiment 2 of the present invention.
- the asynchronous packet converting circuit 107 converts the synchronous timing signal into an iso-noise bucket communication packet without using the asynchronous packetizing circuit 107 in the first embodiment.
- Synchronization timing signal and camera control data are replaced by an isochronous bucketing circuit 1 17 for converting into an isochronous packet.
- DIF114 is an instance based on the IEEE1394 standard.
- the camera switching device 118 includes a camera switching control unit 106 that outputs video switching control data for camera switching, and a reference signal (for example, a camera) for synchronizing the cameras.
- a synchronous signal transmitting unit 108 for inputting a synchronous timing signal and transmitting a synchronous timing signal, and a converter for converting the synchronous timing signal and the camera switching control data into an isochronous communication bucket.
- a wireless packet receiving circuit for receiving a wireless communication packet; and a synchronous signal reproducing unit for reproducing a synchronous signal from the received wireless communication packet.
- each camera has an input / output circuit 120 for inputting / outputting a packet data to / from the DIF 114 and a wire from the input / output circuit 120.
- a sync packet receiver circuit 121 for receiving a Sono-nos communication packet, a sync signal reproducing unit 123 for reproducing a sync signal from the received iso-nos communication packet, and an imaging unit (shown in the figure).
- a video signal transmitting section 124 that outputs a video signal synchronized with the synchronizing signal from the synchronizing signal reproducing section 123 and a video signal from the video signal transmitting section 124. It has an isochronous bucket conversion circuit 12'5 for converting into an isochronous bucket.
- the video signal of the camera 101 when transmitting the video signal of the camera 101 to another node, the video signal of the camera 101 is input to the video signal transmission unit 124, the isochronous packetizing circuit 125, It is sent to DIF 114 via output circuit 120.
- the isochronous bucketing circuit 125 divides video data into a predetermined number of bytes that can be transmitted in one cycle time, adds a header to data indicating the type of data, etc. 3 9 4 Adds the information necessary to compose a standard isochronous communication packet and sends it. This packet is transmitted using a clock that is completely asynchronous with the video signal output from the video signal transmission unit 124. Further, the video switching control is performed by controlling the input / output circuit 114 of the camera 101 based on the video climbing control data received by the Isochronos communication bucket.
- the input / output circuit 1 13 of the camera switching device 1 18 receives the isochronous communication packet to which the channel number to be received is added.
- the channel number is transmitted from, for example, a video switching device in a wireless communication packet, and is received and given to the input / output circuit 113.
- the operation of the camera switching device 118, which outputs the frame synchronization signal and video data restored from the received isochronous communication packet, is the same as in the first embodiment for both transmission and reception.
- the video switching control data output by the camera switching control unit 106 is input to the isochronous packetizing circuit 115, and the input / output circuit 111 is input to the isochronous bucket by the isochronous bucket.
- the video signal selection means which is one of the constituent elements of the present invention, mainly includes a wireless packet receiving circuit 111, and is compatible with the input / output circuit 113. It is composed together.
- the video switching means and the synchronizing signal transmitting means which are other components of the present invention, are the same as those in the first embodiment.
- the cameras 101 to 104 are sequentially switched for each frame from the camera switching device 118 and received, and a specific camera is connected to a specific receiving device (for example, a monitor or the like). ),
- the camera switching control data is also transmitted in the same isochronous communication packet as the synchronization timing signal, and the channel usage is determined according to the embodiment. It is almost the same as 1.
- camera 101 outputs camera 101, 102, 103, 103 in order of one frame at a time
- CH 3 outputs camera 104, one frame at a time. Output every time.
- the receiving channel of the camera switching device 118 repeats CH2, CH2, CH2, and CH3 so that the camera is switched every frame. It is possible to sequentially switch between 101 to 104 and output.
- the receiving device 160 as shown in FIG. 12 (6), by always selecting CH3, the output of the camera 104 can always be obtained.
- both the synchronization timing signal and the camera switching control data are transmitted by broadcast using an isochronous bucket, but the synchronization timing signal is transmitted by broadcast broadcasting.
- the camera switching control data is transmitted one-to-one from the camera switching device to a specific camera, and the synchronization timing signal and the camera switching control data are separated by separate isochronous packets. Even when transmitted by communication, camera switching is almost the same as above.
- FIG. 16 is a block diagram showing a configuration of a camera and a video switching device according to Embodiment 3 of the present invention.
- video switching control data is supplied to the isochrono packetizing circuit 117 from the asynchronous packet received by the asynchronous packet receiving circuit 116 to the isochrono packetizing circuit 117.
- the synchronous packetizing circuit 1 17 replaces the synchronous timing signal and the video switching control data with a synchronous packet.
- the four cameras 10 1 to 1 04 and the camera switching device 1 19 are connected via DIF 114, respectively.
- DIFF114 can be an interface based on the IEEE1394 standard.
- each camera is completely the same as the second embodiment as shown in FIG.
- the video signal of the camera 101 is sent to the DIF 114 via the video signal transmission unit 124, the isochronous bucket circuit 125, and the input / output circuit 120.
- the isochronous packetizing circuit 125 divides video data into a predetermined number of bytes that can be transmitted in one cycle time, adds a header to data indicating the type of data, etc. 3 9 4 Adds the information necessary to compose a standard isochronous communication packet and sends it.
- This bucket is transmitted using a clock that is completely asynchronous with the video signal output from the video signal transmitter 124.
- the video switching control is performed by controlling the input / output circuit 114 of the camera 101 based on the video switching control data received by the isochronous communication packet. .
- the camera switching device 1 19 includes a camera switching control unit 106 that outputs video switching control data for switching the camera, and an flash controller that converts the video switching control data into an asynchronous communication bucket. And a camera packet receiving circuit 111 which receives the asynchronous packet communication packet and supplies the video switching control data to the packet synchronous packetizing circuit 117.
- a synchronization signal transmitting unit 108 for inputting a reference signal (eg, a frame synchronization signal) for synchronizing a frame and transmitting a synchronization timing signal, a synchronization timing signal and a video switching control data.
- an input / output circuit 113 for inputting / outputting each bucket data to / from DIF 114, respectively.
- the operation of the camera switching device 119 is the same for both transmission and reception as in the first embodiment.
- the video switching control data output by the camera switching control unit 106 is synchronized with the synchro.
- the signal is input to the no-packetizing circuit 107 and is transmitted to the IEEE 1394 node via the I / O circuit 113 by the asynchronous packet, and the I / O circuit 111 Only the asynchronous communication packet that should be received from the data input through 3 is received by the asynchronous packet receiving circuit 116, and the video switching control data is transmitted to the isochronous packetizing circuit 111. 7 and is transmitted to the IEEE 1394 bus via the input / output circuit 113 via the input / output circuit 113 along with the synchronization timing signal. Thereby, the channel to be received can be selected for each frame, and video switching by the received channel is performed.
- the cameras 101 to 104 are sequentially switched from frame to frame for each frame from the camera switching device 119, and a specific camera is connected to a specific receiving device (for example, a monitor).
- the video switching control data is also transmitted in the same isochronous bucket as the synchronization timing signal when the signal is received and monitored continuously.
- the usage status of the channel is exactly the same as in the first embodiment.
- camera 101 outputs camera 101, 102, 103, 103 in order of one frame at a time
- CH 3 outputs camera 104, one frame at a time. Output every time.
- the receiving channels of the camera switching device 1 19 are CH2, CH2, C By repeating H2 and CH3, the cameras 101 to 104 can be sequentially switched every frame and output.
- the output of the camera 104 can be always obtained.
- the synchronization signal is transmitted by broadcast, the synchronization of the plurality of cameras is established, and the synchronization signal transmitted from the camera transmitted through the interface is transmitted.
- a video switching device and a video output device can be provided with a simple configuration.
- a packet including synchronization timing signal information is transmitted to each of a plurality of cameras at a digital interface conforming to the IEEE 1394 standard, and
- the switching control data is transmitted by an asynchronous communication packet or an isochronous communication packet, and video signals of a plurality of synchronized cameras are transmitted based on the video switching control data.
- a digital interface conforming to the IEEE 1394 standard provides a stream for monitoring camera recording and a monitor for monitoring. Streams can be transmitted in a multiplexed manner, and only by preparing a specific receiving device, it is possible to simultaneously perform monitoring camera recording and monitoring functions. Since the switcher which had to be prepared is no longer required, an inexpensive video switching device and video output device can be obtained.
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/744,395 US7486308B1 (en) | 1999-05-24 | 2000-05-23 | Image switching device and image outputting devices |
EP00929827A EP1102489A4 (en) | 1999-05-24 | 2000-05-23 | IMAGE SWITCH DEVICE AND IMAGE OUTPUT DEVICES |
JP2000619935A JP3975678B2 (ja) | 1999-05-24 | 2000-05-23 | 映像切換装置及び映像出力装置 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14284599 | 1999-05-24 | ||
JP11/142845 | 1999-05-24 | ||
JP29206099 | 1999-10-14 | ||
JP11/292060 | 1999-10-14 |
Publications (1)
Publication Number | Publication Date |
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WO2000072597A1 true WO2000072597A1 (fr) | 2000-11-30 |
Family
ID=26474727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2000/003271 WO2000072597A1 (fr) | 1999-05-24 | 2000-05-23 | Dispositif de commutateur d'images et dispositifs de sortie d'images |
Country Status (5)
Country | Link |
---|---|
US (1) | US7486308B1 (ja) |
EP (1) | EP1102489A4 (ja) |
JP (1) | JP3975678B2 (ja) |
KR (1) | KR100633965B1 (ja) |
WO (1) | WO2000072597A1 (ja) |
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JP2006203817A (ja) * | 2005-01-24 | 2006-08-03 | Nippon Soken Inc | マルチカメラシステム |
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KR100824016B1 (ko) * | 2006-07-14 | 2008-04-21 | 엠텍비젼 주식회사 | 비동기 양안 카메라에서 생성되는 출력 데이터의 동기화를수행하는 시스템, 방법 및 기록 매체 |
JP2015095720A (ja) * | 2013-11-11 | 2015-05-18 | 東芝テリー株式会社 | 同期式カメラ |
JP2019220737A (ja) * | 2018-06-15 | 2019-12-26 | キヤノン株式会社 | 撮像装置、撮像システム、および撮像装置の制御方法 |
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US20030222982A1 (en) * | 2002-03-28 | 2003-12-04 | Hamdan Majil M. | Integrated video/data information system and method for application to commercial vehicles to enhance driver awareness |
JP2007031102A (ja) * | 2005-07-28 | 2007-02-08 | Mitsubishi Heavy Ind Ltd | クレーン装置の遠隔操作装置及びクレーン装置並びにクレーン装置の遠隔操作システム |
JP2007201995A (ja) * | 2006-01-30 | 2007-08-09 | Matsushita Electric Ind Co Ltd | 映像データ転送処理装置および監視カメラシステム |
KR101000531B1 (ko) * | 2008-06-26 | 2010-12-14 | 에스디씨마이크로 주식회사 | 데이터 전송 범위가 증대되는 무선랜을 이용한 씨씨티브이관리시스템 |
US8332557B2 (en) * | 2008-12-12 | 2012-12-11 | Qualcomm, Incorporated | System, apparatus, and method for broadcasting USB data streams |
JP5038469B2 (ja) * | 2010-01-22 | 2012-10-03 | 株式会社日本ビデオシステム | ビューファインダー装置、ビューファインダー装置固定用アダプタ |
CN102223490B (zh) * | 2011-06-22 | 2013-04-10 | 博康智能网络科技股份有限公司 | 一种支持同步切换的数字交换矩阵和数字图像的同步切换方法 |
US9041813B1 (en) * | 2014-02-14 | 2015-05-26 | Maxim Integrated Products, Inc. | Multiple camera synchronization system |
JP6662492B2 (ja) * | 2017-05-15 | 2020-03-11 | 東芝三菱電機産業システム株式会社 | プラント操業状態解析システム |
DE102019220278A1 (de) * | 2019-12-19 | 2021-06-24 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zur Anzeige von Videos |
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Also Published As
Publication number | Publication date |
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KR100633965B1 (ko) | 2006-10-16 |
KR20010053576A (ko) | 2001-06-25 |
EP1102489A1 (en) | 2001-05-23 |
US7486308B1 (en) | 2009-02-03 |
EP1102489A4 (en) | 2005-11-16 |
JP3975678B2 (ja) | 2007-09-12 |
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