WO2000062426A1 - Intra-row permutation for turbocode - Google Patents

Intra-row permutation for turbocode Download PDF

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Publication number
WO2000062426A1
WO2000062426A1 PCT/IB2000/000375 IB0000375W WO0062426A1 WO 2000062426 A1 WO2000062426 A1 WO 2000062426A1 IB 0000375 W IB0000375 W IB 0000375W WO 0062426 A1 WO0062426 A1 WO 0062426A1
Authority
WO
WIPO (PCT)
Prior art keywords
interleaver
row
storage array
data
values
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2000/000375
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English (en)
French (fr)
Inventor
Bin Li
Wen Tong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nortel Networks Ltd
Original Assignee
Nortel Networks Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nortel Networks Ltd filed Critical Nortel Networks Ltd
Priority to KR1020017013113A priority Critical patent/KR100780995B1/ko
Priority to JP2000611385A priority patent/JP4298175B2/ja
Priority to BRPI0009717-9A priority patent/BRPI0009717B1/pt
Priority to CA002366581A priority patent/CA2366581C/en
Priority to HK02101835.5A priority patent/HK1040141B/en
Priority to DE60002705T priority patent/DE60002705T2/de
Priority to EP00911181A priority patent/EP1169777B1/en
Publication of WO2000062426A1 publication Critical patent/WO2000062426A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2771Internal interleaver for turbo codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2789Interleaver providing variable interleaving, e.g. variable block sizes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H03M13/2714Turbo interleaver for 3rd generation partnership project [3GPP] universal mobile telecommunications systems [UMTS], e.g. as defined in technical specification TS 25.212
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2735Interleaver using powers of a primitive element, e.g. Galois field [GF] interleaver
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6522Intended application, e.g. transmission or communication standard
    • H03M13/65583GPP2

Definitions

  • This invention relates generally to communication systems and, more particularly to interleavers for performing code modulation.
  • Coded modulation has been found to improve the bit error rate (BER) of electronic communication systems such as modem and wireless communication systems.
  • Turbo coded modulation has proven to be a practical, power-efficient, and bandwidth- efficient modulation method for " random-error" channels characterized by additive white Gaussian noise (AWGN) or fading.
  • AWGN additive white Gaussian noise
  • CDMA code division multiple access
  • turbo coders which makes them so effective is an interleaver which permutes the original received or transmitted data frame before it is input to a second encoder.
  • the permuting is accomplished by randomizing portions of the signal based upon one or more randomizing algorithms.
  • a conventional interleaver collects, or frames, the signal points to be transmitted into an array, where the array is sequentially filled up row by row. After a predefined number of signal points have been framed, the interleaver is emptied by sequentially reading out the array column by column for transmission. As a result, signal points in the same row of the array that were near each other in the original signal point flow are separated by a number of signal points equal to the number of rows in the array. Ideally, the number of columns and rows would be picked such that interdependent signal points, after transmission, would be separated by more than the expected length of an error burst for the channel. Non-uniform interleaving achieves "maximum scattering" of data and "maximum disorder" of the output sequence.
  • the redundancy introduced by the two convolutional encoders is more equally spread in the output sequence of the turbo encoder.
  • the minimum distance is increased to much higher values than for uniform interleaving.
  • a persistent problem for non-uniform interleaving is how to practically implement the interleaving while achieving sufficient "non-uniformity, " and minimizing delay compensations which limit the use for applications with real-time requirements.
  • Finding an effective interleaver is a current topic in the third generation CDMA standard activities. It has been determined and generally agreed that, as the frame size approaches infinity, the most effective interleaver is the random interleaver. However, for finite frame sizes, the decision as to the most effective interleaver is still open for discussion.
  • the interleaver includes a storage area containing an array large enough to store the largest expected data frame.
  • a frame of size L elements to be interleaved is stored in N r rows and N c ⁇ ) columns of the array, where N, ⁇ is a predetermined integer and N c (1) is a prime number which satisfy the inequality N r ⁇ x N e ' 1"11 ⁇ L ⁇ N r ⁇ x N c (1) where N-.' 1"1 ' is the highest prime number less than N c (1) .
  • the elements of each row are permuted according to a predetermined mathematical relationship, and the rows are permuted according to predetermined mapping.
  • Fig. 1 depicts a fast modulo computing embodiment according to the present invention.
  • Fig. 2 depicts the structure of an interleaver according to the present invention.
  • the present invention finds embodiment as a turbo encoder in a CDMA radio communication system.
  • a stream of bits to be transmitted is divided into a series of frames, each frame including a number L of elements, each element being at least one bit .
  • Each frame is to be interleaved prior to transmission. If there are a large number of possible frame sizes L, specifying an interleaver for each possible frame size results in a necessity for storing a large number of parameters.
  • the invention reduces the number of parameters that must be stored by providing a reduced number of prototype interleavers (or mother interleavers) , each for a one of a subset of frame sizes, selecting one of the mother interleavers at least large enough to interleave a current frame of size L, and puncturing the interleaved frame to a size of L bits.
  • the maximum size of an array for storing a frame to be interleaved is N r rows x N c columns.
  • a mother interleaver is chosen having an array of size of
  • N r ⁇ rows x N c (1) columns, such that : N r (1) x N ⁇ 1'1' ⁇ L ⁇ N r x N c (1) and after interleaving the array is punctured to size L.
  • the invention provides an interleaver which can adapt to arbitrary frame size by providing a scheme for proper selection (optimization) of parameters
  • N c ⁇ 1 1, 2, ... C (max. no. of columns)
  • the advantage of using this special reduced system is to add additional constraints on the intra-row permutation roots to simplify the search computing for the parameter optimization.
  • a set of prime numbers is chosen:
  • the intra-row permutation rule is a deterministic one.
  • Example 1 For each prime (column number) such a set is chosen. To cover a range of frame sizes from 320 bits to 8192 bits, at least 75 mother interleavers are provided. The column dimensions used for each are listed in Table 1 together with associated primitive roots. Seventy-six primes are listen in Table 1 in order to provide a value for the lowest N 1"1 ' .
  • the storage requirement for the set of primitive roots is reduced by using a set of twenty-one consecutive primes (in the present example (Example 1) , adding the prime 89 to the exemplary twenty primes p(l) given above) .
  • a multiplier may be employed that is 2k bits in width. Also: log 2 [m] ⁇ k and log 2 [c] ⁇ k.
  • the modulo P value can be computed according to Eq. 1 by multiplying a k-bit LSB with 1 and then adding a k-bit MSB. If the sum is more than k bits wide, Eq. 1 must be reinvoked, i.e.:
  • FIG. 1 An embodiment of the modulo P calculation presented here is depicted in Fig. 1.
  • FIG. 2 An overall embodiment of the interleaver presented here is depicted in Fig. 2.
  • the interleaver parameters are to be selected according to the given intra-row congruential rule. It is known that once the recursive convolutional code (RCC) constituent code is determined, error performance is characterized by the input and output weight of error events of the constituent decoders. (The input weight is the number of bit errors.) It is known that the performance of Turbo codes at high SNR is dictated by output error events with input weight 2. The effective free distance is the minimum output weight of all error events of input weight 2.
  • RRC recursive convolutional code
  • weight-2 e.g., two 1 bits with six 0's between them
  • Weight-2 column of Table 3 a set of interleaver parameters is sought that produce an output with 1 bits in the zero'th (initial) and seventh, fourteenth, twenty-first, or twenty- eight positions (according to length) with six, thirteen, twenty, or twenty-seven 0 bits, respectively, between the two one bits. This may be expressed as verifying 1 bits in zero'th and i ' th positions.
  • weight-3 streams are checked for 1 bits in the zero'th, i'th, and j ' th positions.
  • Weight-4 streams are checked for 1 bits in the zero'th i'th, j'th, and k ' th positions .
  • turbo encoder such as is found in a CDMA system
  • those skilled in the art realize that the practice of the invention is not limited thereto and that the invention may be practiced for any type of interleaving and de-interleaving in any communication system.
  • the invention efficiently attains the objects set forth above, among those made apparent from the preceding description.
  • the invention provides improved apparatus and methods of interleaving codes of finite length while minimizing the complexity of the implementation and the amount of storage space required for parameter storage.

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  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
PCT/IB2000/000375 1999-04-14 2000-03-29 Intra-row permutation for turbocode Ceased WO2000062426A1 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1020017013113A KR100780995B1 (ko) 1999-04-14 2000-03-29 데이터를 인터리빙하는 인터리버 및 방법
JP2000611385A JP4298175B2 (ja) 1999-04-14 2000-03-29 ターボ符号のための行内並べ替え
BRPI0009717-9A BRPI0009717B1 (pt) 1999-04-14 2000-03-29 Método e intercalador para intercalação de elementos de quadros de dados
CA002366581A CA2366581C (en) 1999-04-14 2000-03-29 Intra-row permutation for turbocode
HK02101835.5A HK1040141B (en) 1999-04-14 2000-03-29 Intra-row permutation for turbocode
DE60002705T DE60002705T2 (de) 1999-04-14 2000-03-29 Binnen-reihen permutationen für turbocode
EP00911181A EP1169777B1 (en) 1999-04-14 2000-03-29 Intra-row permutation for turbocode

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/291,353 1999-04-14
US09/291,353 US6543013B1 (en) 1999-04-14 1999-04-14 Intra-row permutation for turbo code

Publications (1)

Publication Number Publication Date
WO2000062426A1 true WO2000062426A1 (en) 2000-10-19

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2000/000375 Ceased WO2000062426A1 (en) 1999-04-14 2000-03-29 Intra-row permutation for turbocode

Country Status (10)

Country Link
US (1) US6543013B1 (enExample)
EP (1) EP1169777B1 (enExample)
JP (1) JP4298175B2 (enExample)
KR (1) KR100780995B1 (enExample)
CN (1) CN1188950C (enExample)
BR (1) BRPI0009717B1 (enExample)
CA (1) CA2366581C (enExample)
DE (1) DE60002705T2 (enExample)
HK (1) HK1040141B (enExample)
WO (1) WO2000062426A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1458106A4 (en) * 2001-11-19 2007-01-24 Nec Corp NESTED ORDER GENERATOR, NESTBACK, TURBOCHARGER, AND TURBO DECODER
KR100800840B1 (ko) 2001-05-09 2008-02-04 삼성전자주식회사 터보코드를 사용하는 부호분할다중접속 이동통신시스템의 터보 인터리버 및 터보 인터리빙 방법

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
HUP0200422A2 (en) * 1999-03-19 2002-06-29 Siemens Ag Data transmission with interleaving and subsequent rate matching by puncturing or repetition
CA2266283C (en) * 1999-03-19 2006-07-11 Wen Tong Data interleaver and method of interleaving data
KR100721704B1 (ko) * 1999-04-07 2007-05-25 지멘스 악티엔게젤샤프트 채널 코딩 방법
JP2001285077A (ja) * 2000-03-31 2001-10-12 Mitsubishi Electric Corp 通信装置および通信方法
US6625763B1 (en) * 2000-07-05 2003-09-23 3G.Com, Inc. Block interleaver and de-interleaver with buffer to reduce power consumption
KR100393608B1 (ko) * 2000-09-29 2003-08-09 삼성전자주식회사 유.엠.티.에스시스템내 터보부호화기의 내부 인터리버 및인터리빙 수행 방법
KR100846017B1 (ko) * 2000-10-30 2008-07-11 가부시키가이샤 히타치세이사쿠쇼 데이터 인터리브/디인터리브 효율을 향상시키기 위한 반도체 장치, 무선 통신 장치, 컴퓨터 프로그램 제품 및 방법
FR2837331B1 (fr) * 2002-03-13 2004-06-18 Canon Kk Procede d'entrelacement d'une sequence binaire
WO2004030226A1 (en) * 2002-09-25 2004-04-08 Koninklijke Philips Electronics N.V. Method of calculating an intra-row permutation pattern for an interleaver
GB2400776A (en) * 2003-04-14 2004-10-20 Modem Art Ltd method of using an algebraic interleaver for turbo encoding/decoding
JP4265345B2 (ja) * 2003-08-22 2009-05-20 日本電気株式会社 携帯電話機、インターリーブパラメータ演算装置、方法及びプログラム
US8077743B2 (en) * 2003-11-18 2011-12-13 Qualcomm Incorporated Method and apparatus for offset interleaving of vocoder frames
TWI237448B (en) * 2004-04-12 2005-08-01 Benq Corp Method for interleaving data frame and circuit thereof
US7793169B2 (en) * 2005-10-19 2010-09-07 Telefonaktiebolaget Lm Ericsson (Publ) Intelligent table-driven interleaving
US8296627B2 (en) * 2007-07-20 2012-10-23 Electronics And Telecommunications Research Institute Address generation apparatus and method of data interleaver/deinterleaver
US20090250345A1 (en) * 2008-04-03 2009-10-08 Protea Biosciences, Inc. Microfluidic electroelution devices & processes
JP5521722B2 (ja) * 2010-04-14 2014-06-18 沖電気工業株式会社 符号化装置、復号化装置、符号化・復号化システム、及び、プログラム
JP5634331B2 (ja) 2011-06-07 2014-12-03 株式会社東芝 画像処理装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4394642A (en) * 1981-09-21 1983-07-19 Sperry Corporation Apparatus for interleaving and de-interleaving data
EP0300139A2 (en) * 1987-07-20 1989-01-25 International Business Machines Corporation Error correcting code for B-bit-per-chip memory with reduced redundancy
US5742612A (en) * 1993-06-02 1998-04-21 Alcatel Radiotelephone Method and device for interleaving a sequence of data elements
WO2000008770A1 (en) * 1998-08-03 2000-02-17 Nortel Networks Limited Improved interleavers for turbo code
WO2000010257A1 (en) * 1998-08-17 2000-02-24 Hughes Electronics Corporation Turbo code interleaver with near optimal performance

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US300139A (en) * 1884-06-10 sohisgall
US4907233A (en) * 1988-05-18 1990-03-06 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration VLSI single-chip (255,223) Reed-Solomon encoder with interleaver
US5042033A (en) * 1989-06-05 1991-08-20 Canadian Marconi Corporation RAM-implemented convolutional interleaver
US5357606A (en) * 1992-02-25 1994-10-18 Apple Computer, Inc. Row interleaved frame buffer
US5483541A (en) * 1993-09-13 1996-01-09 Trw Inc. Permuted interleaver
JP3415693B2 (ja) * 1993-12-23 2003-06-09 ノキア モービル フォーンズ リミテッド インターリーブプロセス
US5572532A (en) * 1993-12-29 1996-11-05 Zenith Electronics Corp. Convolutional interleaver and deinterleaver
FR2723282B1 (fr) * 1994-07-29 1996-09-13 Alcatel Telspace Procede d'entrelacement et de desentrelacement de trames sdh et systeme correspondant
US5812288A (en) * 1995-12-27 1998-09-22 Lucent Technologies Inc. Holographic storage of digital data
FR2747255B1 (fr) * 1996-04-03 1998-07-10 France Telecom Procede et dispositif de codage convolutif de blocs de donnees, et procede et dispositif de decodage correspondants
KR100186627B1 (ko) * 1996-09-21 1999-05-15 삼성전자 주식회사 베이스 밴드 인터리버
US6108745A (en) * 1997-10-31 2000-08-22 Hewlett-Packard Company Fast and compact address bit routing scheme that supports various DRAM bank sizes and multiple interleaving schemes
US6304991B1 (en) * 1998-12-04 2001-10-16 Qualcomm Incorporated Turbo code interleaver using linear congruential sequence

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4394642A (en) * 1981-09-21 1983-07-19 Sperry Corporation Apparatus for interleaving and de-interleaving data
EP0300139A2 (en) * 1987-07-20 1989-01-25 International Business Machines Corporation Error correcting code for B-bit-per-chip memory with reduced redundancy
US5742612A (en) * 1993-06-02 1998-04-21 Alcatel Radiotelephone Method and device for interleaving a sequence of data elements
WO2000008770A1 (en) * 1998-08-03 2000-02-17 Nortel Networks Limited Improved interleavers for turbo code
WO2000010257A1 (en) * 1998-08-17 2000-02-24 Hughes Electronics Corporation Turbo code interleaver with near optimal performance

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
SHIBUTANI A ET AL: "Complexity reduction of turbo decoding", IEEE VTS 50TH VEHICULAR TECHNOLOGY CONFERENCE, vol. 3, 19 September 1999 (1999-09-19) - 22 September 1999 (1999-09-22), Amsterdam, Netherlands, pages 1570 - 1574, XP002142762 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100800840B1 (ko) 2001-05-09 2008-02-04 삼성전자주식회사 터보코드를 사용하는 부호분할다중접속 이동통신시스템의 터보 인터리버 및 터보 인터리빙 방법
EP1458106A4 (en) * 2001-11-19 2007-01-24 Nec Corp NESTED ORDER GENERATOR, NESTBACK, TURBOCHARGER, AND TURBO DECODER
US7210076B2 (en) 2001-11-19 2007-04-24 Nec Corporation Interleaving order generator, interleaver, turbo encoder, and turbo decoder

Also Published As

Publication number Publication date
DE60002705T2 (de) 2004-03-11
JP2002542646A (ja) 2002-12-10
CN1188950C (zh) 2005-02-09
HK1040141A1 (en) 2002-05-24
US6543013B1 (en) 2003-04-01
BRPI0009717B1 (pt) 2015-06-09
DE60002705D1 (de) 2003-06-18
BR0009717A (pt) 2002-03-05
CN1347593A (zh) 2002-05-01
KR20010113801A (ko) 2001-12-28
EP1169777A1 (en) 2002-01-09
CA2366581C (en) 2006-11-07
CA2366581A1 (en) 2000-10-19
JP4298175B2 (ja) 2009-07-15
EP1169777B1 (en) 2003-05-14
HK1040141B (en) 2003-08-15
KR100780995B1 (ko) 2007-11-29

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