WO2000018005A1 - Amplificateur de puissance de gain commute presentant une efficacite elevee - Google Patents

Amplificateur de puissance de gain commute presentant une efficacite elevee Download PDF

Info

Publication number
WO2000018005A1
WO2000018005A1 PCT/US1999/021758 US9921758W WO0018005A1 WO 2000018005 A1 WO2000018005 A1 WO 2000018005A1 US 9921758 W US9921758 W US 9921758W WO 0018005 A1 WO0018005 A1 WO 0018005A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
power amplifier
amplifier
switch
bypass path
Prior art date
Application number
PCT/US1999/021758
Other languages
English (en)
Inventor
Ralph Kaufman
Darin Hunzeker
Richard J. Camarillo
Original Assignee
Qualcomm Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/158,456 external-priority patent/US6060949A/en
Application filed by Qualcomm Incorporated filed Critical Qualcomm Incorporated
Priority to AU61549/99A priority Critical patent/AU772636B2/en
Priority to JP2000571558A priority patent/JP2002525951A/ja
Priority to CA002345089A priority patent/CA2345089A1/fr
Priority to EP99948347A priority patent/EP1116325A1/fr
Publication of WO2000018005A1 publication Critical patent/WO2000018005A1/fr
Priority to HK02101148.7A priority patent/HK1039693A1/zh

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G1/00Details of arrangements for controlling amplification
    • H03G1/0005Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0088Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/60Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators
    • H03F3/602Combinations of several amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/72Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/72Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H03F2203/7239Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by putting into parallel or not, by choosing between amplifiers and shunting lines by one or more switch(es)

Definitions

  • the present invention relates generally to power gain control for a power amplifier and particularly to a wireless communication device, such as a CDMA wireless phone.
  • CDMA code-division-multiple-access
  • TDMA time-division-multiple access
  • RF power output from a mobile unit varies in large dynamic ranges.
  • CDMA radiotelephone system multiple signals are transmitted simultaneously at the same frequency. The signals are spread with different digital codes, thus allowing detection of the desired signal while the unintended signals appear as noise or interference to the receiver.
  • Spread spectrum systems can tolerate some interference, and the interference added by each new mobile station increases the overall interference in each cell site. Each mobile station introduces a unique level of interference, which depends on its received power level at the cell site.
  • the CDMA system uses power control to minimize mutual interference.
  • a precise power control is critical to avoid excessive transmitter signal power that is responsible for contributing to the overall interference of the system.
  • Power of the individual mobile stations varies with the distance between the mobile station and the base station and the number of other subscriber mobile stations in that base station or sector.
  • the power amplifier is biased class AB to reduce power consumption during periods of low transmit power, but power continues to be consumed.
  • an isolator is used to isolate the power amplifier from the effects of load impedance in subsequent stages.
  • One method to avoid continuous battery draw is to employ a means to bypass the amplifier with switches, and then remove DC power from the Amplifier. This method is illustrated in FIG. 7.
  • a power amplifier circuit 8 is shown with a power amplifier 32 and an isolator 55.
  • An RF input 12 having an RF-signal to be amplified is connected to a pole of a first switch 20.
  • the switch 20 connects the RF-input 12, via path 28, to an input of power amplifier 32.
  • the RF-signal is amplified and output to the isolator 55, and then transmitted through the second switch 42 to the RF-output 54 of the power amplifier circuit 8.
  • the first switch 20 connects the RF-input 12 to the bypass path 30 and the second switch 42 transmits the signal to the RF-output 54.
  • the drawback of this technique is that the amplifier must overcome the added switching loss during times that higher transmit power is required. This can tend to cancel the benefits of bypassing.
  • using a switch and an isolator requires more power to operate and is more costly to build.
  • FIG. 6 illustrates a prior art power amplifier circuit.
  • An analog signal is fed from a driver amplifier 280 through a band pass filter 298 to a first switch 20.
  • the switch 20 alternates between a bypass path 30 and an amplifier path 28, wherein a power amplifier 32 amplifies the signal.
  • a second switch 42 connects the analog signal from either the bypass path 30 or the output of amplifier 32 to a circulator 55, which routes the signal to the RF-output port 54.
  • An object of the present invention is to increase the efficiency of power amplifier usage by using the termination port of an isolator as the combining mechanism for the bypass network, the power amplifier output, and the RF-output port. With this configuration, an output switch becomes unnecessary.
  • Another object of the present invention is to provide an improved power amplifier which requires less parts and is less complex to build.
  • Yet another object of the present invention is to provide an improved power amplifier which is less costly to build.
  • a bypass network is provided to bypass the power amplifier in the circuit when the amplifier gain is not required. During these periods of low power operation, the amplifier is turned off.
  • the bypass network consists of a bypass path, and an attenuation path.
  • the attenuation path allows variability through use of an external resistor, and the bypass path allows no variability.
  • Switches operate to control the flow of the signal to the amplifier, or through either the bypass path or the attenuation path.
  • the signal from the bypass network is input to a circulator, which routes the signal to the port connected to the output of the power amplifier. Because the power amplifier is turned off during periods when the bypass is used, it appears to be a very large impedance to the signal.
  • the band pass filter is placed in the amplification path such that filtering is bypassed when the power amplifier is bypassed. This reduces the gain step size when changing modes from amplification to bypass.
  • the driver amplifier therefore becomes the output amplifier and the filter following the amplifier circuitry operates to remove any undesired spurs.
  • FIG. 1 is a plan drawing of the first embodiment of the present invention
  • FIG. 2 provides a block diagrammatic representation of a mobile station spread spectrum transmitter in which may be incorporated an efficient power amplifier of the present invention
  • FIG. 3 shows an exemplary implementation of an RF transmitter included within the spread spectrum transmitter of FIG. 2;
  • FIG. 4 is a plan drawing of a second embodiment of the present invention.
  • FIG. 5 is a plan drawing of a third embodiment of the present invention.
  • FIG. 6 is a plan drawing of a prior art amplifier circuit
  • FIG. 7 is a plan drawing of a prior art power amplifier circuit.
  • FIG. 1 is a schematic diagram showing the broad concept of the invention.
  • a power amplifier circuit indicated generally by reference numeral 10 comprises a power amplifier 32, a circulator 52, a series of switches, 20, 24 and 42, and bypass paths 34 and 36 around the power amplifier 32.
  • An RF-input 12 having an RF-signal to be amplified is connected to a pole of first switch 20.
  • the switch 20 connects the RF-input 12, via a path 28, to an input of power amplifier 32.
  • the RF- signal is amplified and output from the power amplifier toward the circulator 52.
  • the circulator 52 routes the signal to port of the RF-output 54 of power amplifier circuit 10.
  • the switch 20 switches the signal path to a bypass network 48 comprising a bypass path 36 and an attenuated path 34.
  • switches 24 and 42 switch to a first position such that the signal flows through bypass path 36.
  • Switches 24 and 42 can also switch the signal to flow through the attenuated path 34.
  • From switch 42 the signal is transmitted to an input of circulator 52.
  • the circulator 52 routes the signal to the port connected to the output 50 of the power amplifier 32.
  • the output of the power amplifier 50 appears as a high impedance to the signal and thus the signal is reflected back to the circulator 52, which routes the signal to the port of the RF-output 54 of amplifier circuit 10.
  • FIG. 2 is a schematic diagram illustrating the use of the power amplifier of the present invention in the signal processing circuitry of a mobile station.
  • orthogonal signaling is employed to provide a suitable ratio of signal to noise on the mobile station- to-base station link, or the "reverse" channel.
  • Data bits 200 consisting of, for example, voice converted to data by a vocoder, are supplied to an encoder 202 where the bits are convolutionally encoded.
  • code symbol repetition may be used such that the encoder 202 repeats the input data bits 200 in order to create a repetitive data stream at a bit rate which matches the operative rate of the encoder 202.
  • the encoded data is then provided to block interleaver 204 where it is block interleaved.
  • each character is encoded into a Walsh sequence of length 64. That is, each Walsh sequence includes 64 binary bits or "chips", there being a set of 64 Walsh codes of length 64.
  • the 64 orthogonal codes correspond to Walsh codes from a 64 by 64 Hadamard matrix wherein a Walsh code is a single row or column of the matrix.
  • the Walsh sequence produced by the modulator 206 is provided to an exclusive-OR combiner 208, where it is then "covered” or multiplied at a combiner with a PN code specific to a particular mobile station.
  • a "long" PN code is generated at a rate R c by a PN long code generator 210 in accordance with a user PN long code mask.
  • the long code generator 210 operates at an exemplary chip rate, R c , of 1.2288 Mhz so as to produce four PN chips per Walsh chip.
  • the output of the exclusive -OR combiner 208 is split into identical signals A and B. Signals A and B are input into the exclusive-OR combiners 256 and 254 of FIG. 3 as described below.
  • FIG. 3 is a schematic diagram showing an exemplary implementation of the RF transmitter 250 in a mobile station.
  • a pair of short PN sequences PN j and PN Q , are respectively provided by a PN j generator 252 and a PN Q generator 254 to exclusive-OR combiners 256 and 258, along with the output A and B from exclusive-OR combiner 208 of FIG. 2.
  • the PN j and PN Q sequences relate respectively to in phase (I) and quadrature phase (Q) communication channels, and are generally of a length (32,768 chips) much shorter than the length of each user long PN code.
  • the resulting I- channel code spread sequence 260 and Q-channel code spread sequence 262 are then passed through baseband filters 264 and 266, respectively.
  • Digital to Analog (D/A) converters 270 and 272 are provided for converting the digital I-channel and Q-channel information, respectively, into analog form.
  • the analog waveforms produced by D/A converters 270 and 272 are provided with a local oscillator (LO) carrier frequency signals Cos (2 ⁇ ft) and Sin (2 ⁇ ft), respectively, to mixers 288 and 290 where they are mixed and provided to summer 292.
  • the quadrature phase carrier signals Sin (2 ⁇ ft) and Cos (2 ⁇ ft) are provided from suitable frequency sources (not shown). These mixed IF signals are summed in summer 292 and provided to mixer 294.
  • Mixer 294 mixes the summed signal with an RF frequency from frequency synthesizer 296 so as to provide frequency upconversion to the RF frequency band.
  • the RF may then be bandpass filtered 298 and provided to an efficient parallel stage RF amplifier 10 of the invention.
  • the filter 298 removes undesired spurs caused from upconversion 296.
  • a similar filter (not shown) may be located following the amplifier circuitry to remove undesired spurs when the circuit is operating in bypass mode. In a bypass mode, the previous driver amplifier becomes the output amplifier and filtering may be necessary to prevent extra spurs from mixing in the non-linearities of the amplifier. This filtering may be accomplished by the similar filter (not shown), thus the band-pass filter 298 may be located in the amplification path as illustrated in FIGS. 4 and 5 discussed below. This also increases flexibility in choosing gain steps.
  • FIG. 4 is a second embodiment of the present invention wherein the analog signal is switched 20 between a bypass path 30 and an amplifier path 28.
  • band-pass filtering 298 only occurs in the amplifier path 28.
  • the signal is band-pass filtered 298 and fed to the power amplifier 32, amplified, and transmitted to the circulator 55, which routes the signal towards the RF-output port 54.
  • the circulator 55 is connected to ground through a switch 43 and a resistor 45 and the output port 54 of the circuit when the first switch 20 directs the analog signal through the amplifier path. Accordingly, with this configuration, when reflected or returned RF signals enter the circulator 55 from the direction of the RF-output port 54, the reflected signal is routed by the circulator 55 to ground.
  • the second switch 43 connects the bypass path 30 to the circulator 55, and the signal is routed toward the output of the amplifier. This will appear as a high impedance, reflecting the signal back through isolator 55 and to RF-output port 54.
  • the power amplifier 32 When high output power is not needed, the power amplifier 32 is turned off and the first switch 20 switches to the bypass path 30, whereby the power amplifier 32 is bypassed and the driver amplifier 280 operates as the power amplifier.
  • the second switch 43 connects the bypass path 30 to the circulator 55.
  • the input signal in this mode is routed through the bypass path 30 to the circulator 55.
  • the signal is routed by the circulator to the output of the power amplifier 32, and is reflected back through the isolator 55 and to the output of the RF-output port 54.
  • FIG. 5 shows a third embodiment of the present invention having a driver amplifier 280 and a band-pass filter 298 for filtering the amplified signal before a first switch 20.
  • the output from the band pass filter 298 is switched by the first switch 20 which switches between an amplifier path 28 and a bypass path 30.
  • the power amplifier 32 in the amplifier path amplifies and transmits the signal to a circulator 55, which routes the signal towards an RF-output port 54.
  • the first switch 20 alternates between transmitting the filtered signal to the amplifier path 28 or the bypass path 30.
  • a second switch 43 in the bypass path is included which connects the circulator 55 to ground through a resistor 45 in a first mode, and connects the circulator 55 to the bypass path 30 in a second mode.
  • the resistor 45 may have a value of 50 ohms, for example.
  • any feedback or return signal from the RF-output port 54 is routed to ground when the second switch 43 is in the second mode.
  • switch 43 transmits the signal from the bypass path 30 to the circulator 55.
  • the circulator 55 routes the signal to the output of the power amplifier, which appears to be a large impedance and reflects most of the signal back to the circulator 55.
  • the signal is then routed toward the RF-output port 54. Accordingly, the switch 43 adds isolation due to the fact that the signal cannot be switched to an attenuation path. This embodiment is applicable when only one gain step is desired.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Transmitters (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

Circuit amplificateur de puissance comprenant un amplificateur pilote, un commutateur, un trajet d'amplification comportant un filtre passe-bande et un amplificateur de puissance, ainsi qu'un trajet de dérivation mettant l'amplificateur de puissance en dérivation quand un dépassement de gain et une puissance de sortie ne sont pas nécessaires. Quand un signal RF-analogique émis par l'amplificateur pilote est commuté vers le trajet d'amplification, ce signal est filtré par le filtre passe-bande et amplifié. Puis ce signal est divisé en un signal de phase et en un signal de quadrature. Soit l'un ou l'autre de ces signaux est inversé et additionné à l'autre signal de phase ou de quadrature et le signal additionné est transmis à une sortie. Quand le signal RF de l'amplificateur pilote est commuté vers le trajet de dérivation, l'amplificateur de puissance est mis hors service et le trajet de dérivation dirige le signal vers la sortie de l'amplificateur de puissance, ce qui se présente sous la forme d'une impédance élevée pour ce signal. Ce dernier sort de l'amplificateur de puissance par réflexion vers la sortie.
PCT/US1999/021758 1998-09-22 1999-09-22 Amplificateur de puissance de gain commute presentant une efficacite elevee WO2000018005A1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
AU61549/99A AU772636B2 (en) 1998-09-22 1999-09-22 High efficiency switched gain power amplifier
JP2000571558A JP2002525951A (ja) 1998-09-22 1999-09-22 高効率スイッチド利得パワー増幅器
CA002345089A CA2345089A1 (fr) 1998-09-22 1999-09-22 Amplificateur de puissance de gain commute presentant une efficacite elevee
EP99948347A EP1116325A1 (fr) 1998-09-22 1999-09-22 Amplificateur de puissance de gain commute presentant une efficacite elevee
HK02101148.7A HK1039693A1 (zh) 1998-09-22 2002-02-18 高效率開關增益功率放大器

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US09/158,456 US6060949A (en) 1998-09-22 1998-09-22 High efficiency switched gain power amplifier
US09/158,456 1998-09-22
US09/248,048 US6208202B1 (en) 1998-09-22 1999-02-10 High efficiency switched gain power amplifier
US09/248,048 1999-02-10

Publications (1)

Publication Number Publication Date
WO2000018005A1 true WO2000018005A1 (fr) 2000-03-30

Family

ID=26855042

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/US1999/021757 WO2000018004A1 (fr) 1998-09-22 1999-09-22 Amplificateur de puissance de gain commute presentant une efficacite elevee
PCT/US1999/021758 WO2000018005A1 (fr) 1998-09-22 1999-09-22 Amplificateur de puissance de gain commute presentant une efficacite elevee

Family Applications Before (1)

Application Number Title Priority Date Filing Date
PCT/US1999/021757 WO2000018004A1 (fr) 1998-09-22 1999-09-22 Amplificateur de puissance de gain commute presentant une efficacite elevee

Country Status (6)

Country Link
EP (1) EP1116325A1 (fr)
JP (1) JP2002525951A (fr)
CN (1) CN1326614A (fr)
AU (2) AU772636B2 (fr)
CA (1) CA2345089A1 (fr)
WO (2) WO2000018004A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8089312B2 (en) 2007-12-17 2012-01-03 Panasonic Corporation Amplifying circuit with bypass circuit, and electronic device using the same
CN114244378A (zh) * 2021-12-13 2022-03-25 遨海科技有限公司 一种可动态输出功率的vdes发射机

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6806768B2 (en) * 2001-10-31 2004-10-19 Qualcomm Incorporated Balanced power amplifier with a bypass structure
US7902925B2 (en) * 2005-08-02 2011-03-08 Qualcomm, Incorporated Amplifier with active post-distortion linearization
JP2011004556A (ja) * 2009-06-22 2011-01-06 Mitsubishi Electric Corp 車両用電源装置
CN104158505A (zh) * 2013-05-14 2014-11-19 中兴通讯股份有限公司 一种射频功放电路、控制方法及终端
US9281976B2 (en) 2014-02-04 2016-03-08 Texas Instruments Incorporated Transmitter and method of transmitting
CN104852749B (zh) * 2014-02-19 2018-01-16 华为终端(东莞)有限公司 射频电路及终端设备
CN104485894A (zh) * 2014-11-12 2015-04-01 广州中大微电子有限公司 一种用于运算放大器共模电平偏移的处理电路及其方法
CN106330121A (zh) * 2015-07-02 2017-01-11 株式会社村田制作所 放大电路
CN105353295A (zh) * 2015-12-01 2016-02-24 无锡比迅科技有限公司 一种运放增益测量电路
CN110708040A (zh) * 2019-10-14 2020-01-17 中国科学院微电子研究所 匹配滤波设备

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3857106A (en) * 1970-09-04 1974-12-24 Bell Telephone Labor Inc Amplifier with n-port signal excitation
US5093667A (en) * 1989-10-16 1992-03-03 Itt Corporation T/R module with error correction
EP0476908A1 (fr) * 1990-09-19 1992-03-25 Matsushita Electric Industrial Co., Ltd. Circuit amplificateur
US5128627A (en) * 1990-06-28 1992-07-07 Siemens Aktiengesellschaft Pulse power amplifier
WO1997024800A1 (fr) * 1995-12-27 1997-07-10 Qualcomm Incorporated Amplificateur de puissance, ayant un bon rendement, a etages en parallele
EP0837559A1 (fr) * 1996-10-18 1998-04-22 Matsushita Electric Industrial Co., Ltd. Amplificateur de puissance linéaire à rendement élevé pour des gammes de fréquence différentes et amplificateur de puissance à rendement élevé

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4010426A (en) * 1975-11-12 1977-03-01 The United States Of America As Represented By The Secretary Of The Air Force Rf power amplifier parallel redundant system
GB8517180D0 (en) * 1985-07-06 1985-08-14 W & G Instr Ltd High frequency switched attenuator
JPH07115331A (ja) * 1993-10-19 1995-05-02 Mitsubishi Electric Corp 増幅装置
JPH09148852A (ja) * 1995-11-24 1997-06-06 Matsushita Electric Ind Co Ltd 送信出力可変装置
JPH09232815A (ja) * 1996-02-23 1997-09-05 Kokusai Electric Co Ltd 高周波用可変減衰器
JP2000078035A (ja) * 1998-09-01 2000-03-14 Matsushita Electric Ind Co Ltd 送信回路及び方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3857106A (en) * 1970-09-04 1974-12-24 Bell Telephone Labor Inc Amplifier with n-port signal excitation
US5093667A (en) * 1989-10-16 1992-03-03 Itt Corporation T/R module with error correction
US5128627A (en) * 1990-06-28 1992-07-07 Siemens Aktiengesellschaft Pulse power amplifier
EP0476908A1 (fr) * 1990-09-19 1992-03-25 Matsushita Electric Industrial Co., Ltd. Circuit amplificateur
WO1997024800A1 (fr) * 1995-12-27 1997-07-10 Qualcomm Incorporated Amplificateur de puissance, ayant un bon rendement, a etages en parallele
EP0837559A1 (fr) * 1996-10-18 1998-04-22 Matsushita Electric Industrial Co., Ltd. Amplificateur de puissance linéaire à rendement élevé pour des gammes de fréquence différentes et amplificateur de puissance à rendement élevé

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8089312B2 (en) 2007-12-17 2012-01-03 Panasonic Corporation Amplifying circuit with bypass circuit, and electronic device using the same
CN114244378A (zh) * 2021-12-13 2022-03-25 遨海科技有限公司 一种可动态输出功率的vdes发射机

Also Published As

Publication number Publication date
WO2000018004A1 (fr) 2000-03-30
JP2002525951A (ja) 2002-08-13
AU772636B2 (en) 2004-05-06
CN1326614A (zh) 2001-12-12
EP1116325A1 (fr) 2001-07-18
CA2345089A1 (fr) 2000-03-30
AU6154899A (en) 2000-04-10
AU6154999A (en) 2000-04-10

Similar Documents

Publication Publication Date Title
US6060949A (en) High efficiency switched gain power amplifier
KR100560335B1 (ko) 효율적인 병렬 스테이지 파워 증폭기
KR100430323B1 (ko) 효율적인병렬단전력증폭기
EP0829970B1 (fr) Radioémetteur-récepteur à deux modes d'opération pour le modes TDMA et FDD
CA2154795C (fr) Appareil et procede de traitement numerique de signaux dans un systeme de communication a frequences radioelectriques
AU772636B2 (en) High efficiency switched gain power amplifier
CA2208276A1 (fr) Appareil de communication d'unite mobile multibande
US8489033B1 (en) Enhanced wideband transceiver
JP3816356B2 (ja) 無線送信機
KR20060025150A (ko) 공유 기능 블록 멀티 모드 멀티 밴드 통신 트랜시버
WO2000060758A1 (fr) Dispositif radio et procede de transmission/reception
KR100257504B1 (ko) 다중섹터화된 기지국용 주기형 비콘신호 발생장치
JP2000013246A (ja) 複数の変調方式を備えた送信機
KR100222798B1 (ko) 무선통신망의 타합선 통신장치
JPH07336268A (ja) デュアルモード無線機
JPH05335975A (ja) 無線送信装置
KR20010104076A (ko) Cdma 단말기에서의 무선 호출기 기능을 가진 송/수신장치
MXPA99005263A (en) Efficient parallel-stage power amplifier

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 99813495.3

Country of ref document: CN

AK Designated states

Kind code of ref document: A1

Designated state(s): AE AL AM AT AU AZ BA BB BG BR BY CA CH CN CR CU CZ DE DK DM EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
ENP Entry into the national phase

Ref document number: 2345089

Country of ref document: CA

Ref document number: 2345089

Country of ref document: CA

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 2000 571558

Country of ref document: JP

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 61549/99

Country of ref document: AU

WWE Wipo information: entry into national phase

Ref document number: 1999948347

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 1999948347

Country of ref document: EP

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

WWG Wipo information: grant in national office

Ref document number: 61549/99

Country of ref document: AU