WO1999062264A1 - Block noise detector and block noise eliminator - Google Patents
Block noise detector and block noise eliminator Download PDFInfo
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- WO1999062264A1 WO1999062264A1 PCT/JP1999/002589 JP9902589W WO9962264A1 WO 1999062264 A1 WO1999062264 A1 WO 1999062264A1 JP 9902589 W JP9902589 W JP 9902589W WO 9962264 A1 WO9962264 A1 WO 9962264A1
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- noise
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
- H04N19/86—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness
- H04N19/865—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness with detection of the former encoding block subdivision in decompressed video
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
- H04N19/51—Motion estimation or motion compensation
- H04N19/527—Global motion vector estimation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/80—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
- H04N19/86—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness
Definitions
- the present invention relates to a block noise detecting device and a block noise removing device, and more particularly, to an image code used when a digital image is compressed and transmitted / recorded.
- the present invention relates to a block noise detecting device and a block noise removing device for removing block noise generated in a digital image.
- the decompression method includes a lossless encoding method and an irreversible encoding method.
- the lossless encoding method uses an encoding method that, when the encoded data is decoded, the data before encoding can be completely restored.
- the irreversible encoding method is that if the encoded data is decoded, it is returned to data with some errors, and it can be completely restored to the data before encoding Is a method that uses unlimited coding.
- DCT discrete cosine transform
- one frame image is divided into a plurality of blocks.
- One block is, for example, a collection of 8 ⁇ 8 two-dimensional pixel data.
- DCT performs processing with one block as one unit.
- the data coded by DCT and quantization can be reconstructed by inverse quantization and inverse DC, and by inverse quantization and inverse DCT, The image containing the noise is restored.
- FIG. 24 is a diagram illustrating the concept of block noise elimination in the conventional method.
- FIG. 24 (a) shows a one-frame image 701
- FIG. 24 (b) shows a block 704 in FIG. 24 (a) adjacent to the block 704.
- the boundary with the block 705 (hereinafter referred to as the block boundary) is shown by enlarging one line of the block 706.
- Fig. 24 (c) is the line of Fig. 24 (b) It represents the state of the pixel after each pixel has been smoothed.
- pixel a of block 704 and pixel b of block 705 are pixels existing at block boundary 706.
- the pixel level of pixel a and pixel b is If the pixel difference is larger than the level change in the block, such as the pixel level difference between pixel c and pixel d, this part becomes very noisy because it becomes block noise. It looks like a new image.
- block noise is noise generated due to a level difference between pixels existing before and after a block boundary in a one-frame image. .
- Block noise occurs when using an irreversible coding method that performs processing as one block, such as DCT and quantization.
- a process of smoothing the entire image is generally performed. Smoothing means finding the average pixel using several pixels before and after the pixel to be processed. Smoothing an image with a few taps of low-pass filter (hereinafter referred to as LPF) is also a smoothing process.
- LPF low-pass filter
- the above conventional method has a problem that block noise can be removed only when the block size and the block boundary are completely known.
- an object of the present invention is to provide a block noise that accurately detects a block boundary even when the block boundary from which block noise should be removed is unclear. It is to provide a detection device.
- Another object of the present invention is to remove the block noise without blurring the image, and to reduce the block noise even at the block boundary.
- an object of the present invention is to provide a block noise removing device attached to a video scene, which does not perform smoothing.
- another object of the present invention is to provide a multi-format (for example, an interlaced / progressive) analog signal or an external digital signal.
- An object of the present invention is to provide a block noise eliminator capable of removing a block noise existing in an input signal even in the case of a signal (for example, DVD or STB).
- the present invention also provides that a block noise detection device is used to reproduce a dot clock in a video processing system. Disclosure of the invention
- the present invention has the following features in order to achieve the above object.
- the first aspect is a block generated from a digital video signal subjected to irreversible encoding processing for each predetermined image block in accordance with the decoding processing of the video signal.
- Means for detecting a block boundary (a position where a block noise is generated) in a video signal Means for detecting a block boundary (a position where a block noise is generated) in a video signal.
- the block boundary and the block noise level of an image divided into a plurality of blocks are accurately detected, and thus the block is obtained. This enables detection of shock noise.
- the second aspect is a block noise generated from the digital video signal subjected to the irreversible encoding process for each predetermined image block in accordance with the decoding process of the video signal.
- Device that detects noise is a block noise generated from the digital video signal subjected to the irreversible encoding process for each predetermined image block in accordance with the decoding process of the video signal.
- Signal extraction means for inputting a video signal and extracting only high-frequency components from the video signal
- Absolute value means for converting the high-frequency component signal output by the signal extraction means into an absolute value
- the accumulating means for accumulating and adding the high-frequency component signal after the absolute value output by the absolute value means in a predetermined period, and the pro- Periodic detection means for detecting periodicity of the noise;
- a block boundary determining means for obtaining a block boundary from the periodic signal detected by the periodic detecting means.
- the periodicity of block noise is detected, and the block boundary of an image divided into a plurality of blocks can be accurately detected. To detect block noise It is possible to go out.
- the fourth phase is a phase subordinate to the second and third phases
- Frame difference means for receiving a video signal and calculating a signal difference between a plurality of predetermined frames of the video signal
- the noise region the region where the block noise to be removed exists (hereinafter, the noise region)
- the block boundary determined by the block boundary determining means is masked with the noise region determined by the region determining means, and a block boundary corresponding to the noise region is determined. Further, a edge control means is provided.
- the magnitude of the motion of the image including the block noise is finer than that of the second and third aspects.
- the block boundary can be classified by the correlation. As a result, it is possible to detect only a portion of the video scene having a large block noise as a block boundary.
- the signal difference between the current frame and the immediately preceding frame is obtained by the frame difference means of the fourth aspect.
- the area judging means of the fourth and fifth aspects is a part exceeding the threshold value and a part not exceeding the threshold value. Binarization of the part and. This makes it possible to easily provide a noise area.
- the seventh aspect is a phase subordinate to the fourth to sixth aspects
- Singular point removing means for excluding a noise portion distributed in a predetermined small area from the noise areas determined by the area determining means, is further provided.
- the block edge control means is characterized in that the block boundaries determined by the block boundary determination means are masked in a noise region after exclusion output by the singular point removal means.
- the removal effect by smoothing is difficult to appear, and the image is blurred. I do.
- the effect of the frame difference processing can be enhanced, high image quality can be obtained, and at the same time, the amount of data can be reduced.
- the signal extraction means, the absolute value means, the accumulative addition means, and the period detection means in the second to seventh aspects are provided with a horizontal Block boundaries can be detected in either the first direction, the vertical direction, or the bidirectional direction.
- the ninth aspect is a phase subordinate to the eighth aspect, and when each process is performed in the vertical direction of the video signal,
- the period detecting means is characterized in that a frame used for detection is sequentially changed in accordance with a format of an input video signal.
- the format of the input video signal (for example, an interface type Irrespective of the progressive method, it is possible to detect block boundaries accurately without deteriorating the periodicity of the block image.
- a digital video signal subjected to irreversible encoding processing for each predetermined image block is generated along with the decoding processing of the video signal. This is a device that detects and removes block noise
- the block boundaries and the block noise level of an image divided into a plurality of blocks can be accurately determined.
- the block noise can be detected, and the block noise existing at the block boundary can be removed.
- a digital video signal subjected to irreversible encoding processing for each predetermined image block is accompanied by decoding processing of the video signal. Detecting block noise that occurs Device to remove
- Signal extraction means for inputting a video signal and extracting only high-frequency components from the video signal
- Absolute value means for converting the high-frequency component signal output by the signal extraction means into an absolute value
- a cumulative adding means for cumulatively adding the high-frequency component signal after the absolute value output by the absolute value converting means in a predetermined period, and a block based on the cumulative addition result output from the cumulative adding means.
- Periodic detection means for detecting the periodicity of noise;
- Block boundary determining means for obtaining a block boundary from the periodic signal detected by the periodic detecting means
- Block noise removing means for removing block noise from the block boundary is provided.
- the periodicity of block noise is detected, and the block boundary of an image divided into a plurality of blocks is accurately detected.
- the block noise can be detected, and the block noise existing at the block boundary can be removed.
- the block boundary determination means of the first aspect is used to binarize the position of the block boundary and the other positions. I do. This makes it easy to give block boundaries.
- the thirteenth phase is a phase subordinate to the first and second phases
- Frame difference means for receiving a video signal and calculating a signal difference between a plurality of predetermined frames of the video signal; Area determining means for determining a noise area according to whether a difference value of a signal output from the frame difference means exceeds a predetermined threshold value,
- the block boundary determined by the block boundary determining means is masked with the noise area determined by the area determining means, and the block boundary corresponding to the noise area is masked.
- a block edge control means for obtaining
- the block noise removing means removes block noise from a block boundary corresponding to the noise region.
- the eleventh and the eleventh are identical to the thirteenth aspect.
- the preferred specific fourteenth aspect is the first one.
- the signal difference between the current frame and the immediately preceding frame is obtained by the frame difference means of the third phase. This makes it possible to detect only a large portion of the block noise in the video scene as a block boundary.
- a region exceeding the threshold value by the area judging means in the thirteenth and fourteenth phases is a threshold value. Binarization with the part that does not exceed. This makes it possible to easily provide a noise area.
- the sixteenth phase is a phase subordinate to the thirteenth to fifteenth phases.
- a singular point removing means for removing a noise portion distributed in a predetermined small area from the noise areas determined by the area determining means;
- the block edge control means is characterized in that the block boundaries determined by the block boundary determination means are masked in the noise region after exclusion output by the singular point removal means. I do.
- the image is blurred because the removal effect by smoothing is hard to appear. Remove small areas. As a result, the effect of the frame difference processing can be enhanced, and high image quality can be obtained, and at the same time, the data amount can be reduced.
- the signal extraction means, the absolute value means, the accumulative addition means and the period detection means in the eleventh to sixteenth aspects are video images. Block boundaries can be detected in either the horizontal or vertical direction of the signal, or in both directions.
- the eighteenth aspect is a phase subordinate to the seventeenth aspect, further provided with identification means for identifying a format of the input video signal,
- the identification means should sequentially change the frame used for the detection by the period detection means according to the format. It is characterized by
- the format of the input video signal (for example, Regardless of the evening-race method or the progressive method, accurate detection of block boundaries is possible without impairing the periodicity of the block image. You.
- a digital video signal that has undergone irreversible encoding processing for each predetermined image block is generated along with the decoding processing of the video signal.
- a vertical block boundary detecting means for inputting a video signal and detecting a horizontal block boundary and a block noise amount on the screen corresponding to the video signal.
- a video signal is input, and a horizontal block boundary detection is performed to detect a vertical block boundary and a block noise amount on the screen corresponding to the video signal.
- a block area detecting means for specifying block boundaries in all directions in the vertical and horizontal directions based on detection results of the vertical block boundary detecting means and the horizontal block boundary detecting means;
- a predetermined smoothing process is performed on an input video signal. And means.
- the block boundary and the block noise level can be accurately detected.
- appropriate smoothing corresponding to the block noise level can be performed, and the block noise associated with the video scene can be obtained. Can be removed more effectively.
- the vertical block boundary detection means in the 19th aspect, the vertical block boundary detection means
- HPF vertical high-pass filter
- First absolute value means for converting the high frequency component signal output by the vertical HPF into an absolute value
- a horizontal accumulator for accumulating the high-frequency component signal after the absolute value output from the first absolute value generator in the horizontal direction; and a high-frequency component signal after the accumulative addition output from the horizontal accumulator.
- a first HPF for extracting high-frequency components
- First N-point accumulative adding means for accumulatively adding the signal output from the first HPF for each of preset N points (N is a positive integer);
- a first temporal filer which calculates a signal output from the first HPF in a time direction to detect a block noise amount of a video signal
- First maximum value detection means for obtaining a maximum value and a position of the maximum value from among the N cumulative addition values obtained by the first N-point cumulative addition means by the cumulative addition;
- the block noise amount detected by the first temporal filer is masked at the position of the maximum value output by the first maximum value detecting means, and the vertical noise corresponding to the position is masked.
- a first masking means for finding a block boundary
- the horizontal HPF and the high-frequency component signal output by the horizontal HPF are converted to absolute values.
- Second N-point accumulative addition means for accumulating the signal output by the second HPF for each preset N points, and calculating the signal output by the second HPF in the time direction A second temporal signal for detecting the amount of block noise of the video signal,
- Second maximum value detection means for obtaining a maximum value and a position of the maximum value from among the N cumulative addition values obtained by the second N-point cumulative addition means by the cumulative addition;
- the block noise amount detected by the second temporal filter is masked at the position of the maximum value output by the second maximum value detection means, and the vertical noise corresponding to the position is masked. And a second masking means for finding a block boundary.
- the twenty-first aspect is a block noise generated from a video signal that has been subjected to irreversible encoding processing for each predetermined image block in association with the decoding processing of the video signal.
- This is a device that detects and removes AD conversion means for inputting analog video signals and converting them to digital;
- Digital decoding means for receiving an encoded digital video signal, performing decoding processing, and outputting the decoded block boundary information
- the video signal output from the AD conversion means and the video signal output from the digital decoding means are input, and one of the video signals is selectively output according to an external instruction.
- Block error detection means for identifying block boundaries in all vertical and horizontal directions from the detection results of the vertical block boundary detection means and the horizontal block boundary detection means;
- a block boundary smoothing unit that performs a predetermined smoothing process on an input video signal in accordance with the block boundaries in all vertical and horizontal directions specified by the block error detecting unit.
- the vertical block boundary detection unit and the horizontal block boundary detection unit select the block based on each detection result when the video signal output from the ifi AD conversion unit is selected. Select the boundary and select the video signal output by the selector digital decoding means.
- Block boundary information output by the decryption means The block boundary according to the report is output to a block area detecting means.
- the twenty-first aspect it is possible to accurately detect a block boundary and a block noise level corresponding to an input video signal. This makes it possible to perform appropriate smoothing corresponding to the block noise level, and to block noise attached to various input video scenes. It is possible to remove the noise more effectively.
- the vertical block boundary detection means is a vertical block boundary detection means
- Vertical HPF that extracts only the vertical high-frequency component of the video signal and first absolute value means for converting the high-frequency component signal output by the vertical HPF into an absolute value
- a horizontal accumulator for accumulating the high-frequency component signal after the absolute value output from the first absolute value generator in the horizontal direction; and a high-frequency component signal after the accumulative addition output from the horizontal accumulator.
- a first HPF that extracts high-frequency components
- a first N-point accumulating means for accumulating and adding signals output by the first HPF for each of the preset N points, and a signal output by the first HPF are calculated in a time direction.
- a first temporal filter for detecting the amount of block noise of the video signal;
- one of the block boundary information output by the digital decoding means and the position of the maximum value output by the first maximum value detection means is selectively output.
- the block noise amount detected by the first temporal filter is masked at the block boundary output by the first selector, and the vertical noise corresponding to the position is masked.
- a first masking means for finding a block boundary
- Horizontal HPF for extracting only the horizontal high-frequency component of the video signal
- second absolute value means for converting the high-frequency component signal output by the horizontal HPF into an absolute value
- a second N-point accumulating means for accumulating the signal output from the second HPF for each of the preset N points, and a signal output from the second HPF in the time direction to calculate the image.
- a second temporal filer for detecting the amount of signal block noise;
- Second maximum value detection means for obtaining the maximum value and the position of the maximum value from among the N cumulative addition values obtained by the second N-point cumulative addition means by the cumulative addition; In synchronization with the selection of the selector, one of the block boundary information output by the digital decoding means and the position of the maximum value output by the second maximum value detection means is selectively selected.
- a second selector that outputs to
- the block noise amount detected by the second temporal filter is masked at the block boundary output by the second selector to correspond to the position.
- a second masking means for obtaining a vertical block boundary to be changed is provided.
- First multiplication means for multiplying the output of the horizontal HPF and the output of the horizontal HPF for extracting only the horizontal high-frequency component of the video signal and the output of the horizontal block boundary detection means
- First subtraction means for subtracting the output of the first multiplication means from the video signal
- a second multiplication means for multiplying a vertical HPF for extracting only the vertical high frequency component of the video signal, an output of the vertical HPF, and an output of the vertical block boundary detection means, And second subtraction means for subtracting the output of the second multiplication means from the video signal.
- the twenty-fourth phase is a phase subordinate to the nineteenth to twenty-third phases
- the contour correction amount for enhancing the contour portion of the video signal is controlled.
- An outline correction means is further provided.
- the twenty-fifth aspect is an aspect subordinate to the nineteenth to twenty-fourth aspects
- control means displays an on-screen display on a screen in a predetermined form with a result of the determination.
- information is provided on an on-screen display ( ⁇ ).
- SD on-screen display
- the twenty-sixth aspect is a vertical direction generated from a digital video signal subjected to irreversible encoding for each predetermined image block and accompanying the decoding of the video signal.
- a device that detects block noise is a device that detects block noise.
- a vertical H P F that inputs a video signal and extracts only the vertical high frequency component of the video signal
- Absolute value means for converting the high frequency component signal output from the vertical HPF into an absolute value
- Horizontal accumulating means for accumulating in the horizontal direction the absolute value-converted high-frequency component signal output by the absolute value means
- N-point accumulative adding means for accumulatively adding the signal output by the HPF for each of N points set in advance
- a temporal filter that calculates the signal output from the HPF in the time direction to detect the amount of block noise in the video signal
- a maximum value detection means for obtaining a maximum value and a position of the maximum value from among the N cumulative addition values obtained by the N-point cumulative addition means by the cumulative addition;
- the block noise amount detected by the temporal filter is masked at the position of the maximum value output from the maximum value detecting means, and the vertical noise corresponding to the position is masked. And a masking means for finding a mask boundary.
- the 26th aspect is the vertical block boundary.
- the device that detects the field is configured independently.
- the digital video signal subjected to the irreversible encoding process for each of the predetermined image blocks is used in conjunction with the decoding process of the video signal.
- Absolute value means for converting the high-frequency component signal output by the horizontal HPF into an absolute value
- N-point accumulative addition means for accumulatively adding the signal output from the HPF at each of preset N points
- a temporal filter that calculates the output noise of the video signal by calculating the signal output by the HPF in the time direction
- a maximum value detecting means for obtaining a maximum value and a position of the maximum value from among the N cumulative addition values obtained by the N-point cumulative addition means by the cumulative addition;
- the block noise amount detected by the temporal filter is masked at the position of the maximum value output by the maximum value detection means, and the position corresponding to the position is masked.
- Masking means for finding a horizontal block boundary is provided.
- the twenty-seventh station has a device for independently detecting a horizontal block boundary.
- reproduction is performed in a video processing system that processes a digital video signal that has been subjected to irreversible encoding for each predetermined image block. It is a device that controls the dot clock.
- a clock generating means for generating a dot clock for use in a video processing system based on the horizontal synchronization pulse
- a horizontal block boundary detecting means for inputting a video signal and detecting a vertical block boundary on the screen for the video signal
- the delay amount of the clock generation means is set so that the block boundary detected by the horizontal block boundary detection means has a single maximum point (peak) periodically. And variable control means.
- a horizontal block boundary corresponding to an input video signal is detected, and a dot clock is detected based on this position. Play the sound. This makes it possible to accurately reproduce a clock whose phase matches that of the original video signal's dot clock.
- Absolute value means for converting the high-frequency component signal output by the horizontal HPF into an absolute value
- Vertical accumulation means for vertically accumulating the absolute value of the high-frequency component signal output by the absolute value means,
- An HPF for extracting a high-frequency component from the high-frequency component-signal after the cumulative addition output from the vertical cumulative addition means, and
- N-point accumulating means for accumulatively adding the signal output from the HPF for each of N points set in advance.
- the 30th phase is a block generated from a digital video signal that has undergone irreversible encoding for each predetermined image block and accompanying the decoding of the video signal.
- a medium for recording a program for executing a method for detecting noise on a computer device comprising:
- a program for realizing an operating environment including a step for obtaining a block boundary from a detected periodic signal on a computer device is recorded.
- the thirty-first phase is a phase subordinate to the thirtieth phase and further includes a step for removing block noise from a block boundary.
- the third phase is a phase subordinate to the thirtieth to thirty-second phases
- the method further includes a step of masking the block boundary with the noise region and obtaining a block boundary corresponding to the noise region.
- a step for calculating the signal difference of the third phase is performed, and the difference between the current frame and the immediately preceding frame is determined. Find the signal difference between them.
- a step for judging the noise area of the 33rd and 34th aspects is performed. Binarization of the part that exceeds the threshold value and the part that does not exceed the threshold value is performed.
- the 36th phase is a phase subordinate to the 33rd to 35th phases.
- noise regions further includes a step for excluding a noise portion distributed within a predetermined small region
- the step for finding a block boundary corresponding to a noise region is characterized in that the block boundary is masked with the noise region after the exclusion.
- the preferable 37th aspect is 30th to 36th.
- Each step in the phase (b) detects a block boundary in either one of the horizontal and vertical directions of the video signal, or in both directions. I can.
- the 38th aspect is a phase subordinate to the 37th aspect, and when each process is performed in the vertical direction of the video signal, the step of detecting the periodicity is performed by the input video signal.
- the feature is to sequentially change the frame used for detection according to the signal format.
- the ninth aspect is a block generated from a digital video signal that has been subjected to irreversible encoding processing for each predetermined image block, along with the decoding processing of the video signal.
- An operation environment including a step of performing a predetermined smoothing on a video signal according to block boundaries in all directions is realized on a computer. Program for You.
- the steps to detect the horizontal direction are:
- Steps to extract only the vertical high-frequency component of the video signal Steps to convert the extracted high-frequency component signal to absolute value, and Step to extract the high-frequency component after absolute value. Steps to accumulate and
- a step for further extracting high-frequency components from the high-frequency component signals after the cumulative addition is a step for further extracting high-frequency components from the high-frequency component signals after the cumulative addition
- the step for extracting the high frequency component calculates the signal output in the time direction and detects the block noise amount of the video signal.
- the step to detect the vertical direction is
- the swap to be cumulatively added A step for further extracting a high-frequency component from the high-frequency component signal after the cumulative addition;
- a step of detecting the amount of block noise of the video signal by calculating the signal output by the step for extracting the high frequency component in the time direction;
- the forty-first aspect is a block generated from a video signal on which irreversible encoding processing has been performed for each predetermined image block and accompanying the decoding processing of the video signal.
- the selected step displays the video signal output on the screen. Steps to detect horizontal block boundaries and block noise in
- the step for detecting the horizontal direction and the step for detecting the vertical direction include, in the case of the video signal output by the step to be converted, a block boundary based on each detection result.
- a computer device is provided with an operating environment characterized by outputting a block boundary according to the decoded block boundary information. The program to realize the above is recorded.
- the steps to detect the horizontal direction are:
- a step of further extracting a high-frequency component from the high-frequency component signal after the cumulative addition Further, the signal output by the step for extracting the high frequency component is
- the step to detect the vertical direction is
- Step for extracting only the horizontal high-frequency component of the video signal Step for converting the extracted high-frequency component signal to an absolute value, and cumulative addition of the absolute value-converted high-frequency component signal in the vertical direction Steps to perform,
- the signal output from the step for extracting the high frequency component is calculated in the time direction to detect the block noise amount of the video signal. Steps to perform
- the steps to perform the smoothing are:
- a horizontal multiplication step for multiplying the output of the horizontal step and the output of the vertical detection step
- a vertical multiplication step for multiplying the output of the vertical step by the output of the horizontal detection step
- the feature is that block noise is removed according to the block noise amount.
- the forty-fourth phase is a phase subordinate to the thirty-ninth to fourth aspects, and
- the 45th phase is a phase subordinate to the 39th to 44th phases
- a step for determining the input video signal is further performed. Included in
- the step of performing the determination is characterized in that the result of the determination is displayed on the screen in a predetermined form on an on-screen display.
- a vertical video generated from a digital video signal subjected to irreversible encoding processing for each predetermined image block in accordance with the decoding processing of the video signal is performed.
- a step for extracting only the vertical or horizontal high frequency components of the video signal is
- a step of further extracting a high-frequency component from the high-frequency component signal after the cumulative addition A signal for outputting a signal output from a step for extracting a high-frequency component; a step for cumulatively adding a signal to each of preset N points;
- a step for calculating the amount of block noise of the video signal by calculating the signal output from the step for extracting the high frequency component in the time direction, and
- a program for realizing the operating environment on a computer device is recorded.
- the forty-seventh aspect is a video playback system that processes a digital video signal that has undergone irreversible encoding for each predetermined image block.
- the block Based on the horizontal synchronization pulse, the block detects the block to the clock generator that generates the dot clock for use in the video processing system. A step of varying the amount of clock delay so that the clock boundary has a single maximum point periodically is realized on a computer device. Program is recorded.
- Step for extracting only the horizontal high-frequency component of the video signal Step for converting the extracted high-frequency component signal to an absolute value, and cumulative addition of the absolute value of the high-frequency component signal in the vertical direction Steps to perform,
- a step for cumulatively adding the signal output from the step for extracting the high frequency component to each of the preset N points is further included.
- the 30th to 48th aspects are computer programs for executing the functions realized by the devices of the 1st to 29th aspects.
- This is a recording medium on which is recorded. This corresponds to supplying the first to 29th aspects in the form of software to existing equipment.
- FIG. 1 is a block diagram showing a configuration of a block noise detection device 10 according to the first embodiment of the present invention.
- Fig. 2 explains the operation of the vertical HPF 11 and horizontal HPF 12 and the absolute value converters 13 and 14, the horizontal accumulator 15 and the vertical accumulator 16 of Fig. 1.
- Fig. 2 explains the operation of the vertical HPF 11 and horizontal HPF 12 and the absolute value converters 13 and 14, the horizontal accumulator 15 and the vertical accumulator 16 of Fig. 1.
- FIG. 3 is a diagram illustrating an example of an operation performed by the horizontal peak detector 18 (and the vertical peak detector 17) in FIG.
- FIG. 4 is a diagram for explaining the operation performed by the binarizing section 19 in FIG. is there.
- FIG. 5 is a block diagram showing a configuration of a block noise detection device 20 according to the second embodiment of the present invention.
- FIG. 6 is a diagram for explaining an example of the operation performed by the singular point removing unit 24 in FIG.
- FIG. 7 is a diagram illustrating an example of an operation performed by the BE control unit 31 in FIG.
- FIG. 8 is a block diagram showing a configuration of a block noise removing device 30 according to a third embodiment of the present invention.
- FIG. 9 is a block diagram showing an example of the configuration of the format identification circuit 31 of FIG.
- FIG. 10 is a block diagram showing an example of the configuration of the block noise removing circuit 32 of FIG.
- FIG. 11 is a diagram illustrating an example of the smoothing process performed by the block noise removal circuit 32 of FIG.
- FIG. 12 is a block diagram showing a configuration of a block noise removing device 40 according to a fourth embodiment of the present invention.
- FIG. 13 is a block diagram showing an example of the configuration of the horizontal block boundary detection unit 41 of FIG.
- FIG. 14 is a block diagram showing an example of the configuration of the vertical block boundary detection section 42 of FIG.
- FIG. 15 is a block diagram showing an example of the configuration of the block boundary smoothing section 44 of FIG.
- FIG. 16 is a block diagram showing an example of the configuration of the contour correction section 45 of FIG.
- FIG. 17 shows a block noise according to a fifth embodiment of the present invention.
- FIG. 3 is a block diagram showing a configuration of a noise removal device 50.
- FIG. 18 is a block diagram showing an example of the configuration of the horizontal block boundary detecting section 54 of FIG.
- FIG. 19 is a block diagram showing an example of the configuration of the vertical block boundary detection unit 55 of FIG.
- FIG. 20 is a block diagram showing a configuration of a dot clock detection device 60 according to the sixth embodiment of the present invention.
- FIG. 21 is a block diagram showing an example of the configuration of the horizontal block boundary detection unit 64 of FIG.
- FIG. 22 is a diagram illustrating an example of the cumulative addition result of the horizontal block noise output from the horizontal block boundary detection unit 64 in FIG. 20.
- FIG. 23 is a diagram for explaining the relationship between the video signal 601 and the clock (CK).
- Figure 24 is a diagram illustrating the concept of block noise removal in the conventional method.
- FIG. 1 is a block diagram showing a configuration of a block noise detecting device according to a first embodiment of the present invention.
- a block noise detecting device 10 according to the first embodiment includes a vertical high-pass filter (hereinafter, referred to as a vertical HPF) 11, The horizontal eight-in-one filter (hereinafter referred to as the horizontal HPF) 12, the absolute value converters 13 and 14, the horizontal cumulative adder 15, the vertical cumulative adder 16, and the vertical It has a peak detecting section 17, a horizontal peak detecting section 18, and a binarizing section 19.
- a vertical HPF vertical high-pass filter
- the horizontal eight-in-one filter hereinafter referred to as the horizontal HPF 12
- the absolute value converters 13 and 14 the horizontal cumulative adder 15
- the vertical cumulative adder 16 and the vertical It has a peak detecting section 17, a horizontal peak detecting section 18, and a binarizing section 19.
- Figure 2 explains the operation of the vertical HPF 11, the horizontal HPF 12, the absolute value converters 13, 14, the horizontal accumulator 15, and the vertical accumulator 16 in Figure 1 Fig.
- FIG. 3 is a diagram illustrating an example of an operation performed by the horizontal peak detector 18 (and the vertical peak detector 17) of FIG. 3A shows the horizontal one-dimensional signal 115 output from the vertical accumulator 16, and FIG. 3B shows the horizontal peak position 1 output from the horizontal peak detector 18. 2 represents 2.
- FIG. 4 is a diagram for explaining the operation performed by the binarizing section 19 in FIG. FIG. 4 (a) shows the horizontal peak position 122 and the horizontal binary image 124, and FIG. 4 (b) shows the vertical peak position 122 and the vertical binary image 125.
- FIG. 4C shows the block boundary image 103 output by the binarizing unit 19.
- a video signal is a signal in which moving image data composed of three dimensions of horizontal, vertical, and vertical times are arranged in one dimension.
- the video signal 101 in the present invention is a one-frame image that is a two-dimensional video signal in the horizontal direction and the vertical direction in one frame time unit obtained based on the above video signal. This is a signal sent at a fixed rate.
- This one frame image 1 1 2 as shown in FIG. 2, each block image 113 is arranged uniformly in the horizontal and vertical directions, and each block image is formed in both directions. Includes noise 114. Also, the block noises 114 appear periodically in the horizontal and vertical directions as shown in FIG.
- This video signal 101 is input to the vertical HPF 11 and the horizontal HPF 12 respectively.
- the vertical HPF 11 receives the video signal 101 and extracts only high-frequency components in the vertical direction.
- the absolute value conversion unit 13 receives the signal output from the vertical HPF 11, takes the absolute value, and converts it to a positive value.
- the horizontal cumulative adder 15 receives the signal output from the absolute value generator 13, performs cumulative addition, and outputs a vertical one-dimensional signal 1 16 having a vertical periodic peak value.
- the horizontal HPF 12 receives the video signal 101 and extracts only the high frequency component in the horizontal direction.
- the absolute value conversion unit 14 receives the signal output by the horizontal HPF 12 and takes the absolute value and converts it to a positive value.
- the vertical accumulator 16 receives the signal output from the absolute value converter 14, accumulates the signal, and outputs a horizontal one-dimensional signal 115 having a horizontal periodic peak value.
- the horizontal peak detector 18 detects the horizontal peak position based on the horizontal one-dimensional signal 115 output from the vertical accumulator 16. An example of the horizontal peak position detecting operation performed by the horizontal peak detecting section 18 will be described with reference to FIG.
- the horizontal peak detector 18 calculates an arbitrary pixel range including three block boundaries from the horizontal one-dimensional signal 115 (for example, if the block size is 8, Select the detection area 1 19 (approximately 30 pixels) (Fig. 3 (a)).
- a horizontal peak The detection unit 18 detects the top three data having the large cumulative addition level in the selected detection area 1 19 as a peak position.
- the differential force at the detected peak position is the horizontal block size.
- the horizontal peak detection unit 18 detects the respective peak positions by moving the detection area 119 left and right with respect to the horizontal direction at horizontal block size intervals. b) Find a horizontal peak as shown in b).
- the vertical peak detector 17 detects a vertical peak position based on the vertical one-dimensional signal 1 16 output from the horizontal accumulator 15. Note that the vertical peak position detecting operation performed by the vertical peak detecting section 17 is the same as the horizontal peak position detecting operation performed by the horizontal peak detecting section 18 described above. Is omitted. The vertical peak detector 17 obtains a vertical peak position 123 as shown in FIG. 4 (b).
- the vertical peak detector 17 detects the above-described peak position without distinguishing between the even field and the odd field, an accurate vertical peak can be obtained. Position 1 2 3 cannot be determined. For this reason, the vertical peak detector 17 receives the format identification signal 102 relating to the video signal 101 from the outside, and the format is an interlaced format. If it is determined that the peak position of each of the even and odd fields is individually detected, the vertical peak position 1 for each field is determined. 2 3 Ask for each.
- the binarization section 19 is composed of a horizontal peak position 1 22 output from the horizontal peak detection section 18 and a vertical peak position 1 2 3 output from the vertical peak detection section 17. Enter and.
- the binarizing section 19 gives a logical value “1” to a pixel position where a peak exists according to the horizontal peak position 122 and a logical value “0” to other pixel positions, and A horizontal binary image 124 with the same size as the frame image 112 is generated (Fig. 4 (a)).
- the binarization unit 19 assigns a logical value “1” to a pixel position where a peak exists according to the vertical peak position 123 and a logical value “0” to other pixel positions.
- a vertical binary image 125 with the same size as the one-frame image 112 is generated (Fig. 4 (b)).
- the binarizing unit 19 obtains a block boundary image 103 by performing an OR operation on the horizontal binary image 124 and the vertical binary image 125 (see FIG. 4 (c))
- the portion of the logical value "1" is the block boundary portion, that is, the block noise 1 1 4 This is the place where
- a block of an image divided into a plurality of blocks is provided.
- the boundary (block boundary image 103) can be detected accurately.
- the periodicity of the block image 113 is not impaired. Accurate detection of block noise 1 14 is possible.
- FIG. 5 is a block diagram showing a configuration of a block noise detection device according to a second embodiment of the present invention.
- the block noise detection device 20 according to the second embodiment includes a vertical HPF 11, a horizontal HPF 12, and absolute value conversion units 13 and 1. 4, horizontal cumulative addition section 15, vertical cumulative addition section 16, vertical peak detection section 17, horizontal peak detection section 18, binarization section 19, and frame difference section 2 1, a frame memory 22, a binarizing section 23, a singular point removing section 24, and a blockage control section (hereinafter, referred to as a BE control section) 25.
- a BE control section a blockage control section
- the vertical HPF 11, the horizontal HPF 12, the absolute value conversion units 13 and 14, and the horizontal cumulative addition unit 15 are configured according to the block noise detection according to the first embodiment.
- the configuration is the same as that of the device 10, and the configuration is denoted by the same reference numeral and description thereof is omitted.
- FIG. 6 is a diagram for explaining an example of the operation performed by the singular point removing unit 24 in FIG. Note that Fig. 6 (a) shows the image 2 33 before output of the singular point removal processing output by the binarization section 23, and Fig. 6 (b) outputs the image The image 234 after the singular point removal processing is shown.
- FIG. 7 is a diagram illustrating an example of an operation performed by BE control unit 31 in FIG. FIG. 8 (a) shows the block boundary image 103 output by the binarizing unit 19, and FIG. 8 (b) shows the singular point removal output by the singular point removal unit 24.
- FIG. 8C shows the image 235 after the BE control
- FIG. 8C shows the image 235 after the BE control.
- the video signal 101 is input to the frame difference unit 21.
- the frame difference section 21 calculates the signal level difference between the input video signal 101 and the video signal 101 of the previous frame stored in the frame memory 22. Is calculated as a difference value.
- the frame difference unit 21 In the initial state, the frame difference unit 21 is in a state where nothing is stored in the frame memory 22 such as after the block noise detection device 20 is started. Only the memory in the frame memory 22 is stored.
- the frame difference unit 21 determines whether or not the calculated difference value is equal to or larger than a predetermined threshold value, and only the difference value equal to or larger than the threshold value is converted to a binarization unit 23. Output to Therefore, by the processing of the frame difference section 21, only a scene portion having a lot of motion in the video signal 101 is output.
- the level of the threshold value can be arbitrarily set based on desired image quality.
- the frame difference section 21 stores the video signal 101 of the current frame in the frame memory 22. Thereafter, the frame difference unit 21 repeats the above-described processing every time the next frame is input.
- the binarizing section 23 receives the difference value output from the frame difference section 21. Then, the binarization unit 23 sets the pixel position (singular point) where the difference value exists in the one-frame image 112 to the logical value “1” and the pixel where the difference value does not exist. Position to logical value "0" , Binarize. As a result, the image 233 before the singularity removal shown in FIG. 6A is obtained. In FIG. 6 (a), the shaded portion corresponds to the pixel position of the logical value “1”.
- the singularity removal unit 24 inputs the image 233 (Fig. 6 (a)) before singularity removal from the binarization unit 23, and inputs the block size from 19 binaries. I do. Then, the singularity removing unit 24 distributes the logic distributed in a small area of one block size or less (the area shown by the dashed line in FIG. 6) in the image 233 before the singularity removal. Eliminate data with value "1". As a result, an image 234 force after the singular point removal shown in FIG. 6 (b) is obtained.
- This singular point removing unit 24 makes it possible to enhance the effect of the frame difference processing, and at the same time, it is possible to reduce the amount of data
- the BE control unit 25 consists of a block boundary image 103 output by the binarization unit 19 (Fig. 7 (a)) and an image 2 after the singular point removal output by the singular point removal unit 24. 3 Enter 4 (Fig. 7 (b)) and. Then, the BE control unit 25 calculates the logical product of the block boundary image 103 and the image 234 after the singular point removal for each pixel. Image power obtained in this way is the BE control image 235 in Fig. 7 (c), and each pixel value in this BE control image 235 is a block image. This is the signal of the edge signal (hereinafter referred to as BE signal) 203. Therefore, the BE signal 203 is a signal that is a block boundary and contains information indicating that the block noise level is high.
- the block noise detection device 20 As described above, according to the block noise detection device 20 according to the second embodiment of the present invention, the block noise detection according to the first embodiment is performed. In comparison with the device 10, the correlation between the size of the motion of the image including the finer block noise and the block noise is increased.
- block boundary image 3 image 103 The classification of the block boundary (block boundary image 3 image 103) becomes possible. As a result, only a large portion of the block noise in the video scene can be detected as a block boundary.
- FIG. 8 is a block diagram showing a configuration of a block noise elimination device according to a third embodiment of the present invention.
- the block noise removing device 30 according to the third embodiment includes a format identification circuit 31 and a block noise detecting device 2. 0 and a block noise removing circuit 32.
- the configuration of the block noise detecting device 20 in the block noise removing device 30 according to the third embodiment is similar to the configuration of the block noise detecting device 20 according to the second embodiment.
- the configuration is the same as that of the lock noise detecting device 20.
- the same reference numerals are given to the same components, and the description is omitted.
- FIG. 9 is a block diagram showing an example of the configuration of the format identification circuit 31 of FIG.
- the format identification circuit 31 includes a double-speed H-pulse generation unit 311 and a bit And 3 and 2.
- FIG. 10 is a block diagram showing an example of the configuration of the block noise removal circuit 32 of FIG.
- the block noise elimination circuit 32 includes a smoothing processing section 321 and a selector 322.
- FIG. 11 is a diagram illustrating an example of the smoothing process performed by the block noise removal circuit 32 of FIG. FIG. 11 (a) shows the state before smoothing processing (block noise removal), and FIG. 11 (b) shows the state after smoothing processing.
- the block noise detection device 20 outputs the BE signal 203 from the input video signal 101 as described above.
- the luminance signal (Y signal) is the most preferable as the video signal 101 input to the block noise detecting device 20.
- This Y signal is composed of, for example, a decoded video signal composed of red, green, and blue (RGB) with luminance and color difference using a matrix circuit. It can be obtained by converting to a YUV signal and extracting only the Y signal (a well-known technique).
- the format identification circuit 31 includes a horizontal synchronization pulse (hereinafter, referred to as an H pulse) 310 of a television signal and a vertical synchronization pulse.
- a pulse hereinafter referred to as V pulse
- the double-speed H-pulse generation unit 311 receives the H pulse 301 and generates a double-speed H-pulse having a frequency twice as high as that of the H / ⁇ ° pulse 301.
- Bit Count Evening 3 1 2 The double-speed H pulse output from the double-speed H pulse generation unit 311, the pulse and the V pulse 302 are input, and the V pulse 302 is used as a reset signal.
- bit count 312 is the double-speed H in the cycle (V period) in which the V pulse 302 is generated.
- the pulse is counted, and the bit count 312 is the lowest bit of the value counted for each V period. Output to the block noise detection device 20 as the packet identification signal 102.
- the format identification signal 102 can be generated as described above for the following reason.
- the bit rate is 3 times higher than that of the bit rate using the double-speed H pulse.
- the number of lines during the V period is 2 62 or less.
- the bit count 312 is doubled using the double-speed H pulse, which is 5 2 4 times or 5 2 6 times. You will have to do a lot of work. Therefore, the bit count value is determined by the bit count value of the odd-numbered bits (i.e., “5”) by performing an even-odd determination of the least significant bit of the value counted for each V period. )) Can be distinguished from an evening-based method, and an even number (ie, "4" or "6”) can be distinguished from a progressive method.
- the format identification signal 102 output from the bit counter 50 is a logical value "1" (in the case of the interlacing method). And logical value "0" (progressive method) Output as a binary signal.
- block noise elimination circuit 32 includes video signal 101 and BE signal 200 3 output from block noise detection device 20. Enter and.
- the smoothing processing section 321 receives the video signal 101 and smoothes the signal.
- the selector 32 2 is provided with a smoothed video signal output from the smoothing processing section 3 21, a video signal 101 as it is input, and a BE signal 200. 3 Enter and. Then, the selector 32 2 performs smoothing on the pixel where the BE signal 203 is a logical value “1” (there is a block noise of 46). Select the processed signal, and apply the BE signal 203 (no block noise) to the pixel that has a logical value of “0” and not to smooth the video signal 1 0 1 Select and output the selected item.
- the block noise removing circuit 32 of the present invention uses the BE signal 203 to reduce the block noise, and at the same time to reduce the noise of the video signal.
- the smoothing process that blurs the image is performed only at the block boundary where the block noise exists.
- the signal selected and output by the selector 32 is output as the block noise removal signal 303.
- FIG. 11 shows an example of the smoothing performed by the smoothing processing section 3 21.
- the number of taps is "3" and the weight is 1Z3, 1/3, and 1Z3, respectively. ) Indicates smoothing.
- the smoothing processing unit 32 1 may set the number of pixels to be extracted to two or more, or if the number of LPF taps is increased, the smoothing may be performed. The effect is improved.
- the block noise removal signal 303 output from the selector 322 is a Y signal
- the UV converted by the matrix circuit described above is used.
- the inverse matrix circuit together with the signal to return to the RGB signal, it is possible to obtain an output video signal from which block noise has been removed (known in the art. Technology).
- the BE signal 203 detected in the second embodiment is blocked.
- the block noise removal it is possible to effectively remove the block noise attached to the video scene.
- the block noise detecting device constituting the block noise removing device 30 is the same as the block noise detecting device according to the second embodiment.
- the block noise detector 20 according to the first embodiment is used, but the block noise detector 10 according to the first embodiment may be used instead. Of course, it is possible.
- FIG. 12 is a block diagram showing a configuration of a block noise removing device according to a fourth embodiment of the present invention.
- the block noise elimination device 40 according to the fourth embodiment includes a horizontal block boundary detection unit 41 and a vertical block boundary detection unit.
- a section 42, a block area detecting section 43, a block boundary smoothing section 44, and a contour correcting section 45 are provided.
- FIG. 13 is a block diagram showing a more detailed configuration of the horizontal block boundary detection unit 41 of FIG.
- the horizontal block boundary detection section 41 includes a horizontal HPF 41 1, an absolute value conversion section 4 12, a vertical accumulative addition section 4 13, and a high-pass filter. Evening (hereinafter referred to as HPF) 4 14, Temporal filer 4 15, N-point cumulative addition section 4 16, Masking section 4 17, Maximum value detection section 4 1 and 8 are provided.
- FIG. 14 is a block diagram showing a more detailed configuration of the vertical block boundary detection unit 42 of FIG.
- the vertical block boundary detection unit 42 is composed of a vertical HPF 421, an absolute value generation unit 422, a horizontal cumulative addition unit 423, and an HPF 424. It has a temporal filer 425, an N-point accumulator 426, a masking unit 427, and a maximum value detector 428.
- FIG. 15 is a block diagram showing a more detailed configuration of the block boundary smoothing unit 44 of FIG.
- the block boundary smoothing unit 44 includes a horizontal HPF 441, a vertical HPF 442, a multiplication unit 443, 4444, and a subtraction unit 4445, 4 4 6 and are provided.
- FIG. 16 is a block diagram showing a more detailed configuration of the contour correction unit 45 of FIG.
- the contour correction unit 45 includes a horizontal HPF 451, a vertical HPF 452, subtraction units 453, 4554, multiplication units 4555, 4556, and Power [] arithmetic units 457 and 458 are provided.
- the operations performed by the block noise removing device 40 according to the fourth embodiment of the present invention will be described in order with reference to FIGS.
- the horizontal block boundary detection section 41 detects a horizontal block noise level and a block boundary.
- a horizontal HPF 411 receives a video signal 101 and extracts only a high-frequency component in the horizontal direction.
- the absolute value conversion unit 412 inputs the signal output from the horizontal HPF 411, takes the absolute value, and converts it to a positive value.
- the vertical accumulative adder 4 13 receives the signal output from the absolute value converter 4 1 2, accumulates and adds the horizontal one-dimensional signal having a peak value in the horizontal period 1 15 (See Figure 2).
- the HPF 414 extracts the high frequency component again for the purpose of further improving the accuracy of the signal output from the vertical accumulator 413, and reduces the horizontal block noise level. To detect.
- the temporary relay filter 415 performs processing to extend the horizontal block noise level output from the HPF 414 in the time direction.
- the N-point accumulator 416 generates noise at each of the preset N points (N is the number of pixels of the block), that is, the same for each block.
- the cumulative addition of the noise at the pixel position is calculated and output.
- the maximum value detection unit 418 finds the maximum value of the N points in the horizontal direction and the block boundary.
- the maximum value detecting section 418 detects, for example, a block noise that appears at a cycle of 8 (pixels) ⁇ 8 (lines) in the MPEG2 system.
- the N value of the N-point accumulator 416 is set to “8”, and the horizontal block boundary is obtained.
- the masking section 4 17 is connected to the horizontal block noise level that outputs the output from the temporary filter.
- mask processing is performed at the horizontal block boundary obtained by the maximum value detection unit 418, and only the horizontal block noise level existing at the relevant horizontal block boundary is detected. Output.
- coaling device that allows only the small amplitude signal to pass through the output signal of the horizontal HPF 411 or absolute value conversion unit 412 May be inserted.
- the vertical block boundary detector 42 detects the vertical block noise level and the block boundary in the same manner as the horizontal block boundary detector 41.
- the horizontal HPF 421 receives the video signal 101 and extracts only the high frequency component in the vertical direction.
- the absolute value conversion unit 422 inputs the signal output from the vertical HPF 421, takes the absolute value, and converts it to a positive value.
- the horizontal cumulative addition section 4 2 3 receives the signal output from the absolute value conversion section 4 2 2, performs cumulative addition, and outputs a vertical one-dimensional signal 1 16 having a peak value in the vertical cycle. (See Figure 2).
- the HPF 424 extracts the high-frequency component again for the purpose of further improving the accuracy of the signal output from the horizontal accumulator 423, and detects the vertical block noise level.
- the temporal filter 425 performs a process of extending the vertical block noise level output from the HPF 424 in the time direction.
- the N-point accumulative adder 426 calculates the cumulative addition of the noise for each of the preset N points, and outputs each. Find the cumulative addition.
- the maximum value detection unit 428 finds the maximum value of the N points in the vertical direction and the block boundary.
- the maximum value detecting section 428 is, for example, similarly in the MPEG 2 system.
- the N value of the N-point accumulator 426 is set to “8”, and the vertical block boundary is obtained.
- the masking section 427 obtains the vertical block noise level output from the temporal filter 425 by the maximum value detecting section 428. Mask processing is performed at the determined vertical block boundary, and only the vertical block noise level existing at the relevant vertical block boundary is output.
- a small-amplitude signal is output to the output signal of the vertical HPF 421 or the absolute value conversion unit 422. You can insert a coring device that only allows the passage of light.
- the block area detection section 43 is a block in the horizontal Z and vertical directions output from the horizontal block boundary detection section 41 and the vertical block boundary detection section 42.
- Noise level, N-point block noise Level and block noise indicate the position and extent of block noise at each position on the entire screen from each signal at the block boundary. Detects whether it has appeared.
- the block boundary smoothing section 44 responds to the block noise level signal in the horizontal and vertical directions output from the block area detecting section 43, Performs video signal smoothing.
- block boundary smoothing section 44 extracts a high-frequency component in the horizontal direction from input video signal 101 with horizontal HPF 441. Then, the block boundary smoothing section 44 multiplies the extracted horizontal high frequency component and the horizontal block noise level by the multiplication section 443, and subtracts it by the subtraction section 44. 5 subtracts from the video signal 101. The same applies to the vertical direction, and the block boundary The field smoothing unit 4 4 calculates the vertical HP from the input video signal 101.
- the block boundary smoothing section 44 multiplies the extracted vertical high-frequency component by the vertical block noise level in the multiplier section 44 4, and subtracts the subtracted section.
- the contour corrector 45 receives the block noise gain level signal in the horizontal and vertical directions output from the block detector 41 and outputs a gain Z for contour correction. Change the amount of coaling.
- the contour correction unit 45 extracts a high-frequency component in the horizontal direction from the input video signal 101 with a horizontal HPF 451. Then, the contour corrector 45 subtracts the horizontal block noise level from the set value of the horizontal contour correction in the subtractor 45 3, and extracts the extracted horizontal high-frequency component and the horizontal block.
- the multiplication section 455 multiplies the noise signal with the noise level, and then adds the video signal 101 with the addition section 457. The same applies to the vertical direction, and the contour corrector 45 extracts a high-frequency component in the vertical direction from the input video signal 101 with the vertical HPF 452.
- the contour corrector 45 subtracts the vertical block noise level from the set value of the vertical contour correction by the subtractor 454, and extracts the extracted horizontal high-frequency component and the horizontal block.
- the multiplication section 456 multiplies the noise level by the multiplication section 456, and then adds the video signal 101 to the addition section 458.
- each component of the block noise removing device 40 is performed by a CPU (central processing unit). Is controlled. In this case, the output results of the N-point accumulators 4 16 and 4 26 are sent to CPU.
- the CPU may detect the position of the block boundary, and control the masking sections 417 and 427 from the CPU, or the detected block no.
- the level of the noise and the block boundary may be sent to the CPU, and the CPU may control the correction amount of the outline correction of the entire screen, the noise removal level, and the like according to the instruction of the CPU.
- the result of discriminating the type of input source such as “DVD / DVC digital” and video signals (for example,
- the quality of MPEG can be displayed on an on-screen display (hereinafter referred to as OSD).
- the block boundary and the block noise level are obtained. Can be detected accurately. As a result, appropriate smoothing and contour correction corresponding to the block noise level can be performed, and the block attached to the video scene can be obtained. Noise can be removed more effectively. In addition, by displaying information at 0SD, it is possible to recognize at a glance the video source and the effect of removing the block noise.
- the block noise removing device when used in a television system, the input video signal 101 is input from an external terminal in addition to the normal TV video signal. Some video signals have different signal forms.
- the fifth embodiment provides a block noise elimination device that supports input video signals having a plurality of different signal forms.
- FIG. 17 is a block diagram showing a configuration of a block noise removing device according to a fifth embodiment of the present invention.
- a block noise removing device 50 according to the fifth embodiment is composed of an AD connector, an overnight receiver 51, and a digital relay decoder 52. , Selector 53, horizontal block boundary detector 54, vertical block boundary detector 55, block area detector 43, It has a boundary smoothing unit 44 and a contour correcting unit 45.
- FIG. 18 is a block diagram showing a more detailed configuration of the horizontal block boundary detector 54 of FIG.
- the horizontal block boundary detection section 54 is composed of a horizontal HPF 411, an absolute value conversion section 412, a vertical cumulative addition section 413, and an HPF 414 , A temporal filer 415, an N-point accumulator 416, a masking unit 417, a maximum value detector 418, and a selector 5 4 1 and are provided.
- FIG. 19 is a block diagram showing a more detailed configuration of the vertical block boundary detection unit 55 of FIG.
- the vertical block boundary detection unit 55 includes a vertical HPF 421, an absolute value conversion unit 422, a horizontal cumulative addition unit 423, and an HPF 424 , A temporal filter 4 25, and an N-point accumulator 4 2 6, a soaking section 4 27, a maximum value detecting section 4 28, and a selection section 5 51.
- block noise removing device 5 according to the fifth embodiment is different from that of the fifth embodiment.
- the configuration of the block area detection unit 43, block boundary smoothing unit 44, and contour correction unit 45 at 0 is related to the fourth embodiment.
- the configuration is the same as that of the block noise removing device 40, and the description of the configuration is omitted by attaching the same reference numeral to the same.
- the horizontal block boundary detection section 54 is configured by adding a cell block 541 to the configuration of the horizontal block boundary detection section 41 described in the fourth embodiment.
- the vertical block boundary detecting section 55 is configured by adding a selector 551 to the configuration of the vertical block boundary detecting section 42 described in the fourth embodiment. Therefore, the same components are denoted by the same reference numerals and the description is omitted.
- the analog video signal 501 is input to the AD converter 51.
- the digital decoding unit 52 includes, for example, a digital video signal 5 such as an MPEG stream or a DV format connected to the IEEE 1394 standard. 0 2 is input.
- the AD converter 51 converts the input analog video signal 50 ⁇ or to the digital and outputs it to the selector 53.
- the digital decoding unit 52 decodes the input digital video signal 502 and outputs it to the selector 53.
- the block 52 provides block information signals 52 1, 52 2 (snacks) indicating whether or not the video signal 502 is decoded by a number of block sizes. In other words, it is possible to output a block boundary.
- Selector 53 selects one of the two input digital video signals according to the instruction of the user, and outputs it as video signal 101. .
- the selector 53 outputs a reception pulse 531, which indicates which of the digital video signals has been selected and output. For example, if the output of the AD converter 51 (input is a DVD analog signal) is selected, the logical value “0” 3 ⁇ 4; If the output of the conversion section 52 is selected (the input is a digital video camera (DVD) digital signal), the logical value “1” is output and the reception pulse 5 3 1 Will be output.
- the received pulse 531 for example, can be used as information indicating what has been input as oSD display. For example, in the above example, "DVD" or "DVC" is used. These characters can be displayed on the video screen as ⁇ SD.
- the video signal 101 selected in the selection section 53 and the block information signals 52 1 and 52 2 output from the digital decoding section 52 are These are input to the horizontal block boundary detection section 54 and the vertical block boundary detection section 55, respectively.
- the horizontal block boundary detection unit 54 basically detects the horizontal block noise level and the block boundary as described above, but the horizontal block noise detection unit 54 detects the horizontal block noise level and the block boundary.
- the maximum value detection section 418 outputs the obtained horizontal block boundary to the selector 541.
- This selector 541 is composed of a horizontal block boundary output from the maximum value detection section 418 and a block output from the digital decoding section 52.
- Information signal 5 2 Enter 1 and. Then, in accordance with a given user instruction (in synchronization with a user instruction to the selector 53), the selector 541 makes the selector 53 an AD connector.
- the horizontal block boundary obtained by the maximum value detecting device 418 is selected, and the selector 53 is connected to the digital decoding unit 52 by the selector 53.
- a horizontal block boundary given as the block information signal 52 1 is selected and output.
- the vertical block boundary detecting section 55 basically detects the vertical block noise level and the block boundary as described above.
- the force maximum value detection unit 428 outputs the obtained vertical block boundary to the selector 551.
- This selector 55 1 is composed of a vertical block boundary output from the maximum value detecting section 4 28 and block information output from the digital decoding section 52. Input signals 5 2 2 and.
- the selector 55 3 sets the AD converter to the AD converter. If the output signal of the digital decoder 51 is selected, the vertical block boundary determined by the maximum value detector 428 is selected by the selector 53 when the output signal of the digital decoder 51 is selected. When a force signal is selected, a vertical block boundary given as a block information signal 522 is selected and output.
- the horizontal block boundary detection unit 54 and the like are input.
- the block noise is removed using the block boundary obtained by the vertical block boundary detection unit 55, and the block boundary can be determined (given ) Digital video signal 50 If 2 is input, it is possible to remove block noise using the given block boundary.
- the block boundary and the block corresponding to the input video signal are obtained.
- the lock noise level can be detected accurately.
- it is possible to perform appropriate smoothing and contour correction corresponding to the block noise level and furthermore, it is possible to perform a block attached to the image scene. Lock noise can be removed more effectively.
- by displaying the information as OSD it is possible to recognize at a glance the video source and the block noise removing effect.
- defective dot clock reproduction is one of the causes of the deterioration of the image quality of the video signal. It will be.
- the dot clock reproduction failure is originally supported by the analog video signal. This occurs because the sampled clock phase and the sampled clock phase in the video signal after digitization have a power difference between the sampled clock phase and the sampled clock phase. It is something.
- the sixth embodiment of the present invention also enables accurate dot clock reproduction by using the above-described method of detecting block boundaries. It is.
- FIG. 20 is a block diagram showing an example of a configuration of a video processing system using a block detection device according to a sixth embodiment of the present invention.
- the video processing system 60 using the block detection device is composed of an AD converter 61, a video signal processing device 62, a DA converter 63, and a horizontal block boundary detection device.
- a section 64, a clock generation device 65, and a control section 66 are provided.
- the clock generator 65 includes a phase comparator 651, an LPF 652, a VC0 563, a variable delay 654, and a frequency divider 655. You.
- FIG. 21 is a block diagram showing a more detailed configuration of the horizontal block boundary detection unit 64 of FIG.
- the horizontal block boundary detection section 64 is composed of a horizontal HPF 641, an absolute value conversion section 642, a vertical accumulative addition section 643, and an HPF 644. , And N-point accumulative adder 6 45.
- FIG. 22 is a diagram illustrating an example of the cumulative addition result of the horizontal block noise output by the horizontal block boundary detection unit 64 in FIG. 20.
- FIG. 22 shows the cumulative addition result when the N value is set to “8”.
- FIG. 23 is a diagram illustrating the relationship between the video signal 601 and the clock (CK).
- the AD converter 61 converts the input analog video signal 601 into a digital video signal.
- the video signal processing device 62 performs various processes related to the video signal such as contour correction.
- the DA converter 63 converts digital video signals into analog video signals. Convert to number.
- the horizontal block boundary detection section 64 detects a horizontal block boundary from an input digital video signal.
- the clock generator 65 constitutes a line clock PLL circuit, and each component generates a regenerative clock (CK) used for processing.
- the configuration of the clock generator 65 is a well-known configuration that has been generally used in the related art, and a description thereof will be omitted. For example, a time-dependent file is applied to a control device such as a CPU or an output signal of the horizontal block boundary detection unit 64, and the horizontal block boundary is used.
- the clock generator 65 is controlled according to the signal output from the detector 64.
- the video signal 601 input to the AD converter 61 is converted into a digital video signal based on the playback clock (CK) generated by the clock generator 65. Converted.
- the converted digital signal is subjected to desired video signal processing in a video signal processing device 62, and is converted to an analog video signal in a DA connector 63.
- the converted digital video signal is input to the horizontal block boundary detection means 64, where the horizontal block noise is cumulatively added, and the result is obtained.
- the horizontal HPF 641 receives the video signal 601, and only the high frequency component in the horizontal direction is input. Is extracted.
- Absolute value conversion unit 642 receives the signal output by horizontal HPF 641, takes the absolute value, and converts it to a positive value You.
- the vertical accumulative adder 643 receives the signal output from the absolute value converter 642, accumulates and outputs a horizontal one-dimensional signal 115 having a peak value in the horizontal period. (See Figure 2).
- the HPF 644 extracts the high-frequency component again for the purpose of further improving the accuracy of the signal output from the vertical accumulator 643, and reduces the horizontal block noise level. To detect.
- the N-point accumulative adder 645 calculates the noise at each of the predetermined N points (N is the number of pixels of the block), that is, the same pixel position of each block. The cumulative addition of the noise in the above is calculated and output.
- the N-point accumulator 645 is, for example, a block noise that appears at a period of 8 (pixels) X 8 (lines) in the MPEG2 system.
- the N value is set to “8” to obtain a horizontal block boundary, and the result is output to the control unit 66.
- the dot clock reproduction is not performed well (that is, the dot clock of the original video signal 601 and the reproduction clock (CK) are different from each other). If they do not match, the sampling clock is out of phase with the video signal (Fig. 23 (a)) (Fig. 23 (b)).
- the cumulative addition result at N points output from the N-point cumulative addition section 645 to the control section 66 has a high level at a plurality of points as shown in Fig. 22 (a).
- the existing result In the figure, two positions 4 and 5).
- the dot clock reproduction is performed well (that is, the dot clock of the original video signal 601 and the reproduction clock (CK) are different from each other). If they match, the sampling clock phase does not deviate from the video signal (Fig. 23 (a)) (Fig. 23 (c)). In this case, the N-point cumulative addition unit 645 outputs the N-point cumulative addition result output to the control unit 66 with only one high level as shown in Fig. 22 (b). The result exists (in the figure, position 5).
- control unit 66 obtains a result in which only one high level of the N-point cumulative addition result output from the N-point cumulative addition unit 645 exists. In this manner, feedback control is performed to change the delay amount of the variable delay 654 in the clock generator 65. Therefore, the clock phase in which the input video signal 601 was sampled can be accurately reproduced in the video processing system 60. It becomes.
- a horizontal video signal corresponding to an input video signal is provided. Detects block boundaries and plays back the dot clock based on this location. This makes it possible to accurately reproduce a clock whose phase matches that of the original video signal's dot clock.
- the block noise detection devices 10, 20, and block noise according to the above-described first to sixth embodiments are used.
- the functions realized by the noise eliminators 30, 40, 50, and the video processing system 60 are implemented in a predetermined program format. This is realized by a storage device (RM, RAM, hard disk, etc.) in which the program is stored, and a CPU that executes the program.
- each program data may be introduced via a recording medium such as a CD-ROM or a floppy disk.
- the present invention provides a video processing device (for example, a television) using a digital video signal subjected to irreversible encoding for each predetermined image block.
- a video processing device for example, a television
- the purpose is to accurately detect and remove block noise generated in the decoding process of the video signal concerned. It can be used for accurate clock playback.
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Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP99919649A EP0998146A4 (en) | 1998-05-22 | 1999-05-18 | BLOCK NOISE DETECTOR AND BLOCK NOISE REDUCTION SYSTEM |
US09/463,215 US6738528B1 (en) | 1998-05-22 | 1999-05-18 | Block noise detector and block noise eliminator |
KR10-1999-7012440A KR100497606B1 (ko) | 1998-05-22 | 1999-05-18 | 블럭노이즈 검출장치 및 블럭노이즈 제거장치 |
Applications Claiming Priority (2)
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JP14088798 | 1998-05-22 | ||
JP10/140887 | 1998-05-22 |
Publications (1)
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WO1999062264A1 true WO1999062264A1 (en) | 1999-12-02 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP1999/002589 WO1999062264A1 (en) | 1998-05-22 | 1999-05-18 | Block noise detector and block noise eliminator |
Country Status (5)
Country | Link |
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US (1) | US6738528B1 (ja) |
EP (2) | EP1775956B1 (ja) |
KR (1) | KR100497606B1 (ja) |
CN (3) | CN1164116C (ja) |
WO (1) | WO1999062264A1 (ja) |
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Also Published As
Publication number | Publication date |
---|---|
CN1516473A (zh) | 2004-07-28 |
KR20010014304A (ko) | 2001-02-26 |
KR100497606B1 (ko) | 2005-07-01 |
EP0998146A4 (en) | 2001-02-28 |
EP0998146A1 (en) | 2000-05-03 |
CN1272286A (zh) | 2000-11-01 |
CN1233172C (zh) | 2005-12-21 |
CN1164116C (zh) | 2004-08-25 |
EP1775956B1 (en) | 2011-08-03 |
CN100369488C (zh) | 2008-02-13 |
CN1527605A (zh) | 2004-09-08 |
US6738528B1 (en) | 2004-05-18 |
EP1775956A1 (en) | 2007-04-18 |
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