WO1999060829A3 - Procede et appareil de realisation de traces, de circuits et de dispositifs electriques - Google Patents
Procede et appareil de realisation de traces, de circuits et de dispositifs electriques Download PDFInfo
- Publication number
- WO1999060829A3 WO1999060829A3 PCT/US1999/010502 US9910502W WO9960829A3 WO 1999060829 A3 WO1999060829 A3 WO 1999060829A3 US 9910502 W US9910502 W US 9910502W WO 9960829 A3 WO9960829 A3 WO 9960829A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- printer
- conductive
- inks
- prints
- Prior art date
Links
- 239000004020 conductor Substances 0.000 abstract 2
- 239000000976 ink Substances 0.000 abstract 2
- 239000003990 capacitor Substances 0.000 abstract 1
- 230000005294 ferromagnetic effect Effects 0.000 abstract 1
- 230000000873 masking effect Effects 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 230000007723 transport mechanism Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1275—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by other printing techniques, e.g. letterpress printing, intaglio printing, lithographic printing, offset printing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4867—Applying pastes or inks, e.g. screen printing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/046—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1266—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by electrographic or magnetographic printing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/60—Forming conductive regions or layers, e.g. electrodes
- H10K71/611—Forming conductive regions or layers, e.g. electrodes using printing deposition, e.g. ink jet printing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/0113—Female die used for patterning or transferring, e.g. temporary substrate having recessed pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0517—Electrographic patterning
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1545—Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1241—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU41866/99A AU4186699A (en) | 1998-05-20 | 1999-05-12 | Method and apparatus for making electrical traces, circuits and devices |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US8242798A | 1998-05-20 | 1998-05-20 | |
US09/082,427 | 1998-05-20 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO1999060829A2 WO1999060829A2 (fr) | 1999-11-25 |
WO1999060829A3 true WO1999060829A3 (fr) | 2003-04-17 |
Family
ID=22171147
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1999/010502 WO1999060829A2 (fr) | 1998-05-20 | 1999-05-12 | Procede et appareil de realisation de traces, de circuits et de dispositifs electriques |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU4186699A (fr) |
WO (1) | WO1999060829A2 (fr) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8860318B2 (en) | 2010-01-04 | 2014-10-14 | Cooledge Lighting Inc. | Failure mitigation in arrays of light-emitting devices |
US8877561B2 (en) | 2012-06-07 | 2014-11-04 | Cooledge Lighting Inc. | Methods of fabricating wafer-level flip chip device packages |
US8907370B2 (en) | 2010-06-29 | 2014-12-09 | Cooledge Lighting Inc. | Electronic devices with yielding substrates |
US9179510B2 (en) | 2009-06-27 | 2015-11-03 | Cooledge Lighting Inc. | High efficiency LEDs and LED lamps |
US9480133B2 (en) | 2010-01-04 | 2016-10-25 | Cooledge Lighting Inc. | Light-emitting element repair in array-based lighting devices |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69840914D1 (de) | 1997-10-14 | 2009-07-30 | Patterning Technologies Ltd | Methode zur Herstellung eines elektrischen Kondensators |
US7323634B2 (en) | 1998-10-14 | 2008-01-29 | Patterning Technologies Limited | Method of forming an electronic device |
GB2350321A (en) * | 1999-05-27 | 2000-11-29 | Patterning Technologies Ltd | Method of forming a masking or spacer pattern on a substrate using inkjet droplet deposition |
AU5090400A (en) | 1999-05-27 | 2001-03-05 | Jetmask Limited | Method of forming a masking pattern on a surface |
US6414543B1 (en) * | 2000-11-28 | 2002-07-02 | Precision Dynamics Corporation | Rectifying charge storage element |
AU2002352260A1 (en) * | 2002-01-14 | 2003-07-24 | Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. | System for the production of electric and integrated circuits |
US20070234918A1 (en) * | 2006-03-31 | 2007-10-11 | Edward Hirahara | System and method for making printed electronic circuits using electrophotography |
US7724142B2 (en) | 2007-09-27 | 2010-05-25 | Intermec Ip Corp. | Systems and methods for wirelessly marking media |
DE202014103821U1 (de) | 2014-07-09 | 2014-09-09 | Carmen Diegel | Flexible elektrische Leiterstruktur |
DE102018102734A1 (de) | 2018-01-18 | 2019-07-18 | Schreiner Group Gmbh & Co. Kg | Flexible elektrische Schaltung mit Verbindung zwischen elektrisch leitfähigen Strukturelementen |
US11764491B2 (en) | 2018-11-20 | 2023-09-19 | Adaptive Regelsysteme Gesellschaft M.B.H. | Electrical connection on a textile carrier material |
AT521913B1 (de) | 2018-11-20 | 2020-10-15 | Adaptive Regelsysteme Ges M B H | Elektrische Verbindung auf einem textilen Trägermaterial |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS642392A (en) * | 1987-06-24 | 1989-01-06 | Murata Mfg Co Ltd | Formation of conductor pattern |
JPS6464290A (en) * | 1987-09-03 | 1989-03-10 | Murata Manufacturing Co | Conductor pattern forming method |
WO1992020489A1 (fr) * | 1991-05-21 | 1992-11-26 | Elf Technologies, Inc. | Procedes et dispositifs de preparation de faisceaux de fils electriques souples et extremement longs |
JPH06252532A (ja) * | 1993-02-25 | 1994-09-09 | Sega Enterp Ltd | 配線基板の製造方法 |
-
1999
- 1999-05-12 WO PCT/US1999/010502 patent/WO1999060829A2/fr active Search and Examination
- 1999-05-12 AU AU41866/99A patent/AU4186699A/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS642392A (en) * | 1987-06-24 | 1989-01-06 | Murata Mfg Co Ltd | Formation of conductor pattern |
JPS6464290A (en) * | 1987-09-03 | 1989-03-10 | Murata Manufacturing Co | Conductor pattern forming method |
WO1992020489A1 (fr) * | 1991-05-21 | 1992-11-26 | Elf Technologies, Inc. | Procedes et dispositifs de preparation de faisceaux de fils electriques souples et extremement longs |
JPH06252532A (ja) * | 1993-02-25 | 1994-09-09 | Sega Enterp Ltd | 配線基板の製造方法 |
Non-Patent Citations (5)
Title |
---|
M CUMMINGS: "Shareware layout tool gives individual performance", ELECTRONICS WORLD AND WIRELESS WORLD., vol. 98, May 1992 (1992-05-01), REED BUSINESS PUBLISHING, SUTTON, SURREY., GB, pages 375 - 380, XP000290542, ISSN: 0959-8332 * |
M. SHANKIN: "Hybrid circuits by computerized writing", ELECTRONIC PACKAGING AND PRODUCTION., vol. 21, no. 1, January 1981 (1981-01-01), CAHNERS PUBLISHING CO, NEWTON, MASSACHUSETTS., US, pages 98 - 109, XP002116001, ISSN: 0013-4945 * |
PATENT ABSTRACTS OF JAPAN vol. 13, no. 173 (E - 748) 24 April 1989 (1989-04-24) * |
PATENT ABSTRACTS OF JAPAN vol. 13, no. 277 (E - 778) 26 June 1989 (1989-06-26) * |
PATENT ABSTRACTS OF JAPAN vol. 18, no. 643 (E - 1640) 7 December 1994 (1994-12-07) * |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9179510B2 (en) | 2009-06-27 | 2015-11-03 | Cooledge Lighting Inc. | High efficiency LEDs and LED lamps |
US9431462B2 (en) | 2009-06-27 | 2016-08-30 | Cooledge Lighting, Inc. | High efficiency LEDs and LED lamps |
US9559150B2 (en) | 2009-06-27 | 2017-01-31 | Cooledge Lighting Inc. | High efficiency LEDs and LED lamps |
US8860318B2 (en) | 2010-01-04 | 2014-10-14 | Cooledge Lighting Inc. | Failure mitigation in arrays of light-emitting devices |
US9107272B2 (en) | 2010-01-04 | 2015-08-11 | Cooledge Lighting Inc. | Failure mitigation in arrays of light-emitting devices |
US9480133B2 (en) | 2010-01-04 | 2016-10-25 | Cooledge Lighting Inc. | Light-emitting element repair in array-based lighting devices |
US8907370B2 (en) | 2010-06-29 | 2014-12-09 | Cooledge Lighting Inc. | Electronic devices with yielding substrates |
US8877561B2 (en) | 2012-06-07 | 2014-11-04 | Cooledge Lighting Inc. | Methods of fabricating wafer-level flip chip device packages |
US9214615B2 (en) | 2012-06-07 | 2015-12-15 | Cooledge Lighting Inc. | Methods of fabricating wafer-level flip chip device packages |
US9231178B2 (en) | 2012-06-07 | 2016-01-05 | Cooledge Lighting, Inc. | Wafer-level flip chip device packages and related methods |
Also Published As
Publication number | Publication date |
---|---|
WO1999060829A2 (fr) | 1999-11-25 |
AU4186699A (en) | 1999-12-06 |
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