WO1999046705A1 - Systeme electronique d'achat/reponse competitifs pour grand public - Google Patents

Systeme electronique d'achat/reponse competitifs pour grand public Download PDF

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Publication number
WO1999046705A1
WO1999046705A1 PCT/CN1999/000035 CN9900035W WO9946705A1 WO 1999046705 A1 WO1999046705 A1 WO 1999046705A1 CN 9900035 W CN9900035 W CN 9900035W WO 9946705 A1 WO9946705 A1 WO 9946705A1
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WO
WIPO (PCT)
Prior art keywords
circuit
interface
bid
computer
electronic system
Prior art date
Application number
PCT/CN1999/000035
Other languages
English (en)
Chinese (zh)
Inventor
Yi Liang
Original Assignee
Yi Liang
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yi Liang filed Critical Yi Liang
Priority to AU27105/99A priority Critical patent/AU2710599A/en
Publication of WO1999046705A1 publication Critical patent/WO1999046705A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q40/00—Finance; Insurance; Tax strategies; Processing of corporate or income taxes
    • G06Q40/04—Trading; Exchange, e.g. stocks, commodities, derivatives or currency exchange

Definitions

  • the present invention relates to a computer-controlled system, in particular to a computer processing device for betting on the outcome of an event, and in particular to a clustered bid / response electronic system.
  • the electronic answering device is not a strange thing. In daily life, such as knowledge contests, TV station guest answering programs, etc., electronic answering devices are used, but the existing electronic system design is relatively simple, without the participation of smart components such as CPU and MPU. It is only suitable for a few people to participate in the quick answer. If there are dozens or more people participating in the quick answer, the judgment process is very complicated and the reliability is very low. As a clustered bidding / response (such as TV bidding / response), the technical requirements for the bidding / response electronic system are quite high. It requires the participation of dozens or hundreds of people, and can accurately and timely judge Who is the first person to press the bid / response switch effectively, or it is an invalid foul and the result is displayed.
  • the object of the present invention is to provide a state that can simultaneously monitor dozens or hundreds of people's bid / responder status, and can make accurate and timely judgments on the validity of bids or invalid fouls, and display them on television equipment or (and) large screens.
  • the clustered bid / response electronic system based on its location is implemented to count the cumulative number of viewers pressing the responder over a period of time (such as audience voting), and display the statistical results on TV equipment or (and) large on the screen.
  • the clustered bid / response electronic system as a solution of the present invention includes a computer, which is also characterized by an interface control card, a responder control circuit, and a matrix scanning responder.
  • the system allows viewers who enter the TV station to make a collective bid / answer.
  • Another aspect of the present invention includes: a plurality of telephones, and the bid / response signals sent by these telephones are sent to a telephone monitoring computer through a telephone network, a switching device, and a voice system, and the telephone monitoring computer communicates with a field computer in a television station through a modem Connected.
  • This scheme allows viewers who have not entered the TV station to use the telephone to conduct collective bidding / answering with viewers who have entered the TV station.
  • the present invention utilizes an intelligent system such as a computer and is applied to on-site bidding / response activities of television and other media. It is characterized by a large cluster size, a large number of bidding / response switches for monitoring, and the number of direct participants at the site can allow hundreds. Person Above, this is not possible with existing electronic answering equipment. The reason why this can be achieved is mainly because the matrix scanning monitoring technology is adopted, which is also the main innovation point of the system of the present invention.
  • the system of the present invention is absolutely accurate and reliable during operation, and will not cause misjudgments and omissions, and meets the strict specifications of the actual bid / response activities and the high specifications with legal effect. In addition to being used as a buy / rescue answer, the system can also be used for knowledge contests and conference elections.
  • FIG. 1 is a schematic block diagram of an electronic system according to the present invention
  • FIG. 2 is an operation flowchart of the embodiment
  • FIG. 3 is an embodiment of a specific circuit of the computer 1 and the interface control card 2 in FIG. 1;
  • FIG. 4 is an embodiment of a specific circuit of the responder control circuit 3 in FIG. 1;
  • FIG. 5 is an embodiment of a specific circuit of the matrix scanning responder in FIG. 1;
  • FIG. 6 is a schematic diagram of a system according to another embodiment of the present invention.
  • Fig. 7 is an operation flowchart of the embodiment.
  • FIG. 1 A schematic block diagram of the electronic system of the present invention is shown in FIG.
  • the system consists of a computer 1, an interface control card 2, a responder control circuit 3, and a matrix scanning responder 4.
  • the interface control card 2 is composed of a bus buffer circuit. 21.
  • the decoding circuit 22, the line scan control circuit 23, and the interface 24 are configured.
  • the input end of the bus buffer circuit 21 is connected to the ISA bus of the computer 1.
  • the output end of the bus buffer circuit 21 is respectively connected to the input of the decoding circuit 22.
  • the terminal, the input terminal of the horizontal scanning control circuit 23 and the interface 24 are connected, and the output terminal of the decoding circuit 22 provides a chip selection signal to the chip selection terminal of the horizontal scanning control circuit 23.
  • the responder control circuit 3 is composed of an interface 31, a row scanning driving circuit 32, a column signal input circuit 33, an interface 34, an interface 35, and a power source 36.
  • the interface 31 is connected to the interface 24, and the interface 31 is respectively connected to the line scanning driving circuit 32.
  • the input terminal is connected to the output terminal of the column signal input circuit 33, the output terminal of the row scan driving circuit 32 is connected to the interface 34, the input terminal of the column signal input circuit 33 is connected to the interface 35, and the circuit 36 is in the responder control circuit 3.
  • Other circuits provide power.
  • the matrix scanning answering device 4 is composed of m row signal lines, n column signal lines, and m X n number of answering switches distributed at the intersection of the row signal lines and the column signal lines. One end of each of the m answering switches in each row is connected to the same line of signal lines, and the other end of the switch is connected to n different columns of signal lines through isolation diodes.
  • the row signal lines are respectively connected to the interface 34 in the responder control circuit 3.
  • the column signal lines are connected to the interfaces 35 in the responder control circuit 3, respectively.
  • the system of the present invention having the above-mentioned circuit structure is equipped with electronic bid / ask system software (under the Windows 95 environment) on the computer 1, and is equipped with a sound card and a video conversion card, and a large TV screen can be connected when necessary.
  • electronic bid / ask system software under the Windows 95 environment
  • each line of signals is cyclically enabled, and the interval between two lines of signal enable
  • the call pickup switch corresponding to the row and column is pressed.
  • the host of the bid / response activity announces the start of the event, the host controls the start switch "Start" (that is, the bid / response switch at the position corresponding to the mth row and the nth column in the matrix scanning responder 4).
  • the computer 1 First, check if the buy / response switch has been pressed. If there is a foul, the seat number of the foul offender is displayed on the screen, and the corresponding sound effect is displayed. If no foul is committed, the computer 1 starts cyclic monitoring. Until someone presses the answering switch, the seat number of the valid buyer / responder who pressed the switch is displayed on the screen, with a sound effect. After the display is complete, computer 1 restarts the Start switch monitoring process.
  • the system starts to detect the answering device in a loop. Status, calculates and accumulates the total number of viewers who pressed the clicker; when the host presses the start switch again
  • the system stops the detection, and displays the final statistical results on the TV device or (and) the large screen.
  • the computer 1 of the system of the present invention is a multimedia computer.
  • the interface control card 2 is inserted into the ISA expansion slot in the computer 1 through a 62-pin connector JO, which realizes the computer 1 and the quick response control.
  • An interface between the control circuits 3 controls data input and output.
  • the bus buffer circuit 21 of the interface control card 2 consists of integrated circuit unidirectional bus buffers U1 and U4, integrated circuit bidirectional bus buffer U5, integrated circuit dual input NAND gates U8: A and U8: B, integrated circuit dual input NOR gate U9: A and connector JO.
  • the inputs of Ul, U4, and U5 are connected to the ISA bus through JO.
  • the functions of Ul and U4 are to isolate and buffer the address bus and control bus in the ISA bus. It is composed of U8: A, U8: B, U9: A.
  • the function of the logic circuit is to control the enable terminal E of U5 so that it can turn on the data bus when reading and writing to the interface card.
  • the input / output direction of U5 is controlled by the IOR signal.
  • U1 and U4 can use 74LS244, U5 can use 74LS245, U8 can use 74LS00, and U9: A can use 74LS02.
  • the column signal input circuit 33 is composed of integrated circuit latches U10 and U11, single bank RP2 and RP3, and double bank RP4.
  • the interface 35 is a 16-pin connector J4, which is connected to the column signal line in the matrix scanning responder 4. .
  • the inputs of U10 and U11 are connected to interface 35 (J4) through RP2 and RP3 respectively, and the outgoing terminals of U10 and U11 are connected to interface 34 (J3) through RP4.
  • the role of U10 and U11 is to read the corresponding signals under the control of chip select signals CS1 and CS2.
  • RP2 and RP3 provide input pull-up levels to U10 and U11 respectively.
  • the role of RP4 is to eliminate transmission oscillation on the signal line.
  • U10 and U11 can use 74LS373

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  • Business, Economics & Management (AREA)
  • Accounting & Taxation (AREA)
  • Finance (AREA)
  • Engineering & Computer Science (AREA)
  • Development Economics (AREA)
  • Economics (AREA)
  • Marketing (AREA)
  • Strategic Management (AREA)
  • Technology Law (AREA)
  • Physics & Mathematics (AREA)
  • General Business, Economics & Management (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Selective Calling Equipment (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

L'invention concerne un système électronique d'achat/réponse compétitif pour grand public qui est composé d'un ordinateur, d'un contrôleur d'interface, d'un circuit de commande du dispositif d'achat compétitif, d'un dispositif à balayage matriciel d'achat . Le contrôleur d'interface est, quant à lui, formé d'un circuit tampon, d'un circuit de décodage, d'un circuit de commande de balayage de ligne et d'une interface. Le circuit de commande du dispositif d'achat compétitif comprend un circuit excitateur à balayage de ligne, un circuit d'entrée de signal à colonne et une interface, entre autres. Le dispositif à balayage matriciel d'achat compétitif comprend m lignes de signaux, n rangées de signaux et m x n interrupteurs d'achat compétitif. Ce système présente deux fonctions principales: 1) il est conçu pour réguler la situation dans laquelle des centaines de téléspectateurs sont en train d'acheter/répondre, tout en déterminant la validité des achats à temps sans erreur et/ou en affichant la position de la personne qui a appuyé sur les interrupteurs du poste de télévision et/ou du grand écran; 2) il est conçu pour estimer combien de téléspectateurs ont appuyé sur les interrupteurs pendant une courte période de temps tout en affichant le résultat sur le poste de télévision et/ou sur le grand écran.
PCT/CN1999/000035 1998-03-12 1999-03-12 Systeme electronique d'achat/reponse competitifs pour grand public WO1999046705A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU27105/99A AU2710599A (en) 1998-03-12 1999-03-12 Electronic system for competitively buying/answering

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN 98112380 CN1198556A (zh) 1998-03-12 1998-03-12 集群式竞买抢答电子系统
CN98112380.5 1998-03-12

Publications (1)

Publication Number Publication Date
WO1999046705A1 true WO1999046705A1 (fr) 1999-09-16

Family

ID=5222235

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN1999/000035 WO1999046705A1 (fr) 1998-03-12 1999-03-12 Systeme electronique d'achat/reponse competitifs pour grand public

Country Status (3)

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CN (1) CN1198556A (fr)
AU (1) AU2710599A (fr)
WO (1) WO1999046705A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102522983B (zh) * 2011-12-16 2014-06-04 宝鸡石油机械有限责任公司 一种矩阵式开关量驱动器

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2097421U (zh) * 1991-08-30 1992-02-26 陈江南 微电脑评分、抢答、定时多用仪
CN1172307A (zh) * 1996-07-25 1998-02-04 特肯奥斯－迈尔公司 用于自动提取票据的终端系统

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2097421U (zh) * 1991-08-30 1992-02-26 陈江南 微电脑评分、抢答、定时多用仪
CN1172307A (zh) * 1996-07-25 1998-02-04 特肯奥斯－迈尔公司 用于自动提取票据的终端系统

Also Published As

Publication number Publication date
CN1198556A (zh) 1998-11-11
AU2710599A (en) 1999-09-27

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