WO1998041880A3 - Integrierte schaltung und verfahren zum testen der integrierten schaltung - Google Patents

Integrierte schaltung und verfahren zum testen der integrierten schaltung Download PDF

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Publication number
WO1998041880A3
WO1998041880A3 PCT/DE1998/000608 DE9800608W WO9841880A3 WO 1998041880 A3 WO1998041880 A3 WO 1998041880A3 DE 9800608 W DE9800608 W DE 9800608W WO 9841880 A3 WO9841880 A3 WO 9841880A3
Authority
WO
WIPO (PCT)
Prior art keywords
rom
integrated circuit
testing
same
user
Prior art date
Application number
PCT/DE1998/000608
Other languages
English (en)
French (fr)
Other versions
WO1998041880A2 (de
Inventor
Juergen Nolles
Hans-Heinrich Viehmann
Original Assignee
Siemens Ag
Juergen Nolles
Viehmann Hans Heinrich
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag, Juergen Nolles, Viehmann Hans Heinrich filed Critical Siemens Ag
Priority to JP54000998A priority Critical patent/JP2001527669A/ja
Priority to EP98916822A priority patent/EP0968436A2/de
Priority to BR9808381-3A priority patent/BR9808381A/pt
Publication of WO1998041880A2 publication Critical patent/WO1998041880A2/de
Publication of WO1998041880A3 publication Critical patent/WO1998041880A3/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Microcomputers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

Integrierte Schaltung mit einer CPU und einem Anwender-ROM, gekennzeichnet durch ein Test-ROM, dessen Adressraum innerhalb des Anwender-ROM-Adressraums liegt, ein CPU externes RAM sowie ein Schaltmittel, das einen Zugriff nur entweder auf das Anwender-ROM oder das Test-ROM ermöglicht und irreversibel in einen Zustand versetzbar ist, der nur einen Zugriff auf das Anwender-ROM erlaubt.
PCT/DE1998/000608 1997-03-19 1998-03-02 Integrierte schaltung und verfahren zum testen der integrierten schaltung WO1998041880A2 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP54000998A JP2001527669A (ja) 1997-03-19 1998-03-02 集積回路および該集積回路のテスト方法
EP98916822A EP0968436A2 (de) 1997-03-19 1998-03-02 Integrierte schaltung und verfahren zum testen der integrierten schaltung
BR9808381-3A BR9808381A (pt) 1997-03-19 1998-03-02 Circuito integrado e processo para teste do circuito integrado

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19711478.4 1997-03-19
DE19711478A DE19711478A1 (de) 1997-03-19 1997-03-19 Integrierte Schaltung und Verfahren zum Testen der integrierten Schaltung

Publications (2)

Publication Number Publication Date
WO1998041880A2 WO1998041880A2 (de) 1998-09-24
WO1998041880A3 true WO1998041880A3 (de) 1999-01-14

Family

ID=7823916

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE1998/000608 WO1998041880A2 (de) 1997-03-19 1998-03-02 Integrierte schaltung und verfahren zum testen der integrierten schaltung

Country Status (7)

Country Link
EP (1) EP0968436A2 (de)
JP (1) JP2001527669A (de)
KR (1) KR20000076351A (de)
CN (1) CN1251183A (de)
BR (1) BR9808381A (de)
DE (1) DE19711478A1 (de)
WO (1) WO1998041880A2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3198997B2 (ja) 1997-08-28 2001-08-13 日本電気株式会社 マイクロコンピュータ及びそのバーンインテスト方法
EP0992809A1 (de) 1998-09-28 2000-04-12 Siemens Aktiengesellschaft Schaltungsanordnung mit deaktivierbarem Scanpfad
DE10101234A1 (de) * 2001-01-11 2002-07-18 Giesecke & Devrient Gmbh Verfahren zum Text eines nichtflüchtigen Speichers und Verwendung eines solchen Verfahrens
US7325181B2 (en) 2003-02-24 2008-01-29 Stmicroelectronics S.A. Method and device for selecting the operating mode of an integrated circuit
CN1829127B (zh) * 2006-04-20 2011-06-29 北京星河亮点通信软件有限责任公司 一种基于微内核的通信终端测试仪表控制平台的构建方法
CN102592683B (zh) * 2012-02-23 2014-12-10 苏州华芯微电子股份有限公司 一种芯片测试模式的进入方法及相关装置
CN103021471B (zh) * 2012-12-24 2016-08-03 上海新储集成电路有限公司 一种存储器及其存储方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5286962A (en) * 1990-12-14 1994-02-15 Mitsubishi Denki Kabushiki Kaisha IC card for prevention of fraudulent use
EP0610886A2 (de) * 1993-02-09 1994-08-17 Mitsubishi Denki Kabushiki Kaisha Mikrorechner für IC-Karte

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0758502B2 (ja) * 1988-06-30 1995-06-21 三菱電機株式会社 Icカード

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5286962A (en) * 1990-12-14 1994-02-15 Mitsubishi Denki Kabushiki Kaisha IC card for prevention of fraudulent use
EP0610886A2 (de) * 1993-02-09 1994-08-17 Mitsubishi Denki Kabushiki Kaisha Mikrorechner für IC-Karte

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
MARTIN D G ET AL: "DUAL USE OF STORAGE ADDRESS SPACE", IBM TECHNICAL DISCLOSURE BULLETIN, vol. 24, no. 12, May 1982 (1982-05-01), pages 6254/6255, XP000714088 *

Also Published As

Publication number Publication date
BR9808381A (pt) 2000-05-23
CN1251183A (zh) 2000-04-19
JP2001527669A (ja) 2001-12-25
KR20000076351A (ko) 2000-12-26
DE19711478A1 (de) 1998-10-01
WO1998041880A2 (de) 1998-09-24
EP0968436A2 (de) 2000-01-05

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