WO1998027454A1

WO1998027454A1 - Transverse electric field system liquid crystal display device suitable for improving aperture ratio

Info

Publication number: WO1998027454A1
Application number: PCT/JP1996/003691
Authority: WO
Inventors: Masuyuki Ohta; Kazuhiro Ogawa; Keiichiro Ashizawa; Kazuhiko Yanagawa; Masahiro Yanai; Nobutake Konishi; Nobuyuki Suzuki; Masahiro Ishii; Makoto Yoneya; Sukekazu Aratani
Original assignee: Hitachi, Ltd.
Priority date: 1996-12-18
Filing date: 1996-12-18
Publication date: 1998-06-25
Also published as: TW494261B; JP3691854B2

Abstract

An active matrix type liquid crystal display device capable of accomplishing an angle of visual field equal to that of a CRT and controlling the display by an electric field substantially parallel to a substrate surface provides bright display and requires lower power consumption. Pixel electrodes and opposed electrode capable of applying an electric field substantially parallel to a substrate surface is constituted, the pixel electrodes or the opposed electrodes are constituted by transparent electrodes, and the orientation state of a liquid crystal and the axis of polarization of a polarizer are constituted so that dark display is effected at the time when no field is applied. In this way, there can be provided a transverse field system active matrix type liquid crystal display device having a wide visual field angle characteristics, excellent contrast ratio and aperture ratio and capable of improving maximum transmissivity.

Description

Specification

In-plane liquid crystal display suitable for improving aperture ratio

〔Technical field〕

The present invention relates to an active-matrix type liquid crystal display device, and more particularly to a horizontal electric field type liquid crystal display device having a wide viewing angle characteristic suitable for improving an aperture ratio.

(Background technology)

Active matrix liquid crystal display devices using active elements typified by thin film transistors (TFTs) have begun to spread widely as display terminals for OA equipment, etc. due to their thin and lightweight characteristics and high image quality comparable to cathode ray tubes. I have. The display methods of this liquid crystal display device are roughly classified into the following two types.

One is a method in which the liquid crystal is sandwiched between two substrates with transparent electrodes, operated by the voltage applied to the transparent electrode, and the light transmitted through the transparent electrode and incident on the liquid crystal is modulated and displayed. Yes, all products that are currently in widespread use this method.

The other is to operate the liquid crystal by an electric field that is almost parallel to the substrate surface between two electrodes formed on the same substrate, and to modulate the light incident on the liquid crystal from the gap between the two electrodes to display. This method is characterized by a remarkably wide viewing angle, and is a promising technology for active matrix type liquid crystal display devices. It is called the horizontal electric field method or in-plane switching method. Regarding the features of the latter method, see Japanese Patent Application Publication No. 5-504,247, Japanese Patent Publication No. Sho 63-219,074, and Japanese Patent Application Laid-Open No. 6-160878. Has been described.

However, in the latter conventional method, since the opaque metal electrode is formed in a comb-like shape, the ratio of the aperture area through which light is transmitted (opening ratio) is extremely low, and the latter conventional active matrix liquid crystal display is used. The device has a problem that the power consumption of the device increases because the display screen is dark or a bright backlight with large power consumption must be used to brighten the display screen.

Another problem is that, in the latter conventional method, since a metal electrode is used, the reflectance at the electrode is high, and a face or the like is reflected on the screen by the reflection at the electrode, making it difficult to see.

An object of the present invention is to solve the above-mentioned problems. An object of the present invention is to provide an active matrix type liquid crystal display device using the latter display method capable of realizing a viewing angle similar to a cathode ray tube, with a high aperture ratio, a high brightness, a low An object of the present invention is to provide an active matrix liquid crystal display device that consumes low power and is easy to see with low reflection.

[Disclosure of the Invention]

In order to achieve the above object, according to the present invention, as a first configuration, at least one of the pixel electrode and the counter electrode is a transparent electrode, and is set to a normally black mode in which a display is performed when no electric field is applied. The initial alignment state of the twistable liquid crystal layer at the time of application is a homogenous alignment state, and the liquid crystal molecules between the electrodes and on the electrodes when an electric field is applied rotate predominantly substantially in parallel to the substrate surface. The maximum light transmittance is 4.0% or more, and the viewing angle range with a contrast ratio of 10: 1 or more is within the range of all directions inclined at least 40 degrees from the vertical direction to the display surface. It is characterized by the following. As a second configuration, at least one of the pixel electrode and the counter electrode is a transparent electrode, a normally black mode in which dark display is performed when no electric field is applied, and an initial state of the twistable liquid crystal layer when no electric field is applied. orientation state is a homo Jiniasu alignment state, and wherein the twist elastic constant is not more than ¹ OX 1 0- 1 ² N (New one ton).

As a third configuration, at least one of the pixel electrode and the counter electrode is a transparent electrode, a normally black mode in which a display is performed when no electric field is applied, and an initial state of the twistable liquid crystal layer when no electric field is applied. The alignment state is a homogeneous alignment state, the initial pretilt angle of the liquid crystal molecules at the upper and lower interfaces of the liquid crystal layer is 10 degrees or less, and the initial tilt state of the liquid crystal molecules in the liquid crystal layer is a splay state. .

As a fourth configuration, at least one of the pixel electrode and the counter electrode is a transparent electrode, a normally black mode in which dark display is performed when no electric field is applied, and an initial state of the twistable liquid crystal layer when no electric field is applied. The alignment state is a homogeneous alignment state, and the average tilt angle of the liquid crystal molecules in the liquid crystal layer on the transparent electrode is less than 45 degrees even when an electric field is applied.

As a fifth configuration, in any of the first to fourth configurations, at least a double structure of a transparent electrode and an opaque metal electrode is used for a pixel electrode or a counter electrode.

As a sixth configuration, in any one of the first to fourth configurations, a structure is used in which an adjacent counter voltage signal line is connected via a through hole by a counter electrode in a pixel.

As a seventh configuration, in any one of the first to fourth configurations, further comprising a protective film for covering the matrix element, One of the elementary electrode and the counter electrode is formed on the protective film, and is electrically connected to the active matrix element or the counter voltage signal line via the through hole formed in the protective film. It is characterized by. As an eighth configuration, in any one of the first to fourth configurations, a structure is used in which the counter electrode is made of a transparent electrode and further has a light-shielding pattern between the counter electrode and the video signal line.

As a ninth configuration, in any one of the first, second, third, fourth, and fifth configurations, the opposing voltage signal line that electrically connects the opposing electrodes is made of metal. As a tenth configuration, in any one of the first to fourth configurations, three or more counter electrodes are formed, two of which are formed adjacent to the video signal line, and the counter electrode is formed on the video signal line. Opposing electrodes formed adjacently are opaque.

As an eleventh configuration, in any one of the first to fourth configurations, the transparent conductive film used for the transparent electrode is indium-tin-oxide (ITo).

As a twelfth configuration, in the ninth configuration, the opposing voltage signal line has a clad structure in which Cr, Ta, Ti, Mo, W, Al, an alloy thereof, or a laminate thereof is stacked.

As a thirteenth configuration, in the ninth configuration, the opposing voltage signal line is formed of a transparent conductive material such as an aluminum oxide (ITO) on Cr, Ta, Ti, Mo, W, Al, or an alloy thereof. C As a fourteenth configuration, which is a clad structure in which a film is laminated, in any one of the first to fourth configurations, the initial liquid crystal layer has an initial switch angle of almost zero, and the initial alignment angle is the dielectric constant of the liquid crystal material. If the anisotropy Δ £ is positive, 45 degrees or more and less than 90 degrees, dielectric anisotropy Δ ε If is negative, it is characterized by being greater than 0 degrees and less than 45 degrees.

As a first manufacturing method, at least one of the scanning signal line terminal portion, the video signal line terminal portion, or the uppermost conductive layer of the counter electrode terminal portion and at least one of the pixel electrode or the counter electrode is made of a transparent conductive material. It is characterized in that it is formed of layers and is formed in the same step.

The operation of the present invention will be described below.

First, as a function of the first configuration, at least one of the pixel electrode and the counter electrode is made transparent, and the maximum transmittance at the time of performing bright (white) display is improved by the transmitted light of that portion. Brighter display can be performed than when the electrode is opaque, and the light transmittance of the liquid crystal display panel is 3.0 to 3.8% in the case of adopting the latter conventional opaque electrode. Maximum transmittance values of 4.0% or more can be achieved. That is, when the luminance of the 3 0 0 0 cd Zm ² of backlight incident light, the maximum luminance value of the bright display brightness, 1 ² 0 cd / m 2 or more can be achieved.

Furthermore, when no voltage is applied, the liquid crystal molecules maintain the initial homogenous alignment state, and if the polarizing plate is arranged so as to perform dark (black) display in that state (normal black mode), Even if the electrode is transparent, the light in that part is not transmitted, so that a high-quality dark display can be achieved and the contrast is improved.

On the other hand, in the normally white mode, dark display must be performed when voltage is applied, and when voltage is applied, the light on the electrode cannot be completely blocked, so that the transmitted light in that part increases the transmittance of dark display. High quality dark display is not possible. Therefore, a sufficient contrast ratio cannot be achieved. Furthermore, since the liquid crystal molecules between the electrodes and on the electrodes when the electric field is applied rotate predominantly in parallel with the substrate surface, a wide viewing angle characteristic is obtained.

Therefore, a wide viewing angle characteristic is obtained in which the viewing angle range having a contrast ratio of 10: 1 or more is in an omnidirectional range inclined at least 40 degrees from the vertical direction with respect to the display surface.

In addition, as a function of the second configuration, when a voltage is applied between the pixel electrode and the counter electrode, the twistable liquid crystal layer has a twist elastic constant of 10 X 10 N (Newton) or less. On the electrode of the film, the rotation angle α from the initial orientation direction increases, and the transmittance on the electrode acts complementarily to the transmittance between the electrodes, thereby substantially improving the aperture ratio. The twist elastic constant Κ2 is preferably small.

In addition, as an effect of the third configuration, the initial angle of the liquid crystal molecules at the upper and lower interfaces of the liquid crystal layer is 10 degrees or less, and the initial tilt state of the liquid crystal molecules in the liquid crystal layer is in the state. Since the tilt angle of the liquid crystal molecules is almost zero, and the average tilt angle of the liquid crystal layer contributing to display can be reduced, the tilt angle of the liquid crystal molecules between the electrodes and on the transparent electrode can be set low even when voltage is applied, and the aperture can be reduced. It can improve the rate and wide viewing angle.

In addition, as an effect of the fourth configuration, the average tilt angle of the liquid crystal molecules in the liquid crystal layer on the transparent electrode is less than 45 degrees even when an electric field is applied, so that it is possible to realize an improved aperture ratio and a wide viewing angle.

Furthermore, as a function of the fifth configuration, by using a double structure of a transparent electrode and an opaque metal electrode for the pixel electrode or the counter electrode, disconnection failure of this electrode can be largely prevented, which is advantageous for a large screen. .

Further, as an operation of the sixth configuration, the adjacent counter voltage signal line By using a structure in which the opposite electrodes are connected via through holes, each of the opposite voltage signal lines is electrically connected in a mesh pattern, so that the resistance of the opposite voltage signal lines can be reduced, and even if a disconnection failure occurs, a serious defect is caused. Does not.

Further, as an effect of the seventh configuration, the electric field acting on the liquid crystal molecules is suppressed from being reduced by the protective film, and the driving voltage can be reduced. Further, as an operation of the eighth configuration, the aperture ratio is improved by using a structure in which the counter electrode is formed of a transparent electrode and has a light-shielding pattern between the counter electrode and the video signal line.

In addition, as a function of the ninth configuration, by reducing the resistance of the common voltage signal line, the transfer of voltage between the common electrodes is smoothed, and the voltage distortion is reduced, thereby reducing horizontal crosstalk. Can be suppressed.

Further, as an operation of the tenth configuration, the opposing electrode adjacent to the video signal line is made opaque, thereby suppressing crosstalk accompanying the video signal. The reasons are given below.

By forming the transparent counter electrode adjacent to the video signal line, the electric field (line of electric force) from the video signal line is absorbed by the counter electrode, and the electric field from the video signal line is applied between the pixel electrode and the counter electrode. Since it does not affect the electric field, the occurrence of crosstalk associated with the video signal, particularly crosstalk in the vertical direction of the substrate, is significantly suppressed. However, the behavior of the liquid crystal molecules on the opposing electrode adjacent to the video signal line is unstable due to the fluctuation of the video signal, and when the opposing electrode adjacent to the video signal line is made transparent, Crosstalk is observed by the transmitted light. Therefore, by making the counter electrode adjacent to the video signal line opaque, crosstalk associated with the video signal can be suppressed. Further, as a function of the first configuration, the transparent conductive film is indium-tin-tin. Oxide (ITO), suitable for improving transmittance.

Further, as an effect of the twelfth and thirteenth configurations, since the opposed voltage signal line has a laminated clad structure, the resistance value is reduced, and disconnection failure can be reduced. Furthermore, as a function of the fourteenth configuration, the initial liquid crystal layer initial liquid crystal angle is almost zero, and the initial alignment angle is 45 ° C or more and less than 90 ° C if the dielectric anisotropy Δε of the liquid crystal material is positive. If the dielectric anisotropy Δε is negative, it is more than 0 ° and not more than 45 °, so that the domain can be suppressed, the range of the maximum applied voltage can be optimized, and the contrast can be improved. Can also be optimized.

In addition, as an operation of the first manufacturing method, the uppermost transparent conductive layer of the scanning signal line terminal portion, the video signal line terminal portion, or the counter electrode terminal portion and the transparent conductive film of the pixel electrode or the counter electrode are simultaneously formed. By doing so, the pixel electrode and the counter electrode can be formed of a transparent conductive film without increasing the number of steps.

In addition, in the liquid crystal display device of the present invention, at least one of the pixel electrode and the counter electrode is formed of a transparent conductive film. For example, Richard A. Soref (Richard A. Soref), Proceedingsofthe IEEE The structure of the liquid crystal display element described in (Procedure of the Eye Triplui), December, 1974, pp. 1710-1711 (hereinafter referred to as reference 1) is different in the following points. In Literature 1, the comb electrodes corresponding to the pixel electrode and the counter electrode are formed of a transparent conductive film.

However, when forming the initial alignment state of the liquid crystal molecules, Sio (silicon monooxide) is obliquely deposited at about 85 degrees, and the liquid crystal molecules have a considerably high pretilt angle at the interface between each electrode and the liquid crystal layer. Is formed. Therefore, as shown in Fig. 1 (b) of Reference 1, By applying a voltage between the comb-tooth electrodes from the homogenous orientation, the electrodes become realigned, with a homogenous orientation between the electrodes substantially parallel to the substrate surface and a homeotropic aperture orientation on the electrodes perpendicular to the substrate surface. And are formed.

However, in this configuration, as the electric field is increased, the reorientation state of the two types of liquid crystal molecules acts complementarily to enable brighter display, but the tilt angle of the liquid crystal molecules must be increased on average Therefore, when the viewing angle characteristics are narrowed, there is a disadvantage.

On the other hand, in the in-plane switching mode liquid crystal display device of the present invention, in order to obtain a wide viewing angle characteristic and a good aperture ratio, even if a voltage is applied between the pixel electrode and the counter electrode, it contributes to a display image. The part where liquid crystal molecules are realigned keeps a homogeneous alignment state parallel to the substrate surface as much as possible.On the transparent conductive film electrode, transmission on the electrode corresponds to the angle α that rotates from the initial alignment direction. The rate acts complementarily to the transmittance between the electrodes to substantially improve the aperture ratio.

In this specification, a homogeneous alignment state refers to a state in which a liquid crystal molecule in a liquid crystal layer has a tilt (rise) angle parallel to a substrate surface or an interface of the liquid crystal layer as much as possible. Is an alignment state in which the tilt angle from the substrate surface or the liquid crystal layer interface is less than 45 degrees. Therefore, the homeotropic alignment state means that the tilt angle from the interface of the liquid crystal layer exceeds 45 degrees with the substrate surface.

FIG. 41A shows an example of a potential distribution in the liquid crystal layer in an electrode configuration that generates an electric field in a direction substantially parallel to the substrate surface.

The solid line in the figure is the equipotential line, and the electric field vector is given in a direction perpendicular to the equipotential line. The electric field vector E is perpendicular to the substrate surface on the center of the electrode. Only the component Ey in the direction is generated, but the component Ex in the horizontal direction also occurs on the substrate surface except for the center. In the region where the horizontal component, ie, the horizontal electric field component EX is generated, the liquid crystal molecules between the electrodes rotate from the initial alignment direction RDR in the horizontal electric field EX direction as shown in FIGS. 41B and 41C. Rotate only the corner. On the other hand, the liquid crystal molecules on the electrodes are rotated by the rotation of the liquid crystal molecules between the electrodes due to the elastic field in the liquid crystal. Therefore, the liquid crystal molecule at the center on the electrode is not applied with the transverse electric field, but rotates in the same direction as the surrounding liquid crystal molecules due to the elastic field. That is, the rotation angle α is large between the electrodes, decreases on the electrodes, and becomes minimum on the center of the electrodes.

The results of simulating this situation are shown in FIGS. 42A to 42C. Note that the simulation in this example assumes that the initial twist angle of the liquid crystal layer is almost zero, and that the initial alignment direction RDR and the applied electric field EX make the initial alignment angle (/> LC = 75 degrees) the initial homogenous alignment state of the liquid crystal molecules. The initial pretilt angle of the liquid crystal molecules in the vicinity of the upper and lower interfaces of the liquid crystal layer is set to zero degree, and one transmission axis of the polarizing plate is made to coincide with the initial alignment direction RDR, and the transmission axis of the other polarizing plate is orthogonal. The configuration example was a Nicol arrangement and display in birefringence mode.

Light transmittance at this time TZT. Is represented by the following equation.

T / T. = si η ² (2 a eff) · si η ² (π d eff · Δ n / λ) (1) where eff is the difference between the effective optical axis of the liquid crystal layer and the polarization transmission axis. In this example, it is the effective value of the rotation angle α of the liquid crystal molecules in the thickness direction of the liquid crystal layer, which is an apparent value that can be treated as an average value assuming uniform rotation.

D eff is the effective thickness of the birefringent liquid crystal layer, Δη is the refractive index anisotropy, and λ is the wavelength of light. In equation (1), at the applied electric field Ex, the value of eff increases according to the intensity, and reaches a maximum at 45 degrees.

Furthermore, in the simulation of this example, the retardation Δn · d eff of the liquid crystal layer was selected to be の of the wavelength λ of light to realize the zero-order mode of birefringence, and the dielectric anisotropy Δε was positive. You have set.

Fig. 42 A is a characteristic diagram showing the state of equipotential lines when a voltage at which a bright display near the maximum is obtained is applied to the transparent ITO electrode. The vertical axis represents the thickness of the liquid crystal layer (thickness 4). O / im), and the horizontal axis shows the relative positional relationship of the electrodes. The numerical values in the figure indicate the normalized potential intensities.

Fig. 42B and Fig. 42C are the rotation angle and tilt of the liquid crystal molecules in the liquid crystal layer when the horizontal electric field component EX formed from the equipotential lines is applied. (Get up) Show the corner.

As shown in FIG. 42 C, even when a voltage is applied, the liquid crystal molecules on the electrodes hardly rise, and in this example, the tilt angle is 8 ° or less in all the thickness directions of the liquid crystal layer. As shown in FIG. 42B, the liquid crystal molecules on the electrodes are also rotated by about 15 to 35 ° near the center of the liquid crystal layer.

The sign of the tilt angle shown in FIG. 42C is such that, for the sake of convenience, the rightward rise is positive and the leftward rise is negative in the drawings. Therefore, in the method of the present invention, the rotation angle _{α of the} liquid crystal molecules changes even on the electrode, and the transmittance can be changed.

The twist elastic constant Κ 2 of the liquid crystal is most relevant to this operation. The twist elastic constant Κ 2 is preferably smaller, and the liquid crystal molecules on the electrode become smaller as the liquid crystal between the electrodes becomes smaller. Of the liquid crystal molecules between the electrodes Rotate to approach the rotation angle α.

F ig in. 4 ID, schematic manner shows an electrode and on the transmittance between the electrodes distribution when the'isuto elastic constant K 2 to about ^{1 0 X 1 0- 1 2 N} ( two Yuton).

If the electrode is transparent, the above-described reorientation of the liquid crystal molecules on the electrode causes the average transmittance of the portion A between the electrodes to be 5 to 30% of the transmittance of the portion B on the electrode. The average value of the transmittance is the transmittance.

As described later, the twisted elastic constant K 2 2 0 X 1 0 - . If the ^{1 2} N (Newton) or less, more 50% of the average transmittance of the transmittance of the portion A between the electrodes It was found that the average value of the transmittance of the portion B on the electrode was the transmittance. Therefore, the average transmittance of the entire portion becomes the average transmittance of the transmittance of the A + B portions, and is increased.

In other words, the aperture ratio per pixel can be substantially improved as compared with a conventional structure formed of a metal layer that does not transmit light at all. In the simulation of this example, the calculation is performed with the initial pretilt angle set to zero degree, but in practice, the initial pretilt angle near the interface between the liquid crystal layer and the alignment film is about 10 degrees or less, preferably 6 degrees or less. It must be set by rubbing. In an embodiment described later, the angle is set to about 5 degrees. By setting the initial pretilt angle in such a range, the liquid crystal molecules at the interface of the liquid crystal layer can be regulated in the in-plane direction of the substrate. Even when an electric field is applied, the average tilt angle of the liquid crystal layer on the electrode is 45 degrees. Will be maintained. In other words, even when an electric field is applied, the liquid crystal on the electrode can be prevented from being in a so-called home-port pick alignment.

FIG. 44 shows the liquid in the liquid crystal layer in the horizontal electric field type liquid crystal display device. FIG. 8 is an example of a characteristic diagram of a simulation result showing a tilt angle of crystal molecules and a viewing angle range in which a contrast ratio in all directions is 10 or more.

In other words, if the tilt angle is about 30 degrees, the contrast ratio becomes 10 or more in all directions within the viewing angle range inclined about 40 degrees from the direction perpendicular to the display surface. The same characteristics as those of the liquid crystal display device can be obtained. Furthermore, as the tilt angle is reduced, the viewing angle range expands, and if it is about 10 degrees, it extends to within the viewing angle range inclined at about 80 degrees, and if it is 5 degrees or less, it spreads to almost the entire area, wide viewing angle characteristics Is obtained.

In this embodiment, in order to always reduce the average tilt angle of liquid crystal molecules between electrodes and in a liquid crystal layer on a transparent electrode when no electric field is applied and when an electric field is applied, rubbing of the alignment films OR II and OR I 2 described later is performed. The orientation is set so that the initial pretilt angle of the liquid crystal molecules at the interface between the liquid crystal layers on the two substrates SUB 1 and SUB 2 is in the splay state, and the liquid crystal molecules near the center of the liquid crystal layer are formed. As far as possible, it should be parallel to the interface.

[Brief description of drawings]

FIG. 1 is a plan view of a principal part showing one pixel of a liquid crystal display portion of an active matrix type single liquid crystal display device of the first embodiment of the present invention and the periphery thereof.

FIG. 2 is a cross-sectional view of a pixel taken along section line 3-3 of FIG.

FIG. 3 is a cross-sectional view of the thin-film transistor element TFT at the 4-14 cutting line of FIG.

FIG. 4 is a cross-sectional view of the storage capacitor C stg along the section line 5-5 in FIG. FIG. 5 is a plan view for explaining the configuration of the periphery of the matrix of the display panel.

FIG. 6 is a cross-sectional view showing a scanning signal terminal on the left side and a panel edge portion without an external connection terminal on the right side.

FIG. 7A is a plan view showing the vicinity of the connection between the gate terminal GTM and the gate wiring GL, and FIG. 7B is a sectional view thereof.

FIG. 8A is a plan view showing the vicinity of the connection between the drain terminal DTM and the video signal line DL, and FIG. 8B is a sectional view thereof.

FIG. 9A is a plan view showing the vicinity of a connection portion of a common electrode terminal CTM, a common bus line CB, and a common voltage signal line CL, and FIG. 9B is a cross-sectional view thereof.

FIG. 10 is a circuit diagram of the active matrix color liquid crystal display device of the present invention, including a matrix portion and its periphery.

FIG. 11 is a diagram showing a drive waveform of the active-matrix type color liquid crystal display device of the present invention.

FIG. 12 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion showing a manufacturing process of processes A to C on the substrate SUB1 side.

FIG. 13 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion showing a manufacturing process of processes D to F on the substrate SUB1 side.

FIG. 14 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion showing a manufacturing process of processes G to H on the substrate SUB1 side.

FIG. 15 is a top view showing a state where peripheral driving circuits are mounted on the liquid crystal display panel.

Fig. 16 shows that the integrated circuit chip CH I that constitutes the drive circuit is flexible. FIG. 6 is a diagram showing a cross-sectional structure of a tape carrier package TCP mounted on a wiring board.

FIG. 17 is a cross-sectional view of a principal part showing a state where the tape carrier package TCP is connected to the running signal circuit terminal GTM of the liquid crystal display panel PNL.

FIG. 18 is an exploded perspective view of the liquid crystal display module.

FIG. 19 is a diagram showing a relationship among a direction of an applied electric field, a rubbing direction, and a transmission axis of a polarizing plate.

FIG. 20 is a plan view of a principal part showing one pixel of a liquid crystal display portion of an active matrix color liquid crystal display device of Example 2 of the present invention and the periphery thereof.

FIG. 21 is a main part plan view C showing one pixel of a liquid crystal display portion of an active matrix type color liquid crystal display device of Example 3 of the present invention and its periphery.

FIG. 22 is a fragmentary plan view showing one pixel of a liquid crystal display portion of an active matrix color liquid crystal display device according to a fourth embodiment of the present invention and the periphery thereof.

FIG. 23 is a fragmentary plan view showing one pixel of a liquid crystal display portion of an active matrix liquid crystal display device of Example 5 of the present invention and the periphery thereof.

FIGS. 24A to 24C are a plan view and a cross-sectional view of a principal part showing one pixel of a liquid crystal display portion and its periphery of an active matrix type color liquid crystal display device according to a sixth embodiment of the present invention.

FIG. 25 is the active matrix force of Example 7 of the present invention. FIG. 4 is a plan view of a principal part showing one pixel of a liquid crystal display section of a color liquid crystal display device and its periphery.

F i g. 26 may, F i g. _C is a cross-sectional view taken along 25 of 6-6 cut line

FIG. 27 is a cross-sectional view of the thin-film transistor element TFT taken along section line 7-7 of FIG.

FIG. 28 is a cross-sectional view of the storage capacitance C stg at the 8-8 section line of FIG. 25.

FIG. 29A is a plan view showing the vicinity of the connection between the gate terminal GTM and the gate wiring GL, and FIG. 29B is a sectional view thereof.

FIG. 30A is a plan view showing the vicinity of the connection between the drain terminal DTM and the video signal line DL, and FIG. 30B is a sectional view thereof.

FIG. 31A is a plan view showing the vicinity of the connection between the common electrode terminal CTM1, the common bus line CB1, and the common voltage signal line CL, and FIG. 3IB is a cross-sectional view thereof.

FIG. 32A is a plan view showing the vicinity of a connection portion of the common electrode terminal CTM2, the common bus line CB2, and the common voltage signal line CL, and FIG. 32B is a sectional view thereof.

FIG. 33 is a circuit diagram of the active matrix color liquid crystal display device of the present invention, including the matrix portion and its periphery.

FIG. 34 is a diagram showing a drive waveform of the active'matrix type color liquid crystal display device of the present invention.

FIG. 35 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion showing manufacturing processes of processes A to C on the substrate SUB1 side.

Fig. 36 is a pixel showing the manufacturing process of processes D to E on the substrate SUB 1 side. It is a flowchart of the sectional view of a part and a gate terminal part.

FIG. 37 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion illustrating a manufacturing process in a process F on the substrate SUB1 side.

FIG. 38 is a plan view of relevant parts showing one pixel of a liquid crystal display portion of an active matrix liquid crystal display device of Example 8 of the present invention and the periphery thereof.

FIG. 39 is a plan view of relevant parts showing one pixel of a liquid crystal display portion of an active matrix color liquid crystal display device of Example 9 of the present invention and the periphery thereof.

FIG. 40 is a plan view of relevant parts showing one pixel of a liquid crystal display portion of an active matrix type color liquid crystal display device of Example 10 of the present invention and the periphery thereof.

FIGS. 41A to 41D are diagrams showing the principle of the present invention, and FIG. 41A is a characteristic diagram showing a potential distribution in a liquid crystal layer when a voltage is applied to an electrode. 4IB is a plan view showing the reorientation state of the liquid crystal molecules near the center of the liquid crystal layer, FIG. 41C is a characteristic diagram showing the rotation angle α of the liquid crystal molecules shown in FIG. 41B, FIG. 4 ID is an example of a characteristic diagram showing the transmittance distribution of light transmitted through the liquid crystal layer on the upper and lower polarizers, the upper and lower substrates, the electrodes, and between the electrodes.

42 is a diagram showing the principle of the present invention, FIG. 42A is a characteristic diagram showing the state of equipotential lines when a voltage is applied to the transparent electrode, FIG. 42B and FIG. FIG. 42C is an example of a diagram showing rotation angles and tilt angles of liquid crystal molecules in a liquid crystal layer when an electric field is applied.

FIG. 43 is a diagram showing the principle of improving the aperture ratio of the active matrix type color liquid crystal display device of Example 11 of the present invention. Is a characteristic diagram showing the potential distribution in the liquid crystal layer when a voltage is applied to the electrode, FIG. 43B is a plan view showing the realignment state of liquid crystal molecules near the center of the liquid crystal layer, FIG. 43C is a characteristic diagram showing the rotation angle of the liquid crystal molecule shown in FIG. 43B, and FIG. 43D is a light transmitted through the liquid crystal layer on the upper and lower polarizers, the upper and lower substrates, the electrodes, and between the electrodes. FIG. 3 is an example of a characteristic diagram showing a transmittance distribution of FIG.

FIG. 44 is a characteristic diagram of a simulation result showing a tilt angle of a liquid crystal molecule in a liquid crystal layer and a viewing angle range in which a contrast ratio is 10 or more in all directions in a horizontal electric field type liquid crystal display device. This is an example.

[Best mode for carrying out the invention]

The present invention, other objects of the present invention, and still other features of the present invention will become apparent from the following description with reference to the drawings.

(Example 1)

<< Active ♦ matrix liquid crystal display device >>

Hereinafter, an embodiment in which the present invention is applied to an active matrix type color liquid crystal display device will be described. In the drawings described below, components having the same function are denoted by the same reference numerals, and repeated description thereof will be omitted.

<< Planar configuration of matrix section (pixel section) >>

FIG. 1 is a plan view showing one pixel of the active matrix type color liquid crystal display device of the present invention and its periphery. (The shaded area in the figure indicates the transparent conductive film g2.)

As shown in Fig. 1, each pixel has a scanning signal line (gate signal line or horizontal signal line) GL, a counter voltage signal line (counter electrode wiring) CL, and two adjacent video signal lines ( (Drain signal line or vertical signal line) It is arranged in the intersection area with DL (in the area surrounded by four signal lines). Each pixel is Includes thin film transistor TFT, storage capacitance C stg, pixel electrode PX and counter electrode CT. The scanning signal lines GL and the counter voltage signal lines CL extend left and right in the figure, and a plurality of scanning signal lines GL and counter voltage signal lines CL are arranged in the vertical direction. The video signal lines DL extend in the vertical direction, and a plurality of video signal lines DL are arranged in the horizontal direction. The pixel electrode PX is connected to the thin film transistor TFT via the source electrode SD1, and the counter electrode CT is integrated with the counter voltage signal line CL.

The two pixels vertically adjacent to each other along the video signal line DL have a configuration in which the plane configuration overlaps when bent at the A line in FIG. This is because the opposing voltage signal line CL is shared by two vertically adjacent pixels along the video signal line DL, and the electrode width of the opposing voltage signal line CL is increased, thereby reducing the resistance of the opposing voltage signal line CL. That's why. This makes it easy to sufficiently supply a counter voltage from the external circuit to the counter electrode CT of each pixel in the left-right direction.

The pixel electrode PX and the counter electrode CT are opposed to each other, and the electric state between each pixel electrode PX and the counter electrode CT controls the optical state of the liquid crystal LC to control display. The pixel electrode PX and the counter electrode CT are formed in a comb-like shape, and each is an electrode that is elongated vertically in the figure.

The number O of the counter electrodes CT in one pixel (the number of comb teeth) is configured to always have a relationship of 0 = P + 1 with the number of pixel electrodes PX (the number of comb teeth) P (in this embodiment, , 0 = 3, P = 2). This is because the counter electrode CT and the pixel electrode PX are alternately arranged, and the counter electrode CT is always adjacent to the video signal line DL. This allows the counter electrode CT to shield the lines of electric force from the video signal line DL so that the electric field between the counter electrode CT and the pixel electrode PX is not affected by the electric field generated from the video signal line DL. it can. versus The potential of the counter electrode CT is stable because the counter electrode CT is always supplied with a potential from the outside by a counter voltage signal line CL described later. Therefore, the potential hardly fluctuates even when adjacent to the video signal line DL. In addition, since the geometric position of the pixel electrode PX from the video signal line DL is farther away, the parasitic capacitance between the pixel electrode PX and the video signal line DL is greatly reduced, and the pixel electrode potential Vs Fluctuation due to the video signal voltage can also be suppressed. Thus, crosstalk (defective image quality called vertical smear) occurring in the vertical direction can be suppressed.

The electrode width of each of the pixel electrode PX and the counter electrode CT is 6 zm. This is because, in order to apply a sufficient electric field to the entire liquid crystal layer in the thickness direction of the liquid crystal layer, the thickness of the liquid crystal layer described later is set to be sufficiently larger than 3.9 μπι, and the aperture ratio is increased. To be as thin as possible. The electrode width of the video signal line D is set to 8 m, which is slightly wider than the pixel electrode ΡX and the counter electrode CΤ in order to prevent disconnection. Here, the electrode width of the video signal line DL is set to be equal to or less than twice the electrode width of the adjacent counter electrode CT. Alternatively, when the electrode width of the video signal line DL is determined from the productivity of the yield, the electrode width of the counter electrode CT adjacent to the video signal line DL is set to 1Z2 or more of the electrode width of the video signal line DL. I do. This is because the lines of electric force generated from the video signal line DL are absorbed by the counter electrodes CT on both sides, respectively.In order to absorb the lines of electric force generated from a certain electrode width, the lines of the same width or more must be absorbed. An electrode with an electrode width is required. Therefore, since the lines of electric force generated from half (4 / im each) of the electrodes of the video signal line DL need only be absorbed by the counter electrodes CT on both sides, the electrodes of the counter electrode CT adjacent to the video signal line DL are required. The width should be 1 Z 2 or more. This causes crosstalk due to the effect of the video signal In particular, preventing vertical (cross-talk in the vertical direction).

The width of the scanning signal line GL is set so as to satisfy a resistance value sufficient to apply a scan voltage to the gate electrode GT of the terminal pixel (the opposite side of the scan electrode terminal GTM described later). The electrode width of the counter voltage signal line CL is also set so as to satisfy a resistance value enough to apply a counter voltage to the counter electrode CT of the pixel on the terminal side (opposite to the common bus line CB described later). On the other hand, the electrode interval between the pixel electrode PX and the counter electrode CT changes depending on the liquid crystal material used. This is because the electric field strength that achieves the maximum transmittance varies depending on the liquid crystal material, so the electrode spacing is set according to the liquid crystal material, and the maximum signal voltage set by the withstand voltage of the video signal drive circuit (signal driver) used. This is so that the maximum transmittance can be obtained in the range of the amplitude. When a liquid crystal material described later is used, the electrode interval becomes 16 // m.

<< Cross-sectional configuration of matrix section (pixel section) >>

FIG. 2 is a cross-sectional view of FIG. 1 taken along the line 3-3, FIG. 3 is a cross-sectional view of the thin film transistor TFT taken along the line 4-14 of FIG. 1, FIG. FIG. 4 is a diagram showing a cross section of the storage capacitor C stg at the section line 5-5 in FIG. As shown in Fig. 2 to Fig. 4, a thin film transistor TFT, a storage capacitor C stg and an electrode group are formed on the lower transparent glass substrate SUB 1 side with respect to the liquid crystal layer LC, On the transparent glass substrate SUB2 side, a color filter FIL and a black matrix pattern BM for shading are formed.

In addition, the transparent glass substrates SUB 1 and SUB 2 have alignment films OR I 1 and OR I 2 on the inner surface (liquid crystal C side) to control the initial alignment of the liquid crystal. SUB 1 and SUB 2 On the outer surface, there is provided a polarizing plate whose polarization axes are arranged orthogonally (crossed Nicols arrangement).

《TFT substrate》

First, the configuration of the lower transparent glass substrate SUB 1 side (TFT substrate) is described in detail.

《Thin film

The thin film transistor TFT operates such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and the drain decreases, and when the bias is set to zero, the channel resistance increases.

As shown in Fig. 3, the thin film transistor TFT is composed of a gate electrode GT, a gate insulating film GI, i-type (intrinsic, not doped with intrinsic ^ conductivity type determining impurities) amorphous silicon (S i) The semiconductor device has an i-type semiconductor layer AS, a pair of source electrodes SD1, and a drain electrode SD2. It should be understood that the source and the drain are originally determined by the bias polarity between them, and in the liquid crystal display circuit, the polarity is inverted during the operation, so that the source and the drain are switched during the operation. However, in the following description, for convenience, one is expressed as a source and the other is expressed as a drain.

《Gate electrode GT》

The gate electrode GT is formed continuously with the scanning signal line GL, and a part of the scanning signal line GL is configured to be the gate electrode GT. The gate electrode GT is a portion beyond the active region of the thin film transistor TFT, and is formed to be larger (as viewed from below) so as to completely cover the i-type semiconductor layer AS. As a result, in addition to the role of the gate electrode GT, the device is devised so that external light and backlight do not hit the i-type semiconductor layer AS. Have been. In this example, the gate electrode GT is formed of a single conductive film g1. As the conductive film g1, for example, an aluminum (A1) film formed by sputtering is used, and an A1 anodic oxide film AOF is provided thereon.

《Scan signal line GL》

The scanning signal line GL is formed of the conductive film g1. The conductive film g1 of the scanning signal line GL is formed in the same manufacturing process as the conductive film g1 of the gate electrode GT, and is integrally formed. The gate voltage Vg is supplied from an external circuit to the gate electrode GT through the scanning signal line GL. Further, an anodic oxide film AOF of A1 is also provided on the scanning signal line GL. The portion that intersects with the video signal line DL is made thinner to reduce the probability of short-circuit with the video signal line DL, and is made bifurcated so that even if it is short-circuited, it can be separated by laser trimming.

《Counter electrode CT》 ''

The counter electrode CT is composed of the same conductive film gl as the gate electrode GT and the scanning signal line GL. An A1 anodic oxide film AOF is also provided on the counter electrode CT. The counter electrode CT is configured to apply a counter voltage Vcom. In the present embodiment, the counter voltage Vcom is used to turn off the thin film transistor element TFT from the intermediate DC potential between the minimum level drive voltage Vdm in and the maximum level drive voltage Vdm ax applied to the video signal line DL. Although the potential is set to be lower by the generated feedthrough voltage ΔVs, if it is desired to reduce the power supply voltage of the integrated circuit used in the video signal drive circuit to about half, an AC voltage may be applied.

<< Counter voltage signal line CL >> The counter voltage signal line CL is formed of the conductive film g1. The conductive film g1 of the counter voltage signal line CL is formed in the same manufacturing process as the gate electrode GT, the scanning signal line GL, and the conductive film g1 of the counter electrode CT, and is formed integrally with the counter electrode CT. . The counter voltage signal line CL supplies a counter voltage Vcom from an external circuit to the counter electrode CT. An anodic oxide film AOF of A1 is also provided on the counter voltage signal line CL. The portion that intersects with the video signal line DL is thinned to reduce the probability of a short circuit with the video signal line DL, as is the case with the scanning signal line GL. Even if the short circuit occurs, it can be separated by laser trimming. I am bifurcated.

《Insulating film G I》

The insulating film GI is used as a gate insulating film for applying an electric field to the semiconductor layer AS together with the gate electrode GT in the thin film transistor TFT. The insulating film GI is formed above the gate electrode GT and the scanning signal line GL. As the insulating film GI, for example, a silicon nitride film formed by plasma CVD is selected, and has a thickness of 1,200 to 2,700 A (in this embodiment,

240 OA) formed. The gate insulating film GI is formed so as to surround the entire matrix portion AR, and the peripheral portion is removed so as to expose the external connection terminals DTM and GTM. The insulating film GI also contributes to electrical insulation between the scanning signal line GL and the counter voltage signal line CL and the video signal line DL.

《I-type semiconductor layer AS》

The i-type semiconductor layer AS is made of amorphous silicon and has a thickness of 200 to 220 OA (in this embodiment, a film thickness of about 2000 A). The layer d O is an N (+) type amorphous silicon semiconductor layer doped with phosphorus (P) for a homogenous contact, an i-type semiconductor layer AS is present on the lower side, and a conductive layer d is present on the upper side. 1 (d 2) remains only where it exists.

The i-type semiconductor layer AS is also provided between the scanning signal line GL and the intersection (crossover portion) between the counter voltage signal line CL and the video signal line DL. The i-type semiconductor layer AS at the intersection reduces a short circuit between the scanning signal line G and the counter voltage signal line CL and the video signal line DL at the intersection.

《Source electrode SD1, Drain electrode SD 2》

Each of the source electrode SD1 and the drain electrode SD2 is composed of a conductive film d1 in contact with the N (+) type semiconductor layer d0 and a conductive film d2 formed thereon.

The conductive film d1 is formed of a chromium (Cr) film formed by sputtering to a thickness of 500 to 100 OA (about 60 OA in this embodiment). Since the stress increases when the Cr film is formed with a large thickness, the Cr film is formed within a thickness not exceeding about 200 OA. The Cr film improves the adhesion to the N (+) type semiconductor layer d0, and prevents A1 of the conductive film d2 from diffusing into the N (+) type semiconductor layer d0 (the so-called barrier layer). ) Used for purposes. As the conductive film d 1, in addition to refractory metal C r layer (Mo, T i, T a , W) film, a refractory metal Shirisai de _{(Mo S i 2, T i} S i 2, Ta S i 2, WS i ₂ ) You can use a membrane.

The conductive film d2 is formed to a thickness of 3000 to 5000 A (about 4000 A in this embodiment) by sputtering of A1. The A1 film has less stress than the Cr film and can be formed with a large film thickness, reducing the resistance of the source electrode SD1, the drain electrode SD2 and the video signal line DL, and the gate electrode. GT and i-type semiconductor layer It has the function to ensure that the step caused by AS is overcome (to improve the step coverage). After patterning the conductive film d1 and the conductive film d2 with the same mask pattern, the N (+) type semiconductor layer d0 is removed using the same mask or using the conductive film d1 and the conductive film d2 as a mask. Is done. That is, in the N (+)-type semiconductor layer d0 remaining on the i-type semiconductor layer AS, portions other than the conductive film d1 and the conductive layer d2 are removed by the self-alignment. At this time, since the N (+) type semiconductor layer d0 is etched so as to completely remove its thickness, the surface of the i-type semiconductor layer AS is also slightly etched. What is necessary is to control.

《Video signal line D L》

The video signal line DL is composed of a second conductive film d2 and a third conductive film d3 in the same layer as the source electrode SD1 and the drain electrode SD2. Further, the video signal line DL is formed integrally with the drain electrode SD2.

《Pixel electrode P X》

The pixel electrode PX is formed of the transparent conductive layer g2. The transparent conductive film g2 is made of a transparent conductive film (Indium-Tin-Oxide ITO: Nesa film) formed by sputtering and has a thickness of 100 to 200 mm (in the present embodiment, 14 to 14 mm). (Thickness of about 0 OA) is formed.

By making the pixel electrode transparent as in this embodiment, the maximum transmittance when white display is performed is improved due to the transmitted light in that part, so that a brighter display is provided than when the pixel electrode is opaque. It can be carried out. At this time, as described later, when no voltage is applied, the liquid crystal molecules maintain the initial alignment state, and the polarizing plate is arranged so as to display black in that state (normal black mode). However, even if the pixel electrode is transparent, it is possible to display high-quality black without transmitting light in that portion. to this Thus, the maximum transmittance can be improved and a sufficient contrast ratio can be achieved.

《Storage capacity C s t g》

The pixel electrode PX is formed so as to overlap the counter voltage signal line CL at an end opposite to the end connected to the thin film transistor TFT. As is clear from Fig. 4, this superposition is performed by using a storage capacitor (capacitance element) C stg in which the pixel electrode PX is used as one electrode PL 2 and the counter voltage signal CL is used as the other electrode PL 1. Is configured. The dielectric film of the storage capacitor C stg is composed of an insulating film GI used as a gate insulating film of the thin film transistor TFT and an anodic oxide film AOF.

As shown in FIG. 1, the storage capacitance C stg is formed in a portion where the width of the conductive film g1 of the counter voltage signal line CL is increased in plan view.

《Protective film P S V 1》

A protective film PSV1 is provided on the thin film transistor TFT. Coercive Mamorumaku PSV 1 is mainly formed in order to protect the thin film transistor TFT from moisture or the like, _c protective film PSV 1 to use a good addition moisture resistance high transparency was formed by, for example, the plasma CVD apparatus C Protective film PSV 1 is formed so as to surround the entire matrix part AR, and the peripheral part is an external connection terminal DTM. The GTM has been removed to expose. Regarding the thickness relationship between the protective film PSV1 and the gate insulating film GI, the former is made thicker in consideration of the protective effect, and the latter is made thinner for the transconductance gm of the transistor. Therefore, the protective film PSV1, which has a high protective effect, is larger than the gate insulating film GI so as to protect the peripheral area as much as possible. Has been established.

《Color filter substrate》

Next, returning to FIGS. 1 and 2, the configuration of the upper transparent glass substrate SUB 2 side (color filter substrate) will be described in detail.

《Light shielding film BM》

On the upper transparent glass substrate SUB2 side, make sure that the transmitted light from unnecessary gaps (gap other than between the pixel electrode PX and the counter electrode CT) is emitted to the display surface side and does not lower the contrast ratio etc. The light shielding film BM (so-called black matrix) is formed. The light shielding film BM also serves to prevent external light or backlight light from entering the i-type semiconductor layer AS. That is, the i-type semiconductor layer AS of the thin film transistor TFT is sandwiched by the upper and lower light-shielding films BM and the large gate electrode GT, so that external natural light and backlight do not hit.

The closed polygonal outline of the light-shielding film BM shown in FIG. 1 indicates an opening inside which the light-shielding film BM is not formed. This contour pattern is an example, and when the opening portion is further enlarged, the light shielding film BM1 indicated by a dotted line in FIG. 1 can be used. In the enlarged area in Fig. 1, the direction of the electric field is disturbed, but the display of that part corresponds to the video information in the pixels on a one-to-one basis, and when black, black and white Is white, so it can be used as part of the display. Also, the vertical boundaries in the figure are determined by the alignment accuracy of the upper and lower substrates, and if the alignment accuracy is better than the electrode width of the counter electrode CT adjacent to the video signal line DL, the gap between the widths of the counter electrodes is If set, the opening can be further enlarged.

The light shielding film BM has a light shielding property, and has a counter electrode with the pixel electrode PX. It is formed of a high-insulating film that does not affect the electric field between the pole CT.In this embodiment, a black pigment is mixed into the resist material, and the thickness is about 1.2 μπι. Has formed.

The light-shielding film 形成 is formed in a grid around each pixel, and an effective display area of one pixel is partitioned by the grid. Therefore, the outline of each pixel is made clear by the light shielding film ΒΜ. That is, the light shielding film 膜 has two functions of a black matrix and light shielding for the i-type semiconductor layer AS.

The light-shielding film BM is also formed in a frame shape in the peripheral portion, and its pattern is formed continuously with the pattern of the matrix portion shown in FIG. 1 in which a plurality of openings are provided in a dot shape. The light-shielding film BM in the peripheral portion extends outside the seal portion SL to prevent leaked light such as reflected light due to a mounting machine such as a personal computer from entering the matrix portion. On the other hand, the light-shielding film BM is kept about 0.3-1. Omm inward from the edge of the substrate SUB2, and is formed avoiding the cut region of the substrate SUB2.

《Color filter F I L》

The color filter FIL is formed in a stripe shape by repeating red, green, and blue at a position facing the pixel. The color filter FIL is formed so as to overlap the edge of the light shielding film BM.

The color filter FIL can be formed as follows. First, a dye base such as acryl resin is formed on the surface of the upper transparent glass substrate SUB2, and the dye base other than the red filter forming region is removed by photolithography. Thereafter, the dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, a green filter G and a blue filter B are sequentially formed by performing a similar process. 《Overcoat film oc》

The overcoat film OC is provided to prevent the dye of the color filter FIL from leaking into the liquid crystal stripes and to flatten the steps due to the color filter FIL and the light shielding film BM. The overcoat film OC is formed of, for example, a transparent resin material such as an acrylic resin or an epoxy resin.

《Liquid crystal layer and polarizing plate》

Next, the liquid crystal layer, the alignment film, the polarizing plate, and the like will be described.

《Liquid crystal layer》

As a liquid crystal material LC, a nematic material having a positive dielectric anisotropy Δε of 13.2 and a refractive index anisotropy Δη of 0.081 (589 nm, 20 ° C) Use liquid crystal. The thickness (gap) of the liquid crystal layer is 3.9 μπι, and the retardation An.d is 0.316. With the value of this retardation Δnd, the maximum transmittance can be obtained when the liquid crystal molecules are rotated by 45 ° from the rubbing direction to the electric field direction in combination with the alignment film and the polarizing plate described later. It is possible to obtain transmitted light having almost no wavelength dependence. The thickness (gap) of the liquid crystal layer is controlled by polymer beads. The liquid crystal material LC is not particularly limited, and the dielectric anisotropy may be negative. In addition, the larger the value of the dielectric anisotropy Δε, the more the driving voltage can be reduced. In addition, the refractive index anisotropy Δη can be small, the force S can be increased, and the thickness (gap) of the liquid crystal layer can be increased, the liquid crystal sealing time can be shortened, and gap variation can be reduced.

In addition, an examination of the relationship between the physical properties of the liquid crystal material and the transmitted light intensity at the pixel electrode portion of the transparent conductive film revealed that the relationship greatly depends on the twist 弹 property constant K 2 of the liquid crystal material. . This is in the opening between the electrodes This is because the in-plane twist deformation due to the transverse electric field that causes light transmission causes attenuation at the upper part of the electrode of the transparent conductive film with a specific curvature corresponding to the above-mentioned twist elastic constant K2 of the liquid crystal material. Therefore, in order to further increase the light transmission at the electrode portion of the transparent conductive film and to improve the brightness of the entire opening including the electrode of the transparent conductive film, a liquid crystal material having a small twist elastic constant K 2 is used. The above-mentioned attenuation curvature may be reduced. The effect of the twist elastic constant K2 will be further described in Example 11.

In the first embodiment, as the twist elastic constant K 2, 5.1 × 10 ¹² N (Newton) at room temperature is used.

The method of measuring the twist elastic constant K 2 is described in, for example, the literature, Koji Okano, Shunsuke Kobayashi, co-edited by Liquid Crystal and Basics, p.216-220 (Baifukan,

1985), and can be obtained by measuring the threshold voltage of a twisted liquid crystal cell.

《Orientation film》

Polyimide is used as the alignment film ORI. The rubbing directions are parallel to each other on the upper and lower substrates, and the initial alignment angle ψ LC between the initial alignment direction RDR and the applied electric field direction EDR (EX) is 75 °. Fig. 19 shows the relationship.

Note that the initial alignment angle φ LC formed by the initial alignment direction RDR and the applied electric field direction EDR is 45 ° C or more and less than 90 ° C and the dielectric constant difference if the dielectric anisotropy Δ £ of the liquid crystal material is positive. If the anisotropy Δε is negative, it must be greater than 0 ° and less than 45 °.

Further, in this embodiment, the rubbing directions are parallel to each other by the alignment films OR II and OR I 2, so that the liquid crystal layer between the electrodes and the display on the electrodes can be formed. The initial pretilt angle of the liquid crystal molecules at the lower interface is in a splay state, and the liquid crystal molecules have the effect of compensating optical characteristics with each other, and a wide viewing angle characteristic can be obtained. By being antiparallel to each other in step 2, the pretilt angles of the liquid crystal molecules at the upper and lower interfaces of the liquid crystal layer are in a parallel state, and the average tilt angle in the liquid crystal layer increases, but the pretilt angle is set to 10 degrees or less. By doing so, the same effect of the present invention can be obtained.

"Polarizer"

G1220DU manufactured by Nitto Denko Corporation was used as the polarizer POL, and the polarization transmission axis MAX1 of the lower polarization plate POL1 was matched with the rubbing direction RDR, and the polarization transmission axis MAX2 of the upper polarizer POL2 was used. The relationship is shown in _c F i g. 19 which is orthogonal to it. As a result, it is possible to obtain a normally closed characteristic in which the transmittance increases as the voltage (voltage between the pixel electrode PX and the counter electrode CT) applied to the pixel of the present invention increases. In addition, high quality black display can be obtained.

In addition, a transparent conductive film is formed on the entire surface of the polarizing plate POL2 for the purpose of reducing its specific resistance in order to prevent the influence of external static electricity. This transparent conductive film may be formed between the upper substrate SUB2 and the upper polarizer POL2.

《Configuration around the matrix》

FIG. 5 is a diagram showing a main part plane around a matrix (AR) of the display panel PNL including the upper and lower glass substrates SUB 1 and SUB 2. FIG. 6 is a diagram showing a cross section near the external connection terminal GTM to which the scanning circuit is to be connected on the left side, and a cross section near the seal portion where there is no external connection terminal on the right side. In the manufacture of this panel, if small size divided from simultaneously processing a plurality fraction of the device in order one glass substrate was improved throughput, any breed for shared manufacturing facilities if large size After processing a glass substrate of standardized size, it is reduced to a size suitable for each product type. In each case, the glass is cut after a single process. Fig. 5 and Fig. 6 show examples of the latter. Both figures of Fig. 5 and Fig. 6 show the upper and lower substrates SUB 1 and SUB 2 after cutting. LN indicates the edge of both substrates before cutting. In any case, in the completed state, the external connection terminal groups Tg and Td and the terminal COT (subscript omitted) exist (the upper and left sides in the figure) are the size of the upper substrate SUB2 so that they are exposed. Is limited to the inside of the lower substrate SUB 1. The terminal groups Tg and Td are connected to a scanning circuit connection terminal GTM and a video signal circuit connection terminal DTM, respectively, and a lead-out wiring portion thereof, described later, by a tape carrier package TCP (Fig) on which an integrated circuit chip CH I is mounted. . 16, Fig. 1 7) Multiple units are collectively named. The lead wiring from the matrix section of each group to the external connection terminal section is inclined as approaching both ends. This is because the terminals DTM and GTM of the display panel PNL are matched with the arrangement pitch of the package TCP and the connection terminal pitch of each package TCP. The counter electrode terminal CTM is a terminal for applying a counter voltage to the counter electrode CT from an external circuit. The counter voltage signal line CL in the matrix section is drawn out to the opposite side (right side in the figure) of the scanning circuit terminal GTM, and the respective counter voltage signal lines are grouped together by a common bus line CB and connected to the counter electrode terminal CTM. I have.

Liquid crystal sealing between transparent glass substrates SUB 1 and SUB 2 Except for the inlet INJ, a seal pattern S is formed to seal the liquid crystal LC. The sealing material is made of, for example, an epoxy resin.

The layers of the alignment films OR I1 and OR I2 are formed inside the seal pattern SL. The polarizers POL 1 and POL 2 are respectively formed on the outer surfaces of the lower transparent glass substrate SUB 2 and the upper transparent glass substrate SUB 2. The liquid crystal LC is sealed in a region partitioned by a seal pattern SL between the lower alignment film ORI1 and the upper alignment film ORI2 for setting the direction of liquid crystal molecules. The lower alignment film OR I1 is formed on the lower transparent glass substrate SUB1 side on the protective film PSV1.

In this liquid crystal display device, various layers are separately stacked on the lower transparent glass substrate SUB 1 side and the upper transparent glass substrate SUB 2 side, and a seal pattern SL is formed on the substrate SUB 2 side. It is assembled by superimposing the upper transparent glass substrate SUB2, injecting liquid crystal LC from the opening INJ of the sealing material SL, sealing the inlet INJ with epoxy resin, and cutting the upper and lower substrates.

《Gate terminal section》

FIG. 7A is a plan view showing a connection structure from the scanning signal line GL of the display matrix to its external connection terminal GTM, and FIG. 7B is a view of FIG. 3 shows a cross section taken along a cutting line. 5 corresponds to the vicinity of the right center of FIG. 5 and the diagonal wiring portion is represented by a straight line for convenience.

AO is the boundary line of photoresist direct writing, in other words, the photoresist pattern of selective anodic oxidation. Therefore, this photoresist is removed after anodic oxidation, and the pattern AO shown in the figure does not remain as a finished product, but the oxide film AOF is selectively formed on the gate wiring GL as shown in the sectional view. So the trajectory remains. In the plan view, the left side is the area covered with resist and not anodized, and the right side is the area exposed from the resist and anodized with reference to the photoresist boundary line AO. A 1 layer g 1 which is anodized conductive portion of the lower oxide thereof A 1 ₂ 0 ₃ film AOF is formed on the surface volume decreases. Of course, the anodic oxidation is performed by setting an appropriate time and voltage so that the conductive portion remains.

In the figure, the A1 layer g1 is hatched for easy understanding, but the region that is not anodized is patterned in a comb shape. This is because if the width of the A1 layer is large, a hoisting force is generated on the surface, so the width of each layer is narrowed and a plurality of them are bundled in parallel to reduce the generation of the Hoisse force. The aim is to minimize the probability of disconnection and sacrificing conductivity while preventing it.

The gate terminal GTM is composed of an A1 layer g1 and a transparent conductive layer g2 for further protecting the surface and improving the reliability of connection with a TCP (Tape Carrier Package). ing. The transparent conductive film g2 uses a transparent conductive film ITO formed in the same process as the pixel electrode PX. In addition, the conductive layers d 1 and d 2 formed on the A 1 layer g 1 and on the side surfaces thereof are made up of the A 1 layer and the transparent conductive layer in order to compensate for poor connection between the A 1 layer and the transparent conductive layer g 2. This is to connect the C r layer d 1 with good connectivity to both g 2 and reduce the connection resistance, and the conductive layer d 2 remains because the same mask as the conductive layer d 1 is formed. Is what it is.

In the plan view, the gate insulating film GI is formed on the right side of the boundary line, the protective film PSV 1 is formed on the right side of the boundary line, and the terminal portion GTM located on the left end is exposed therefrom and connected to an external circuit. Electrical contact has been made. In the figure, only one pair of gate line GL and gate terminal 7A and B, these pairs are arranged up and down to form a terminal group Tg (Fig. 5), and the left end of the gate terminal is During the manufacturing process, it is extended beyond the cutting area of the substrate and short-circuited by wiring SH g (not shown). Such a short-circuit line SHg in the manufacturing process is useful for power supply during anodization and prevention of electrostatic breakdown during rubbing of the alignment film ORI1.

《Drain terminal DTM》

FIG. 8A is a plan view showing the connection from the video signal line DL to the external connection terminal DTM, and FIG. 8B is a cross-sectional view taken along a line 8-8 in FIG. Show. 5 corresponds to the vicinity of the upper right of FIG. 5, and the direction of the drawing is changed for convenience, but the right end corresponds to the upper end of the substrate SUB1.

TSTd is a test terminal. No external circuit is connected here, but it is wider than the wiring part so that probe needles etc. can be contacted. Similarly, the width of the drain terminal DTM is wider than that of the wiring portion so that the drain terminal DTM can be connected to an external circuit. The external connection drain terminals DTM are arranged in the vertical direction, and the drain terminals DTM constitute a terminal group Td (subscript omitted) as shown in FIG. 5 and further extend beyond the cutting line of the substrate SUB 1. During the manufacturing process, all of them are short-circuited to each other by wiring SHd (not shown) to prevent electrostatic breakdown. The test terminal TSTd is formed on every other video signal line DL as shown in FIG. 8A.

The drain connection terminal DTM is formed of a single layer of the transparent conductive layer g2, and is connected to the video signal line DL at a portion where the gate insulating film GI is removed. This transparent conductive film g2 is the same as the pixel electrode PX as in the case of the Gout terminal GTM. The transparent conductive film ITO formed in one step is used. The semiconductor layer AS formed on the edge of the gate insulating film GI is for etching the edge of the gate insulating film GI in a tapered shape. On the drain terminal DTM, the protective film PSV1 is removed as well as the connection for connection with the external circuit.

In the lead-out wiring from the matrix part to the drain terminal part DTM, the layers d 1 and d 2 at the same level as the video signal line DL are formed up to the middle of the protective film P SV 1, and within the protective film P SV 1 Connected to transparent conductive film g2. This is intended to protect the A1 layer d2, which is easy to be touched, as much as possible with the protective film PSV1 and the seal pattern S.

《Counter electrode terminal CTM》

9A shows a plan view showing the connection from the counter voltage signal line CL to its external connection terminal CTM, and FIG. 9B shows a cross section of FIG. 9A taken along the line BB. . Incidentally, the figure F i g. 5 corresponds to the vicinity of the upper left _c each counter voltage signal line CL is drawn to the counter electrode terminals CTM and collectively in the common bus line CB. The common bus line CB has a structure in which a conductive layer dl and a conductive layer d2 are stacked on a conductive layer g1. This is to reduce the resistance of the common bus line CB so that the opposing voltage is sufficiently supplied from an external circuit to each opposing voltage signal line CL. The feature of this structure is that the resistance of the common bus line can be reduced without adding a new conductive layer. The conductive layer g1 of the common bus line CB is not anodized so as to be electrically connected to the conductive layer d1 and the conductive layer d2. It is also exposed from the gate insulating film GI.

The counter electrode terminal CTM has a transparent conductive layer g2 laminated on the conductive layer g1. It has a structure. This transparent conductive film g2 uses a transparent conductive film ITO formed in the same process as the pixel electrode PX, as in the case of the other terminals. The transparent conductive layer g2 covers the conductive layer gl with a durable transparent conductive layer g2 to protect its surface and prevent electrolytic corrosion and the like.

《Equivalent circuit of entire display device》

Fig. 10 shows the connection diagram of the equivalent circuit of the display matrix section and its peripheral circuits. Although this figure is a circuit diagram, it is drawn corresponding to the actual geometric arrangement. AR is a matrix matrix in which a plurality of pixels are arranged two-dimensionally.

In the figure, X represents a video signal line DL, and suffixes G, B, and R are added corresponding to green, blue, and red pixels, respectively. Y means the scanning signal line GL, and the suffixes 1, 2, 3, · '·, and end are added according to the order of the scanning timing.

The scanning signal line Y (subscript omitted) is connected to the vertical scanning circuit V, and the video signal line X (subscript omitted) is connected to the video signal driving circuit H.

The SUP uses a power supply circuit to obtain a plurality of divided and stabilized voltage sources from one voltage source, and CRT (cathode ray tube) information from the host (upper processing unit) for TFT liquid crystal display devices. This is a circuit that includes a circuit that exchanges information.

《Driving method》

FIG. 11 shows a drive waveform of the liquid crystal display device of the present invention.

In the first embodiment, since the counter voltage signal line is formed of the conductive film g1 of aluminum, which is a low-resistance metal, the load impedance is small and the waveform of the counter voltage is less deformed. For this reason, the opposite voltage can be converted to AC, There is an advantage that the signal line voltage can be reduced.

That is, the counter voltage is changed to a binary alternating rectangular wave of Vch and Vc1, and the non-selection voltages of the scanning signals Vg (i-1) and Vg (i) are synchronized with the rectangular wave in each scanning period. Vg 1 h and Vg 1 1 The amplitude value of the counter voltage and the amplitude value of the non-selection voltage are the same. The video signal voltage is the voltage obtained by subtracting 1Z2 of the amplitude of the counter voltage from the voltage to be applied to the liquid crystal layer. The opposite voltage may be DC, but by converting it to AC, the maximum amplitude of the video signal voltage can be reduced, and a video signal drive circuit (signal side driver) with a low withstand voltage can be used. In Examples 2 and 3 to be described later, since the opposing voltage signal line CL is formed of the transparent conductive film g2, the resistance is relatively high, and the opposing voltage is preferably a direct current method.

<< Function of storage capacity C st g >>

The storage capacitance C stg is provided to store the video information written to the pixel (after the thin film transistor TFT is turned off) for a long time. In the method of applying an electric field parallel to the substrate surface used in the present invention, unlike the method of applying the electric field perpendicular to the substrate surface, there is almost no capacitance (so-called liquid crystal capacitance) composed of the pixel electrode and the counter electrode. Therefore, the storage capacity C stg cannot store video information in the pixel. Therefore, in a system in which an electric field is applied in parallel with the substrate surface, the storage capacitance C stg is an essential component.

The storage capacitance C stg also serves to reduce the effect of the gate potential change ΔV on the pixel electrode potential Vs when the thin film transistor TFT switches. This situation is expressed as follows.

V s = {C gs / (C gs + C st g + C pix)} X ΔV g where C gs is the gate electrode GT and source of the thin film transistor TFT The parasitic capacitance formed between the electrode SD1 and Cpix is the capacitance formed between the pixel electrode PX and the counter electrode CT, and AVs is the so-called feedthrough voltage, which is the change in the pixel electrode potential due to AVg. Express. This change ΔV s can be reduced as the force holding capacity C stg causing the DC component applied to the liquid crystal LC is increased. The reduction of the DC component applied to the liquid crystal LC improves the life of the liquid crystal LC, and reduces the so-called burn-in in which the previous image remains when the liquid crystal display screen is switched.

As described above, since the good electrode GT is made large to completely cover the i-type semiconductor layer AS, the overlap area between the source electrode SD1 and the drain electrode SD2 increases, and therefore the parasitic capacitance Cgs increases. On the other hand, there is an adverse effect that the pixel electrode potential Vs is easily affected by the gate (scanning) signal Vg. However, by providing the storage capacitance C stg, this disadvantage can be eliminated.

"Production method"

Next, a method of manufacturing the above-described substrate SUB1 side of the liquid crystal display device will be described with reference to FIGS. In the same figure, the middle letter is the abbreviation of the process name, the left side is the thin film transistor TFT part shown in Fig. 3 and the right side is the cross-sectional shape near the gate terminal shown in Fig. 7 The flow of is shown. Except for Steps B and D, Steps A to I are classified according to each photoprocessing.All cross-sectional views of each step show the stage where the processing after photoprocessing is completed and the photoresist is removed. ing. In this description, photographic processing refers to a series of operations from application of a photo resist, through selective exposure using a mask to development of the resist, and a description thereof will not be repeated. Description will be given below according to the divided steps. Process A, F i g. 12

A1—Pd, A1—Si, A1—Ta, A1—Ta, A1—Ti, Ta1, etc. with a thickness of 300 OA on the lower transparent glass substrate SUB1 made of AN 635 glass (trade name) The conductive film g1 is provided by sputtering. After the photoprocessing, the conductive film g1 is selectively etched with a mixed acid solution of phosphoric acid, nitric acid, and glacial acetic acid. Accordingly, the gate electrode GT, the scanning signal line GL, the counter electrode CT, the counter voltage signal line CL, the electrode PL1, the gate terminal GTM, the first conductive layer of the common bus line CB, and the first conductive layer of the counter electrode terminal CTM. Then, an anodized bus line SHg (not shown) for connecting the gate terminal GTM and an anodized pad (not shown) connected to the anodized bus line SHg are formed.

Process F i g. 12

After the formation of an anodic oxidation mask AO by direct writing, the substrate was placed in an anodic oxidation solution consisting of a solution of 3% tartaric acid adjusted to PH 6.25 ± 0.05 with ammonia, diluted 1: 9 with ethylene dalicol solution. Immerse SUB 1 and adjust the formation current density to 0.5 mAZ cm ² (constant current formation). Then anodic oxidation until the reach the anodizing voltage 1 25 V required 1 ₂ 0 ₃ film thickness given A is obtained. After that, it is desirable to keep this state for several tens of minutes (constant voltage formation). This is important for achieving a uniform A 1 ₂ 0 ₃ film. As a result, the conductive film g1 is anodized, and an anodized film AOF having a thickness of 180 OA is formed on the gate electrode GT, the scanning signal line GL, the counter electrode CT, the counter voltage signal line CL, and the electrode PL1. You.

Process F i g. 1 2

Ammonia gas, silane gas, and nitrogen gas introduced into plasma CVD equipment Then, a 220-OA thick nitrided Si film was provided, silane gas and hydrogen gas were introduced into the plasma CVD apparatus, and a 200-OA thick i-type amorphous Si film was formed. Hydrogen gas and phosphine gas are introduced into a plasma CVD apparatus to provide an N (+)-type amorphous Si film having a thickness of 300 A.

Process D, F i g. 13

After photographic processing, SF _6, CC 1 ₄ using N (+) type amorphous S i film as a dry etching gas by a selective child etching the i-type amorphous S i layer, i-type The island of the semiconductor layer AS is formed.

Process E, F i g. 13

After photo processing, the Si nitride film is selectively etched using SF ₆ as a dry etching gas.

Process F, F i g. 13

A transparent conductive film g2 made of an ITO film having a thickness of 140 OA is provided by sputtering. After photographic processing, the transparent conductive film g2 is selectively etched with a mixed acid solution of hydrochloric acid and nitric acid as an etchant, thereby forming the second conductive layer of the top layer of the gate terminal GTM, the drain terminal DTM and the counter electrode terminal CTM. Form a layer.

Process G, F i g. 14

A conductive film d1 made of Cr with a film thickness of 600 A is provided by sputtering, and a film thickness of A1—Pd, Al—Si, Al—Ta, and A1−T i—T with a film thickness of 400 OA A conductive film d2 made of a or the like is provided by sputtering. After the photographic processing, the conductive film d2 is etched with the same solution as in step B, and the conductive film d1 is etched with the same solution as in step A. The video signal line DL, the source electrode SD1, the drain electrode SD2, and the pixel Electrode PX, electrode PL 2, common bus A bus line SHd (not shown) for short-circuiting the second conductive layer and the third conductive layer of the line CB and the drain terminal DTM is formed. Then, by introducing the CC 1 _4, SF ₆ dry etch ring system, N (+) type by etching bridging amorphous SU trillions, N between the source and the drain (+) type semiconductor layer d 0 Is selectively removed.

Process F i g. 14

Ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD device to provide a 1 xm-thick Si nitride film. After photographic processing, by selectively etching the nitride S i film with photolithography technique using SF ₆ as a dry etching Ngugasu, a protective film PSV 1.

《Display panel PNL and drive circuit board PCB1》

FIG. 15 is a top view showing a state where the video signal driving circuit H and the vertical scanning circuit V are connected to the display panel PNL shown in FIG. 5 and the like.

CH I is a driving IC chip for driving the display panel PNL (the lower five driving IC chips on the vertical scanning circuit side and the left ten driving IC chips on the video signal driving circuit side). As shown in Fig. 16 and Fig. 17 for TCP, the driving IC chip CHI is a tape carrier package with a tape 'automated * bonding method (TAB), as described later in Figs. Is a drive circuit board on which the above-mentioned TCP and capacitors are mounted, and is divided into two for a video signal drive circuit and a scan signal drive circuit.

FGP is a frame daland pad, and panel-like fragments cut into the shield case S HD are soldered. FC is a flat cable that electrically connects the lower drive circuit board PCB1 and the left drive circuit board PCB1. As shown in the figure, the flat cable FC Use multiple lead wires (phosphor bronze material plated with Sn) sandwiched between a striped polyethylene layer and a polybutyl alcohol layer.

《TCP connection structure》

FIG. 16 is a diagram showing a cross-sectional structure of a tape carrier package TCP constituting the scanning signal driving circuit V and the video signal driving circuit H and having the integrated circuit chip CH I mounted on a flexible wiring board. g.17 is a cross-sectional view of a principal part showing a state where the liquid crystal display panel is connected to a scanning signal circuit terminal GTM in the present example.

In the same figure, TTB is an input terminal and a wiring portion of the integrated circuit CH I, and TTM is an output terminal and a wiring portion of the integrated circuit CH I, which are made of, for example, Cu. ), The bonding pad PAD of the integrated circuit CHI is connected by the so-called face-down bonding method. Terminals TTB, TTM, outer tips (commonly referred to as “arter leads”) correspond to the input and output of the semiconductor integrated circuit chip CH I, respectively. CRT / TF T conversion circuit by soldering etc. ♦ Power supply circuit SUP, anisotropic It is connected to the liquid crystal display panel PNL by the conductive film ACF. The package TCP is connected to the panel so that the tip thereof covers the protective film PSV1 exposing the connection terminal GTM on the panel PNL side.Therefore, the external connection terminal GTM (DTM) is connected to the protective film PSVI. Or at least one of the packages TCP is covered, so it is more resistant to touch.

BF1 is a base film made of polyimide or the like, and SRS is a solder resist film for masking so that solder does not adhere to unnecessary portions during soldering. The gap between the upper and lower glass substrates outside the seal pattern SL The space between them is washed and then protected by epoxy resin EPX, etc. The space between the package TCP and the upper substrate SUB2 is further filled with silicone resin SIL to multiplex protection.

《Drive circuit board PC B 2》

The drive circuit board PCB 2 has electronic components such as ICs, capacitors, and resistors mounted thereon. This drive circuit board PCB 2 contains a power supply circuit for obtaining a plurality of divided and stabilized voltage sources from one voltage source, and information for a CRT (cathode ray tube) from the host (upper processing unit). A circuit SUP that includes a circuit that converts the information into information for a TFT liquid crystal display device is mounted. C J is a connector connecting part to which a connector (not shown) connected to the outside is connected.

The drive circuit board PCB 1 and the drive circuit board PCB 2 are electrically connected by a flat cable FC.

《Overall configuration of LCD module》

FIG. 18 is an exploded perspective view showing each component of the liquid crystal display module MDL.

SHD is a frame-shaped shield case (metal frame) made of a metal plate, LCW display window, PNL is a liquid crystal display panel, SPB is a light diffusion plate, LCB is a light guide, RM is a reflection plate, and BL is backlight fluorescent light. The tube and LCA are the backlight case, and the components are stacked in the vertical arrangement as shown in the figure to assemble the module MDL.

The entire module MD L is fixed by claws and hooks provided on the shield case S HD.

Backlight case LCA is backlight fluorescent tube BL, light diffusion plate SP B Light diffusing plate, light guide LCB, and reflector RM are housed.Light from the backlight fluorescent tube BL arranged on the side of the light guide LCB is reflected by the light guide LCB, reflector RM, The backlight is made uniform on the display surface by the light diffusion plate SPB, and emitted to the liquid crystal display panel PNL side.

The inverter circuit board PCB 3 is connected to the backlight fluorescent tube BL, and is used as a power supply for the knock light fluorescent tube BL.

As described above, in the present embodiment, by making the pixel electrode transparent, the maximum transmittance for white display can be improved by about 30% (31.8% in the present embodiment). Specifically, in this example, the transmittance was improved from about 3.8% when an opaque pixel electrode was used to about 5.0% when a transparent pixel electrode was used.

In addition, an ITO film for improving the reliability of the terminal can be formed at the same time, so that both reliability and productivity can be achieved.

(Example 2)

This embodiment is the same as Embodiment 1 except for the following requirements. FIG. 20 shows a plan view of a pixel. The hatched portion in the figure indicates the transparent conductive film g2.

《Pixel electrode PX》

In the present embodiment, the pixel electrode PX is composed of the second conductive film d2 and the third conductive film d3 in the same layer as the source electrode SD1 and the drain electrode SD2. The pixel electrode PX is formed integrally with the source electrode SD1.

《Counter electrode CT》

In this embodiment, the counter electrode CT is formed of the transparent conductive film g2. This transparent conductive film g2 is made of a transparent conductive film (Indium-Tin-Oxide ITO: Nesa film) formed by sputtering, as in Example 1, and has a thickness of 100 to 200θΑ. (In this embodiment, the thickness of B is about 140 OA).

<< Counter voltage signal line CL >>

The counter voltage signal line CL is formed of the transparent conductive film g2, and is formed integrally with the counter electrode CT.

《Gut terminal section》

In this embodiment, a transparent conductive layer g2 for protecting the surface of the A1 layer g1 of the gate terminal GTM and improving the reliability of connection with a TCP (Tape Carrier Package) is provided as a counter electrode. Formed in the same process as CT. The configuration is not different from that of the first embodiment, and is as shown in FIGS. 7A and 7B.

《Drain terminal DTM》

In this embodiment, a transparent conductive film ITO formed in the same step as the counter electrode CT is used for the transparent conductive layer g2 of the drain connection terminal DTM, as in the case of the gate terminal GTM. The structure is slightly different from that of the first embodiment in the vertical relationship of the layers, but is not essential, so that the illustration is omitted.

《Counter electrode terminal CTM》

The transparent conductive layer g2 on the conductive layer g1 of the counter electrode terminal CTM uses the transparent conductive film I T O formed in the same step as the counter electrode CT as in the case of the other terminals. The configuration is no different from that of Example 1, and is as shown in FIGS. 9A and 9B.

"Production method"

In the present embodiment, the order is such that the step F is inserted between the step B and the step C of the first embodiment. As for the order of the steps, the order of steps from FIG. 12 to FIG. 15 is as follows: A → B → F → C → D → E → G → H. The mask pattern is scanned The signal line GL, the scanning electrode GT and the counter voltage signal line CL are separated, and the pattern of the transparent conductive layer g2 of each terminal and the pattern of the counter voltage signal line CL are formed on the same mask.

As described above, by making the opposing electrode transparent, the maximum transmittance can be improved by about 16% (15.9% in this embodiment), and the transmittance of the liquid crystal display panel PNL is about 4.4%. %become.

(Example 3)

This embodiment is the same as Embodiments 1 and 2 except for the following requirements. FIG. 21 shows a plan view of a pixel. The hatched portion in the figure indicates the transparent conductive film g2.

《Counter electrode CT》

In this embodiment, the counter electrode CT is formed of the transparent conductive film g2. This transparent conductive film g2 is made of a transparent conductive film (Indium-Tin-Oxide ITO: Nesa film) formed by sputtering in the same manner as in Example 1, and has a thickness of 100 to 2000 A (in this example, , About 1400 A).

<< Counter voltage signal line CL >>

"Production method"

In the present embodiment, the order in which the step F is added between the step B and the step C in the first embodiment is set. As for the order of the steps, the order of steps from FIG. 12 to FIG. 15 is A → B → F → C → D → E → F → G → H. In the mask pattern, the patterns of the scanning signal line GL, the scanning electrode GT, and the counter voltage signal line CL are formed on independent masks. In this embodiment, by making both the pixel electrode and the counter electrode transparent, the maximum transmittance when performing white display is about 50% compared to the first embodiment or the second embodiment (47. 7%), and the transmittance of the liquid crystal display panel PNL becomes about 5.6%.

(Example 4)

This embodiment is the same as Embodiments 1 and 3 except for the following requirements. Fig. 22 shows a plan view of the pixel. The hatched portion in the figure indicates the transparent conductive film g2.

<< Counter voltage signal line CL >>

The counter voltage signal line CL is formed of the conductive film g1. In this embodiment, a conductive film 1 is used. In addition, anodization is not performed to connect the counter voltage signal line CL and the counter electrode CT. Also, a through hole PH is formed in the gate insulating film GI. In addition, the conductive film g1 may be formed of Ta, Ti, Mo, W, A1, an alloy thereof, or a clad structure in which they are laminated, in addition to Cr.

"Production method"

In this embodiment, step B of the first embodiment is deleted. In the process E, a through hole PH is formed, and in the process F, the pixel electrode PX and the counter electrode CT are simultaneously formed using the same mask.

In this embodiment, in addition to the effects of the first and third embodiments, by reducing the resistance of the common voltage signal line CL, the voltage transmission between the common electrodes is smoothed, and the voltage distortion is reduced. Crosstalk (horizontal smear) generated in the horizontal direction can be reduced.

Also, the pixel electrode PX and the counter electrode CT can be formed simultaneously with the same mask. Thus, Step F, which is performed twice in Example 4, is performed once, and productivity is also improved.

(Example 5)

This embodiment is the same as Embodiments 1 and 4 except for the following requirements.

Fig. 23 shows a plan view of the pixel. The hatched portion in the figure indicates the transparent conductive film g2.

《Counter electrode CT》

In this embodiment, only the central counter electrode CT is formed of the transparent conductive film g2. The counter electrode adjacent to the video signal line is formed of a metal film integrally with the counter voltage signal line.

In this embodiment, in addition to the effects of the first to fourth embodiments, by making the opposing electrode adjacent to the video signal line opaque, it is possible to suppress crosstalk accompanying the video signal. The reason is as described in the section of operation.

(Example 6)

In each of Embodiments 2 and 3 described above, the counter electrode signal line CL is formed of the transparent conductive layer g2 together with the counter electrode C. In this case, in this embodiment, the resistance value of the common electrode signal line CL is significantly reduced by the configuration shown in FIGS. 24A to 24C.

FIG. 24A is a plan view showing a part of the counter electrode signal line CL of FIG. 20. FIG. 24B is a cross-sectional view taken along the line bb of FIG. 24A. is there.

20 is different from FIG. 20 in that the counter electrode signal line CL has a two-layer structure, and an A1 layer 10 having a small resistance value is formed as a lower layer thereof. An ITO film 11 is formed on the upper surface of the Al layer 10 by completely covering the Al layer 10. Further, the counter electrode CT is configured by an extended portion in which a part of the ITO film 11 is extended.

In this case, the resistance of the counter electrode signal line CL can be reduced, and another conductive material through the interlayer insulating film formed by a so-called whisker-like protrusion generated in the A1 layer 10 is formed. An electrical short between the layer and the video signal line DL, for example, can be prevented.

In other words, it is known that the layer 10 has a negative effect when the interlayer insulating film for the video signal line DL is formed thereon, causing the above-mentioned adverse effects. It has been confirmed that the formation of the ITO film so as to cover the surface does not generate the hoisting force.

Further, FIG. 24C is a structure in which the counter electrode CT is configured by double wiring. In this example, the wiring of the ITO film 11 is formed so as to cover the wiring of the A1 layer 10. . Since the transmittance near the center line of the wiring is low even when a voltage is applied between the electrodes, even if an opaque metal wiring is arranged as in this example, the aperture ratio hardly decreases.

Adopting double wiring for the counter electrode or pixel electrode can significantly reduce the problem of electrode disconnection, which is a problem on large screens.

(Example 7)

《Active matrix liquid crystal display device》

Hereinafter, an embodiment in which the present invention is applied to an active matrix type color liquid crystal display device will be described. In the drawings described below, components having the same function are denoted by the same reference numerals, and repeated description thereof will be omitted. JP9 691

52

<< Planar configuration of matrix section (pixel section) >>

FIG. 25 is a plan view showing one pixel of the active matrix type liquid crystal display device of the present invention and its periphery. (The shaded area in the figure indicates the transparent conductive film i1.)

As shown in Fig. 25, each pixel is composed of a scanning signal line (gate signal line or horizontal signal line) GL, a counter voltage signal line (counter electrode wiring), and two adjacent video signals. Line (drain signal line or vertical signal line) It is arranged in the intersection area with DL (in the area surrounded by four signal lines). Each pixel includes a thin film transistor TFT, a storage capacitor C stg, a pixel electrode PX, and a counter electrode CT. The scanning signal lines GL and the counter voltage signal lines CL extend in the left and right directions in the figure, and are arranged in a plurality in the vertical direction. The video signal lines DL extend vertically and a plurality of video signal lines DL are arranged horizontally. The pixel electrode PX is formed of the transparent conductive film i 1 and is electrically connected to the thin-film transistor TFT via the source electrode SD 1, and the counter electrode CT is also formed of the transparent conductive film i 1 and the counter voltage signal line CL Is electrically connected to

The pixel electrode PX and the counter electrode CT face each other, and the electric state between each pixel electrode PX and the counter electrode CT controls the optical state of the liquid crystal LC to control display. The pixel electrode PX and the counter electrode CT are formed in a comb-like shape, and each is an electrode that is elongated vertically in the figure.

The number O of the counter electrodes CT in one pixel (the number of comb teeth) is configured to always have a relationship of 0 = P + 1 with the number of pixel electrodes P (the number of comb teeth) P (in this embodiment, 0 = 3, P2 2). This is because the counter electrode CT and the pixel electrode PX are alternately arranged, and the counter electrode CT is always adjacent to the video signal line DL. As a result, the electric field between the counter electrode CT and the pixel electrode PX becomes The lines of electric force from the video signal line DL can be shielded by the counter electrode CT so as not to be affected by the electric field generated from the video signal line DL. The potential of the counter electrode CT is stable because the counter electrode CT is always supplied with a potential from the outside via a counter voltage signal line CL described later. Therefore, the potential hardly fluctuates even when adjacent to the video signal line DL. In addition, since the geometric position of the pixel electrode PX from the video signal line DL is farther away, the parasitic capacitance between the pixel electrode PX and the video signal line DL is greatly reduced, and the pixel electrode potential Vs Fluctuation due to the video signal voltage can also be suppressed. Thus, crosstalk (defective image quality called vertical smear) occurring in the vertical direction can be suppressed.

The electrode width of the pixel electrode PX and the counter electrode CT is 6 // m. This is because, in order to apply a sufficient electric field to the entire liquid crystal layer in the thickness direction of the liquid crystal layer, the liquid crystal layer thickness is set to be sufficiently larger than 3.9 μπι, which will be described later, and the aperture ratio is increased. Make it as thin as possible. The electrode width of the video signal line D is set to 8 zzm, which is slightly wider than the pixel electrode X and the counter electrode C to prevent disconnection. Here, the electrode width of the video signal line DL is set to be equal to or less than twice the electrode width of the adjacent counter electrode CT. Alternatively, when the electrode width of the video signal line DL is determined from the productivity of the yield, the electrode width of the counter electrode CT adjacent to the video signal line DL is set to 1Z2 or more of the electrode width of the video signal line DL. I do. This is because the lines of electric force generated from the video signal line DL are absorbed by the counter electrodes CT on both sides, respectively.In order to absorb the lines of electric force generated from a certain electrode width, the lines of the same width or more must be absorbed. An electrode with an electrode width is required. Therefore, the counter electrodes CT on both sides absorb the electric lines of force generated from half of the electrodes of the video signal line DL (4 μm each). Therefore, the electrode width of the counter electrode CT adjacent to the video signal line DL is 1 or more. This prevents crosstalk from occurring due to the effect of the video signal, particularly in the vertical direction (vertical crosstalk).

The width of the scanning signal line GL is set so as to satisfy a resistance value enough to apply a scanning voltage to the gate electrode GT of the terminal pixel (the opposite side of the scanning electrode terminal GTM described later). In addition, the counter voltage signal line CL is also sufficiently connected to the counter electrode CT of the pixel on the terminal side (the pixel farthest from the common bus lines CB 1 and CB 2 described later, that is, the pixel between CB 1 and CB 2) Set the electrode width so as to satisfy the resistance value that can be applied.

On the other hand, the electrode interval between the pixel electrode PX and the counter electrode CT changes depending on the liquid crystal material used. This is because the electric field strength that achieves the maximum transmittance varies depending on the liquid crystal material, so the electrode spacing is set according to the liquid crystal material, and the maximum signal voltage set by the withstand voltage of the video signal drive circuit (signal driver) used. This is so that the maximum transmittance can be obtained in the range of the amplitude. When a liquid crystal material described later is used, the electrode spacing becomes:

<< Cross-sectional configuration of matrix section (pixel section) >>

FIG. 26 is a cross-sectional view of the thin film transistor TFT taken along the line 7—7 of FIG. 25, and FIG. 27 is a cross-sectional view of the thin film transistor TFT taken along the line 7—7 of FIG. 25. 25 is a cross-sectional view of the storage capacitor C stg at the section line 8-8 in FIG. 25.

As shown in Fig. 26 to Fig. 28, the lower transparent glass substrate SUB 1 side is formed with a thin film transistor TFT, a storage capacitor C stg and an electrode group based on the liquid crystal layer LC, and the upper transparent glass substrate On the SUB 2 side, a color filter FIL and black matrix for light shielding BM are formed. Have been.

The transparent glass substrates SUB 1 and SUB 2 are provided with alignment films OR I and OR I 2 on the inner surface (liquid crystal C side) for controlling the initial alignment of the liquid crystal. On the outer surface of each of 1 and SUB 2, a polarizing plate having a polarization axis arranged orthogonally (crossed Nicols arrangement) is provided.

《TFT substrate》

First, the configuration of the lower transparent glass substrate SUB 1 side (TFT substrate) will be described in detail.

《Thin film transistor TFT》

As shown in Fig. 27, the thin film transistor TFT is composed of a gate electrode GT, an insulating film GI, and an i-type (intrinsic, intrinsic, conductivity type doping impurity-doped) amorphous silicon (Si). It has an i-type semiconductor layer AS, a pair of source electrodes SD1, and a drain electrode SD2. It should be understood that the source and the drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarity is inverted during the operation, so the source and the drain are understood to be switched during the operation. However, in the following description, one is fixed and the other is fixed as a drain for convenience.

《Gate electrode GT》

The gate electrode GT is formed continuously with the scanning signal line GL, and a part of the scanning signal line GL is configured to be the gate electrode GT. CTJP9 1

56 The gate electrode GT is a portion beyond the active area of the thin film transistor T F Τ. In this example, the gate electrode GT is formed of a single conductive film g3. As the conductive layer 3, for example, a chromium-molybdenum alloy (Cr— 膜 ο) film formed by sputtering is used, but not limited thereto. 《Scan signal line GL》

The scanning signal line GL is formed of the conductive film g3. The conductive film g3 of the scanning signal line GL is formed in the same manufacturing process as the conductive film g3 of the gate electrode GT, and is integrally formed. The gate voltage Vg is supplied to the gate electrode GT from an external circuit by the scanning signal line GL. In this example, as the conductive film g3, for example, a chromium-molybdenum alloy (Cr-Mo) film formed by sputtering is used. Further, the scanning signal line GL and the gate electrode GT are not limited to chromium-molybdenum alloy, but may have a two-layer structure in which aluminum or an aluminum alloy is wrapped with chromium-molybdenum to reduce resistance. . Further, the portion that intersects with the video signal line DL may be narrowed to reduce the probability of a short circuit with the video signal line DL, or may be bifurcated so that the short circuit can be separated by laser trimming.

<< Counter voltage signal line CL >>

The counter voltage signal line CL is formed of the conductive film g3. The conductive film g3 of the counter voltage signal line CL is formed in the same manufacturing process as the gate electrode GT, the scanning signal line GL, and the conductive film g3 of the counter electrode CT, and can be electrically connected to the counter electrode CT. Is configured. The counter voltage Vcom is supplied to the counter electrode CT from an external circuit by the counter voltage signal line CL.

The counter voltage signal line CL is limited to chromium-molybdenum alloy only. For example, a two-layer structure in which aluminum or an aluminum alloy is wrapped with chromium-molybdenum to reduce resistance may be used.

Further, the portion that intersects with the video signal line D L may be narrowed to reduce the probability of short-circuit with the video signal line D L, or may be bifurcated so that even if it is short-circuited, it can be separated by laser trimming.

《Insulating film G I》

The insulating film GI is used as a gate insulating film for applying an electric field to the semiconductor layer AS together with the gate electrode GT in the thin film transistor TFT. The insulating film GI is formed above the gate electrode GT and the scanning signal line GL. As the insulating film GI, for example, a silicon nitride film formed by plasma CVD is selected, and is formed to a thickness of 2500 to 450 OA (about 350 OA in this embodiment). The insulating film GI also functions as an interlayer insulating film between the scanning signal line GL, the counter voltage signal line CL, and the video signal line DL, and also contributes to their electrical insulation. The insulating film GI is patterned using the same photomask as a protective film PSV1 to be described later, and is processed collectively. 《I-type semiconductor layer AS》

The i-type semiconductor layer AS is made of amorphous silicon and has a thickness of 200 to 2500 A (in this embodiment, a film thickness of about 1200 A).

The layer d0 is an N (+)-type amorphous silicon semiconductor layer doped with phosphorus (P) for ohmic contact. An i-type semiconductor layer AS exists on the lower side, and a conductive layer d3 on the upper side. Is left only where it exists.

The i-type semiconductor layer AS and the layer d0 are also provided between the intersections (crossover portions) of the scanning signal lines GL and the counter voltage signal lines CL and the video signal lines DL. Is provided. The i-type semiconductor layer AS at the intersection reduces a short circuit between the scanning signal line GL and the counter voltage signal line CL and the video signal line DL at the intersection.

《Source electrode SD1, Drain electrode SD 2》

Each of the source electrode SD1 and the drain electrode SD2 is formed of a conductive film d3 which is in contact with the N (+) type semiconductor layer d0.

The conductive film d3 is formed using a chromium-molybdenum alloy (Cr-Mo) film formed by sputtering to a thickness of 500 to 3000A (about 2500A in this embodiment). Since the Cr-Mo film has low stress, it can be formed relatively thick, which contributes to lowering the resistance of the wiring. Further, the Cr—Mo film has good adhesion to the N (+) type semiconductor layer d 0. As the conductive film d 3, in addition to the Cr—Mo film, a high melting point metal (Mo, Ti, Ta, W) film, a high melting point metal silicide (MoSi 2, TiSi 2, TaS i 2, WS i 2) A film may be used, or a laminated structure with aluminum or the like may be used. After patterning the conductive film d3 with a mask pattern, the N (+) type semiconductor layer d0 is removed using the conductive film d3 as a mask. That is, in the N (+)-type semiconductor layer d0 remaining on the i-type semiconductor layer AS, portions other than the conductive film d1 and the conductive film d2 are removed by self-alignment. At this time, since the N (+) type semiconductor layer d0 is etched so as to entirely remove the thickness thereof, the surface of the i-type semiconductor layer AS is also slightly etched. Can be controlled by

《Video signal line DL》

The video signal line DL is composed of a conductive film d3 in the same layer as the source electrode SD1 and the drain electrode SD2. The video signal line DL is connected to the drain electrode SD It is formed integrally with 2. In this embodiment, the conductive film d3 is formed of a chromium-molybdenum alloy (Cr-Mo) film formed by sputtering to a thickness of 500 to 3000 A (about 2500 A in this embodiment). Since the Cr_Mo film has low stress, it can be formed relatively thick, which contributes to lowering the resistance of the wiring. Further, the Cr-Mo film has good adhesion to the N (+)-type semiconductor layer d0. As the conductive film d 3, C in addition to the high melting point metals of the r-Mo film (Mo, T i, Ta, W) film, a refractory metal Shirisai de _{(Mo S i 2, T i} S i 2, Ta S i ₂ , WS i ₂ ) A film may be used, or a laminated structure with an anolem minimum or the like may be used.

《Storage capacity C s t g》

The conductive film d3 is formed so as to overlap the counter voltage signal line CL in the source electrode SD2 portion of the thin film transistor TFT. As shown in FIG. 28, this superposition is based on the storage capacitance (capacitance element) in which the source electrode SD 2 (d 3) is used as one electrode and the counter voltage signal CL is used as the other electrode. Configure C stg. The dielectric film of the storage capacitor C stg is composed of an insulating film GI used as a gate insulating film of the thin film transistor TFT.

As shown in FIG. 25, the storage capacitance C stg is formed in a part of the counter voltage signal line CL in plan view.

《Protective film PSV1》

A protective film PSV1 is provided on the thin film transistor TFT. Coercive Mamorumaku PSV 1 is mainly formed in order to protect the thin film transistor T FT from moisture or the like, _c protective film PSV 1 to use a good addition moisture resistance high transparency, for example formed by a plasma CVD apparatus Oxidized silico The film is formed of a silicon nitride film and has a thickness of about 0.3 to lm.

The protective film PSV1 has been removed to expose the external connection terminals DTM and GTM. Regarding the thickness relationship between the protective film PSV1 and the insulating film GI, the former is made thicker in consideration of the protective effect, and the latter is made thinner for the transconductance gm of the transistor. The protective film PSV1 is putterung with the same photomask as the insulating film GI, and is processed collectively. In the pixel section, through holes TH2 and TH1 are provided for electrical connection between the counter voltage signal line CL and the counter electrode CT described later, and for electrical connection between the source electrode SD2 and the pixel electrode PX. Provided. In the through-hole TH2, the protective film PSV1 and the insulating film GI are processed together to form a hole up to the g3 layer. In the through-hole TH1, the hole up to the d3 layer is blocked by the d3. Evil.

《Pixel electrode PX》

The pixel electrode PX is formed of the transparent conductive layer i1. This transparent conductive film i1 is made of a transparent conductive film (Indium-Tin-Oxide ITO: Nesa film) formed by sputtering, and has a thickness of 100 to 2000 A (in this embodiment, a film thickness of about 1400 A). It is formed. The pixel electrode PX is connected to the source electrode SD2 via the through hole TH1.

By making the pixel electrode transparent as in this embodiment, the maximum transmittance when white display is performed is improved due to the transmitted light in that part, so that a brighter display is provided than when the pixel electrode is opaque. It can be carried out. At this time, as described later, when no voltage is applied, the liquid crystal molecules maintain the initial alignment state, and the polarizing plate is arranged so as to display black in that state (normal black mode). Even if the pixel electrode is transparent, High-quality black can be displayed without transmitting light. Thereby, the maximum transmittance can be improved and a sufficient contrast ratio can be achieved.

《Counter electrode CT》

The counter electrode CT is formed of the transparent conductive layer i1. The transparent conductive film i1 is made of a transparent conductive film (Indium-Tin-Oxide ITO: Nesa film) formed by sputtering, and has a thickness of 100 to 200 ΌA (in this embodiment, a film thickness of about 140 OA). ) It is formed. The counter electrode CT is connected to the counter voltage signal line CL via the through-hole TH2.

The counter electrode CT is configured to apply a counter voltage Vcom. In the present embodiment, the counter voltage Vcom is used when the thin film transistor element TFT is turned off from the intermediate DC potential between the minimum level drive voltage Vdmin and the maximum level drive voltage Vdmax applied to the video signal line DL. Is set to a voltage that is lower by the amount of feedthrough voltage Δν s generated in the video signal, but if you want to reduce the power supply voltage of the integrated circuit used in the video signal drive circuit to about half, you can apply an AC voltage .

《Color filter substrate》

Next, returning to FIGS. 25 and 26, the configuration of the upper transparent glass substrate SU B2 side (color filter substrate) will be described in detail.

《Light shielding film BM》

On the upper transparent glass substrate SUB2 side, make sure that the transmitted light from unnecessary gaps (gap other than between the pixel electrode PX and the counter electrode CT) is emitted to the display surface side and does not lower the contrast ratio etc. The light shielding film BM (so-called black matrix) is formed. Light shielding film BM is used for external light or backlight It also plays a role in preventing light from entering the i-type semiconductor layer AS. That is, the i-type semiconductor layer AS of the thin film transistor TFT is sandwiched by the upper and lower light-shielding films BM and the large gate electrode GT, so that external natural light and backlight do not hit.

The light-shielding film BM shown in FIG. 25 has a configuration extending linearly in the left-right direction above the thin-film transistor element TFT. This pattern is an example, and the pattern may be a matrix with openings formed in holes. In the area where the electric field direction is disturbed, such as the end of the comb electrode, the display of that area corresponds to the video information in the pixel on a one-to-one basis. It can be used as part of the display. The gap between the counter electrode CT and the video signal line DL in the vertical direction in the figure is shielded from light by a light shielding layer SH formed in the same step as the gate electrode GT. As a result, the light shielding in the vertical direction in the horizontal direction can be shielded with high precision with the alignment accuracy of the TFT process. The aperture can be enlarged more than the light shielding by the light shielding film BM which depends on the alignment accuracy.

The light-shielding film BM has a light-shielding property and is formed of a highly insulating film so as not to affect the electric field between the pixel electrode PX and the counter electrode CT. Pigment is mixed into the resist material to form a film of moderate thickness.

The light-shielding film BM is formed in the pixels of each row in a linear shape in the left-right direction, and the lines partition the effective display area of each row. Therefore, the outline of the pixels in each row is made clear by the light shielding film BM. That is, the light shielding film BM has two functions of black matrix and light shielding for the i-type semiconductor layer AS. The light-shielding film BM is also formed in a frame shape at the peripheral portion, and its pattern is formed continuously with the pattern of the matrix portion shown in FIG. The light shielding film BM in the peripheral portion is extended outside the seal portion SL to prevent leakage light such as reflected light due to a mounting machine such as a personal computer from entering the matrix portion and to prevent light such as knock light from being emitted. Is prevented from leaking out of the display area. On the other hand, the light-shielding film BM is retained about 0.3 to 1. Omm inside the edge of the substrate SUB2, and is formed so as to avoid the cut region of the substrate SUB2. 《Color filter FIL》

Same as Example 1.

《Overcoat film oc》

Same as Example 1.

《Liquid crystal layer, alignment film and deflection plate》

Same as Example 1.

《Configuration around the matrix》

Same as Example 1.

《Gate terminal section》

FIG. 29A is a plan view showing a connection structure from the scanning signal line GL of the display matrix to the external connection terminal GTM, and FIG. B is a section line B—B of FIG. 29A. FIG. 5 corresponds to the vicinity of the right center of FIG. 5, and the oblique wiring portion is shown as a straight line for convenience.

In the figure, the Cr_Mo layer g3 is hatched for easy understanding. The gate terminal GTM protects the Cr-Mo layer g3 and its surface, and connects to TCP (Tape Carrier Package). And a transparent conductive layer i1 for improving the reliability of the device. This transparent conductive layer i1 uses a transparent conductive film ITO formed in the same step as the pixel electrode PX.

In the plan view, the insulating film GI and the protective film PSV 1 are formed on the right side of the boundary line, and the terminal GTM located on the left end is exposed therefrom so that electrical contact with an external circuit can be made. I have. In the figure, only one pair of the gate line GL and the gate terminal is shown, but in reality, such pairs are arranged in a plural number up and down as shown in FIG. 29A, and the terminal group Tg (F i g. 5) is configured, and the left end of the gate terminal is extended beyond the cutting area of the substrate in the manufacturing process and is short-circuited by the wiring SHg (not shown). It is useful for preventing electrostatic breakdown at the time of rubbing of the alignment film ORI1 in the manufacturing process.

《Drain terminal DTM》

FIG. 3 OA shows a plan view showing the connection from the video signal line DL to its external connection terminal DTM, and FIG. 3 OB shows the FIG. 3 shows a cross section. 5 corresponds to the vicinity of the upper right of FIG. 5 and the direction of the drawing is changed for convenience, but the right end corresponds to the upper end of the substrate SUB1.

TSTd is a test terminal. No external circuit is connected here, but it is wider than the wiring part so that probe needles etc. can be contacted. Similarly, the drain terminal DTM is wider than the wiring part so that it can be connected to an external circuit. The external connection drain terminals DTM are arranged vertically, and the drain terminals DTM constitute a terminal group Td (subscript omitted) as shown in FIG. 5 and further extend beyond the cutting line of the substrate SUB1. , Quiet during the manufacturing process All of them are short-circuited to each other by wiring SHd (not shown) to prevent electric breakdown. The inspection terminal TSTd is formed on every other video signal line DL as shown in FIG.

The drain connection terminal DTM is formed of the transparent conductive layer i1, and is connected to the video signal line DL at a portion where the protective film PSV1 is removed. This transparent conductive film i1 uses a transparent conductive film ITO formed in the same step as the pixel electrode PX, as in the case of the gate terminal GTM.

The lead wiring from the matrix section to the drain terminal section DTM has a layer d3 at the same level as the video signal line DL.

《Counter electrode terminal CTM》

FIG. 31A is a plan view showing the connection from the counter voltage signal line CL to the external connection terminal CTM, and FIG. 3 IB is a diagram of FIG. FIG. This figure corresponds to the vicinity of the upper left of FIG.

Each counter voltage signal line CL is brought together to the counter electrode terminal CTM by a common bus line CB1. The common bus line CB has a structure in which a conductive layer 3 is laminated on a conductive layer g3 and they are electrically connected by a transparent conductive layer i1. This is to reduce the resistance of the common bus line CB so that the opposing voltage is sufficiently supplied from an external circuit to each opposing voltage signal line CL. The feature of this structure is that the resistance of the common bus line can be reduced without adding a new conductive layer.

The counter electrode terminal CTM has a structure in which a transparent conductive layer i1 is laminated on a conductive layer g3. This transparent conductive film i1 uses a transparent conductive film ITO formed in the same process as the pixel electrode PX, as in the case of the other terminals. Transparent The conductive layer i1 covers the conductive layer g3 with a transparent conductive layer i1 having high durability in order to protect the surface and prevent electrolytic corrosion and the like. The connection between the transparent conductive layer i 1 and the conductive layer _g 3 and the conductive layer d 3 is formed by forming through-holes in the protective film PSV 1 and the insulating film GI to establish conduction.

On the other hand, FIG. 32A is a plan view showing the connection from the other end of the counter voltage signal line CL to its external connection terminal CTM2, and FIG. FIG. 4 shows a cross-sectional view taken along the line B_B. This figure corresponds to the vicinity of the upper right of FIG. 5. Here, in the common bus line CB2, the other end (gate terminal GTM side) of each counter voltage signal line CL is brought together to be pulled out to the counter electrode terminal CTM2. Common bus line CB

The difference from 1 is that the conductive layer d3 and the transparent conductive layer i1 are formed so as to be insulated from the scanning signal line GL. Insulation from the scanning signal line G is performed by the insulating film GI.

《Equivalent circuit of entire display device》

Fig. 33 shows the connection diagram of the equivalent circuit of the display matrix section and its peripheral circuits. Although this figure is a circuit diagram, it is drawn corresponding to the actual geometric arrangement. AR is a matrix array in which a plurality of pixels are arranged two-dimensionally.

In the figure, X represents a video signal line DL, and suffixes G, B, and R are added corresponding to green, blue, and red pixels, respectively. Y means the scanning signal line GL, and the suffixes 1, 2, 3,..., And end are added according to the order of the scanning timing.

The scanning signal line Y (subscript omitted) is connected to the vertical scanning circuit V, and the video signal line X (subscript omitted) is connected to the video signal driving circuit H. The SUP uses a power supply circuit to obtain a plurality of divided and stabilized voltage sources from one voltage source and CRT (cathode ray tube) information from the host (upper processing unit) for TFT liquid crystal display devices. A circuit that includes a circuit that exchanges information.

《Driving method》

FIG. 34 shows a drive waveform of the liquid crystal display device of this embodiment. The counter voltage Vc is a constant voltage. The scanning signal V g takes an on level every run period, and takes an off level in the others. The video signal voltage is applied so that the positive and negative polarities are inverted every frame and transmitted to one pixel with twice the amplitude of the voltage to be applied to the liquid crystal layer. Here, the polarity of the video signal voltage Vd is inverted every column, and the polarity is also inverted every row. As a result, the pixels whose polarities are inverted are arranged up and down and left and right, and it is possible to reduce the occurrence of flitting force and crosstalk (smear). Also, the counter voltage Vc is set to a voltage that is a fixed amount lower than the center voltage of the polarity inversion of the video signal voltage. This is to correct the feedthrough voltage generated when the thin film transistor element changes from on to off, and is performed to apply an alternating voltage with a small DC component to the liquid crystal. This is because, when a direct current is applied to the liquid crystal, afterimages, deterioration, and the like become severe.

In addition to this, the maximum amplitude of the video signal voltage can be reduced by converting the counter voltage into an alternating current, and a video signal drive circuit (signal-side driver) having a low withstand voltage can be used.

<< Function of storage capacity C st g >>

Same as Example 1.

"Production method" Next, a method for manufacturing the above-described liquid crystal display device on the substrate SUB 1 side will be described with reference to FIGS. In the same figure, the middle letter is the abbreviation of the process name, the left side is the thin film transistor TFT part shown in Fig. 27, and the right side is the cross-sectional shape near the gate terminal shown in Fig. 29. The flow of is shown. Except for Step B and Step D, Step A to Step I are classified according to each photographic process.All cross-sectional views of each process show the stage where the processing after photo processing is completed and the photoresist is removed. I have. In this description, photographic processing refers to a series of operations from application of a photoresist, through selective exposure using a mask to development thereof, and a repeated description thereof will be omitted. The explanation will be given in accordance with the following steps.

Process A, F i g. 35

AN635 glass (trade name) A conductive film g3 made of Cr—Mo or the like having a thickness of 2000 A is provided on the lower transparent glass substrate SUB1 by sputtering. After the photographic processing, the conductive film g3 is selectively etched with ceric ammonium nitrate. Accordingly, the gate electrode GT, the scanning signal line GL, the counter voltage signal line CL, the gate terminal GTM, the first conductive layer of the common bus line CB1, the first conductive layer of the counter electrode terminal CTM1, the gate terminal GTM Are formed to form a bus line SHg (not shown).

Process F i g. 35

Ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD device to provide a 350 OA-thick Si nitride film, and silane gas and hydrogen gas are introduced into the plasma CVD device to produce a 120 OA-thick i film. After forming the amorphous Si film, a hydrogen gas and a phosphine gas are introduced into the plasma CVD apparatus to form an N (+) amorphous Si film having a thickness of 300 A. Process (:, F i g. 35

Process D, F i g. 36

A conductive film d3 made of Cr and having a thickness of 300 A is provided by sputtering. After the photoprocessing, the conductive film d3 is etched with the same liquid as in step A, and the video signal line DL, the source electrode SD1, the drain electrode SD2, the first conductive layer of the common bus line CB2, and the drain terminal DTM are removed. Form a shorting bus line SHd (not shown). Then, by introducing the CC 1 _4, SF ₆ dry etching apparatus, N (+) type by the amorphous S i layer and child etching, N between the source and the drain (+) type semiconductor layer d 0 Is selectively removed.

Process E, F i g. 36

Ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD apparatus to provide a 0.4 μπι-nitride Si film. After photographic processing, by selectively Etchingu nitride S i film using SF ₆ as Delahaye Tsuchingugasu, you putter Jung protective film P SV 1 and the insulating film GI.

Process F, F i g. 37

A transparent conductive film i1 made of an ITO film having a thickness of 140 OA is provided by sputtering. After the photographic processing, the transparent conductive film i1 is selectively etched with a mixed acid solution of hydrochloric acid and nitric acid as an etchant, thereby forming the uppermost layer of the gate terminal GTM, the drain terminal DTM and the counter electrode terminal CTM1. You And a second conductive layer of CTM2.

《Display panel PNL and drive circuit board PCB1》

Same as Example 1.

《TCP connection structure》

Same as Example 1.

《Drive circuit board PC B 2》

Same as Example 1.

《Overall configuration of LCD module》

Same as Example 1.

As described above, in the present embodiment, by making the comb-teeth electrodes transparent as in Embodiment 3, the maximum transmittance when performing white display can be improved by about 50%, and the transmittance of the liquid crystal display panel PNL can be improved. Is about 5.7%.

Also, in the present embodiment, unlike the first to sixth embodiments, the process of forming the ITO on the upper layer of the protective film PSV is used, so that the counter electrode can be provided on the uppermost layer, and the video signal line can be used. The shielding efficiency of the leaked electric field is good, and crosstalk can be reduced.

Furthermore, since the protective film P SV does not intervene in the path of the electric force lines that drive the liquid crystal between the electrodes, there is no voltage reduction in the protective film PSV, and the maximum drive voltage value for driving the liquid crystal is set to 7 in Example 1. In this example, it was reduced from 5 Vo 1 t to 5.0 Vo 1 t.

In the method in which a liquid crystal is driven by applying an electric field substantially parallel to the substrate surface as in this method, the protective film enters the path of the lines of electric force between the electrodes twice. Process can be simplified and productivity can be improved.

(Example 8)

This embodiment is the same as Embodiment 7 except for the following requirements. Fig. 38 shows a plan view of the pixel. The hatched portion in the figure indicates the transparent conductive film i1.

《Pixel electrode PX》

In this embodiment, the pixel electrode PX is formed of the same conductive film d3 as the source electrode SD1 and the drain electrode SD2. The pixel electrode PX is formed integrally with the source electrode SD1.

In this embodiment, in addition to the effects of the first embodiment, the transmittance is sacrificed, but a contact failure between the pixel electrode PX and the source electrode SD1 can be avoided. In addition, since one of the electrodes is covered with an insulating film (protective film PSV1), the possibility of direct current flowing through the liquid crystal in the event of an alignment film defect is reduced, the liquid crystal is not degraded, and reliability is reduced. improves.

(Example 9)

This embodiment is the same as Embodiment 7 except for the following requirements. Fig. 39 shows a plan view of the pixel. The hatched portion in the figure indicates the transparent conductive film i1.

《Counter electrode CT》

In this embodiment, the counter electrode CT is formed integrally with the counter voltage signal line CL by the conductive film g3.

In this embodiment, in addition to the effect of the first embodiment, the transmittance is sacrificed, but a contact failure between the counter electrode CT and the counter voltage signal line CL can be avoided. In addition, since one of the electrodes is covered with an insulating film (protective film PSV1), the possibility of direct current flowing through the liquid crystal in the event of an alignment film defect is reduced, the liquid crystal is not degraded, and reliability is reduced. improves. (Example 10)

This embodiment is the same as Embodiment 7 except for the following requirements. Fig. 40 shows a plan view of the pixel. The hatched portion in the figure indicates the transparent conductive film i1.

《Light shielding film BM》

The light-shielding film BM shown in FIG. 40 has a configuration extending in the vertical and horizontal directions above the thin-film transistor element TFT, and has a matrix-like shape with holes formed in the openings. In the area where the electric field direction is disturbed, such as the end of a comb-shaped electrode, the display of that area corresponds to the video information in the pixel on a one-to-one basis, and is black for black and white for white. Therefore, it can be used as part of the display.

Further, in this embodiment, unlike Embodiment 7, the light shielding film BM has a light shielding property, and the electric field from the video signal line DL affects the electric field between the pixel electrode PX and the counter electrode CT. In this embodiment, three layers of chromium oxide (CrOx), chromium nitride (CrNx), and chromium (Cr) are formed from the counter substrate SUB1 surface. The structure is formed with a thickness of about 0.2 μπι. At this time, chromium oxide (CrOx) It is used to suppress surface reflection. Chromium (Cr) is provided on the uppermost layer of the light shielding layer BM so that a voltage can be externally applied to the light shielding layer BM.

The light-shielding film BM is formed in the pixels of each row in a linear shape in the left-right direction, and the lines partition the effective display area of each row. Therefore, the outline of the pixels in each row is made clear by the light shielding film BM. In other words, the light shielding film BM has two functions of black matrix and light shielding for the i-type semiconductor layer AS.

The light-shielding film BM is also formed in a frame shape at the peripheral portion, and its pattern is formed continuously with the pattern of the matrix portion shown in FIG. The peripheral light-shielding film BM is extended outside the seal part SL to prevent leaked light such as reflected light from a mounting machine such as a personal computer from entering the matrices part, and to prevent knock light etc. Light is prevented from leaking out of the display area. On the other hand, the light-shielding film BM is retained about 0.3 to 1. Omm inside the edge of the substrate SUB2, and is formed so as to avoid the cut region of the substrate SUB2. 《Overcoat film OC》

Same as Example 1. However, through holes may be formed so that a potential can be applied to the light shielding film BM. The potential is preferably connected to the counter voltage Vc.

In this embodiment, in addition to the effect of the seventh embodiment, the light shielding film BM shields the influence of the electric field from the video signal line DL, so that the electric field between the pixel electrode PX and the counter electrode CT is not affected. . Therefore, crosstalk with the video signal line DL is eliminated, and image quality defects (smears) that cause streaking on the screen can be eliminated. In addition, the area in which the transparent counter electrode CT disposed on both sides of the video signal line DL is shielded by the light shielding layer SH can be reduced, and a higher transmittance can be achieved. (Example 11)

FIG. 43 is a diagram showing the principle of improving the aperture ratio of the display device according to the active matrix color liquid of the present embodiment. FIG. 43A shows the liquid crystal when a voltage is applied to the electrodes. FIG. 43B is a characteristic diagram showing the potential distribution in the layer, FIG. 43B is a plan view showing the reorientation state of liquid crystal molecules near the center of the liquid crystal layer, and FIG. 43C is a liquid crystal shown in FIG. 43B. FIG. 43D is a characteristic diagram showing the rotation angle _α of the molecule, and FIG. 43D is an example of a characteristic diagram showing the transmittance distribution of light transmitted through the liquid crystal layer on the upper and lower polarizers, the upper and lower substrates, the electrodes, and between the electrodes.

Here, it is the same as Example 7 except for the following requirements.

In this embodiment, using about 2 X 10 one ^{1 2} N (Newtons) as a twist elastic constant K 2 of the liquid crystal layer.

As'isuto弹性constant K2, for example, using a relatively large value of about 10 X 10- ¹² N (Newton), as shown in F i g. 41 B, the liquid crystal molecules on the electrode central portion is almost rotation The angle is zero, and as a result, the transmittance at the center of the electrode is almost the value indicated by 喑.

On the other hand, in this embodiment, the liquid crystal molecules at the center of the electrode also rotate, and the average transmittance of the portion A between the electrodes is 50% or more of the average transmittance of the portion B on the electrode. It was found that the transmittance was obtained.

Therefore, the average transmittance of the entire portion is the average transmittance of the A + B portions, which is greatly increased.

[Industrial applicability]

The present invention is applied to a liquid crystal or the like as described above, and has practical application in the liquid crystal manufacturing industry.

Claims

Sought the car n

An active matrix type liquid crystal display that has a pixel electrode and a counter electrode, and controls the liquid crystal molecules of the twistable liquid crystal layer by an electric field component substantially parallel to the substrate surface between the pixel electrode and the counter electrode to perform display.

In the device, at least one of the pixel electrode and the counter electrode is a transparent electrode, and as the electric field component is increased, the initial alignment state of the twistable liquid crystal and the polarization are set so that the light transmittance of the display device increases. The polarization axis of the plate is configured, the initial alignment state of the twistable liquid crystal layer when no electric field is applied is a homogenous alignment state, and the liquid crystal molecules between the electrodes and on the electrodes when the electric field is applied are substantially parallel to the substrate surface. The maximum value of the light transmittance is 4.0% or more, and the viewing angle range with a contrast ratio of 10: 1 or more is inclined at least 40 degrees from the direction perpendicular to the display surface. An active matrix liquid crystal display device characterized by being within the range of the omnidirectional described above.

An active matrix type liquid crystal display that has a pixel electrode and a counter electrode, and controls the liquid crystal molecules of the twistable liquid crystal layer by an electric field component substantially parallel to the substrate surface between the pixel electrode and the counter electrode to perform display. In the device, at least one of the pixel electrode and the counter electrode is a transparent electrode, and as the electric field component is increased, the initial alignment state of the twistable liquid crystal and the polarization are set so that the light transmittance of the display device increases. configured the polarization axis of the plate, the initial alignment state of the twisted liquid crystalline layer when no electric field is applied is Homojiniasu alignment state, and this Tsu ist弹性constant is less than ¹ OX 1 0- 1 ² N (Newton) An active matrix type liquid crystal display device characterized by the above-mentioned. An active matrix type liquid crystal display device having a pixel electrode and a counter electrode, wherein liquid crystal molecules in a twistable liquid crystal layer are controlled by an electric field component substantially parallel to a substrate surface between the pixel electrode and the counter electrode to perform display. In at least one of the pixel electrode and the counter electrode is a transparent electrode, and as the electric field component increases, the initial alignment state of the twistable liquid crystal and the polarizing plate so that the light transmittance of the display device increases. The initial alignment state of the twistable liquid crystal layer when no electric field is applied is a homogenous alignment state, and the initial pretilt angle of liquid crystal molecules at the upper and lower interfaces of the liquid crystal layer is 10 degrees or less. An active matrix type liquid crystal display device, wherein the initial tilt state of liquid crystal molecules in a liquid crystal layer is a splay state.

An active matrix type liquid crystal display having a pixel electrode and a counter electrode, wherein liquid crystal molecules in the twistable liquid crystal layer are controlled and displayed by an electric field component substantially parallel to a substrate surface between the pixel electrode and the counter electrode. In the device, at least one of the pixel electrode and the counter electrode is a transparent electrode, and as the electric field component is increased, the initial orientation state of the twistable liquid crystal and polarization are increased so that the light transmittance of the display device increases. The polarization axis of the plate is configured, the initial alignment state of the twistable liquid crystal layer when no electric field is applied is a homogeneous alignment state, and the average tilt angle of the liquid crystal molecules of the liquid crystal layer on the transparent electrode is However, the active matrix liquid crystal display device is characterized by being less than 45 degrees.

Active matrix according to claim 2, wherein the twisted elastic constant of the liquid crystal 5. Is ¹ X 1 0- 1 ² N (Newton) or less Tass type liquid crystal display.

Active matrix scan type liquid crystal display device according to claim 2, wherein the a twisted elastic constant is ² X ¹ 0- 1 2 N (Newton) or less of a liquid crystal.

4. The active matrix liquid crystal display device according to claim 3, wherein an initial pretilt angle of liquid crystal molecules at upper and lower interfaces of the twistable liquid crystal layer is 6 degrees or less.

5. The active matrix type liquid crystal display device according to claim 4, wherein the average tinoret angle of liquid crystal molecules on the transparent electrode of the twistable liquid crystal layer is 30 degrees or less even when an electric field is applied.

5. The active matrix type liquid crystal display device according to claim 4, wherein an average tinoret angle of liquid crystal molecules on the transparent electrode of the twistable liquid crystal layer is 10 degrees or less even when an electric field is applied.

5. The active matrix liquid crystal display device according to claim 1, wherein the pixel electrode or the counter electrode has a double structure of a transparent electrode and an opaque metal electrode.

The active matrix type liquid crystal display device further includes a counter voltage signal line for electrically connecting between the counter electrodes, and two adjacent counter voltage signal lines are connected to each other through the through hole by the counter electrodes. 5. The active matrix liquid crystal display device according to claim 1, wherein the active matrix type liquid crystal display device is connected to a liquid crystal display device.

The active matrix type liquid crystal display device further includes a protective film for covering the active matrix element, and at least one of the pixel electrode and the counter electrode is formed on the protective film. The active matrix device according to claim 1, wherein the active matrix device is electrically connected to an active matrix element or a counter voltage signal line via a through hole formed in the protective film. Liquid crystal display.

1 3. The active matrix liquid crystal display device according to claim 1, wherein the counter electrode is made of a transparent electrode, and further has a light-shielding pattern between the counter electrode and the video signal line.

14. The active matrix liquid crystal display device further includes a counter voltage signal line for electrically connecting between counter electrodes, wherein the counter voltage signal line is formed of metal. The active matrix liquid crystal display according to any one of claims 1 to 4.

5. The active matrix liquid crystal display device according to claim 11, wherein the counter voltage signal line is formed of a metal.

6. The active matrix type liquid crystal display device further has a video signal line, and has three or more counter electrodes including two counter electrodes adjacent to the video signal line in one pixel, 5. The active matrix liquid crystal display device according to claim 1, wherein a counter electrode adjacent to the line is opaque.

7. The active matrix liquid crystal display device according to claim 1, wherein the transparent conductive film of the transparent electrode is indium-tin-oxide (ITO).

8. The counter voltage signal line is formed of Cr, Ta, Ti, Mo, W, Al, or an alloy thereof, or a clad structure obtained by laminating them. 16. The active matrix liquid crystal display device according to claim 14, wherein the active matrix liquid crystal display device is formed.

The counter voltage signal line is formed with a clad structure in which a transparent conductive film such as indium-tin-oxide (ITO) is laminated on Cr, Ta, Ti, Mo, W, A1, or an alloy thereof. 16. The active matrix liquid crystal display device according to claim 14 or claim 15, wherein

When no electric field is applied, the initial twist angle of the liquid crystal layer is almost zero, and the initial alignment angle is 45 degrees or more and less than 90 degrees when the dielectric anisotropy Δε of the liquid crystal material is positive. 0 if the anisotropy Δ ε is negative. 5. The active matrix type liquid crystal display device according to claim 1, wherein the temperature is higher than 45 degrees and lower than 45 degrees.

A method for manufacturing an active matrix type liquid crystal display device having a pixel electrode and a counter electrode, wherein liquid crystal molecules in a liquid crystal layer are controlled and displayed by an electric field component substantially parallel to a substrate surface between the pixel electrode and the counter electrode. Forming at least one of the scanning signal line terminal portion, the video signal line terminal portion, or the uppermost conductive layer of the counter electrode terminal portion and at least one of the pixel electrode and the counter electrode with a transparent conductive layer; A method of manufacturing an active matrix liquid crystal display device, wherein the method is formed in the same step.