WO1987006727A1 - Signal input circuit - Google Patents

Signal input circuit Download PDF

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Publication number
WO1987006727A1
WO1987006727A1 PCT/JP1987/000241 JP8700241W WO8706727A1 WO 1987006727 A1 WO1987006727 A1 WO 1987006727A1 JP 8700241 W JP8700241 W JP 8700241W WO 8706727 A1 WO8706727 A1 WO 8706727A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
input circuit
generating means
series
circuit
Prior art date
Application number
PCT/JP1987/000241
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
Michiya Inoue
Original Assignee
Fanuc Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fanuc Ltd filed Critical Fanuc Ltd
Publication of WO1987006727A1 publication Critical patent/WO1987006727A1/ja

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Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G05B19/054Input/output

Definitions

  • the invention relates to improvement of a signal input circuit.
  • heat generated in the load resistance of a signal input circuit that uses the potential change or current change of a series circuit of a signal generating means such as a limit switch and a load resistance as a source information is used as source information.
  • a signal generating means such as a limit switch and a load resistance as a source information
  • FIGS. 1 and 2 show two examples of signal input circuits used in certain applications.
  • reference numeral 2 denotes a load resistance
  • reference numeral 3 denotes a signal generating means
  • Numeral 4 is a signal voltage detecting means. * In the example, a comparator is used.
  • Reference numeral 7 denotes a signal reading means, which reads the output signal of the signal voltage detecting means 4 at regular intervals. Arrows A and B indicate that A indicates an area outside the control box and B indicates an area inside the control box.
  • Signal generation means 3 is not operating (open circuit) In this case, the power supply voltage is applied to the signal voltage detection means 4 as it is, but no voltage is applied to the signal voltage detection means 4 in the operation (closed) state. The voltage change is detected and the signal input is recognized. As described above, the signal reading means 7 reads the output signal of the signal voltage detecting means 4 at regular time intervals.
  • 2 is a load resistance
  • 3 is a signal generating means, and in the example, it is a limit switch.
  • 5 is a signal current detecting means, which is a photo coupler in a typical example
  • 6 is a level converter
  • 8 is a signal reading means. Then, the output signal of the signal current detecting means 5 provided via the level converter 6 is read at a constant time interval.
  • the signal generating means 3 is in a non-operating (open circuit) state
  • the LED of the photocoupler 5 serving as the signal current detecting means does not emit light.
  • the input signal is not applied, and a low-level signal is read by the signal reading means 8.
  • the signal reading means 8 when the signal generating means 3 is in the operating (closed) state, the LED of the photocoupler 5 serving as the signal current detecting means emits light, and the signal reading means 8 is turned on. Is supplied with a high-level signal via a level converter 6, and the signal reading means 8 reads the high-level signal. In this way, the signal reading means 8 reads the output signal of the signal current detecting means 5 at regular time intervals.
  • a load resistance is indispensable. Regardless of the operation, since the current flows continuously during the period in which the signal generating means 3 is closed, there is no power loss that cannot be ignored. It has a drawback that it occupies a considerable part of the total heat value of the whole, resulting in an increase in the amount of heat to be cooled for numerical control devices and the like.
  • the signal generating means such as a limit switch is a contact type, a high voltage is applied to remove oxides and other insulators generated on the surface of the contact point.
  • the voltage used for the signal input circuit having the above-mentioned configuration having a contact is generally about 24 V, which is a voltage normally used for a circuit including a semiconductor device.
  • the disadvantages are particularly pronounced because they are much more expensive.
  • the purpose of the invention is to provide a signal input circuit that uses a potential change or a current change of a series circuit of a signal generating means such as a limit switch and a load resistor as a source information as a primitive information. It is to provide an improvement that reduces the amount of heat generated during load resistance.
  • a first signal input circuit relating to the invention comprises: a series circuit of signal generation means (3) and a resistor (2); and a signal generation means (3).
  • the signal reading means is provided in a series circuit of the signal generating means (3) and the resistor (2). Synchronized to means (7) This is a signal input circuit to which a switching means (1) that operates by being added in series is added in series.
  • a second signal input circuit includes a series circuit of a signal generating means (3) and a resistor (2), and a current flowing through the series circuit.
  • the signal current detecting means (5) to be detected and the signal reading means (8) for intermittently reading the signal current detected by the signal current detecting means (5) are provided.
  • a series circuit of the signal generating means (3) and the resistor (2) has a switch which operates in synchronization with the signal reading means (8). This is a signal input circuit to which the ring means (1) is added in series.
  • FIG. 1 is a block diagram of a signal input circuit (voltage change detection method) according to the related art.
  • FIG. 2 is a block diagram of a signal input circuit (current change detection method) according to the related art.
  • FIG. 3 is a block diagram of a signal input circuit according to a first embodiment of the present invention (voltage change detection method).
  • FIG. 4 is a block diagram of a signal input circuit according to a second embodiment of the present invention (voltage change detection method).
  • FIG. 5 is a block diagram of a signal input circuit according to the third embodiment (current change detection method) of the * invention.
  • FIG. 6 is a block diagram of a signal input circuit according to a fourth embodiment of the present invention (current change detection method). Detailed description of preferred embodiments 3 ⁇ 4
  • reference numeral 1 denotes switching means, which opens and closes periodically in synchronization with the signal reading means 7.
  • 2 is a load resistance
  • 3 is a signal generating means, in this example, a limit switch
  • 4 is a signal voltage detecting means. In the example, it is a comparator.
  • Reference numeral 7 denotes a signal reading means, which reads the output signal of the signal voltage detecting means 4 at regular intervals. Arrows A and B indicate ', A indicates an area outside the control box, and B indicates an area inside the control box.
  • the signal generating means 3 When the signal generating means 3 is in the non-operating (open) state, the voltage is still applied to the signal voltage detecting means, but it is in the operating (closed) state. Then, no voltage is applied to the signal voltage detecting means 4.
  • the signal reading means 7 operates in synchronization with the operation of the switching means 1 and outputs the output signal of the signal voltage detecting means 4 for a certain period of time. Read each time
  • the signal generating means 3 such as a limit switch operates in accordance with the operation of the numerically controlled machine tool or the like to which this signal input circuit is related, but this is read. Since the signal reading means 7 is effectively used only when the signal reading means 7 operates, the signal voltage is not used during the time when the signal reading means 7 is inactive. Detection Step 4 does not need to work *
  • the switching means 1 operates in synchronization with the signal reading means 7 by utilizing this principle.
  • the input signal can be normally backed up without any inconvenience, but the switching means is not used during the period when the signal reading means 7 is inactive. Since 1 is inactive, no heat is generated in the load resistance 2 except during the period in which the input signal is up. As a result, the amount of heat in the entire control device is greatly reduced.
  • Second embodiment Second embodiment
  • 1 and la are switching means that operate in synchronization with the signal reading means 7 and 7a, and each is closed at a separate time.
  • Reference numerals 21 to 23 and 21a to 23a denote load resistors, which are connected to the switching means 1 or the switching means 1a, respectively.
  • 31 to 33 and 31a to 33a are signal generating means such as limit switches, which are connected in series between the load resistances 21 to 23 and 21a to 23a and the ground, respectively.
  • 41 to 43 and 41a to 43a are signal voltage detecting means for detecting voltage signals corresponding to the open / closed states of the signal generating means 31 to 33 and 31a to 33a, respectively.
  • a group of signals that are up-taken at the same time for example, a set of signals detected by the voltage detection means 41 to 43 is used for the same function as a set.
  • the output signal of comparator 41 and the output of 41a The output signal of the comparator 42 and the output signal of the comparator 42a form a set, and the output signal of the comparator 43 and the output signal of the comparator 43a form a set.
  • the output signals of the above may be used as a set, and A may be used as wiring, and A may be wiring outside the numerical control device, for example, wiring to be attached to a machine tool.
  • B indicates the g-line in the numerical control device.
  • the switching means 1 and la are supposed to operate in synchronization with the signal reading means 7 and 7a, and the signal reading means 1 and la are operated in synchronization with the signal reading means 7 and 7a. Since the switching means 1 and la are inactive during the period when the input means 7 and 7a are inactive, the switching means 1 and la are inactive during the period other than the period during which the input signal is turned on. Does not generate heat in the load resistors 2, 21, 22, 23, 21a, 22a, and 23a. Therefore, the heat value of the entire control device is greatly reduced.
  • reference numeral 1 denotes switching means, which opens and closes periodically in synchronization with the signal reading means 8.
  • 2 is a load resistance
  • 3 is a signal generation means, and in the last example, it is a limit switch.
  • 5 is a signal current detecting means, which is a photocoupler in this example
  • 6 is a level converter
  • 8 is a signal reading means.
  • Signal generation means 3 does not operate (open In this state, the LED of the photocoupler 5 serving as the signal current detecting means does not emit light, so that no input signal is applied to the level converter 6, A low level signal is read by the signal reading means 8.
  • the signal generating means 3 when the signal generating means 3 is in the operating (closed) state, the LED of the photocoupler 5 serving as signal current detecting means emits light, and the signal reading means 8 is turned on. A high level signal is given to the signal via the level converter 6, and the signal reading means 8 reads a high level signal.
  • the switching means 1 since the switching means 1 is supposed to operate in synchronization with the signal reading means 8, the input signal is up-converted. Is normally performed without any inconvenience, but on the other hand, during the period when the signal reading means 8 is inactive, the switching signal 1 is inoperable, so that the input signal is not operated. No heat is generated in the load resistance 2 except during the period during which the voltage is up. Therefore, the amount of heat generated by the control device as a whole is greatly reduced.
  • 1 and la are switching means operating in synchronism with the signal reading means 8 and 8a, and are closed at the time of each other.
  • 21 to 23, and 21a to 23a are load resistances, which are connected to the switching means 1 or the switching means 1a, respectively.
  • 31-33, 31a-33a are the limits
  • a signal generating means such as a tos switch, etc., each of which is kneaded in series between the load resistances 21 to 23, 21a to 23a and the ground
  • 51, 52, 53, 51a, 52a, and 53a are signal current detection means, and are photocouplers in the example.
  • 82, 83, 61a, 81b, and 81c are level converters, and 8a and 8b are signal reading means.
  • the output signals of the signal current detecting means 51, 52, 53, 51a, 52a, 53a provided via 83, 81a, 81b, 81c are read at regular intervals. Yes.
  • the signal generating means 31 to 33, 31a to 33a are in a non-operating (open circuit) state, the photo couplers 51, 52, 53, 51a and 51a serving as signal current detecting means are provided. Since the 52a and 53a LEDs do not emit light, the input signal is not applied to the level converters 82, 83, 81a, 81b, and 81c, and the signal is read.
  • the low level signal is read by the first and second means 8 and 8a.
  • the signal generating means 31 to 33 and 31a to 33a When the signal generating means 31 to 33 and 31a to 33a are in the operation (closed) state, the signal is low.
  • a high-level signal is obtained via the converters 62, 83, 81a, 81b, and 81c, and the signal reading means 8, 8a reads the high-level signal.
  • the switching means 1 and la are supposed to operate in synchronization with the signal reading means 8 and 8a, the signal reading means 8 and 8a Since switching means 1 and la are inactive during the period during which the input signal is inactive, the load resistance 2 must be used during periods other than the period during which the input signal is There is no fever in it. Therefore, the amount of heat generated by the control device as a whole is significantly reduced. It clearly shows that the improvement has been completed to reduce the amount of heat generated in the load resistor in the signal input circuit that uses the potential change or current change of the series circuit as the primitive information. .

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)
  • Numerical Control (AREA)
  • Electronic Switches (AREA)
PCT/JP1987/000241 1986-04-28 1987-04-16 Signal input circuit WO1987006727A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP61/063247U 1986-04-28
JP6324786U JPS62179604U (en, 2012) 1986-04-28 1986-04-28

Publications (1)

Publication Number Publication Date
WO1987006727A1 true WO1987006727A1 (en) 1987-11-05

Family

ID=13223721

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1987/000241 WO1987006727A1 (en) 1986-04-28 1987-04-16 Signal input circuit

Country Status (2)

Country Link
JP (1) JPS62179604U (en, 2012)
WO (1) WO1987006727A1 (en, 2012)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52132287A (en) * 1976-04-28 1977-11-05 Mitsubishi Electric Corp Input apparatus
JPS56145404A (en) * 1980-03-19 1981-11-12 Omron Tateisi Electronics Co Input circuit of sequence controller
JPS57120107A (en) * 1981-01-17 1982-07-27 Koyo Denshi Kogyo Kk Sequence controller

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52132287A (en) * 1976-04-28 1977-11-05 Mitsubishi Electric Corp Input apparatus
JPS56145404A (en) * 1980-03-19 1981-11-12 Omron Tateisi Electronics Co Input circuit of sequence controller
JPS57120107A (en) * 1981-01-17 1982-07-27 Koyo Denshi Kogyo Kk Sequence controller

Also Published As

Publication number Publication date
JPS62179604U (en, 2012) 1987-11-14

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