Classifications

• • H—ELECTRICITY
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  • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
  • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
  • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
• • C—CHEMISTRY; METALLURGY
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  • C01B33/00—Silicon; Compounds thereof
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  • C01B33/021—Preparation
  • C01B33/027—Preparation by decomposition or reduction of gaseous or vaporised silicon compounds other than silica or silica-containing material
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
  • C23C16/24—Deposition of silicon only
• • H—ELECTRICITY
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  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02367—Substrates
  • H01L21/0237—Materials
  • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02367—Substrates
  • H01L21/0237—Materials
  • H01L21/02425—Conductive materials, e.g. metallic silicides
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02436—Intermediate layers between substrates and deposited layers
  • H01L21/02439—Materials
  • H01L21/02441—Group 14 semiconducting materials
  • H01L21/0245—Silicon, silicon germanium, germanium
• • H—ELECTRICITY
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  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/02521—Materials
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/0257—Doping during depositing
  • H01L21/02573—Conductivity type
  • H01L21/02576—N-type
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/0257—Doping during depositing
  • H01L21/02573—Conductivity type
  • H01L21/02579—P-type
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
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  • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
• • H—ELECTRICITY
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  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
  • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
  • H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
  • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
  • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

• This invention relates to the production of amorphous semiconductors, particularly for use in semiconductor devices. This is a continuation-in-part of U.S. Serial No. 242,707, filed March 11, 1981.
• Amorphous semiconductors are useful in a wide variety of devices. Examples include memories, field effect and thin film devices, displays and luminescent devices. Amorphous semiconductors are particularly useful for photovoltaic devices which provide a voltage when subjected to radiation, or radiate when electrically energized. Unfortunately, photovoltaic devices are not presently competitive with conventional sources of electrical energy. This has been caused primarily by the cost of manufacturing suitable semiconductive materials. Initially, expensive and relatively thick single crystal material was required. More recently, amorphous material with suitable photosensitivity has been fabricated by glow discharge in a gaseous atmosphere. Amorphous material in the form of hydrogenated silicon prepared by glow discharge has proved to be particularly suitable. Illustrations are found in U.S. patents 4,064,521; 4,142,195; 4,163,677; 4,196,438; 4,200,473 and 4,162,505.
• amorphous silicons prepared by sputtering and vacuum evaporation of monosilanes have exhibited less photoresponse than that provided by glow discharge materials.
• Other attempts have been made to produce amorphous silicon from various fluorosilanes as described, for example, in U.S. patents 3,120,451 and 4,125,643.
• the photoresponsive properties of the resultant materials have been similar to those associated with hydrogenated amorphous silicon produced by glow discharge, the costs of the process are still considerable.
• Another method of preparing amorphous silicon is by the decomposition of silanes at a comparatively high temperature (1400oC to 1600°c.) in a high vacuum reactor required to be held at pressures below 10 -4 Torr.
• Another object of the invention is to provide for the production of semiconductive material with suitable photosensitivity with less cost and complexity than for single cyrstal materials
• a further object of the invention is to achieve amorphous silicon material at less cost and with less complexity than for glow discharge, sputtering and vacuum evaporation techniques.
• the invention provides a method of preparing an amorphous semiconductor with suitable photosensitivity by the pyrolytic decomposition of one or more gaseous phase polysemiconductanes at a temperature below about 500°C.
• This technique distinguishes from the prior art pyrolytic decomposition of silanes and fluorsilanes in which significantly lower photoconductivity and inferior photovoltaic properties have resuited.
• This procedure lends itself to continuous processing as opposed to batch processing, and eliminates the costly and complex equipment associated with the production of single crystal and amorphous silicon by glow discharge, sputtering and vacuum evaporation.
• the decomposition takes place at a temperature in the range about about 300°C. to 500°C. and is preferably in the range from 350°C. to 450°C.
• the decomposition takes place at a partial pressure of polysilane less than about one atmosphere and above about one micron of mercury, and is preferably above one Torr.
• the pressure is desirably in the range from about one Torr to about 100 Torr in order to limit gas phase nucleation of particles during pyrolytic decomposition.
• the polysemiconductances are selected from the class ranging from disemiconductanes to and including hexasemiconductanes, re-presented by the formula Sc n H 2n + 2 , where "Sc” refers to a semiconductor such as silicon or germanium, and n ranges from two to six.
• the polysemiconductanes are desirably obtained from the reaction product of a semiconductide, such as magnesium suicide (Mg 2 Si) with an aqueous acid such as phosphorus acid (H 3 PO 4 ), aqueous strong sulfuric acid (H 2 SO 4 ) hydrogen fluoride (HF), and hydrogen chloride (HCl).
• the semiconductanes of an order higher than disemiconductanes are separated by multiple trap distillation. If higher purity disilane is desired, the disilane that has been trapped may be further purified by multiple traps to trap distillations, by lower temperature, by low temperature fractionation, or by other procedures such as gas chromotography, etc.
• the polysemiconductanes may also be prepared by reduction of semiconductor halides, such as disilicon hexachloride with a hydride such as lithium aluminum hydride.
• the gaseous phase includes an inert gas carrier. Suitable inert gas carriers are argon, helium and hydrogen.
• the gas phase material is advantageously decomposed on a heated substrate and the decomposition temperature is that of the substrate.
• amorphous semiconductive devices are prepared by forming a body through the pyrolytic decomposition of one or more gaseous phase polysemiconductanes and providing contacts for the body.
• the body is desirably formed on a substrate in one or more separate layers which can include dopants according to the conductivity type desired.
• Auxiliary layers, such as metal to form an interface, and antireflection layers, can be included.
• FIGURE 1A is a flow chart of the method in accordance with the invention for preparing amorphous semiconductors
• FIGURE IB is an adaptation of the flow chart of FIGURE 1A showing the method of preparing amorphous silicons
• FIGURE 2A is a schematic diagram of an illustrative arrangement for the production of suitable semiconductanes
• FIGURE 2B is a schematic diagram of an illustrative reaction chamber for preparing amorphous semiconductors in accordance with the invention:
• FIGURE 2C is a graph of relative quantum efficiency against wavelength illustrating the difference between film produced i in accordance with the invention and those produced by other techniques;
• FIGURE 3 is a schematic diagram of a photodetector prepared in accordance with the invention and associated circuitry;
• FIGURE 4 is a schematic diagram of a heterojunction semiconductor in accordance with the invention.
• FIGURE 5 is a cross sectional view of a Schottky barrier photovoltaic device prepared in accordance with the invention.
• FIGURE 6 is a cross sectional view of a P-I-N photovoltaic device prepared in accordance with the invention
• FIGURE 7 is a cross sectional view of a P-N photovoltaic device prepared in accordance with the invention.
• FIGURE 8 is a cross sectional view of a further heterojunction photovoltaic device prepared in accordance with the invention. Detailed Description of the Method
• FIGURE 1A sets forth a flow charge 100A for the general practice of the invention
• FIGURE IB provides a flow chart 100B for the particular preparation of amorphous silicons having the special properties in accordance with the invention.
• Semiconductanes for the practice of the invention are selected from Group IV of the Periodic Chart and thus can include germanium or tin, and from Group VI of the Periodic Chart and thus can include selenium and tellurium.
• a particularly suitable semiconductor is silicon.
• the polysemiconductanes are introduced into a reaction chamber illustrated by process block 102A. While in the chamber the polysemiconductanes are pyrolytically decomposed as represented in process block 103A. Pyrolytic decomposition involves the effect of heat at a suitable temperature on a gaseous material under consideration in converting the material into an amorphous semiconductor on the surface of the desired substrate. It is to be noted that by contrast with the prior art the polysemiconductanes produced by pyrolytic decomposition do not display the hydrogen defect characteristic commonly found in the production of amorphous semiconductors from monosemiconductanes. As a result it is not necessary to subject the resulting product to hydrogen ion implantation or heavy doping.
• the invention is suitable for the production of amorphous silicon in accordance with the flow chart 100B of FIGURE 1B.
• the polysemiconductanes take the form of polysilanes in accordance with process block 101B.
• the polysilanes are introduced into a reaction chamber pursuant to process block 102B. While in the chamber the polysilanes are subjected to heating in accordance with process block 103B. This decomposes them into amorphous silicon.
• the material is prepared under homogenous, controlled conditions at temperatures substantially less than necessary to decompose monosilanes.
• the amorphous silicon product resulting from the decompositon of polysilanes does not require subsequent treatment to compensate for hydrogen deficiencies.
• the amorphous silicon produced in accordance with FIGURE 1B is generally useful in a wide variety of semiconductor devices.
• amorphous semiconductors produced in accordance with the invention can be substituted for semiconductors produced in other ways in a wide variety of semiconductor devices. This is particularly true of photovoltaic, photoconductive and current rectification devices.
• useful members include disilanes, trisilanes, tetrasilanes pentasilanes and hexasilanes . Isomeric members of the family are also suitable .
• the only limit on the class of useful members is governed by the stability of the polysilanes involved in the desired reaction. As the order of polysilanes increases there is a reduction in overall stability but this usually can be compensated by suitable operating condictions.
• Polysilanes that are decomposed pyrolytically may take the form of a mixture of polysilanes or be provided by a single polysilane alone.
• the gaseous mixture may include a monosilane. This has the effect of reducing the the gaseous phase partial pressure so that operating conditions have to be adjusted accordingly.
• the gaseous mixture may further include dopants and inert gaseous carriers.
• a suitable operating pressure is about one atmosphere, but lower pressures may be employed as low as down to the pressure of about one Torr.
• the pressure desirably lies in the range from about one Torr to about 100 Torr in order in part from the gas phase mixture.
• Very high order silanes for example beyond hexasilane have little effect on the production of the desired amorphous silicon film at standard temperatures and pressures because they have negligible vapor pressures at room temperature.
• the higher order silanes when heated to produce a significant vapor pressure, for example above one millimeter of mercury, they also can provide high quality amorphous silicon film.
• FIGURES 2A and 2B An illustrative arrangement for preparing amorphous semiconductors in accordance with the invention is illustrated in FIGURES 2A and 2B.
• the arrangement is in two sections, 210 for the production of suitable semiconductanes and 250 for the conversation of the semiconductanes to the desired amorphous semiconductors.
• the arrangement 210 is specifically adapted for the production of amorphous silicon by pyrolytic decomposition, but it will be understood that appropriate modifications may be made for the production of other amorphous semiconductors.
• the arrangement 210 includes a reaction chamber 211, an acid source 212, a suicide source 213 and a series of traps 214,215.
• reactans including the selected polysilanes, are applied to a reaction chamber 260 in the form of an envelope 261.
• the reaction chamber 260 illustratively contains a substrate 262 upon which amorphous silicon is to be deposited.
• the chamber 261 is of a material which will not contaminate the substrate 262. Suitable materials include quartz, glass and stainless steel.
• the illustrative reaction chamber 261 of FIGURE 2 has an inlet 263 and an outlet 264.
• the inlet provides entry for selected polysilanes or a monosilane-polysilane mixture through a control valve 251 which allows the gaseous mixture to be supplemented by one or more dopant gases from sources 252 and 255.
• Postioned below the inlet 263 is a support 256 for a holder 266 of the substrate 262.
• the substrate holder 266 illustrative is a cratxidge heater with a wound ceramic core and a ceramic binder encompassing a resistive element 266r. The latter is energized by suitable wiring which extends to the support along the holder.
• a stainless steel case isolates the ceramic core from the incoming gaseous stream represented by the arrow G.
• a manometer 270 is mounted on the chamber 261 to give an indication of the inter 262. Suitable materials include quartz, glass, and stainless steel.
• the illustrative reaction chamber 261 of FIGURE 2 has an inlet 263 and an outlet 264.
• the inlet provides entry for selected polysilanes or a monosilane-polysilane mixture through a control valve 251 which allows the gaseous mixture to be supplemented by one or more dopant gases from sources 253 and 255.
• the substrate holder 266 illustratively is a cartridge heater with a wound ceramic core and a ceramic binder encompassing a resistive element 2664. The latter is energized by suitable wiring which extends to the support along the holder.
• a stainless steel case isolates the ceramic core from the incoming gaseous stream represented by the arrow G.
• a manometer 270 is mounted on the chamber 261 to give an indication of the internal pressure.
• the temperature of the substrate 262 is monitored by a guage (not shown) included in the wiring for the heater 266r.
• the substrate 262 is typically of glass. in order to make the desired amorphous silicon deposit the gaseous mixture G is passed over the substrate, being drawn toward the outlet 264 by the effect of a vacuum pump (not shown).
• the substrate 262 is operated at a temperature in the range from about 350oC. to about 500°C. resulting in pyrolytic decomposition of at least a portion of the gaseous stream G.
• the decomposition cospents are indicated by the arrows B shown in dashed line form.
• the balance of the gaseous mixture, in the form of an exhaust E, is drawn through the outlet 264.
• a static deposition system nay also be used. In static deposition, the semiconductanes are introduced into the evacuated reactor through a valve. The exhaust and inlet valves are then shut, causing a specified volume of gaseous mixture to be trapped in the chamber. Because of In addition, the electrical properties of the deposited amorphous silicon are controlled according to the nature of the dopant gases from the sources 252 and 255.
• the dopant gas 252 can be a boron hydride such as B 2 H 6 , B 10 H 14 , etc.
• the dopant gas 255 is a phosphorus hydride such as PH 3 or P 2 % 4
• the desired dopant hydrides can be formed in the gas mixture by incorporating magnesium boride and/or magnesium phosphide in the reactants. It will be appreciated that any of a wide variety of other dopants may be used. In some cases it is desirable for the same dopant gas to be selectively applied from two or more spearate sources, such as the sources 252 and 253.
• the major portion of the gaseous mixture G desirably is of an inert carrier gas in order to inhibit spontaneous combustion of the reactants in the event of the fracture of the chamber 261.
• the substrate 262 of FIGURE 2 has been chosen as glass for reasons of economy, metal substrates, particularly steel, may also be employed.
• digermane For depositing amorphous germanium, digermane (Ge 2 H 6 ) can be used and the deposition performed at a temperature in the range of 150°C. to 220°C. As an alternature to digermane, monogermane (GeH 4 ) can also be used, but the rate of deposition is somewhat slower than for digermane. Other higher germanes can also be used, such as triqermane (Ge 3 H 8 ).
• Table I summarized in Table I, in which the gases are high order silanes as prepared as heretofor described.
• gaseous mixture G desirably is of an inert carrier gas in order to inhibit spontaneous combustion of the reactants in the event of the fracture of the chamber 261. While the substrate 262 of FIGURE 2 has been chosen as glass for reasons of economy, metal substrates, particularly steel, may also be employed.
• digermane For depositing amorphous germanium, digermane (Ge 2 H 6 ) can be used and the deposition performed at a temperature in the range of 150°C. to 220oC.
• monogermane As an alternative to digermane, monogermane (GeH 4 ) can also be used, but the rate of deposition is somewhat slower than with digermane.
• Other higher germanes can also be used, such as tigermane (Ge 3 H 8 ).
• Amorphous semiconductors produced in accordance with the invention can be used to form a wide variety of semiconductor devices. It is important to note that the amorphous silicon films produced by the present invention are different from the usual glow discharge and high vacuum deposited films. Films according to the present invention are not subjected to ion damage.
• FIGURE 2C compares the spectral response of a typical glow discharge film with a film according to the present invention.
• relative photovoltaic quantum efficiency is plotted against the wavelength of excitation radiation. It is apparent from FIGURE 2C that by contract with glow discharge films, amorphous silicon films produced by the invention have a spectral response with higher relative quantum efficiences and extend to larger wavelengths.
• those of the invention achieve significantly higher photoconductivity, e.g. 10 -6 to 10 -4 ohms per centimeter (ohms-cm -1 ) as opposed to a range of 10 -9 to 10 -7 ohms-cm -1 for the high vacuum deposited films of U.S. patent 4,237,150 and 4,237,151.
• a glass substrate 301 with an amorphous silicon deposit 302 is provided with aluminum contacts 303 and 304 and connected in circuit through a battery 305 to a load 306.
• incident light 307 falls on the amorphous silicon layer 302, it creats electronhole pairs which are acted upon by the voltage of the battery 305 and produce a corresponding voltage increase in the load 306 according to the number of hole-electron pairs created.
• heterojunction semiconductor device 400 of FIGURE 4 Another device which makes use of amorphous silicon produced in accordance with the invention is the heterojunction semiconductor device 400 of FIGURE 4. This device has differen junctions J1 and J2 between p-type material 403 and intrinsic
• the bandgaps of the p- and n-type materials 403 and 401 are different than for the intrinsic material 402.
• Both the intrinsic material 402 and the n-type material 403 are forme by chemical vapor deposition.
• dopant such as phosphine is included.
• the p-type material 403 is also made by chemical deposition with a suitable dopant, such as boron.
• the resultant device 400 is a P-I-N semiconductor device controlled by a grid contact 404 and deposited desirably upon a substrate 405.
• the device 400 has the advantage over other similar devices of permitting a greater amount of light to enter the intrinsic layer 402 by virtue of the amorphous silicon carbon alloy layer 401, which has a higher bandgap than the intrinsic layer 402.
• desirable semiconductive devices can be produced by substituting semiconductor layers prepared in accordance with the invention for semiconductor layers prepared by other techniques.
• the various devices of illustrative U.S. patent 4,064,521 can be adapted in accordance with the present invention by substituting pyrolytically decomposed polysemiconductanes for the glow discharge amorphous silicon of the prior art.
• the average density of localized states is 10 19 /cm 3 or greater. This low density or defects states leads to longer depletion widths and low recombination, thus producing good quality devices.
• One such device is the Schottky barrier solar cell 500 of FIGURE 5 formed by a substrate 512 with a body 514 of amorphous silicon.
• the device 500 also includes a metallic layer 516, an interface 518, an antireflective layer 520, an incident surface 522 for solar radiation 526 and a grid electrode 524. If the surface resistivity of the electrode 628 at the first doped layer is on the order of about 10 ohms/ or more, it is preferable to also have a gride contact like that described in FIGURE 5, on the first doped layer 613 for collection of the current generated in the body 614.
• An electrical contact 627 is on the surface of the second doped layer 615 opposite the transmissive electrode 268.
• the electrical contact 627 is of a material having reasonable electrical conductivity, such as aluminum, chromium, tantalum, antimony, niobium or stainless steel.
• a semiconductor device 710 is a photovoltaic device, and more particularly a P-N junction solar cell.
• the photovoltaic device 710 includes a region 711 of amorphous silicon fabricated by the polysilane chemical vapor deposition method in accordance with the invention, with appropriate doping gases.
• the region 711 comprises a first doped layer 752 of one conductivity in contact with a second doped layer 754 of an opposite conductivity with a P-N junction 756 inbetween.
• the first coped layer 752 is of p-type material and the second doped layer is of n ⁇ type conductivity.
• Both the first and second doped layers 752 and 754 are the body 714 of the photovoltaic device 710.
• the region 711 includes a third doped layer 758 on the surface of the second doped layer 754 which has a higher doping concentration than the second doped layer 754.
• the third doped layer 758 is of n-type conductivity.
• the third doped layer 758 assists in making ohmic contact in the body 714.
• FIGURES 5, 6 and 7 have been described as solar cells, it is anticipated by the pre sent invention that these embodiments can also be utilized as high frequency photodetectors, i.e., devices which respond to radiant energy.
• the semiconductor device 810 is described as a heterojunction photovoltaic device for the purpose of explaining the sixth embodiment of the present invention.
• the photovoltaic device 810 includes a body 814 of amorphous silicon fabricated by pyrolytic decomposition.
• the body 814 of amorphous silicon has the same characteristics as the body 402 of the second embodiment of the present invention.
• the fabrication of the photovoltaic device 810 is similar to that of the embodiments previously described.
• the semiconductor 860 may function as the support in the conversion apparatus (as previously described in FIGURES 4 and 5) for the deposition of the body 814 of amorphous silicon.
• the body 814 can be formed by pyrolysis of disilan and the semiconductor region 860 can then be sputtered onto the body 814.
• the first electrode 866, the intermediate layer 868 and the second electrode 870 are formed by masking and evaporation techniques well known in the art.
• the sixth embodiment of the present invention has been described as a photovoltaic device, it is obvious to those skilled in the semiconductor art that such a device can also function as a rectifier. If the device 810 was operated as a recitfier, there would be no need for the semiconductor region 860 to beof a material which is semitransparent or transparent to solar radiation. In addition, there would also be no need for an incident surface 854 which is capable of solar radiation impinging thereon. While various aspects of the invention have been set forth by the drawings and specification, it is to be understood that the foregoing detailed descriptions are for illustration only and that various changes, as well as the substitution of equivalent constituents for those shown and described may be made without departing from the spirit and scope of the invention as set forth in the appended claims.
• the device 430 can also function as a rectifier. If the device 430 was operated as a rectifier, there would be no need for the semiconductor region 860 being of a material which is semitransparent or transparent to solar radiation. In addition, there would also be no need for an incident surface 864 which is capable of solar radiation impinging thereon.

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Cited By (15)

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• 1982
  • 1982-03-10 WO PCT/US1982/000299 patent/WO1982003069A1/en not_active Application Discontinuation
  • 1982-03-10 CA CA000398016A patent/CA1187622A/en not_active Expired
  • 1982-03-10 ES ES510893A patent/ES510893A0/es active Granted
  • 1982-03-10 EP EP19820901328 patent/EP0075007A4/en not_active Withdrawn
  • 1982-03-10 JP JP57501373A patent/JPS58500360A/ja active Pending
  • 1982-03-10 HU HU821672A patent/HU187713B/hu unknown
  • 1982-03-11 IT IT20100/82A patent/IT1150674B/it active
  • 1982-03-11 KR KR8201088A patent/KR910002764B1/ko active
  • 1982-03-15 IN IN291/CAL/82A patent/IN156594B/en unknown
  • 1982-11-10 NO NO823744A patent/NO823744L/no unknown
  • 1982-11-11 OA OA57842A patent/OA07249A/xx unknown

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