CA1187622A - Semiconductor device having a body of amorphous silicon - Google Patents

Semiconductor device having a body of amorphous silicon

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Publication number
CA1187622A
CA1187622A CA000398016A CA398016A CA1187622A CA 1187622 A CA1187622 A CA 1187622A CA 000398016 A CA000398016 A CA 000398016A CA 398016 A CA398016 A CA 398016A CA 1187622 A CA1187622 A CA 1187622A
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Prior art keywords
amorphous silicon
torr
range
temperature
amorphous
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French (fr)
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Zoltan J. Kiss
Alan G. Macdiarmid
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Individual
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • C—CHEMISTRY; METALLURGY
    • C01—INORGANIC CHEMISTRY
    • C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
    • C01B33/00—Silicon; Compounds thereof
    • C01B33/02—Silicon
    • C01B33/021—Preparation
    • C01B33/027—Preparation by decomposition or reduction of gaseous or vaporised silicon compounds other than silica or silica-containing material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02425—Conductive materials, e.g. metallic silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

AMORPHOUS SEMICONDUCTOR METHOD AND DEVICES

Abstract of the Disclosure Preparation of amorphous semiconductor material that is suitable for use in a wide variety of devices by the pyrolytic decomposition of one or more gaseous phase polysemiconductanes, including polysilanes and polygermanes.

Description

6;~

AMORPIIOUS SEMICONDUC'rOR METHOD ~ND DEVICES
Back~round of the Invention -The invention relates to the production of amorphous semi-conduc-tors, particularly for use in semiconductor devices.

~ norpllous semlconductQrs are useful in a wide variety of d~vices. Examples lnclude memories, field effect and thin film d~vices, displays and luminescent devices.
Amorphous semiconductors are particularly useful for photo-voltaic devices which provide a voltage ~hen subjected to radia-tion, or radiate when electrically energized. Unfortunately, photovolta~c devices are not presently competitive with cSnven-tional sources of electrical eneray. This has been-cau3c primarily by the cost of manufacturing suitable semiconductive materials.
Initia]ly,ex~ensive and relatively thick single crystal material was required. More recently, amorphous material with suitable photosensitivity has been fabricated by glow discharge in a gas-eous atmosphere.
Amorphous material in the from of hydrogenated silicon prepared by glow discharge has proved to be particularly suitable.
Illustrations are found in U.S. patents 4,064,521; 4,142,195;
4,163,677; 4,196,43~; 4,200,473 and 4,162,505.
Althouqh the qlow discharge manufacture of amorphous silicon is less costly than the production of sinale crystal material, cost considerations continue to limit the general employ-ment of this technique.
One attempt to provide a lower cost material has involved the ~roduction of amorphous silicon by pyrolytic decomposition of monosilane (SiH~). Other techniques employed with monosilanes have included sputtering and vacuum evaporation.
Unfortunately, the amorphous silicon produced by the pyro-lytic decomposition of monosilane, commonly known as "chemical vapor deposition" (CVD) has shown limited photovoltaic or photo-conductive behavior. This has continued to be the case even whenthe material is hydrogenated to compensate for what has been ~'7~2~

1 regarded as a defect density in the material.
Similarly, amorphous silicons prepared by sputtering and vacuum evaporation of monosilanes have exhibited less pho-tores-ponse than than provided by glow discharge materials.
Other attempts have been made to produce amorphbus silicon rom various fluorosilanes as described, for example, in U.S.
paten~ 3,120,~51 and 4,125,6~3. Here again, while the photores-p~n~v~ pro~rties of the resultant materials have been similar hose as~ociated with h~drogenated amorphous silicon produced by ~low discharge, ~he costs of the process are still considerable.
~nother method of preparing amorphous silicon is by the decomposition of silanes at a comparatively hi~h temperature (1400C
to 1600c~) in a high vacuum reactor required to be held at pres-sures below 10 4 Torr. The resulting gas stream is then directed onto a substrate held at a lower temperature as set forth in U.S.
~atents ~,237,150 and 4,237,I51. This technique is cumbersome, requires the use of high temperatures and high vacuums, and leads to films of rather low photoconductivities (10 7 (~- cm) 1 or lower).
~ccordingly, it is an object of the invention to achieve the e~ficient and low cost production of semiconductive materials with suitable photoresponsive properties. A related object is to achieve suitable photovoltaic and photodetecting devices.
Another object of the invention is to provide for the pro-duction of semiconductive material with suitable photosensitivity with less cost and complexity than for single cyrstal materials.
A ~urther object of the invention is to achieve amorphous silicon material at less cost and with less complexity than for qlow discharge, sputtering and vacuum evaporation techniques.
~0 ` ~76'~
, Summary of the Invention In one broad aspect, the present invention relates to the method of preparing an amorphous semiconductor which comprises pyrolytically decomposing at least one gaseous phase polysemiconductane at a temperature below about 500C. and a pr~ssure ahove 10 4 Torr. This technique is to be distinguished ~rom the prior art pyrolytic decomposition of silanes and Eluorosilanes in which significantly lower photoconductivity and inferior photovoltaic properties have resulted. This procedure lends itself to continuous processing as opposed to batch processing, and elminiates the costly and complex equipment associated with the production of single crystal and amorphous silicon by glow discharge, sputtering and vacuum evaporation.

In accordance with one aspect of the invention, the decomposition takes place at a temperature in the range from about 300C. to about 500C. and is preferably in the range from about 350C. to 450C.

In accordance with another aspect of the invention, the decomposition takes place at à partial pressure of polysilane less than about one atmosphere and above about one micron of mercury, and is preferably above about one Torr. The pressure is desirably in the range from about one Torr to about 100 Torr in order to limit gas phase nucleation of particles during pyrolytic decomposition.

`~

76~

In accordance with a further aspect of the invention, the polysemiconductanes are selected rom the class ranging from disemiconductanes to and including hexasemiconducates, represented by ~he Eormula ScnH2n~2, where "Sc" refers to a semiconductor such ~ ~.L~Lcotl or c3ermanium, and n ranges Erom two to six. The polys~mlconductanes are desirably obtained from the reaction protluc~ oE a semiconductide, such as magnesium silicide (Mg2Si) wlkh an aqueous acid, such as phosphorus acid (H3~0~), aqueous strong sul:Euric acid (H2S0~), hydrogen Eluoride (HF), and hydrogen chloride (HCl). The semiconductanes of an order higher than disemiconductanes are separated by multiple trap distillation. If higher . _ __ .' /

-3(a)-- ~ -1 purity disilane is deisred, the disilane that has been trapped may be further purified by multiple traps to trap distillations, by low temperature fractionation, or by other procedures such as ~as chromotography, etc.
qlhe ~olysemiconductanes may also be prepared by reduction o~ semiconductor halides, such as disilicon hexachloride with hyd~lde such as J.ithium aluminum hydride.
Xn accordance with a still further aspect of the invention, ~he ~aseous phase can include one or more dopant gases. The do-pant gases are selected accordin~ to the conductivity type desired Eor the doped material. Suitable gases for doping include phos-phine and diborane, according to whether the conductivity type .is n or p.
In accordance with yet another aspect of the invention, the gaseous phase includes an inert gas carrier. Suitable inert gas carriers are argon, helium and hydrogen. The gas phase mater-ila is advantaqeously decomposed on a heated substrate and the decomposition temperature is that of the substrate.
In accordance with still another aspect of the invention, ~0 amorphous semiconductive devices are prepared by formin~ a body through the pyroly~ic decomposi~ion of one or more yaseous phase polysemiconductanes and providing contacts for the body. The body is desirably formed on a substrate in o~e or more separate layers which can include dopants accordin~ to the conductivity type desired. Auxiliary layers, such as metal to form an inter-face, and antireflection layers, can be included.
.

~0 ;~ . .

~76~

1 Description of the Drawings Other aspect of the invention will become apparent after conc.iderin~ several illustrative embodiments, taken in conjunc-tion with the drawings, in which:
S FIGU~E lA is a flow chart of the me-thod in accoidance with the inv~ntion for preparin~ amorphous semiconductors;
FlG~RE lB is an adaptation of the 10w chart of FIGURE lA
~howina the method of preparinc~ amorphous silicons;
FIGURE 2A is a schematic diagram of an illustrative arran~e-1~ m~nt Eor -the production of suitable semiconductanes;
~ 'IGURE 2B is a schematic diagram of an illustrative reac-tion chamber for preparin~ amorphous semiconductor in accordance with the invention;
FIGURE 2C is a graph of relative quantum efficiency a~ainst wavelenqth illustrating the difference between films produced in accordance with the invention and those produced by other tech-niques;.
FIGURE 3 is a schematic dia~ram of a photodetector prepared in accordance with the invention and associated circuitry;
FIGURE 4 is a schematic diagram of a heterojunction semi-conductor in accordance with the invention;
FIGURE 5 is a cross sectional view of a Schottky barrier photovoltaic device prepared in accordance with the invention;
FIGURE 6 is a cross sectional view of a P~I-N photovoltaic device prepared in accordance with the invention;
FIGURE 7 is a cross sectional view of a P-N photovoltaic device prepared in accordance with the invention; and FIGURE 8 is a cross sectional view of a of a further hetero-junction photovoltaic device prepared in accordance with the inven-tion.

;z%
1 Detailed Description of the Method With reference to the drawin~s, FIGURE lA sets forth a flowchart 100A for the general practice of the invention, while FIGUR~
IB provi.des a flow chart 100B for the particular preparation of amorphous silicons having the.special properties provided in accor:
~ance with the invention.
Semiconductanes for the practice of the invention are c~c~ from Group IV of the periodic Chart and thus can include ~rmE~ni~un or tin, dnd :Erom Group VI of the Periodic Chart and 1~ ~h~t~ can include selenium and tellurium. As noted below,.a par-~iaul~rly suitable semiconductor is silicon.
Once the polysemiconductanes are prepared, they are intro-duced into a reac-tion chamber illustrated in process block 102A.
Nhile in the chamber the polysemiconductanes are pyrolytically lS decomposed as represented in process block 103A. Pyrolytic decom-posi~ion involves the effect of heat at a suitable temperature on a gaseous material under consideration in converting the mater-ial.into an amorphous semiconductor on the su~face of the dsired substrate.
~0 It is to be noted that by contrast with the prior art, the polysemiconductanes produced by pyrolytic decomposition do not display the hydro~en defect characteristic commonly found in the production of amorphous semiconductors from monosemicon-ductanes. As a result it is not necessary to subject the result-2S ant product ~o hydrogen ion implantation or heavy doping.
In particular, the invention is suitable for the produc-tion of amorphous silicon in accordance with the flow chart 100B
of FIGURE lB. In this process the polysemiconductanes take the orm of polysilanes in accordance with process block 101B. Once produced, the polvsilanes are introduced into a reaction chamber pusuant to process block 102B. While in the chamber the poly-silanes are subjected to heating in accordance with process block 103B. This decomposes them into amorphous silicon. The material ~is prepared under homo~eneous, controllable conditions at tempera-tures substantially less than necessary to decompose monosilanes.
In addition, the amorphous silicon product resulting from the decomposition of polysilanes does not require subsequent treatment ~o compensate for hydro~en deficiencies. As in the case of semi-~76~2 1 conductors prepared in accordance with the flow char-t of FIGURE
lA, the amorphous silicon produced in accordance with FIGURE lB
is generally useful in a wide variety of semiconductor devices.
In the general case, amorphous semiconductors produced in accor-dance with the invention can be substituted for semiconductorsproduced in o-ther ways in a wide variety of semiconductive devices.
This is paxticular]y true of photovoltaic, photoconductive and cu~r~nt rectification devices.
In the case oE polysilanes, useful members include disi-10 la~es, trisilanes, -tetrasilanes, pentasilanes, and hexasilanes.
Isomeric members oE -the family are also suitable. The only limit to the class of useful members is governed by the stability of the polysilanes involved in the desired reaction. As the order of polysilanes-: increases there is a reduction in overall sta-bility but this usually can be compensated by suitable operatingconditions, Polysilanes that are decomposed pyrolytically may take the form of a mixture of polysilanes or be provided by a single polysilane alone. In addition, as long as there is at least one polysilane present, the gaseous mixture may include a monosilane.
This has the effect of reducing the gaseous phase partial pres-sure so that operating conditions have to be adjusted accordingly.
The aaseous mixture may further include dopants and inert ~aseous carriers.
A suitable operacing pressure is about one atmosphere, but lower pressures may be employed as low as down to the pressure o~ about one Torr. The pressure desirably lies in the range from about one Torr to about 100 Torr in order to limit the gaseous phase nucleation o~ particles.
A suitable operating temperature is in the range from about 300C. to about 500C. A particularly suitable range of tempera-ture is from about 350C. to about 450C. When the gas phase mixture is passed over a substrate that is heated to one of the foregoing temperatures, or when the temperature is varied in at least a part of one of the foregoing ranges, a high quality film of amorphous silicon results on the substrate. A particularly high ~uality film is produced when monosilane is removed at least -8- '~1 ~t7~ 2 1 in part from the gas phase mixture.
Very high order silanes, for example beyond hexasilane, have little effect on the production of the desired amorphous silicon ~ilm at standard temperatures and pressures because they have ne~ligible vapor pressures a-t room temperature. However, wh~n the hi~he~ order silanes are heated to produce a signiEicant v~por pr~9sure, Eor example above one millimeter of mercury, they a~ can provide hic~h quality amorphous silicon film.
An i.llustrative arrangement for preparing amorphous semi-conduc~ors in accorclance with the invention is illustratad in ~GURE 2. 'rhe arrangement is in two sections, 210 for the pro-~uction of suitable semiconductanes ànd 250 for the conversion oE thesemiconductanes to the desired amorphous semiconductors.
The arran~ement 200 is specifically ada~ted for the production of amorphous silicon by pyrolytic decomposition, but it will be understood that appropriate modifications may be made for the production of other amorphous semiconductors.
In the illustrative conversion section 2S0, reactantsl~l!
including the selected polysilanes, are applied to a reaction chamber 260 in the form of an envelope 261. The reaction chamber 260 illustrativel~ contains a substrate 262 upon which amorphous silicon is to be deposited. The chamber 261 is of a material which will not contaminate the substrate 262. Suitable materials include quartz, glass, and stainless steel.
The iliustrative reaction chamber 261 of FIGURE 2 has an inlet 263 and an outlet 264. The inlet provides entry for selected polysilanes or a monosilane-polysilane mixture through a control valve 251 which allows the gaseous mixture to be supplemented by one or more dopant gases from sources 252 and 255. Positioned below the inlet 263 is a support 265 for a holder 266 of the sub strate 262. The substrate holder 266 illustratively is a cart-ridge heater with a wound ceramic core and a ceramic binder en-compassing a resistive element 266r. The latter is energized by suitable wiring which extends to the support along the holder.
~ A stainless steel case isolates the ceramic core from the incom-ing gaseous stream represented by the arrow G. A manometer 270 is mounted on the chamber 2~1 to give an indication of the inter-~.~ ~7~2~2 g 1 nal pressure. The temperature of the substrate 2~2 is monitoxedby a guage (not shown) included in the wiring for the heater 266r.
The substrate 262 is typically of glass.
In order to make the desired amorphous silicon deposit, the g~seous mixture G is passed over the substrate, being drawn koward ~he outlet 264 by the effect of a vacuum pump (not shown).
'~he ~ub~trate 262 is operated at a temperature in the range from ~b~u~ 350C. to a~out 500C. resulting in pyrolytic decomposition ~ le~st a portion of the gaseous stream G. The decomposition 1~ ~omponen-ts are indicated by the arrows B shown in dashed line form. The balance of the gaseous mixture, in the form of an exhaust E is drawn through the outlet 264.
As an alterna-tive to the dynamic system described above, a static depostion system may also be used. In static deposition, the semiconductanes are introduced into the evacuated reactor throuyh a valve. The exhaust and inlet valves are then shut, causing a specified valume of gaseous mixture to be trapped in the chamber. Because of the heating effect of the coil, the trap-ped gas decomposes on both the wall of the reactor and the sub-~0 strate. The result is a desired deposit of amorphous silicon on the substrate. The static system has the advantage of econo-mizin~ on the volume and pumping of the gaseous medium.
The pressure within the chamber 261 is in the range from about one Torr to a~mospheric.
As a vacuum is reduced the deposition rate is correspond-ingly reduced. The critical pressure considered is the partial pressure of the silane mixture at the inlet. If the partial pres-sure is too high, namely over about 100 Torr, gas phase nuclea-tion of particles takes place, producing a "shower" that results in a mixture of amorphous and crystalline silicon.
The properties of the deposited amorphous silicon can be controlled according to the amount of inert buffer gas accompany-ing the reactants, for example argon. The quantity of argon does not influence the partial pressure of the reactants so that it can be introduced at any suitable level, depending upon the de-sired mofication in the properties.

~3L~7~Z%
--10-- , l In addition, the electrical properties of the deposited amorphous silicon are controlled according to the nature of the dopant gases from the sources 252 and 255. For p-type doping, the dopant gas 252 can be a boron hydride such as B2H6, BloHl~, etc., while for n--type doping the dopant gas 255 is a phosphorus hydr.Lde such as P113 or P2H4. Alternatively, the desired dopant hydrides can be formed in the gas mixture by incorporating magne-sium boride and/or Magnesium phosphide i.n the reactants. It will b~ ~pp~eciated that any of a wide variety of other dopants may l~ be used. In some cases it is desirable for the same dopant ~as to be selectively applied from two or more spearate sources, such as the sources 252 and 253.
It is to be noted that the major ~ortion of the gaseous mixture G desirably is of an inert carrier gas in order to inhi-bit spontaneous combustion of the reactants in the event of thefracture of the chamber 261. While the substrate 262 of FIGURE
2 has been chosen as glass for reasons of economy, metal sub-strates, particularly steel, may also be employed.
For depositing amorphous germanium, digermane (Ge2H6) can be used and the deposition performed at a temperature in the range of 150C. to 220~C. As an alternature to digermane, mono-germane (GeH4) can also be used, but the rate of deposition is somewhat slower than for digermane. Other higher germanes can also be used, such as trigermane 1Ge3H8).
The practice of the invention is further illustrated with repsect to the following nonlimiting examples, as summarized in Table I.
3~

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1 Detailed Description of Devices ~ norphous semiconductors produced in accordance wi~h the invention can be used ~o form a wide variety of semiconductor devices. It is important to note that the amorphous silicon ~ilms produced by the present invention are different ~rom the usu~l glow discharge and high vacuum deposited films. Films according to the present invention are not subjected to ion dam-aCJ~ .
As an ex~mple of -~he~different characteristics of the ~re~en~ ilms and those of the prior art, FIGURE 2C compares ~he 5pectral response oE a typical glow discharge film with a ~ilm according to the present invention. In the curves of FIGURE
2C relative photovoltaic quantum efficiency is plotted against the wavelength of excitation radiation.
It is apparent from FIGURE 2C that by contract with glow discharge films, amorphous silicon films produced by the invention have a spectral response with higher realtive quantum efficiences and extend to larger wavelengths.
In addition, by comparison with high vacuum deposited films, those of the invention achieve significantly higher photo-conductivity, e.g. 10 6 to 10 4 ohms per centimeter (bhmq-cm ), as opposed to a range of 10 9 to 10 7 ohms-cm 1 for the high vacuum deposited films of U.S. patent 4,237,150 and 4,237,151.
One such device is the photodetector 300 of FIGURE 3. A
2S glass substrate 301 with an amorphous silicon deposit 302 is provided with aluminum contacts 303 and 304 and connected in circuit through a~battery 305 to a load 306. When incident light 307 falls on the amorphous silicon layer 302, it creats electron-hole pairs which are acted upon by the voltage of the battery 305 and produce a corresponding voltaqe increase in the load 306 accordin~ to the number of hole-electron pairs created.
Another device which makes use of amorphous silicon pro-duced in accordance with the invention is the heterojunction semiconductor device 400 of F~GURE 4. This device ~as diferent junctions Jl and J2 between p-type material 403 and intrinsic (i type) material 402 on the one hand, and between the intrinsic ma~terial 402 and the n-type semiconductor material 401 on the 13- ~7~Z~
1 other hand. The bandgaps of the p- and n-type materials 403 and 401 are different than for the intrinsic material 402. Both the intrinsic material 402 and the n-type material 403 are formed by chemical vapor deposition. In the case of the n-type material a-dopant such as phosphine is included. The p-type material 403 is also made by chemical deposition with a suitable dopant, such ~s boro~. In addition, the p-type materials gaseous stream in-Clu~Q~ meth~ne or acetylene in order to produce a silicon carbon ~ y (cl-(si,C)~
The resultant device 400 is a P-I-N semiconductor control-led by a grid contact 404 and deposited desirably upon a substrate.
~05. The device ~00 has the advantage over other similar~devices of permitting a greater amount of light to enter the intrinsic layer 402 by virtue of the amorphous silicon carbon alloy layer ~01, w~ich has a higher bandgap than the intrinsic layer 402.
In general, desirable semiconductive devices can be produced by substituting semiconductor layers prepared in accordance with the invention for semiconductor layers prepared by other techni-ques. ~or example, the various devices of illustrative U.S.
patent 4,06~,521 can be adapted in accordance with the present invention by substitutins pyrolytically~decomposed polysemicon-ductanes for the glow discharge amorphous silicon of the prior art.
The average density of localized states of the CVD amorphous silicon prepared from SinH2n+2 (n C 2-6) is believed to be or deduced to be from device ~erformance to be in the 10 /cm to 1017/cm3 range, and much lower than than of amorphous silicon fabricated b~ other means, i.e., for sput~ered or evaporated amorphous silicon. The average density of localized states is 1019/cm3 or greater. This low density of defects states leads to longer depletion widths and low recombination, thus producing good quality devices.
~f the surface resistivi-ty of the electrode 628 at the first doped layer is on the order of about 10 ohms/~ or more, it~is preferable to also have a grid contact like that described in FIGURE 5, on the first doped layer 613 for collection of the current generated in the body 614.

6~;2 1 An electrical contact 627 is on the surface o~ the second doped layer 615 opposite the transmissive electrode 628. The electrical contact 627 is of a material having reasonable elec-trical conductivity, such as aluminum, chromium, tantalum, anti-mony, niobium, or stainless steel.
As previously described in FIGURE 5, the absorption co-~f e.lc.~nt of the amorphous silicon Eilms prepared by chemical v~po~ ~position ~ SinH2n~2, where n equals 2 throu~h 6, is 1L~U~r than that Oe a single crystal silicon in the vi~ible range.
~'o~ ~h:is reason only a thin layer of amorphous silicon is needed E~r suf~icient solar radiation absorption. Typically the intrin-sic region of amorphous silicon is about one micron or less in thickness, while the ~irst and second doped layers 613 and 615 are each a few hundred Angstroms in thickness.
Referring to FIGURE 7, a semiconductor device 710 is a photovoltaic device, and more particularly a P-N junction solar cell. The photovoltaic device 710 includes a region 711 of amorphous silicon fabricated by the polysilane chemical vapor deposition method in accordance with the invention, with appropri~
ate doping gases. The region 711 comprises a first doped layer 752 o one conductivity type in contact with a second doped layer 75~ of an opposite conductivity with a P N junction 756 inbetween.
For purposes of discussion, it is assumed that the first doped layer 752 is of p-type conductivi-ty and the second doped layers is of n-type conductivity. Both the first and second doped layers 752 and 754 are the body 714 of the photovoltaic device 710.
The re~ion 711 inc:Ludes a third doped layer 758 on the surface of the second doped layer 754 but has a higher doping concentra-tion than the second doped layer 754. Thus the third do~ed layer 758 is of n-type conductivity. The third doped layer 758 assists in making ohmic contact in the body 714.
Although the embodiments described in FIGURES 5, 6 and 7 have been described as solar cells, it is anticipated by the present invention that these embodiments can also be utilized as~hi~h frequency photodetectors, i.e., devices which respond to radiant energy.
.

t~6~

1 Referring to F~GURE 8, ~ further embodiment of the semi-conductor device of -the present invention is designa-ted 810.
The semiconductor device 810 ls described as a heterojunction photovoltaic device for the purpose of explaininq the eighth embodiment of the present invention. The photovoltaic device ~10 includes a body 81~ of amorphous silicon fabricated by pyroly~ic decomposition. rrhe body 814 of amorphous silicon has ~he same characteristics as the body 402 of the fourth embodi-ment oE the present invention.
The fabrica~ion of the photovoltaic device ~10 is similar to that of the embodiments previously described. The semiconduc-tor 860 may function as the support in the conversion apparatus (as previously described in FIGURES 4 and 5) for the deposition of the body 814 of amorphous silicon. ~s an alternative method of fabrication, the body 814 can be formed by pyrolysis of di-silane and ~he semiconductor region 860 can then be sputtered onto the body 814. Next the first electrode 866, the intermediate layer 868 and the second electrod 870 are formed by masking and evaporation techniques well known in the art.
While the further embodiment of the present invention has been described as a photovoltaic device, it is obvious to those skilled in the semiconductor art that such a device can also function as a recitifier. If the device 430 was cperated as a rectifier, there would be no need for the semiconductor region 860 being o~ a material which is semitransparent or trans-parent to solar radiation. In add~ion, there would also be no need for an incident surface 864 which is capable of solar radia-tion impinging thereon.
While various aspects of the invention have been set forth by the drawings and specification, it is to be understood that the foregoing detailed descriptions are for illustration only and that various changes, as well as the substitution of equiva-lent constituents for those shown and described may be made with-out departing from the spirit and scope of the invention as set forth in the appended claims.

~ ~7~%

Nomenclature of Devices (Figs. 3-8) 1 ~00 Photodetector 301-~lass su~strate 302-amorphous silicon deposit 303-aluminum contact 304-aluminum contact 305-battery 306-cord 307-inc.idcrlt ll~ht ~00 Il~r~juncti~n Device ~01-n-~ype amorphous silicon carbon alloy 402~intrinsi.c material 403-p type material 404-arid contact 405-substrate 500 Schottky Barrier Photovol-taic Device 512 substrate 514-amorphous silicon bod~
516-metallic layer 518-interface 520-antireflection layer 522-incident surface 524-grid electrode 526-solar radiation 610 P-I-N Photovoltaic Device 613-first doped layer 614-amorphous silicon body 615-sec.ond doped layer 617-intrinsic layer 626-solar radiation 627-electrical contact 628-transmissive electrode 629-incident surface 710 P-N Photovoltaic Device 711-amorphous silicon 714-body oi device 726-solar radiation 728-transmissive electrode 729 incident surface 752-first doped layer 754-second doped layer 756-P N junction 757-electrical contact 758 third doped layer ~10 ~eterojunction Photovoltaic Device 814-amorphous silicon 826-solar radiation 854-incident surface 860 semiconductor junction 862-heterojunction 866-first electrode 868-intermediate layer 870 second electrode

Claims (14)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. The method of preparing an amorphous semiconductor which comprises pyrolytically decomposing at least one gaseous phase polysemiconductane at a temperature below about 500°C. and a pressure above 10-4 Torr.
2. The method of claim 1 wherein the pyrolytic decomposition takes place at a temperature in the range from about 300°C. to about 500°C.
3. The method of claim 2 wherein said temperature is in the range from about 350°C. to above 450°C.
4. The method of claim 1 wherein the pyrolytic decomposition takes place at a partial pressure of greater than about one micron of mercury and less than about one atmosphere.
5. The method of claim 4 wherein said pressure lies in the range from about one Torr.
6. The method of claim 5 wherein said pressure lies in the range from about one Torr to about 100 Torr, thereby to limit gas phase nucleation of particles.
7. The method of claim 1 wherein said polysemiconductanes are selected from the class ranging from disilanes to and including hexasilanes represented by the formula SinH2n+2, where n ranges from two to six.
8. The method of claim 1 wherein said gaseous phase includes one or more dopant gases.
9. The method of claim 8 wherein said dopant gases are selected from the class including phosphorus and boron containing gases.
10. The method of claim 9 wherein said phosphorus containing gas is phosphine (PH3) and said boron containing gas is diborane (B2H6).
11. The method of claim 1 wherein said gaseous phase includes an inert gas carrier.
12. The method of claim 11 wherein said inert gas carrier is argon or helium
13. The method of claim 1 wherein one or more of said polysilanes are decomposed on a heated substrate.
14. The method of claim 13 wherein the decomposition takes place at the temperature of the substrate.
CA000398016A 1981-03-11 1982-03-10 Semiconductor device having a body of amorphous silicon Expired CA1187622A (en)

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US4637895A (en) * 1985-04-01 1987-01-20 Energy Conversion Devices, Inc. Gas mixtures for the vapor deposition of semiconductor material
US4696834A (en) * 1986-02-28 1987-09-29 Dow Corning Corporation Silicon-containing coatings and a method for their preparation
US4762808A (en) * 1987-06-22 1988-08-09 Dow Corning Corporation Method of forming semiconducting amorphous silicon films from the thermal decomposition of fluorohydridodisilanes
US4923719A (en) * 1988-08-22 1990-05-08 Allied-Signal Inc. Method of coating silicon carbide fibers
US5424097A (en) * 1993-09-30 1995-06-13 Specialty Coating Systems, Inc. Continuous vapor deposition apparatus
EP1021389A1 (en) * 1995-10-18 2000-07-26 Specialty Coating Systems, Inc. Processes for the preparation of octafluoro- 2,2]paracyclophane
JP3808102B2 (en) * 1995-10-27 2006-08-09 スペシャルティ、コーティング、システムズ、インコーポレイテッド Deposition method of Parylene AF4 on a semiconductor wafer
US5806319A (en) * 1997-03-13 1998-09-15 Wary; John Method and apparatus for cryogenically cooling a deposition chamber
US6051276A (en) * 1997-03-14 2000-04-18 Alpha Metals, Inc. Internally heated pyrolysis zone
US5841005A (en) * 1997-03-14 1998-11-24 Dolbier, Jr.; William R. Parylene AF4 synthesis
US7943721B2 (en) 2005-10-05 2011-05-17 Kovio, Inc. Linear and cross-linked high molecular weight polysilanes, polygermanes, and copolymers thereof, compositions containing the same, and methods of making and using such compounds and compositions
US7799376B2 (en) * 2007-07-27 2010-09-21 Dalsa Semiconductor Inc. Method of controlling film stress in MEMS devices

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US4237150A (en) * 1979-04-18 1980-12-02 The United States Of America As Represented By The United States Department Of Energy Method of producing hydrogenated amorphous silicon film
US4237151A (en) * 1979-06-26 1980-12-02 The United States Of America As Represented By The United States Department Of Energy Thermal decomposition of silane to form hydrogenated amorphous Si film
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