EP0075007A1 - Amorphous semiconductor method and devices - Google Patents

Amorphous semiconductor method and devices

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Publication number
EP0075007A1
EP0075007A1 EP82901328A EP82901328A EP0075007A1 EP 0075007 A1 EP0075007 A1 EP 0075007A1 EP 82901328 A EP82901328 A EP 82901328A EP 82901328 A EP82901328 A EP 82901328A EP 0075007 A1 EP0075007 A1 EP 0075007A1
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EP
European Patent Office
Prior art keywords
doped
layer
substrate
polysilanes
semitransparent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP82901328A
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German (de)
French (fr)
Other versions
EP0075007A4 (en
Inventor
Allan G. Macdiarmid
Zoltan J. Kiss
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Chronar Corp
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Chronar Corp
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Publication of EP0075007A1 publication Critical patent/EP0075007A1/en
Publication of EP0075007A4 publication Critical patent/EP0075007A4/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • C—CHEMISTRY; METALLURGY
    • C01—INORGANIC CHEMISTRY
    • C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
    • C01B33/00—Silicon; Compounds thereof
    • C01B33/02—Silicon
    • C01B33/021—Preparation
    • C01B33/027—Preparation by decomposition or reduction of gaseous or vaporised silicon compounds other than silica or silica-containing material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02425—Conductive materials, e.g. metallic silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • This invention relates to the production of amorphous semiconductors, particularly for use in semiconductor devices. This is a continuation-in-part of U.S. Serial No. 242,707, filed March 11, 1981.
  • Amorphous semiconductors are useful in a wide variety of devices. Examples include memories, field effect and thin film devices, displays and luminescent devices. Amorphous semiconductors are particularly useful for photovoltaic devices which provide a voltage when subjected to radiation, or radiate when electrically energized. Unfortunately, photovoltaic devices are not presently competitive with conventional sources of electrical energy. This has been caused primarily by the cost of manufacturing suitable semiconductive materials. Initially, expensive and relatively thick single crystal material was required. More recently, amorphous material with suitable photosensitivity has been fabricated by glow discharge in a gaseous atmosphere. Amorphous material in the form of hydrogenated silicon prepared by glow discharge has proved to be particularly suitable. Illustrations are found in U.S. patents 4,064,521; 4,142,195; 4,163,677; 4,196,438; 4,200,473 and 4,162,505.
  • amorphous silicons prepared by sputtering and vacuum evaporation of monosilanes have exhibited less photoresponse than that provided by glow discharge materials.
  • Other attempts have been made to produce amorphous silicon from various fluorosilanes as described, for example, in U.S. patents 3,120,451 and 4,125,643.
  • the photoresponsive properties of the resultant materials have been similar to those associated with hydrogenated amorphous silicon produced by glow discharge, the costs of the process are still considerable.
  • Another method of preparing amorphous silicon is by the decomposition of silanes at a comparatively high temperature (1400oC to 1600°c.) in a high vacuum reactor required to be held at pressures below 10 -4 Torr.
  • Another object of the invention is to provide for the production of semiconductive material with suitable photosensitivity with less cost and complexity than for single cyrstal materials
  • a further object of the invention is to achieve amorphous silicon material at less cost and with less complexity than for glow discharge, sputtering and vacuum evaporation techniques.
  • the invention provides a method of preparing an amorphous semiconductor with suitable photosensitivity by the pyrolytic decomposition of one or more gaseous phase polysemiconductanes at a temperature below about 500°C.
  • This technique distinguishes from the prior art pyrolytic decomposition of silanes and fluorsilanes in which significantly lower photoconductivity and inferior photovoltaic properties have resuited.
  • This procedure lends itself to continuous processing as opposed to batch processing, and eliminates the costly and complex equipment associated with the production of single crystal and amorphous silicon by glow discharge, sputtering and vacuum evaporation.
  • the decomposition takes place at a temperature in the range about about 300°C. to 500°C. and is preferably in the range from 350°C. to 450°C.
  • the decomposition takes place at a partial pressure of polysilane less than about one atmosphere and above about one micron of mercury, and is preferably above one Torr.
  • the pressure is desirably in the range from about one Torr to about 100 Torr in order to limit gas phase nucleation of particles during pyrolytic decomposition.
  • the polysemiconductances are selected from the class ranging from disemiconductanes to and including hexasemiconductanes, re-presented by the formula Sc n H 2n + 2 , where "Sc” refers to a semiconductor such as silicon or germanium, and n ranges from two to six.
  • the polysemiconductanes are desirably obtained from the reaction product of a semiconductide, such as magnesium suicide (Mg 2 Si) with an aqueous acid such as phosphorus acid (H 3 PO 4 ), aqueous strong sulfuric acid (H 2 SO 4 ) hydrogen fluoride (HF), and hydrogen chloride (HCl).
  • the semiconductanes of an order higher than disemiconductanes are separated by multiple trap distillation. If higher purity disilane is desired, the disilane that has been trapped may be further purified by multiple traps to trap distillations, by lower temperature, by low temperature fractionation, or by other procedures such as gas chromotography, etc.
  • the polysemiconductanes may also be prepared by reduction of semiconductor halides, such as disilicon hexachloride with a hydride such as lithium aluminum hydride.
  • the gaseous phase includes an inert gas carrier. Suitable inert gas carriers are argon, helium and hydrogen.
  • the gas phase material is advantageously decomposed on a heated substrate and the decomposition temperature is that of the substrate.
  • amorphous semiconductive devices are prepared by forming a body through the pyrolytic decomposition of one or more gaseous phase polysemiconductanes and providing contacts for the body.
  • the body is desirably formed on a substrate in one or more separate layers which can include dopants according to the conductivity type desired.
  • Auxiliary layers, such as metal to form an interface, and antireflection layers, can be included.
  • FIGURE 1A is a flow chart of the method in accordance with the invention for preparing amorphous semiconductors
  • FIGURE IB is an adaptation of the flow chart of FIGURE 1A showing the method of preparing amorphous silicons
  • FIGURE 2A is a schematic diagram of an illustrative arrangement for the production of suitable semiconductanes
  • FIGURE 2B is a schematic diagram of an illustrative reaction chamber for preparing amorphous semiconductors in accordance with the invention:
  • FIGURE 2C is a graph of relative quantum efficiency against wavelength illustrating the difference between film produced i in accordance with the invention and those produced by other techniques;
  • FIGURE 3 is a schematic diagram of a photodetector prepared in accordance with the invention and associated circuitry;
  • FIGURE 4 is a schematic diagram of a heterojunction semiconductor in accordance with the invention.
  • FIGURE 5 is a cross sectional view of a Schottky barrier photovoltaic device prepared in accordance with the invention.
  • FIGURE 6 is a cross sectional view of a P-I-N photovoltaic device prepared in accordance with the invention
  • FIGURE 7 is a cross sectional view of a P-N photovoltaic device prepared in accordance with the invention.
  • FIGURE 8 is a cross sectional view of a further heterojunction photovoltaic device prepared in accordance with the invention. Detailed Description of the Method
  • FIGURE 1A sets forth a flow charge 100A for the general practice of the invention
  • FIGURE IB provides a flow chart 100B for the particular preparation of amorphous silicons having the special properties in accordance with the invention.
  • Semiconductanes for the practice of the invention are selected from Group IV of the Periodic Chart and thus can include germanium or tin, and from Group VI of the Periodic Chart and thus can include selenium and tellurium.
  • a particularly suitable semiconductor is silicon.
  • the polysemiconductanes are introduced into a reaction chamber illustrated by process block 102A. While in the chamber the polysemiconductanes are pyrolytically decomposed as represented in process block 103A. Pyrolytic decomposition involves the effect of heat at a suitable temperature on a gaseous material under consideration in converting the material into an amorphous semiconductor on the surface of the desired substrate. It is to be noted that by contrast with the prior art the polysemiconductanes produced by pyrolytic decomposition do not display the hydrogen defect characteristic commonly found in the production of amorphous semiconductors from monosemiconductanes. As a result it is not necessary to subject the resulting product to hydrogen ion implantation or heavy doping.
  • the invention is suitable for the production of amorphous silicon in accordance with the flow chart 100B of FIGURE 1B.
  • the polysemiconductanes take the form of polysilanes in accordance with process block 101B.
  • the polysilanes are introduced into a reaction chamber pursuant to process block 102B. While in the chamber the polysilanes are subjected to heating in accordance with process block 103B. This decomposes them into amorphous silicon.
  • the material is prepared under homogenous, controlled conditions at temperatures substantially less than necessary to decompose monosilanes.
  • the amorphous silicon product resulting from the decompositon of polysilanes does not require subsequent treatment to compensate for hydrogen deficiencies.
  • the amorphous silicon produced in accordance with FIGURE 1B is generally useful in a wide variety of semiconductor devices.
  • amorphous semiconductors produced in accordance with the invention can be substituted for semiconductors produced in other ways in a wide variety of semiconductor devices. This is particularly true of photovoltaic, photoconductive and current rectification devices.
  • useful members include disilanes, trisilanes, tetrasilanes pentasilanes and hexasilanes . Isomeric members of the family are also suitable .
  • the only limit on the class of useful members is governed by the stability of the polysilanes involved in the desired reaction. As the order of polysilanes increases there is a reduction in overall stability but this usually can be compensated by suitable operating condictions.
  • Polysilanes that are decomposed pyrolytically may take the form of a mixture of polysilanes or be provided by a single polysilane alone.
  • the gaseous mixture may include a monosilane. This has the effect of reducing the the gaseous phase partial pressure so that operating conditions have to be adjusted accordingly.
  • the gaseous mixture may further include dopants and inert gaseous carriers.
  • a suitable operating pressure is about one atmosphere, but lower pressures may be employed as low as down to the pressure of about one Torr.
  • the pressure desirably lies in the range from about one Torr to about 100 Torr in order in part from the gas phase mixture.
  • Very high order silanes for example beyond hexasilane have little effect on the production of the desired amorphous silicon film at standard temperatures and pressures because they have negligible vapor pressures at room temperature.
  • the higher order silanes when heated to produce a significant vapor pressure, for example above one millimeter of mercury, they also can provide high quality amorphous silicon film.
  • FIGURES 2A and 2B An illustrative arrangement for preparing amorphous semiconductors in accordance with the invention is illustrated in FIGURES 2A and 2B.
  • the arrangement is in two sections, 210 for the production of suitable semiconductanes and 250 for the conversation of the semiconductanes to the desired amorphous semiconductors.
  • the arrangement 210 is specifically adapted for the production of amorphous silicon by pyrolytic decomposition, but it will be understood that appropriate modifications may be made for the production of other amorphous semiconductors.
  • the arrangement 210 includes a reaction chamber 211, an acid source 212, a suicide source 213 and a series of traps 214,215.
  • reactans including the selected polysilanes, are applied to a reaction chamber 260 in the form of an envelope 261.
  • the reaction chamber 260 illustratively contains a substrate 262 upon which amorphous silicon is to be deposited.
  • the chamber 261 is of a material which will not contaminate the substrate 262. Suitable materials include quartz, glass and stainless steel.
  • the illustrative reaction chamber 261 of FIGURE 2 has an inlet 263 and an outlet 264.
  • the inlet provides entry for selected polysilanes or a monosilane-polysilane mixture through a control valve 251 which allows the gaseous mixture to be supplemented by one or more dopant gases from sources 252 and 255.
  • Postioned below the inlet 263 is a support 256 for a holder 266 of the substrate 262.
  • the substrate holder 266 illustrative is a cratxidge heater with a wound ceramic core and a ceramic binder encompassing a resistive element 266r. The latter is energized by suitable wiring which extends to the support along the holder.
  • a stainless steel case isolates the ceramic core from the incoming gaseous stream represented by the arrow G.
  • a manometer 270 is mounted on the chamber 261 to give an indication of the inter 262. Suitable materials include quartz, glass, and stainless steel.
  • the illustrative reaction chamber 261 of FIGURE 2 has an inlet 263 and an outlet 264.
  • the inlet provides entry for selected polysilanes or a monosilane-polysilane mixture through a control valve 251 which allows the gaseous mixture to be supplemented by one or more dopant gases from sources 253 and 255.
  • the substrate holder 266 illustratively is a cartridge heater with a wound ceramic core and a ceramic binder encompassing a resistive element 2664. The latter is energized by suitable wiring which extends to the support along the holder.
  • a stainless steel case isolates the ceramic core from the incoming gaseous stream represented by the arrow G.
  • a manometer 270 is mounted on the chamber 261 to give an indication of the internal pressure.
  • the temperature of the substrate 262 is monitored by a guage (not shown) included in the wiring for the heater 266r.
  • the substrate 262 is typically of glass. in order to make the desired amorphous silicon deposit the gaseous mixture G is passed over the substrate, being drawn toward the outlet 264 by the effect of a vacuum pump (not shown).
  • the substrate 262 is operated at a temperature in the range from about 350oC. to about 500°C. resulting in pyrolytic decomposition of at least a portion of the gaseous stream G.
  • the decomposition cospents are indicated by the arrows B shown in dashed line form.
  • the balance of the gaseous mixture, in the form of an exhaust E, is drawn through the outlet 264.
  • a static deposition system nay also be used. In static deposition, the semiconductanes are introduced into the evacuated reactor through a valve. The exhaust and inlet valves are then shut, causing a specified volume of gaseous mixture to be trapped in the chamber. Because of In addition, the electrical properties of the deposited amorphous silicon are controlled according to the nature of the dopant gases from the sources 252 and 255.
  • the dopant gas 252 can be a boron hydride such as B 2 H 6 , B 10 H 14 , etc.
  • the dopant gas 255 is a phosphorus hydride such as PH 3 or P 2 % 4
  • the desired dopant hydrides can be formed in the gas mixture by incorporating magnesium boride and/or magnesium phosphide in the reactants. It will be appreciated that any of a wide variety of other dopants may be used. In some cases it is desirable for the same dopant gas to be selectively applied from two or more spearate sources, such as the sources 252 and 253.
  • the major portion of the gaseous mixture G desirably is of an inert carrier gas in order to inhibit spontaneous combustion of the reactants in the event of the fracture of the chamber 261.
  • the substrate 262 of FIGURE 2 has been chosen as glass for reasons of economy, metal substrates, particularly steel, may also be employed.
  • digermane For depositing amorphous germanium, digermane (Ge 2 H 6 ) can be used and the deposition performed at a temperature in the range of 150°C. to 220°C. As an alternature to digermane, monogermane (GeH 4 ) can also be used, but the rate of deposition is somewhat slower than for digermane. Other higher germanes can also be used, such as triqermane (Ge 3 H 8 ).
  • Table I summarized in Table I, in which the gases are high order silanes as prepared as heretofor described.
  • gaseous mixture G desirably is of an inert carrier gas in order to inhibit spontaneous combustion of the reactants in the event of the fracture of the chamber 261. While the substrate 262 of FIGURE 2 has been chosen as glass for reasons of economy, metal substrates, particularly steel, may also be employed.
  • digermane For depositing amorphous germanium, digermane (Ge 2 H 6 ) can be used and the deposition performed at a temperature in the range of 150°C. to 220oC.
  • monogermane As an alternative to digermane, monogermane (GeH 4 ) can also be used, but the rate of deposition is somewhat slower than with digermane.
  • Other higher germanes can also be used, such as tigermane (Ge 3 H 8 ).
  • Amorphous semiconductors produced in accordance with the invention can be used to form a wide variety of semiconductor devices. It is important to note that the amorphous silicon films produced by the present invention are different from the usual glow discharge and high vacuum deposited films. Films according to the present invention are not subjected to ion damage.
  • FIGURE 2C compares the spectral response of a typical glow discharge film with a film according to the present invention.
  • relative photovoltaic quantum efficiency is plotted against the wavelength of excitation radiation. It is apparent from FIGURE 2C that by contract with glow discharge films, amorphous silicon films produced by the invention have a spectral response with higher relative quantum efficiences and extend to larger wavelengths.
  • those of the invention achieve significantly higher photoconductivity, e.g. 10 -6 to 10 -4 ohms per centimeter (ohms-cm -1 ) as opposed to a range of 10 -9 to 10 -7 ohms-cm -1 for the high vacuum deposited films of U.S. patent 4,237,150 and 4,237,151.
  • a glass substrate 301 with an amorphous silicon deposit 302 is provided with aluminum contacts 303 and 304 and connected in circuit through a battery 305 to a load 306.
  • incident light 307 falls on the amorphous silicon layer 302, it creats electronhole pairs which are acted upon by the voltage of the battery 305 and produce a corresponding voltage increase in the load 306 according to the number of hole-electron pairs created.
  • heterojunction semiconductor device 400 of FIGURE 4 Another device which makes use of amorphous silicon produced in accordance with the invention is the heterojunction semiconductor device 400 of FIGURE 4. This device has differen junctions J1 and J2 between p-type material 403 and intrinsic
  • the bandgaps of the p- and n-type materials 403 and 401 are different than for the intrinsic material 402.
  • Both the intrinsic material 402 and the n-type material 403 are forme by chemical vapor deposition.
  • dopant such as phosphine is included.
  • the p-type material 403 is also made by chemical deposition with a suitable dopant, such as boron.
  • the resultant device 400 is a P-I-N semiconductor device controlled by a grid contact 404 and deposited desirably upon a substrate 405.
  • the device 400 has the advantage over other similar devices of permitting a greater amount of light to enter the intrinsic layer 402 by virtue of the amorphous silicon carbon alloy layer 401, which has a higher bandgap than the intrinsic layer 402.
  • desirable semiconductive devices can be produced by substituting semiconductor layers prepared in accordance with the invention for semiconductor layers prepared by other techniques.
  • the various devices of illustrative U.S. patent 4,064,521 can be adapted in accordance with the present invention by substituting pyrolytically decomposed polysemiconductanes for the glow discharge amorphous silicon of the prior art.
  • the average density of localized states is 10 19 /cm 3 or greater. This low density or defects states leads to longer depletion widths and low recombination, thus producing good quality devices.
  • One such device is the Schottky barrier solar cell 500 of FIGURE 5 formed by a substrate 512 with a body 514 of amorphous silicon.
  • the device 500 also includes a metallic layer 516, an interface 518, an antireflective layer 520, an incident surface 522 for solar radiation 526 and a grid electrode 524. If the surface resistivity of the electrode 628 at the first doped layer is on the order of about 10 ohms/ or more, it is preferable to also have a gride contact like that described in FIGURE 5, on the first doped layer 613 for collection of the current generated in the body 614.
  • An electrical contact 627 is on the surface of the second doped layer 615 opposite the transmissive electrode 268.
  • the electrical contact 627 is of a material having reasonable electrical conductivity, such as aluminum, chromium, tantalum, antimony, niobium or stainless steel.
  • a semiconductor device 710 is a photovoltaic device, and more particularly a P-N junction solar cell.
  • the photovoltaic device 710 includes a region 711 of amorphous silicon fabricated by the polysilane chemical vapor deposition method in accordance with the invention, with appropriate doping gases.
  • the region 711 comprises a first doped layer 752 of one conductivity in contact with a second doped layer 754 of an opposite conductivity with a P-N junction 756 inbetween.
  • the first coped layer 752 is of p-type material and the second doped layer is of n ⁇ type conductivity.
  • Both the first and second doped layers 752 and 754 are the body 714 of the photovoltaic device 710.
  • the region 711 includes a third doped layer 758 on the surface of the second doped layer 754 which has a higher doping concentration than the second doped layer 754.
  • the third doped layer 758 is of n-type conductivity.
  • the third doped layer 758 assists in making ohmic contact in the body 714.
  • FIGURES 5, 6 and 7 have been described as solar cells, it is anticipated by the pre sent invention that these embodiments can also be utilized as high frequency photodetectors, i.e., devices which respond to radiant energy.
  • the semiconductor device 810 is described as a heterojunction photovoltaic device for the purpose of explaining the sixth embodiment of the present invention.
  • the photovoltaic device 810 includes a body 814 of amorphous silicon fabricated by pyrolytic decomposition.
  • the body 814 of amorphous silicon has the same characteristics as the body 402 of the second embodiment of the present invention.
  • the fabrication of the photovoltaic device 810 is similar to that of the embodiments previously described.
  • the semiconductor 860 may function as the support in the conversion apparatus (as previously described in FIGURES 4 and 5) for the deposition of the body 814 of amorphous silicon.
  • the body 814 can be formed by pyrolysis of disilan and the semiconductor region 860 can then be sputtered onto the body 814.
  • the first electrode 866, the intermediate layer 868 and the second electrode 870 are formed by masking and evaporation techniques well known in the art.
  • the sixth embodiment of the present invention has been described as a photovoltaic device, it is obvious to those skilled in the semiconductor art that such a device can also function as a rectifier. If the device 810 was operated as a recitfier, there would be no need for the semiconductor region 860 to beof a material which is semitransparent or transparent to solar radiation. In addition, there would also be no need for an incident surface 854 which is capable of solar radiation impinging thereon. While various aspects of the invention have been set forth by the drawings and specification, it is to be understood that the foregoing detailed descriptions are for illustration only and that various changes, as well as the substitution of equivalent constituents for those shown and described may be made without departing from the spirit and scope of the invention as set forth in the appended claims.
  • the device 430 can also function as a rectifier. If the device 430 was operated as a rectifier, there would be no need for the semiconductor region 860 being of a material which is semitransparent or transparent to solar radiation. In addition, there would also be no need for an incident surface 864 which is capable of solar radiation impinging thereon.

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Abstract

Des semi-conducteurs amorphes produits selon l'invention peuvent etre utilises pour former une grande variete de dispositifs semi-conducteurs, y compris des dispositifs photovoltaiques appropries a la conversion de l'energie solaire. Des films produits selon l'invention ont des rendements et des sensibilites quantiques relatives superieures s'etendant sur une plus grande gamme de longueurs d'ondes que les films de l'art anterieur. Selon le procede de l'invention, des agents de reaction, y compris les polysilanes selectionnes, sont appliques a une chambre de reaction (260) sous la forme d'une enveloppe (261), La chambre de reaction (260) contient un substrat (262) sur lequel du silicium amorphe doit se deposer. La chambre de reaction (261) possede une entree (263) et une sortie (264). L'entree permet a des polysilanes selectionnes ou a un melange de monosilanes-polysilanes d'entrer par l'intermediaire d'une valve de commande (251) qui permet au melange gazeux d'etre complete par un ou plusieurs gaz dopants provenant de sources (252 et 255). Situe sous l'entree (263) se trouve un support (265) pour un porte-substrat (266) du substrat (262). Le porte-substrat (266) est un rechauffeur a cartouche avec un noyau en ceramique enroule et un liant de ceramique entourant un element de resistance (266r). Un manometre (270) est monte sur la chambre (261) pour donner une indication de la pression interieure. La temperature du substrat (262) est controlee par une jauge (non illustree) incorporee dans le cablage du dispositif de chauffage (266r). Le substrat (262) est fabrique d'une maniere caracteristique en verre. Pour effectuer le depot desire de silicium amorphe, on fait passer le melange gazeux G sur le substrat, tire vers la sortie (264) par l'effet de la pompe a vide (non illustree). Le substrat (262) est a une temperature de l'ordre de 350 C environ a 500 C environ, ce qui se traduit par une decomposition pyrolitique d'au moins une partie du courant gazeux G. Les composants de decomposition sont indiques par lesAmorphous semiconductors produced according to the invention can be used to form a wide variety of semiconductor devices, including photovoltaic devices suitable for the conversion of solar energy. Films produced according to the invention have higher relative quantum yields and sensitivities extending over a greater range of wavelengths than films of the prior art. According to the method of the invention, reaction agents, including selected polysilanes, are applied to a reaction chamber (260) in the form of an envelope (261). The reaction chamber (260) contains a substrate (262) on which amorphous silicon is to be deposited. The reaction chamber (261) has an inlet (263) and an outlet (264). The inlet allows selected polysilanes or a mixture of monosilanes-polysilanes to enter via a control valve (251) which allows the gas mixture to be supplemented with one or more doping gases from sources (252 and 255). Located under the entrance (263) is a support (265) for a substrate holder (266) of the substrate (262). The substrate holder (266) is a cartridge heater with a wound ceramic core and a ceramic binder surrounding a resistance element (266r). A pressure gauge (270) is mounted on the chamber (261) to give an indication of the internal pressure. The temperature of the substrate (262) is controlled by a gauge (not shown) incorporated in the wiring of the heating device (266r). The substrate (262) is typically made of glass. To carry out the desired deposition of amorphous silicon, the gas mixture G is passed over the substrate, drawn towards the outlet (264) by the effect of the vacuum pump (not illustrated). The substrate (262) is at a temperature of the order of about 350 C to about 500 C, which results in a pyrolitic decomposition of at least part of the gas stream G. The decomposition components are indicated by the

Description

AMORPHOUS SEMICONDUCTOR METHOD AND DEVICES
Background of the Invention This invention relates to the production of amorphous semiconductors, particularly for use in semiconductor devices. This is a continuation-in-part of U.S. Serial No. 242,707, filed March 11, 1981.
Amorphous semiconductors are useful in a wide variety of devices. Examples include memories, field effect and thin film devices, displays and luminescent devices. Amorphous semiconductors are particularly useful for photovoltaic devices which provide a voltage when subjected to radiation, or radiate when electrically energized. Unfortunately, photovoltaic devices are not presently competitive with conventional sources of electrical energy. This has been caused primarily by the cost of manufacturing suitable semiconductive materials. Initially, expensive and relatively thick single crystal material was required. More recently, amorphous material with suitable photosensitivity has been fabricated by glow discharge in a gaseous atmosphere. Amorphous material in the form of hydrogenated silicon prepared by glow discharge has proved to be particularly suitable. Illustrations are found in U.S. patents 4,064,521; 4,142,195; 4,163,677; 4,196,438; 4,200,473 and 4,162,505.
Although the glow discharge manufacture of amorphous silicon is less costly than the production of single crystal material, cost considerations continue to limit the general employment of this technique.
One attempt to provide a lower cost material has involved the production of amorphous silicon by pyrolyticdecomposition of monosilane (SiH4). Other techniques employed with monosilanes have included sputtering and vacuum evaporation.
Unfortunately, the amorphous silicon produced by the pyrolytic decomposition of monosilane, commonly knownas "chemical vapor deposition" (CVD) has shown limited photovoltaid or photoconductive behavior. This has continued to regarded as a defect density in the material.
Similarly, amorphous silicons prepared by sputtering and vacuum evaporation of monosilanes have exhibited less photoresponse than that provided by glow discharge materials. Other attempts have been made to produce amorphous silicon from various fluorosilanes as described, for example, in U.S. patents 3,120,451 and 4,125,643. Here again, while the photoresponsive properties of the resultant materials have been similar to those associated with hydrogenated amorphous silicon produced by glow discharge, the costs of the process are still considerable. Another method of preparing amorphous silicon is by the decomposition of silanes at a comparatively high temperature (1400ºC to 1600°c.) in a high vacuum reactor required to be held at pressures below 10 -4 Torr. The resulting gas stream is then directed onto a substrate held at a lower temperature as set forth in U.S. patents 4,237,150 and 4,237,151. This technique is cumbersome, requires the use of high temperatures and high vacuums, and leads to films of rather low photoconductivities (10 -7 (Ω- cm) -1 or lower). Accordingly, it is an object of the invention to achieve the efficient and low cost production of semiconductive materia ls with suitable photoresponsive properties. A related object is to achieve suitable photovoltaic and photodetecting devices.
Another object of the invention is to provide for the production of semiconductive material with suitable photosensitivity with less cost and complexity than for single cyrstal materials A further object of the invention is to achieve amorphous silicon material at less cost and with less complexity than for glow discharge, sputtering and vacuum evaporation techniques.
Summary of the Invention
In accomplishing the foregoing and related objects, the invention provides a method of preparing an amorphous semiconductor with suitable photosensitivity by the pyrolytic decomposition of one or more gaseous phase polysemiconductanes at a temperature below about 500°C. This technique distinguishes from the prior art pyrolytic decomposition of silanes and fluorsilanes in which significantly lower photoconductivity and inferior photovoltaic properties have resuited. This procedure lends itself to continuous processing as opposed to batch processing, and eliminates the costly and complex equipment associated with the production of single crystal and amorphous silicon by glow discharge, sputtering and vacuum evaporation. In accordance with one aspect of the invention, the decomposition takes place at a temperature in the range about about 300°C. to 500°C. and is preferably in the range from 350°C. to 450°C.
In accordance with another aspect of the invention, the decomposition takes place at a partial pressure of polysilane less than about one atmosphere and above about one micron of mercury, and is preferably above one Torr. The pressure is desirably in the range from about one Torr to about 100 Torr in order to limit gas phase nucleation of particles during pyrolytic decomposition.
In accordance with a further aspect of the invention, the polysemiconductances are selected from the class ranging from disemiconductanes to and including hexasemiconductanes, re-presented by the formula ScnH2n + 2, where "Sc" refers to a semiconductor such as silicon or germanium, and n ranges from two to six. The polysemiconductanes are desirably obtained from the reaction product of a semiconductide, such as magnesium suicide (Mg2Si) with an aqueous acid such as phosphorus acid (H3PO4), aqueous strong sulfuric acid (H2SO4) hydrogen fluoride (HF), and hydrogen chloride (HCl). The semiconductanes of an order higher than disemiconductanes are separated by multiple trap distillation. If higher purity disilane is desired, the disilane that has been trapped may be further purified by multiple traps to trap distillations, by lower temperature, by low temperature fractionation, or by other procedures such as gas chromotography, etc.
The polysemiconductanes may also be prepared by reduction of semiconductor halides, such as disilicon hexachloride with a hydride such as lithium aluminum hydride. In accordance with a still further aspect of the invention, the gaseous phase includes an inert gas carrier. Suitable inert gas carriers are argon, helium and hydrogen. The gas phase material is advantageously decomposed on a heated substrate and the decomposition temperature is that of the substrate. In accordance with still another aspect of the invention, amorphous semiconductive devices are prepared by forming a body through the pyrolytic decomposition of one or more gaseous phase polysemiconductanes and providing contacts for the body. The body is desirably formed on a substrate in one or more separate layers which can include dopants according to the conductivity type desired. Auxiliary layers, such as metal to form an interface, and antireflection layers, can be included.
Description of the Drawings
Other aspect of the invention will become apparent after considering several illustrative embodiments, taken in conjunction with the drawings, in which: FIGURE 1A is a flow chart of the method in accordance with the invention for preparing amorphous semiconductors;
FIGURE IB is an adaptation of the flow chart of FIGURE 1A showing the method of preparing amorphous silicons;
FIGURE 2A is a schematic diagram of an illustrative arrangement for the production of suitable semiconductanes; FIGURE 2B is a schematic diagram of an illustrative reaction chamber for preparing amorphous semiconductors in accordance with the invention:
FIGURE 2C is a graph of relative quantum efficiency against wavelength illustrating the difference between film produced i in accordance with the invention and those produced by other techniques;
FIGURE 3 is a schematic diagram of a photodetector prepared in accordance with the invention and associated circuitry;
FIGURE 4 is a schematic diagram of a heterojunction semiconductor in accordance with the invention;
FIGURE 5 is a cross sectional view of a Schottky barrier photovoltaic device prepared in accordance with the invention;
FIGURE 6 is a cross sectional view of a P-I-N photovoltaic device prepared in accordance with the invention; FIGURE 7 is a cross sectional view of a P-N photovoltaic device prepared in accordance with the invention; and
FIGURE 8 is a cross sectional view of a further heterojunction photovoltaic device prepared in accordance with the invention. Detailed Description of the Method
With reference to the drawings, FIGURE 1A sets forth a flow charge 100A for the general practice of the invention, while FIGURE IB provides a flow chart 100B for the particular preparation of amorphous silicons having the special properties in accordance with the invention.
Semiconductanes for the practice of the invention are selected from Group IV of the Periodic Chart and thus can include germanium or tin, and from Group VI of the Periodic Chart and thus can include selenium and tellurium. As noted below, a particularly suitable semiconductor is silicon.
Once the polysemiconductanes are prepared, they are introduced into a reaction chamber illustrated by process block 102A. While in the chamber the polysemiconductanes are pyrolytically decomposed as represented in process block 103A. Pyrolytic decomposition involves the effect of heat at a suitable temperature on a gaseous material under consideration in converting the material into an amorphous semiconductor on the surface of the desired substrate. It is to be noted that by contrast with the prior art the polysemiconductanes produced by pyrolytic decomposition do not display the hydrogen defect characteristic commonly found in the production of amorphous semiconductors from monosemiconductanes. As a result it is not necessary to subject the resulting product to hydrogen ion implantation or heavy doping.
In particular, the invention is suitable for the production of amorphous silicon in accordance with the flow chart 100B of FIGURE 1B. In this process, the polysemiconductanes take the form of polysilanes in accordance with process block 101B. Once produced the polysilanes are introduced into a reaction chamber pursuant to process block 102B. While in the chamber the polysilanes are subjected to heating in accordance with process block 103B. This decomposes them into amorphous silicon. The material is prepared under homogenous, controlled conditions at temperatures substantially less than necessary to decompose monosilanes. In addition, the amorphous silicon product resulting from the decompositon of polysilanes does not require subsequent treatment to compensate for hydrogen deficiencies. As in the case of semiconductors prepared in accordance with the flow chart of FIGURE 1A, the amorphous silicon produced in accordance with FIGURE 1B is generally useful in a wide variety of semiconductor devices. In the general case, amorphous semiconductors produced in accordance with the invention can be substituted for semiconductors produced in other ways in a wide variety of semiconductor devices. This is particularly true of photovoltaic, photoconductive and current rectification devices. In the case of polysilanes, useful members include disilanes, trisilanes, tetrasilanes pentasilanes and hexasilanes . Isomeric members of the family are also suitable . The only limit on the class of useful members is governed by the stability of the polysilanes involved in the desired reaction. As the order of polysilanes increases there is a reduction in overall stability but this usually can be compensated by suitable operating condictions.
Polysilanes that are decomposed pyrolytically may take the form of a mixture of polysilanes or be provided by a single polysilane alone. In addition,- as long as there is at least one polysilane present, the gaseous mixture may include a monosilane. This has the effect of reducing the the gaseous phase partial pressure so that operating conditions have to be adjusted accordingly. The gaseous mixture may further include dopants and inert gaseous carriers.
A suitable operating pressure is about one atmosphere, but lower pressures may be employed as low as down to the pressure of about one Torr. The pressure desirably lies in the range from about one Torr to about 100 Torr in order in part from the gas phase mixture.
Very high order silanes, for example beyond hexasilane have little effect on the production of the desired amorphous silicon film at standard temperatures and pressures because they have negligible vapor pressures at room temperature. However, when the higher order silanes are heated to produce a significant vapor pressure, for example above one millimeter of mercury, they also can provide high quality amorphous silicon film.
An illustrative arrangement for preparing amorphous semiconductors in accordance with the invention is illustrated in FIGURES 2A and 2B. The arrangement is in two sections, 210 for the production of suitable semiconductanes and 250 for the conversation of the semiconductanes to the desired amorphous semiconductors.
The arrangement 210 is specifically adapted for the production of amorphous silicon by pyrolytic decomposition, but it will be understood that appropriate modifications may be made for the production of other amorphous semiconductors. The arrangement 210 includes a reaction chamber 211, an acid source 212, a suicide source 213 and a series of traps 214,215. In the illustrative conversion section 250, reactans, including the selected polysilanes, are applied to a reaction chamber 260 in the form of an envelope 261. The reaction chamber 260 illustratively contains a substrate 262 upon which amorphous silicon is to be deposited. The chamber 261 is of a material which will not contaminate the substrate 262. Suitable materials include quartz, glass and stainless steel.
The illustrative reaction chamber 261 of FIGURE 2 has an inlet 263 and an outlet 264. The inlet provides entry for selected polysilanes or a monosilane-polysilane mixture through a control valve 251 which allows the gaseous mixture to be supplemented by one or more dopant gases from sources 252 and 255. Postioned below the inlet 263 is a support 256 for a holder 266 of the substrate 262. The substrate holder 266 illustrative is a cratxidge heater with a wound ceramic core and a ceramic binder encompassing a resistive element 266r. The latter is energized by suitable wiring which extends to the support along the holder. A stainless steel case isolates the ceramic core from the incoming gaseous stream represented by the arrow G. A manometer 270 is mounted on the chamber 261 to give an indication of the inter 262. Suitable materials include quartz, glass, and stainless steel.
The illustrative reaction chamber 261 of FIGURE 2 has an inlet 263 and an outlet 264. The inlet provides entry for selected polysilanes or a monosilane-polysilane mixture through a control valve 251 which allows the gaseous mixture to be supplemented by one or more dopant gases from sources 253 and 255. Positioned below the inlet 263 is a support 265 for a holder 266 of the substrate 262. The substrate holder 266 illustratively is a cartridge heater with a wound ceramic core and a ceramic binder encompassing a resistive element 2664. The latter is energized by suitable wiring which extends to the support along the holder. A stainless steel case isolates the ceramic core from the incoming gaseous stream represented by the arrow G. A manometer 270 is mounted on the chamber 261 to give an indication of the internal pressure. The temperature of the substrate 262 is monitored by a guage (not shown) included in the wiring for the heater 266r. The substrate 262 is typically of glass. in order to make the desired amorphous silicon deposit the gaseous mixture G is passed over the substrate, being drawn toward the outlet 264 by the effect of a vacuum pump (not shown). The substrate 262 is operated at a temperature in the range from about 350ºC. to about 500°C. resulting in pyrolytic decomposition of at least a portion of the gaseous stream G. The decomposition cospents are indicated by the arrows B shown in dashed line form. The balance of the gaseous mixture, in the form of an exhaust E, is drawn through the outlet 264. As an alternative to the dynamic system described above, a static deposition system nay also be used. In static deposition, the semiconductanes are introduced into the evacuated reactor through a valve. The exhaust and inlet valves are then shut, causing a specified volume of gaseous mixture to be trapped in the chamber. Because of In addition, the electrical properties of the deposited amorphous silicon are controlled according to the nature of the dopant gases from the sources 252 and 255. For p-type doping, the dopant gas 252 can be a boron hydride such as B2H6, B10H14, etc., while for n-type doping the dopant gas 255 is a phosphorus hydride such as PH3 or P2%4. Alternatively, the desired dopant hydrides can be formed in the gas mixture by incorporating magnesium boride and/or magnesium phosphide in the reactants. It will be appreciated that any of a wide variety of other dopants may be used. In some cases it is desirable for the same dopant gas to be selectively applied from two or more spearate sources, such as the sources 252 and 253.
It is to be noted that the major portion of the gaseous mixture G desirably is of an inert carrier gas in order to inhibit spontaneous combustion of the reactants in the event of the fracture of the chamber 261. While the substrate 262 of FIGURE 2 has been chosen as glass for reasons of economy, metal substrates, particularly steel, may also be employed.
For depositing amorphous germanium, digermane (Ge2H6) can be used and the deposition performed at a temperature in the range of 150°C. to 220°C. As an alternature to digermane, monogermane (GeH4) can also be used, but the rate of deposition is somewhat slower than for digermane. Other higher germanes can also be used, such as triqermane (Ge3H8). The practice of the invention is further illustrated with respect to the following nonlimiting examples, as summarized in Table I, in which the gases are high order silanes as prepared as heretofor described.
gaseous mixture G desirably is of an inert carrier gas in order to inhibit spontaneous combustion of the reactants in the event of the fracture of the chamber 261. While the substrate 262 of FIGURE 2 has been chosen as glass for reasons of economy, metal substrates, particularly steel, may also be employed.
For depositing amorphous germanium, digermane (Ge2H6) can be used and the deposition performed at a temperature in the range of 150°C. to 220ºC. As an alternative to digermane, monogermane (GeH4) can also be used, but the rate of deposition is somewhat slower than with digermane. Other higher germanes can also be used, such as tigermane (Ge3H8). The practice of the invention is further illustrated with respect to the following nonlimiting examples, as summarized in TABLE I.
Detailed Description of Devices
Amorphous semiconductors produced in accordance with the invention can be used to form a wide variety of semiconductor devices. It is important to note that the amorphous silicon films produced by the present invention are different from the usual glow discharge and high vacuum deposited films. Films according to the present invention are not subjected to ion damage.
As an example of the different characteristics of the present films and those of the prior art, FIGURE 2C compares the spectral response of a typical glow discharge film with a film according to the present invention. In the curves of FIGURE 2C relative photovoltaic quantum efficiency is plotted against the wavelength of excitation radiation. It is apparent from FIGURE 2C that by contract with glow discharge films, amorphous silicon films produced by the invention have a spectral response with higher relative quantum efficiences and extend to larger wavelengths.
In addition, by comparison with high vacuum deposited films, those of the invention achieve significantly higher photoconductivity, e.g. 10 -6 to 10-4 ohms per centimeter (ohms-cm-1) as opposed to a range of 10 -9 to 10-7 ohms-cm-1 for the high vacuum deposited films of U.S. patent 4,237,150 and 4,237,151.
One such device is the photodetector 300 of FIGURE 3. A glass substrate 301 with an amorphous silicon deposit 302 is provided with aluminum contacts 303 and 304 and connected in circuit through a battery 305 to a load 306. When incident light 307 falls on the amorphous silicon layer 302, it creats electronhole pairs which are acted upon by the voltage of the battery 305 and produce a corresponding voltage increase in the load 306 according to the number of hole-electron pairs created.
Another device which makes use of amorphous silicon produced in accordance with the invention is the heterojunction semiconductor device 400 of FIGURE 4. This device has differen junctions J1 and J2 between p-type material 403 and intrinsic
(i-type) material 402 on the one hand, and between the intrinsic material 402 and the n-type semiconductor material 401 on the other hand. The bandgaps of the p- and n-type materials 403 and 401 are different than for the intrinsic material 402. Both the intrinsic material 402 and the n-type material 403 are forme by chemical vapor deposition. In the case of the n-type material a-, dopant such as phosphine is included. The p-type material 403 is also made by chemical deposition with a suitable dopant, such as boron. In addition, the p-type materials gaseous stream ineludes methane or acetylene in order to produce a silicon carbon allow (a-(Si,C):H). The resultant device 400 is a P-I-N semiconductor device controlled by a grid contact 404 and deposited desirably upon a substrate 405. The device 400 has the advantage over other similar devices of permitting a greater amount of light to enter the intrinsic layer 402 by virtue of the amorphous silicon carbon alloy layer 401, which has a higher bandgap than the intrinsic layer 402.
In general, desirable semiconductive devices can be produced by substituting semiconductor layers prepared in accordance with the invention for semiconductor layers prepared by other techniques. For example, the various devices of illustrative U.S. patent 4,064,521 can be adapted in accordance with the present invention by substituting pyrolytically decomposed polysemiconductanes for the glow discharge amorphous silicon of the prior art.
The average density of localized states of the CVD amorphous silicon prepared from SinH2n+2 (n = 2-6) is believed to be or deduced to be from device performance to be in the 1016/cm3 to 1017/cm3 range, and much lower than that of amorphous silicon fabricated by other means, i.e., for sputtered or evaporated amorphous silicon. The average density of localized states is 1019/cm3 or greater. This low density or defects states leads to longer depletion widths and low recombination, thus producing good quality devices.
One such device is the Schottky barrier solar cell 500 of FIGURE 5 formed by a substrate 512 with a body 514 of amorphous silicon. The device 500 also includes a metallic layer 516, an interface 518, an antireflective layer 520, an incident surface 522 for solar radiation 526 and a grid electrode 524. If the surface resistivity of the electrode 628 at the first doped layer is on the order of about 10 ohms/ or more, it is preferable to also have a gride contact like that described in FIGURE 5, on the first doped layer 613 for collection of the current generated in the body 614.
An electrical contact 627 is on the surface of the second doped layer 615 opposite the transmissive electrode 268. The electrical contact 627 is of a material having reasonable electrical conductivity, such as aluminum, chromium, tantalum, antimony, niobium or stainless steel.
As previously described in FIGURE 5, the absorption coefficient of the amorphous silicon films prepared by chemical vapor deposition of SinH2n+2, where n equals 2 through 6, is larger than that of a single crystal silicon in the visible range. For this reason only a thin layer of amorphous silicon is needed for sufficient solar radiation absorption. Typically the intrinsic region of amorphous silicon is about one micron or less in thickness, while the first and second doped layers 613 and 615 are each a few hundred Angstroms in thickness. Referring to FIGURE 7, a semiconductor device 710 is a photovoltaic device, and more particularly a P-N junction solar cell. The photovoltaic device 710 includes a region 711 of amorphous silicon fabricated by the polysilane chemical vapor deposition method in accordance with the invention, with appropriate doping gases. The region 711 comprises a first doped layer 752 of one conductivity in contact with a second doped layer 754 of an opposite conductivity with a P-N junction 756 inbetween. For purposes of discussion, it is assumed that the first coped layer 752 is of p-type material and the second doped layer is of n¬type conductivity. Both the first and second doped layers 752 and 754 are the body 714 of the photovoltaic device 710. The region 711 includes a third doped layer 758 on the surface of the second doped layer 754 which has a higher doping concentration than the second doped layer 754. Thus the third doped layer 758 is of n-type conductivity. The third doped layer 758 assists in making ohmic contact in the body 714.
Although the embodiments described in FIGURES 5, 6 and 7 have been described as solar cells, it is anticipated by the pre sent invention that these embodiments can also be utilized as high frequency photodetectors, i.e., devices which respond to radiant energy.
Referring to FIGURE 8, a further embodiment of the semiconductor device of the present invention is designated 810. The semiconductor device 810 is described as a heterojunction photovoltaic device for the purpose of explaining the sixth embodiment of the present invention. The photovoltaic device 810 includes a body 814 of amorphous silicon fabricated by pyrolytic decomposition. The body 814 of amorphous silicon has the same characteristics as the body 402 of the second embodiment of the present invention.
The fabrication of the photovoltaic device 810 is similar to that of the embodiments previously described. The semiconductor 860 may function as the support in the conversion apparatus (as previously described in FIGURES 4 and 5) for the deposition of the body 814 of amorphous silicon. As an alternative method of fabrication, the body 814 can be formed by pyrolysis of disilan and the semiconductor region 860 can then be sputtered onto the body 814. Next the first electrode 866, the intermediate layer 868 and the second electrode 870 are formed by masking and evaporation techniques well known in the art.
While the sixth embodiment of the present invention has been described as a photovoltaic device, it is obvious to those skilled in the semiconductor art that such a device can also function as a rectifier. If the device 810 was operated as a recitfier, there would be no need for the semiconductor region 860 to beof a material which is semitransparent or transparent to solar radiation. In addition, there would also be no need for an incident surface 854 which is capable of solar radiation impinging thereon. While various aspects of the invention have been set forth by the drawings and specification, it is to be understood that the foregoing detailed descriptions are for illustration only and that various changes, as well as the substitution of equivalent constituents for those shown and described may be made without departing from the spirit and scope of the invention as set forth in the appended claims. can also function as a rectifier. If the device 430 was operated as a rectifier, there would be no need for the semiconductor region 860 being of a material which is semitransparent or transparent to solar radiation. In addition, there would also be no need for an incident surface 864 which is capable of solar radiation impinging thereon.
While various aspects of the invention have been set forth by the drawings and specification, it is to be understood that the foregoing detailed descriptions are for illustration only and that various changes, as well as the substitution of equivalent constitutents for those shown and described may be made without departing from the spirit and scope of the invention as set forth in the appended claims.
Nomenclature of Devices (Figs. 3-8) 300 Photodetector
301-glass substrate 302-amσrphous silicon deposit
303-aluminum contact 304-aluminum contact
305-battery 306-load
307-incident light 400 Heterojunction Device
401-n-tyρe material 402-intrinsic material
403-p-type amorphous silicon carbon alloy
404-grid contact. 405-substrate
500 Schottky Barrier Photovoltaic Device
512-substrate 514-amorphous silicon body 516-metallic layer 518-interface 520-antireflection layer 522-incident surface 524-grid electrode 526-solar radiation 610 P-I-N Photovoltaic Device 613-first doped layer 614-amorphous silicon body 615-second doped layer 617-intrinsic layer 626-solar radiation 627-electrical contact 628-transmissive electrode 629-incident surface 710 P-N Photovoltaic Device 711-amorphous silicon 714-body of device 726-solar radiation 728-transmissive electrode 729-incident surface 752-first doped layer 754-second doped layer 756-P-N junction
757-electrical contact 758-third doped layer 810 Heterojunction Photovoltaic Device
814-amorphous silicon 826-solar radiation 854-incident surface 860-semiconductor 862-heterojunction 866-first electrode
868-intermediate layer 870-second electrode

Claims

WHAT IS CLAIMED IS:
1. A method of preparing amorphous semiconductor which comprises pyrolytically decomposing one or more gaseous phase polysemiconductanes at a temperature below about 500°C.
2. The method of claim 1 wherein the pyrolytic decomposition takes place at a temperature in the range from about 300 to about 500°C.
3. The method of claim 2 wherein said temperature is in the range from about 350°C. to about 450°C.
4. The method of claim 1 wherein the pyrolytic decomposition takes place at a partial pressure of greater than about one micron of mercury and less than about one atmosphere.
5. The method of claim 4 wherein said pressure lies in the range from about one Torr.
6. The method of claim 5 wherein said pressure lies in the range from about one Toϊr to about 100 Torr, thereby to lim gas phase nucleation of particles.
7. The method of claim 1 wherein said polysemiconductan are selected from the class ranging from disilanes to and inclu ing hexasilanes represented by the formula SinH2n+2, where n ranges from two to six.
8. The method of claim 1 wherein said gaseous phase includes one or more dopant gases.
9. The method of claim 8 wherein said dopant gases are selected from the class including phosphorus and boron containing gases.
10. The method of claim 9 wherein said phosphorus conta ing gas is phosphine (PH3) and said boron containing gas is diborane (B2H6).
11. The method of claim 1 wherein said gaseous phase includes an inert gas carrier.
12. The method of claim 11 wherein said inert gas carri is argon or helium.
13. The method of claim 1 wherein one or more of said polysilanes are decomposed on a heated substrate.
14. The method of claim 13 wherein the decomposition takes place at the temperature of the substrate.
15. The method of preparing an amorphous silicon semiconductive device which comprises the steps of:
(a) forming a body by pyrolytically decomposing one or more gaseous phase polysilanes, and
(b) providing one or more contacts to said body.
16. The method of claim 15 wherein said body is formed on a substrate.
17. The method of claim 15 wherein said body is formed by a plurality of separate decompositions each forming a separate layer.
18. The method of claim 17 wherein one or more of said layers include dopants therein.
19. The method of claim 18 wherein the doped layers are of one or more conductivity types.
20. The method of claim 19 wherein the conductivity types include p and n.
21. The method of claim 17 further including the provision of a metallic interface with one or more of the deposited layers.
21. The method of claim 19 further including the provision of an antifeflection layer in said device.
22. The method of preparing an amorphous semiconductor Schottky device which comprises the steps of:
(a) forming a heavily doped amorphous silicon layer on a conducting substrate by pyrolytic decomposition, of one or more polysilanes and a dopant;
(b) depositing an undoped amorphous silicon layer on the said doped layer by pyrolytic decomposition of one or more polysilanes.
(c) depositing a metal on said undoped layer to form a Schottky barrier.
23. The method of preparing an amorphous silicon junction device which comprises the steps of
(a) forming a first doped a-Si layer on a conducting substrate by pyrolytic decomposition of one or more polysilanes and a dopant; (b) forming a second doped a-Si layer on the said first doped layer by pyrolytic decomposition of polysilanes and a dopant;
(c) forming a third doped a-Si layer of a conductivity type opposite to that of the first doped layer on top of the lightly doped layer by pyrolytic decomposition of polysilanes and a dopant;
(d) providing a conducting ohmic contact to the second doped layer.
24 The method of claim 23 wherein the second doped a- Si layer is substituted for an undoped a-Si layer, deposited by pyrolytic decomposition of one or more polysilanes.
25. The method of producing a solar photovoltaic device according to claim 22 wherein the Schottky barrier is semitransparent to solar radiation.
26. The method of producing a solar photovoltaic device according to claim 22 wherein the conducting substrate is semitransparent to solar radiation.
27. The method of producing a solar photovoltaic device according to claim 26 wherin the conducting substrate is glass covered with a semitransparent conducting electrode.
28. The method of claim 27 wherein the semitransparent conducting electrode is doped tin oxide (SnO2) or indium oxide (ln203) or an alloy thereof.
29. The method of producing a solar photovoltaic device according to claims 23 or 24 wherein either the ohmic contact or the conducting substrate is semitransparent to solar radiation.
30. The method of producing a solar photovoltaic device according to claim 23 or 24 wherein the conducting substrate is a metal upon which the amorphous silicon junction device is deposited and the ohmic contact is semitransparent to solar radiation.
31. The method of producing a solar photovoltaic device according to claim 29 wherein the conducting substrate is glass coated with a semitransparent conducting electrode.
32. The method of producing a solar photovoltaic device according to claim 31 wherein the semitransparent conducting electrode is doped tin oxide (SnO2) indium oxide (ln2O3), or an alloy thereof.
33. The method of producing an amorphous silicon semiconducting heterojunction device which comprises the steps of:
(a) forming a first doped a-Si layer on a conducting substrate by pyrolytic decomposition of one or more polysilanes and a dopant;
(b) forming a second doped a-Si layer on the first doped layer by the pyrolytic decomposition of one or more polysilanes and a dopant;
(c) depositing a doped semiconductor material of a polarity type which forms a heterojunction with the second doped layer thereon, the heterojunction so formed being of an opposite polarity type to the type of the junction formed between the first doped layer and the second doped layer; and
(d) providing a ohmic contact to the semiconductor material of step (c).
34. The method of producing the device of claim 33 wherein the said semiconductor material is selected from a class consisting of gallium arsenide (GaAs), silicon (Si), indium oxide (In2 O3), tin oxide (SnO2), alloys of indium oxide and tin oxide, cadmium sulfide (CaS), zinc sulfide (ZnS), and alloys of cadmium sulfide and zinc sulfide.
35. The method of producing the device of claim 33 wherein the semiconducting material has a larger bandgap than the second doped a-Si layer.
36. The method of producing the device of claim 33 wherein the fabrication steps are reversed, namely the third doped semiconducting material forming the heterojunction is the substrate on which are successively deposited the said second doped a-Si layer and the first said doped a-Si layer, followed by forming ohmic contacts on the first and third doped semiconductor substrate.
37. The method of producing the device of claim 36 wherein the ohmic contacts are semitransparent to solar radiation.
38. The method of claim 37 wherein the said semitransparent contact is doped tin oxide (SnO2) or indium oxide (In2O3), or an alloy of indium oxide, or an alloy of indium oxide and tin oxide.
39. The method of claim 33 wherein the said conducting substrate is semitransparent to solar radiation.
40. The method of claim 39 wherein the semitransparent conducting substrate is glass coated with a semitransparent conducting electrode including doped SnO2 , In2O3, or an alloy of In2O3 and SnO2, or a thin metal film.
41 The method of claim 33 wherein the second doped a-Si layer is replaced by an undoped a-Si layer, deposited by pyrolytic decomposition of one or more polysilanes.
42. The method of claim 22 wherein said undoped a-Si layer is replaced by a doped layer, deposited by pyrolytic decomposition of one or more polysilanes and a dopant.
43. The method of claim 1 wherein said polysemiconductane are selected from the class ranging from digermanes to and including hexagermanes, represented by the formula GenH2n+ 2, where n ranges from two to six.
44. The method of claim 43 wherein the temperature of said decomposition is between 150°C. and 220°C.
EP19820901328 1981-03-11 1982-03-10 Amorphous semiconductor method and devices. Withdrawn EP0075007A4 (en)

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US242707 1981-03-11

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Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1245109A (en) * 1983-10-31 1988-11-22 Hsien-Kun Chu Method of forming amorphous polymeric halosilane films and products produced therefrom
FR2555206B1 (en) * 1983-11-22 1986-05-09 Thomson Csf METHOD FOR DEPOSITING AMORPHOUS SILICON BY LOW TEMPERATURE THERMAL DECOMPOSITION AND DEVICE FOR IMPLEMENTING THE METHOD
DE3441044A1 (en) * 1984-11-09 1986-05-22 Messerschmitt-Bölkow-Blohm GmbH, 8012 Ottobrunn Process for producing thin-film semiconductor components, in particular solar cells
US4637895A (en) * 1985-04-01 1987-01-20 Energy Conversion Devices, Inc. Gas mixtures for the vapor deposition of semiconductor material
US4696834A (en) * 1986-02-28 1987-09-29 Dow Corning Corporation Silicon-containing coatings and a method for their preparation
US4762808A (en) * 1987-06-22 1988-08-09 Dow Corning Corporation Method of forming semiconducting amorphous silicon films from the thermal decomposition of fluorohydridodisilanes
US4923719A (en) * 1988-08-22 1990-05-08 Allied-Signal Inc. Method of coating silicon carbide fibers
US5424097A (en) * 1993-09-30 1995-06-13 Specialty Coating Systems, Inc. Continuous vapor deposition apparatus
JP3932206B2 (en) * 1995-10-18 2007-06-20 スペシャルティ、コーティング、システムズ、インコーポレイテッド Method for producing octafluoro- [2,2] paracyclophane
EP0862664B1 (en) * 1995-10-27 2003-01-02 Specialty Coating Systems, Inc. Method and apparatus for the deposition of parylene af4 onto semiconductor wafers
US5806319A (en) * 1997-03-13 1998-09-15 Wary; John Method and apparatus for cryogenically cooling a deposition chamber
US6051276A (en) * 1997-03-14 2000-04-18 Alpha Metals, Inc. Internally heated pyrolysis zone
US5841005A (en) * 1997-03-14 1998-11-24 Dolbier, Jr.; William R. Parylene AF4 synthesis
US7943721B2 (en) 2005-10-05 2011-05-17 Kovio, Inc. Linear and cross-linked high molecular weight polysilanes, polygermanes, and copolymers thereof, compositions containing the same, and methods of making and using such compounds and compositions
US7799376B2 (en) * 2007-07-27 2010-09-21 Dalsa Semiconductor Inc. Method of controlling film stress in MEMS devices

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1501313A (en) * 1966-02-03 1967-11-10 North American Aviation Inc Method of epitaxial growth of monocrystalline films on monocrystalline substrates
US3490961A (en) * 1966-12-21 1970-01-20 Sprague Electric Co Method of producing silicon body
GB2087930A (en) * 1980-10-16 1982-06-03 Canon Kk Producing photoconductive member by glow discharge deposition of amorphous silicon

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4064521A (en) * 1975-07-28 1977-12-20 Rca Corporation Semiconductor device having a body of amorphous silicon
US4237150A (en) * 1979-04-18 1980-12-02 The United States Of America As Represented By The United States Department Of Energy Method of producing hydrogenated amorphous silicon film
US4237151A (en) * 1979-06-26 1980-12-02 The United States Of America As Represented By The United States Department Of Energy Thermal decomposition of silane to form hydrogenated amorphous Si film

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1501313A (en) * 1966-02-03 1967-11-10 North American Aviation Inc Method of epitaxial growth of monocrystalline films on monocrystalline substrates
US3490961A (en) * 1966-12-21 1970-01-20 Sprague Electric Co Method of producing silicon body
GB2087930A (en) * 1980-10-16 1982-06-03 Canon Kk Producing photoconductive member by glow discharge deposition of amorphous silicon

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
APPLIED PHYSICS LETTERS, vol. 37, no. 8, 15th October 1980, pages 725-727, American Institute of Physics *
See also references of WO8203069A1 *
THIN SOLID FILMS, vol. 56, no. 3, 1st February 1979, pages 267-277, Elsevier Sequoia S.A. Lausanne, printed in the Netherlands *

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ES8402462A1 (en) 1984-02-01
IT1150674B (en) 1986-12-17
KR910002764B1 (en) 1991-05-04
JPS58500360A (en) 1983-03-10
HU187713B (en) 1986-02-28
CA1187622A (en) 1985-05-21
IT8220100A0 (en) 1982-03-11
OA07249A (en) 1984-08-31
WO1982003069A1 (en) 1982-09-16
IN156594B (en) 1985-09-14
NO823744L (en) 1982-11-10
EP0075007A4 (en) 1984-06-05

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