WO1980001347A1

WO1980001347A1 - Control circuitry for gated diode switches

Info

Publication number: WO1980001347A1
Application number: PCT/US1979/001095
Authority: WO
Inventors: P Shackle; T Riley; A Hartman
Original assignee: Western Electric Co
Priority date: 1978-12-20
Filing date: 1979-12-17
Publication date: 1980-06-26
Also published as: GB2048599A; FR2445663A1; IT1126604B; PL127058B1; DD200547A5; IN154029B; IL59013A; AU5386579A; HU180115B; JPS55501043A; IE49229B1; KR830001097B1; SE420254B; IE792369L; NL7920198A; AU524716B2; SE8005702L; IL59013A0; CH660820A5; ES487067A1

Abstract

A gated diode switch (GDS1, GDS31) requires a voltage applied to the gate which is more positive than that of the anode or cathode in order to break current flow between the anode and cathode. In addition, a current of at least the same order of magnitude as flows between anode and cathode must be sourced into the gate of the switch to break current flow. The use of a second gated diode switch (GDS2, GDS32) coupled by the cathode (terminal 222, 322) thereof to the gate of a gated diode switch (GDS1, GDS31) which is to be controlled provides a high voltage and current capability circuitry for cutting off (interrupting) or inhibiting current flow through the gated diode switch (GDS1, GDS31). The state of a gated diode switch (GDS1, GDS31) is thus controlled by a second gated diode switch (GDS2, GDS32). The state of the second gated diode switch is controlled by a voltage control circuit having only relatively modest current handling capability.

Description

CONTROL CIRCUITRY FOR GATED DIODE SWITCHES This invention relates to control circuitry for use with, gated diode switches. In an article entitled "A Field Terminated Diode" by Douglas E. Houston et al, published in IEEE Transactions on Electron Devices, Vol. ED-23, No. 8, August 1976, there is described a discrete solid-state high voltage switch that has a vertical geometry and which includes a region which can be pinched off to provide an "OFF" state or which can be made highly conductive with dual carrier injection to provide an "ON" state. This device, which will be referred to as the gated diode switch (GDS), is promising as a solid-state replacement for electromechanical switches because of its high voltage capacity. As will be explained more fully later, versions of this device, other than that described in the article, can be made which are amenable to integrated circuit fabrication techniques and bilateral switching arrangements. It would likewise be desirable to use semiconductor integrated circuit techniques to fabricate control circuitry for such GDSs. This is difficult because the control circuitry used apply a blocking voltage to the gate (or grid) must be able to sustain a more positive voltage than is at the anode and cathode and must be able to supply current which is at least of the same magnitude as flows through the switch itself. GDSs of the type referred to above are relatively new in the art and, accordingly, there is little published information describing the control circuitry utilized therewith.

It is desirable to have solid-state control circuitry for use with GDSs which can be fabricated on the same substrate as the switches which are to be controlled.

A solution to the problem of controlling the state of a first gated diode switch (GDS1) in accordance with the present invention is circuitry characterized in that it comprises a second gated diode switch (GDS2) coupled by the cathode thereof to the gate of GDS1. and a voltage control branch circuit coupled to GDS2 for controlling conduction between the anode and cathode thereof.

The state of GDS2 is controlled essentially by the voltage control branch circuit which selectively adjusts the gate-anode voltage. A relatively low voltage pulse triggers the voltage control circuit. The voltage control circuit has high voltage capability but only modest current supply capability. Thus, any steady-state current flowing through GDS2 must be of only a modest value for the voltage control circuit to be capable of switching GDS2 from the ON to the OFF state. With GDS2 in the OFF state the potential of the gate of GDS1 is at a level that is no more positive than that of the anode and cathode thereof and, accordingly, GDS1 is in the ON state and conduction between the anode and cathode thereof can occur. To switch GDS1 to the OFF state requires that the potential of the gate thereof be increased to a value more positive than that of the anode and cathode and that electrons, at least of the order of magnitude as flows between cathode and anode thereof, be collected at the gate and then pulled out of the gate. Considered from a circuit design view, the pulling out of electrons from the gate of GDS1 is the equivalent of driving (sourcing) positive charge (current) into the gate of GDS1. The anode of GDS2 is coupled to a potential source which is selected to be more positive than the potential at the anode of GDS1. When GDS2 is in the ON state the potential at the gate of GDS1 (also the cathode of GDS2) is more positive than that at the anode of GDS1, and GDS2 is capable of supplying sufficient positive current such that GDS1 is switched to or maintained in an OFF state. Various other embodiments will be described. In the drawing:

FIG. 1 is a schematic sectional view of gated diode switch;

FIG. 2 illustrates a switch with an embodiment of control circuitry in accordance with the invention;

FIG. 3 illustrates a switch with another embodiment of control circuitry in accordance with the present invention; FIG. 4 illustrates a bidirectional switch which also can be controlled by the control circuit of FIG. 1;

FIG. 5 illustrates switch control circuitry in accordance with still another embodiment of the invention; and

FIG. 6 shows control circuitry in accordance with another embodiment of the invention.

Referring now to FIG. 1, there is illustrated a preferred form of GDS structure 10 comprising a support member 12 having a major surface 11 and a monocrystalline semiconductor body 16 whose bulk is of p- conductivity type and which is separated from support member 12 by a dielectric layer 14.

A localized anode region 18, which is of p+ conductivity type, is included in body 16 and has a portion thereof that extends to surface 11. A localized gate region 20, which is of n+ conductivity type, and a localized cathode region 24, which is of n+ type conductivity, are also included in body 16. A region 22, which is of the p type conductivity and has a portion which extends to surface 11, encircles cathode 24 and acts as a depletion layer punch-through shield. In addition it acts to inhibit inversion of the portions of body 16 at or near surface 11 between regions 20 and 24. Gate region 20 is located between anode region 18 and region 22 and is separated from both by bulk portions of body 16. The resistivities of regions 18, 20, and 24 are low compared to that of the bulk portions of body 16. The resistivity of region 22 is intermediate that of cathode region 24 and that of the bulk portion of body 16. Electrodes 28, 30 and 32 are conductors which make low resistance contact to the surface portions of regions 18, 20, and 24, respectively. A dielectric layer 26 covers major surface 11 so as to isolate electrodes 28, 30 and 32 from all regions other than those intended to be electrically contacted. An electrode 36 provides a low resistance contact, to support 12 by way of a highly doped region 34 which is of the same conductivity type as support 12.

Advantageously, the support 12 and the body 16 are each of silicon and the support 12 may be either of n or p type conductivity. Each of electrodes 28, 30 and 32 advantageously overlaps the semiconductor region to which they make low resistance contact. Electrode 32 also overlaps region 22. This overlapping, which is known as field plating, facilitates high voltage operation because it increases the voltage at which breakdown occurs.

A plurality of separate bodies 16 can be formed in a common support 12 to provide a plurality of switches.

Structure 10 is typically operated as a switch which is characterized by a low impedance path between anode region 18 and cathode region 24 when in the ON (conducting) state and as a high impedance between said two regions when in the OFF (blocking) state. The potential applied to gate region 20 determines the state of the switch. Conduction between anode region 18 and cathode region 24 occurs if the potential of gate region 20 is below that of the potential of anode region 18 and cathode region 24. During the ON state holes are injected into body 16 from anode region 18 and electrons are injected into body 16 from cathode region 24. These holes and electrons can be in sufficient numbers to form a plasma which conductivity modulates body 16. This effectively lowers the resistance of body 16 such that the resistance between anode region 18 and cathode region 24 is relatively low when structure 10 is operating in the ON state. This type of operation is denoted as dual carrier injection.

Region 22 helps limit the punch-through of a depletion layer formed during operation between gate region 20 and cathode region 24 and helps inhibit formation of a surface inversion layer between these two regions. In addition, it facilitates gate region 20 and cathode region 24 being relatively closely spaced apart. This facilitates a relatively low resistance between anode region 18 and cathode region 22 during the ON state.

Substrate 12 is typically held at the most positive potential level available. Conduction between anode region 18 and cathode region 24 is inhibited or cut off if the potential of gate region 20 is sufficiently more positive than that of anode region 18, cathode region 24 and region 22. The amount of excess positive potential needed to inhibit or cut off conduction is a function of the geometry and impurity concentration (doping) levels of structure 10. This positive gate potential causes a vertical cross-sectional portion of body 16 between gate region 20 and the portion of dielectric layer 14 therebelow to be depleted and the potential of this portion of body 16 to be more positive than that of anode region 18, cathode region 24, and region 22. This positive potential-barrier inhibits the conduction of holes from anode region 18 to cathode region 24. It essentially pinches off body 16 against dielectric layer 14 in the bulk portion thereof below gate region 20 and extending down to dielectric layer 14. It also serves to collect electrons emitted at cathode region 24 before they can reach anode region 18. The blocking (non-conductive) state is the OFF state.

Referring now to the FIG. 2, there is illustrated control circuitry 210 (illustrated within the larger dashed line rectangle) which is coupled to a gated diode switch GDS1 of the type shown in FIG. 1 having anode, cathode and gate terminals. GDS1 is illustrated by an electronic symbol which has been adopted to designate any of various forms of gated diode switch.

Control circuitry 210 comprises a gated diode switch GDS2 which also may be of the type shown in FIG. 1, having anode, cathode, and gate terminals, first and second current limiters CL1 and CL2, an n-p-n transistor Q1, p-n diodes D1, D2, and D3, resistors R1, R2, and R3, and capacitor C1. The anodes of D1 and D3 and a first terminal of CL1 are all coupled to a terminal 212. The collector of Q1 is coupled to the cathode of D3 and to a terminal 211. The cathode of D1 is coupled to the gate of GDS2 and to a terminal 220. The base of Q1 is coupled to an input terminal 216 through diode D2. The emitter of Q1 is coupled to one terminal of R1 and to a terminal 217. A second terminal of R1 is coupled to a terminal 218 and to power supply VSS. A second terminal of CL1 is coupled to power supply +V1 and to a terminal 214. CL2 is coupled by a first terminal to the cathode of GDS2, the gate of GDS1, and to a. terminal 222. CL2 is coupled by a second terminal to power supply -V3 and to a terminal 228. A third current limiter CL3 is coupled to a first terminal thereof to terminal 220 and by- a second terminal thereof to a power supply -V4 and to a terminal 226. CL3 and -V4 are both optional. -V4 can be the same as VSS or -V3 in potential.

The anode of GDS2 is coupled to one terminal of R3 and to a terminal 221. A second terminal of R3 is coupled to a first terminal of R2 and to a terminal 223 and to a first terminal of C1. A second terminal of R2 is coupled to power supply +V2 and to a terminal .224. A second terminal of C1 is coupled to terminal 218. +V1 is selected to be more positive in potential than +V2.

The combination of D1, D2, D3, Q1, CL1, R1, arid CL3 (illustrated within dashed line rectangle A) serves as a voltager control branch circuit and is adapted to set the potential of the terminal 220 (the gate terminal of GDS2) so as to control the state of GDS2. C1 and R3 are optional. Without C1 and R3, terminals 221 and 223 would be directly connected together. C1 serves as a limited source of charge which is used to aid in the switching of GDS1 to the OFF state. Without C1 it is necessary to have greater steady-state current flow through GDS2 when it is in the ON state in order to insure that there is sufficient available current that can be supplied to the gate of GDS1 to turn GDS1 off. The basic operation is as follows: Assuming the anode and cathode terminals of GDS1 are coupled to +220 volts and -220 volts, respectively, conduction can occur between the anode and cathode thereof if the gate (terminal 222) is less positive than +220 volts. Conduction is cut off (interrupted) by increasing the potential of the gate (terminal 222) above +220 volts and by providing a source of positive current which flows into the gate (terminal 22) of GDS1. With +V1 = +280 volts, VSS = zero volts, +V2 = +250 volts, -V3 = -250 volts, -V4 = -250 volts and current limiters CL1, CL2, and CL3 limiting current therethrough to 50, 5, and 5 microamperes, respectively, circuitry 210 is capable of providing the needed potentials at terminal 222 and the source of current into terminal 222 necessary to control the state of GDS1. The design of current limiters is described, for example, in "Sourcebook of Electronic Circuits", John Markus, McGraw-Hill Book Co., 1968, p. 171. Assuming first that it is desired to allow conduction through GDS1, an input signal having a potential level between 0 and 0.4 volts is applied to terminal 216. This biases Q1 off and allows terminal 212 to assume a potential of approximately +V1 (approximately +280 volts). Without CL3 present, D1 conducts in the forward direction until terminal 220 reaches within several tenths of a volt of the potential of terminal 212 and then ceases to conduct. With CL3 present there is a flow of current from +V1 through CL1, D1, CL3 and into -V4. CL1 and CL3 are selected such that the voltage appearing at terminal 220, with Q1 biased off, is at a level which is significantly more positive than that of +V2. For this case, terminal 220 likewise assumes a potential of close to +280 volts. This condition biases GDS2 to the OFF state and thus isolates terminal 222 from potential +V2. Terminal 222 therefore falls in voltage because of the negative potential -V3 (-250 volts) until the gate-to-anode junction of GDS1 becomes forward-biased. Terminal 222 now stabilizes at a potential close to but not greater than the potential of the anode of GDS1. Accordingly, GDS1 is biased to the ON state and conduction occurs between the anode and cathode thereof. The current flowing from the anode to gate of GDS1 is limited by CL2 to an insignificant fraction of the anode-to-cathode current through GDS1.

If GDS2 had been in the ON state prior to the application of the 0-0.4 volt input level to terminal 216, then positive current flows from +V1, through D1, and into the gate of GDS2. CL1 is selected to allow a greater current flow therethrough than through CL2 to insure that sufficient positive current is available to flow into the gate of GDS2 so as to cut off conduction between the anode and cathode thereof. Only a relatively modest amount of positive current must flow into the gate of GDS2 to cut off conduction therethrough since the conduction through GDS2 is only 5 microamperes. It is thus not necessary to use a high current device to provide the needed current sourcing function necessary to cause GDS2 to assume the OFF state. The potential of terminal 216 is raised to a level of 2-5 volts to cause GDS1 to switch to the OFF (blocking) state. This input voltage level biases Q1 ON and allows Q1 to operate in saturation. The potential of terminal 212 is pulled down to approximately +1.6 volts (assuming an input voltage at terminal 216 of 2 volts, a saturated collector - emitter voltage VCE (SAT) of 0.3 volts for Q1 and a voltage drop across D3 of 0.7 volts). The potential of terminal 212 at this time is a function of the input voltage level, the VCE (SAT) of Q1 and the forward voltage drop across D3. Without CL3 present, terminal 220 is pulled to a value close to that of +V2 or to a more negative potential because of leakage through D1. The potential of terminal 220 cannot drop below one diode voltage drop below the potential of the anode of GDS2 because a junction diode comprising the anode and gate of GDS2 becomes forward-biased and pulls up the potential of terminal 220. With CL3 present, terminal 220 is rapidly and actively held at a value close to one diode drop below the potential of the anode of GDS2. In either case, this switches GDS2 to the ON state. This causes the potential of terminal 222 to be at +V2 minus the voltage drop across R3 and R2 and minus the forward voltage drop across the anode-cathode of GDS2. The voltage drops across R2, R3, and GDS2 are selected such that the potential of terminal 222 is more positive than that of the anode of GDS1 by a sufficient amount to switch GDS1 to the OFF (blocking) state. In addition, there is a sufficient positive current flow into the gate of GDS1 to switch it to the OFF state. Once GDS1 is switched off the current flow into the gate thereof ceases. The geometry and impurity concentrations of GDS1 determine exactly how much more of a positive potential must exist at the gate relative to the anode and cathode to turn GDS1 off.

Minority carriers (e.g. electrons) emitted at the cathode of GDS1 and collected by the gate constitute the equivalent of positive current flow from +V2 through R2, R3, GDS2, and into the gate of GDS1. This current flow can be substantial and as a result it is necessary to have a high voltage and current device such as GDS2 to switch GDS1 to the OFF state. A high voltage and high current transistor in this control circuit would be unreasonably costly.

R2 and R3 limit current flow from +V2, through GDS2, and into the gate of GDS1. In addition, R3 limits current flow from C1. This helps insure against the burn out of GDS1 and/or GDS2. In many telephone switching applications GDS1 operates with only 48 volts between anode and cathode when in the OFF state; however, it is possible that + 220 volts exists at the anode and/or cathode due to ringing, testing, coin telephone controlling, and induced 60 Hz voltages and, accordingly, control circuit 10 is designed to block these high voltages.

When Q1 operates in saturation the base-collector junction thereof is potentially forward-biased. D3 serves to help insure against a flow of current from input terminal 16, through the collector-base junction of Q1, and then through D1. The circuit of FIG. 2, excluding CL3, R2, R3, and C1, has been fabricated on a single integrated circuit chip with GDS1 and GDS2 being of the type shown in FIG. 1. The fabricated control circuit allowed the blocking of 500 volts across the anode and cathode of GDS1 and cut off (interrupted) 100 milliamperes of current flow therethrough. This is a much higher current than could be handled by voltage control circuit A components that are economically feasible or amenable to integrated circuit fabrication. The values of R1 and R3 are 1000 and 3000 ohms, respectively, without C1 and R2 being used and with R3 coupled directly to +V2. C1 and R2, when used, reduce the time' needed to switch GDS1 from the ON to the OFF state. One preferred value of C1 is 0.1 μF with R1 = 1000 ohms, R2 = 2×10⁵ ohms, and R3 = 3000 ohms.

Referring now to FIG. 3, there is illustrated control circuitry 310 which is coupled to a gated diode switch GDS31 having anode, cathode, and gate terminals. Control circuit 310 is similar to control circuit 210 of FIG. 2, except that diodes D1 and D3 are eliminated and a current mirror circuit configuration comprising p-n-p transistors Q2 and Q3 is used. Q2 and Q3 are switching devices in which the bases may be denoted as control terminals and the collectors and emitters may be denoted as first and second output terminals, respectively.

The emitters of Q2 and Q3 are coupled together to terminal 314 and to power supply +V30. The bases of Q2 and Q3 are coupled together to the collector of Q2 and to a first terminal of CL31 and to a terminal 330. The collector of Q3 is coupled to the gate of GDS31, a first terminal of CL33, and to a circuit terminal 320. Essentially all other components and interconnections are similar to those of the circuitry of FIG. 2.

The combination of D32, Q31, R31, Q.2, Q3, CL31, and CL33 (illustrated within dashed line rectangle B) is denoted as a voltage control branch circuit and is adapted to set the potential of terminal 320 so as to control the state of GDS32.

With an appropriate high level voltage (typically +2 to 5 volts) applied to terminal 316, Q31 is biased on and conduction from power supply +V31 through Q2, CL31, Q31, R31, and into power supply VSSO occurs. Q2 and Q3 are essentially identical transistors. It is well known that this configuration of Q2 and Q3 results in essentially the same current flow through Q2 as flows through Q3. With Q31 biased on, the potential of terminal 320 is at the potential of +V31 minus the VCE (collector-emitter voltage) of Q3. With a low level input signal (0-0.4 volts) applied to terminal 316, Q31 is biased off and there is no conduction through Q31 and Q2. Thus there is no conduction through Q3. Terminal 320 is thus pulled towards the potential of approximately -V34 until the anode-gate junction of GDS32 is forward-biased and causes terminal 320 to assume a potential level near but somewhat less positive than that of +V32.

+V31 is selected to be more positive than +V32 and the potential of -V34 is selected to be more negative than +V32. The operation of GDS32 to control the state of GDS31 is essentially the same as has been described for the operation of GDS2 of FIG. 2. The use of the same potentials for the power supplies of FIG. 3 as the corresponding power supplies of FIG. 1 results in a circuit which facilitates the control of the state of GDS31 with + 220 volts at the anode and/or cathode. The varying of the potential of terminal 320 causes GDS32 to operate in a similar mode as corresponding GDS2 of FIG. 1. Thus the state of GDS31 is controlled in the same manner as the state of corresponding GDS1 of FIG. 2, but with an opposite polarity input signal.

The complementary transistors Q31 and Q2 or Q3 can be fabricated on the same integrated circuit chip as GDS32 with both formed using dielectric isolated structures.

Referring to FIG. 4, there is illustrated a bidirectional switch which comprises gated diode switches GDS3 and GDS4, with the anode of GDS3 coupled to the cathode of GDS4, and the cathode of GDS3 coupled to the anode of GDS4, and the gates connected together. One advantage of the gated diode switch of FIG. 1 is that two of them may be connected in antiparallel in this manner and still support high voltages without avalanche breakdown. The gates of GDS3 and GDS4 can be coupled to terminal 222 of the control circuit 10 of FIG. 2, or to the terminal 322 of FIG. 3, for their control in the manner described before. That is, the state of GDS3 and of GDS4 can be controlled in the same manner as the state GDS1 in FIG. 2 and GDS31 of FIG. 3.

Various modifications are possible consistent with the spirit of the invention. For example, various other control circuits can be substituted for those illustrated coupled to the gates of GDS2 and GDS32 of FIGS. 2 and 3, respectively, in order to provide the voltage levels and current drive (sourcing) capability needed to control the state thereof. Still further, the n-p-n transistors can be replaced by p-n-p transistors provided the polarities of the power supplies are appropriately modified as is well known in the art. Still further R1 and R31 can be pinch resistors. Still further the emitters of Q1 and Q31 can be coupled directly to VSS and VSSO, respectively. In this case, current limiting means, typically a resistor, would then be inserted in series with the respective input terminals, 216 and 316. Referring now to FIG. 5, another embodiment of the invention comprises control circuitry 510 which is coupled to the gate terminal 528 of a gated diode switch GDS51. Control circuitry 510 serves to control the state of GDS51 and comprises transistors Q51 and Q52, diodes D51 and D52, a gated diode switch GDS52, current limiters CL51 and CL52, and resistors R51 and R52. Components within dashed line rectangle 5A serve to control the anode-to-cathode potential of GDS52. R52 is optional and can be eliminated. Assuming the anode and cathode of GDS51 are coupled to +220 volts and -220 volts, respectively, conduction occurs between anode and cathode thereof if the gate of GDS51 (terminal 528) is less positive than +220 volts. Conduction is cut off (interrupted) by increasing the potential of the gate (terminal 28) above +220 volts and by providing a source of current to flow into the gate (terminal 528) of GDS 51. With +V51 = +250 volts, VSS = zero volts, -V52 = -250 volts, and current limiters CL51 and CL52 limiting current therethrough to 50 and 5 microamperes respectively, circuitry 510 is capable of providing the needed potentials at terminal 528 and the current supply capability necessary to control the state of GDS51.

If it is desired to allow conduction through GDS51, a 0 to 0.4 volt input signal is applied to input terminal 516. This biases Q51 off and terminal 518 assumes the potential of approximately +V51. This condition biases Q52 off and results in an essentially open circuit between +V51 and terminal 526 (the anode of GDS52). Thus, GDS52 is in an OFF state since no current can flow between the anode and cathode thereof. With GDS52 in the OFF state terminal 528 is isolated from +V51 and tends to assume the negative potential of -V52 (-250 volts) until the gate-to-anode junction potential of GDS51 becomes forward-biased. Terminal 528 now rises to a potential which is below, but close to the potential of the anode of GDS51. Accordingly, GDS51 is biased to the ON state and conduction occurs between the anode and cathode thereof. The current from the anode to the gate of GDS51 is limited by CL52.

The potential of terminal 516 is now pulsed to 3-5 volts. As will become clear, this causes GDS51 to switch to the OFF (blocking) state. Q51 is biased on and operates in saturation. This causes D51 and the emitter-base junction of Q52 to be forward-biased. Thus, Q52 is biased on and conduction from +V51 through the emitter-collector of Q52, the anode-cathode of GDS52 and CL52 to -V52 is possible. The collector-emitter voltage of Q52 (VCE) with Q52 biased on and conducting is selected to be of a lower magnitude than the forward voltage drop across D52. This insures that the potential of the anode (terminal 526) is more positive than that of the gate (terminal 524) such that GDS52 stays in the ON state. With GDS52 in the ON state terminal 528 assumes a potential level close to +V51. This potential level is sufficiently more positive than the potential level at the anode of GDS51 to switch GDS51 to the OFF state. The geometry and impurity concentration (doping levels) of GDS51 determine exactly how much more positive the potential at the gate must be relative to the anode to turn off GDS51.

In order to switch GDS51 to the OFF state it is necessary to not only apply the needed potential level to the gate of GDS51, but in addition, to cause a flow of current into the gate of GDS51 that is of a magnitude comparable to that of the magnitude of the current flow between the anode and cathode of GDS51. Most of the current that flows into the gate of GDS51 flows from +V51, through D52, and then through the gate and cathode of GDS52. The balance flows from +V51, through the collector-emitter of Q52, and then through the anode-cathode of GDS52. This current flow can be substantial and as a result it is necessary to have a high voltage and current device such as GDS52 to switch GDS51 to the OFF state.

The current gain of Q52 serves to limit the current flow into the gate of GDS51 from GDS52. This helps insure against burn out of GDS51 and/or GDS52. In many telephone switching applications GDS51 operates with only 48 volts between anode and cathode when in the OFF state; however, it is possible that + 220 volts exists at the anode and/or cathode due to ringing and induced 60 Hz voltages and, accordingly, circuit 510 is designed to block these high voltages.

Referring now to FIG. 6, there is illustrated control circuitry 610 which is coupled to the gate terminal of a gated diode switch GDS61. Control circuitry 610 is similar to control circuitry 510 of FIG. 5 except that n-p-n transistors Q63 and Q64 and p-n diodes D63 and D64 have been added as is illustrated. Q63 and Q64 are coupled together in a Darlington type configuration with the collectors being common and being coupled to a terminal 620 and the emitter of Q63 is coupled to the base of Q64 and to a terminal 634. The collector of Q62 is coupled to the base of Q63 and to terminal 632. The emitter of Q62 is also coupled to terminal 620. The emitter of Q64 is coupled to the anode of GDS62 and to a terminal 626. D62, D63, and D64 are serially coupled together between terminals 620 and 624 with the anode of D62 coupled to terminal 620 and the cathode of D64 coupled to terminal 624. Components Q61, CL61, D61, Q62, Q63, Q64, D62, D63, D64, R61, and R62 serve as a control circuit branch (illustrated within dashed line rectangle 6A) which serves to control the potential of the anode of GDS20 relative to the cathode thereof. R62 is optional and can be eliminated.

It is difficult in some semiconductor technologies to achieve a p-n-p transistor which has high current gain. The combination of Q62, Q63 and Q64 essentially act as the equivalent of a p-n-p transistor which has a relatively high current gain. Thus Q62, Q63, and Q64 perform essentially the same function as Q62 of FIG. 5. D63 and D64 are needed to offset the addition emitter-base voltage drops of Q63 and Q64. With Q62, Q63 and Q64 biased on, the voltage at the gate of GDS62 (terminal 624) is less positive than at the anode of GDS62 (terminal 626). This helps insure that GDS62 is in the ON state.

The circuitry of FIG. 6, excluding R62 has been built and tested. This control circuitry 610 allowed the blocking of 500 volts across the anode and cathode of GDS61 and cut off (interrupted) 100 milliamperes of current flow therethrough.

The embodiments described herein are intended to be illustrative of the general principles of the present invention. Various modifications are possibly consistent with the spirit of the invention. For example, other switching devices, such as MOS transistors, could be substituted for the bipolar transistors provided appropriate voltage magnitudes and polarities are adjusted as is well known in the art.

Claims

1. Circuitry for use with a first switching device (GDS1) of the type comprising a semiconductor body (16) a bulk portion of which is of a relatively high resistivity, a first region (18) of a first conductivity type and of a relatively low resistivity, a second region (24) of a second conductivity type opposite that of the first conductivity type, the first and second regions being connected to output terminals of the switching device, a gate region (12) of the second conductivity type, the first, second and gate regions being mutually separated by portions of the semiconductor body bulk portion (16), the parameters of the device being such that, with a first voltage applied to the gate region, a depletion region is formed in the semiconductor body which substantially prevents current flow between the first and second regions, and that, with a second voltage applied to the gate region and with appropriate voltages applied to the first and second regions, a relatively low resistance current path is established between the first and second regions by dual carrier injection CHARACTERIZED BY a second switching device (G-DS2) of the same type as said first switching device, an output terminal of the second switching device being coupled to the gate of the first switching device (GDS1); and a voltage control branch circuit (A) coupled to the second switching device (GDS2) for controlling conduction between the first and second regions thereof.

2. The circuitry of claim 1 CHARACTERIZED IN THAT the voltage control branch circuit (A) coupled to the second gated diode switch (GDS2) comprises a first switching device (Q1) having a control terminal and first (211) and second (217) output terminals, and a first current limiter (CL1) coupled to the first output terminal (211) of the first switching device (Q1).

3. The circuitry of claim 2 further CHARACTERIZED BY a second current limiter (CL2) being adapted to limit current to a significantly lower magnitude than the first current limiter (CL1) and being coupled to an output terminal of the second gated diode switch (CDS2).

4. The circuitry of claim 3 CHARACTERIZED IN THAT the switching device (Q1) is a junction transistor- with the collector being coupled to the first current limiter (CL1).

5. The circuitry of claim 4 CHARACTERIZED IN THAT the first current limiter (CL1) is adapted to be coupled to a first potential source (+V1) and that the output terminal of the second gated diode switch (GDS2) is adapted to be coupled to a second potential source (+V2) which is less positive than the first potential source.

6. The circuitry of claim 5 further CHARACTERIZED BY a first resistor (R1) coupled to the second output terminal of the first switching device (Q1) and by a second resistor (R3) being coupled to an output terminal of the second gated diode switch (GDS2).

7. The circuitry of claim 6 further CHARACTERIZED BY a third resistor (R2) and a first capacitor (C1) which are both coupled to the second resistor (R3).

8. The circuitry of claim 7 further CHARACTERIZED BY a third current limiter (CL3) coupled to the gate region of the second gated diode switch (GDS2).

9. The circuitry of claim 5 further CHARACTERIZED BY a first diode (D1) having a cathode (terminal 220) coupled to the gate of the second gated diode switch (GDS2) and having an anode (terminal 212) coupled to the first output terminal 211 of the first switching device (Q1).

10. The circuitry of claim 9 further CHARACTERIZED BY a second diode (D2) having an anode (terminal 216) which serves as an input terminal and having a cathode which is coupled to the base of the transistor (Q1, Q31).

11. The circuitry of claim 10 further CHARACTERIZED BY a third diode (D3) having an anode coupled to the anode of the first diode (D1) and having a cathode coupled to the first output terminal of the first switching device (Q1).

12. The circuitry of claim 5 further CHARACTERIZED BY. second and third switching devices (Q2, Q3 of

Fig. 3) each having a control terminal and first and second output terminals; the second output terminals of the second and third switching devices (Q2, Q3) being coupled together to a first circuit terminal (314) and being adapted to be coupled to the first potential source (+V31 of

Fig. 3); the control terminals of the second and third switching devices (Q2 , Q3) and the first output terminal of the second switching device (Q2) being coupled together to the first current limiter (CL31) and to a second circuit terminal (330); and the first output terminal of the third switching device (Q3) being coupled to the gate of the second gated diode switch (GDS32) and to a third circuit terminal (320).

13. The circuitry of claim 12 CHARACTERIZED IN THAT the second and third switching devices (Q2, Q3) are both junction transistors with the control terminals being the bases and the first and second output terminals being the collectors and emitters, respectively.

14. The circuit of claim 1 being CHARACTERIZED IN THAT the voltage control circuit branch (5A of Fig. 5) comprises a first switch branch (Q51) having a control terminal which is coupled to an input terminal (516) and having first (512) and second (514) output terminals, a second switch branch (Q52) having a control terminal (518) coupled to the first output terminal (512) of the first switch branch and having first (526) and second (520) output terminals with the first output terminal (526) being coupled to an output terminal of the second gated diode switch (GDS52), and a level shifting branch (D52). having a first terminal coupled to the second output terminal (520) of the second switch branch and having a second terminal (524) coupled to the gate of the second gated diode switch (GDS52).

15. The circuitry of claim 14 CHARACTERIZED IN THAT the first switch branch is a n-p-n transistor, the second switch branch is a p-n-p transistor, and the level shifting branch (D52) is a p-n diode.

16. The circuitry of claim 14 CHARACTERIZED IN THAT the first switch branch is a first n-p-n transistor (Q61 of Fig. 6) and the second switch branch is the combination of a p-n-p transistor (Q62), a second n-p-n transistor (Q63), and a third n-p-n transistor (Q64). the collector of the first n-p-n transistor is coupled to the base of the p-n-p transistor; the collector of the p-n-p transistor is coupled to the base of the second n-p-n transistor (Q63); the emittter of the second n-p-n transistor is coupled to the base of the third n-p-n transistor (Q64); the emitter of the third n-p-n transistor is coupled to an output terminal of the second gated diode switch (GDS62); and the level shifting branch comprises first (D62), second (D63) and third (D64) p-n diodes which are serially connected together with the cathode of the first coupled to the anode of the second and the cathode of the second coupled to the anode of the third.