WO1980000897A1 - Method of manufacturing display devices utilizing light-emitting diodes - Google Patents

Method of manufacturing display devices utilizing light-emitting diodes Download PDF

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Publication number
WO1980000897A1
WO1980000897A1 PCT/JP1979/000175 JP7900175W WO8000897A1 WO 1980000897 A1 WO1980000897 A1 WO 1980000897A1 JP 7900175 W JP7900175 W JP 7900175W WO 8000897 A1 WO8000897 A1 WO 8000897A1
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WIPO (PCT)
Prior art keywords
main surface
emitting diode
light emitting
wafer
electrode
Prior art date
Application number
PCT/JP1979/000175
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French (fr)
Japanese (ja)
Inventor
Y Hosomi
M Nojima
Original Assignee
Sanyo Electric Co
Y Hosomi
M Nojima
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Publication date
Application filed by Sanyo Electric Co, Y Hosomi, M Nojima filed Critical Sanyo Electric Co
Publication of WO1980000897A1 publication Critical patent/WO1980000897A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

Definitions

  • the present invention relates to a method for manufacturing a solid-state display device, particularly a display device in which light-emitting diodes are arranged in a matrix.
  • a plurality of light emitting diode door arrays (93) in which a plurality of light emitting diode elements are arranged in a line are arranged in a plurality of lines. Attempts have been made to simplify the configuration of the display device by configuring the display device.
  • light-emitting diode elements are formed vertically and horizontally on a single wafer, making it easier to handle, but on the other hand, it is denser on the semiconductor wafer. Diffusion forming a large number of PN junctions (95) with a large gap requires a lot of work. Further, in order to cause a predetermined one of the light-emitting diode elements constituting the light-emitting diode array (93) to emit light, the front and back electrodes (97) arranged in the row and column directions are selected. However, since the elements are not separated from each other, the light emission (9) occurring at the PN junction expands, and the light oozes out to the adjacent element. No good contrast can be obtained. Therefore, many problems remain, such as the necessity of preparing a mask (92) having a window (99) separately and applying electricity to the front surface side. Disclosure of the invention
  • the present invention provides a light emitting diode with a uniform PN junction.
  • OMPI Vertical and horizontal grooves reaching the PN junction are provided in advance on the entire back principal surface side of the anode to partition the PN junction for each element, and the front principal surface is covered with the front electrode except for the portion corresponding to each PN junction. , towards the groove in advance. provided on the back main surface from 3 ⁇ 4 table main surface after bonding the back main surface on insulation substrate put off interrupt., insulate the light emitting die O one de c d Nono It is characterized in that it is separated into stripes on a substrate.
  • the light emitting diode element can handle one wafer as one unit as a unit, which greatly simplifies the work of forming the light emitting diode elements in an array and reduces the cost. It is possible to obtain a display device with excellent contrast.
  • FIG. 1 to Fig. 5 are bevel views showing the implementation status of the present invention
  • Fig. 6 is a cross-sectional view along the line VI-I of Fig. 6,
  • Fig. 7 is a cross-section showing another embodiment of the groove forming process.
  • FIG. 8, FIG. 8 is a perspective view showing another embodiment of the display device
  • FIG. 9 and FIG. 11 are partially cutaway plan views showing a conventional display device
  • FIG. 12 is a cross-sectional view along the XH— ⁇ line in FIG. BEST MODE FOR CARRYING OUT THE INVENTION
  • FIG. 2 shows a preliminary processing step of the light emitting diode wafer (2).
  • the light-emitting diode wafer (2) is, for example, an n-type compound semiconductor with a thickness of 250 to 300 / cm2.
  • a back electrode (3) corresponding to the electrodes (11) and (12) formed on the insulating substrate (1) is provided on the back main surface (25) of the light emitting diode wafer (2). For example, they are formed in a matrix at intervals of 400.
  • the back electrode (3) has an omic contact with the back main surface (25) and has vertical and horizontal grooves (3) between the electrodes (3) and (3) as shown in Fig. 3. 4a) and (4b) are provided to separate the back electrodes (3) and (3) from each other.
  • Each groove (4) is formed by a dicing method or an etching method, and is dug from the back main surface (25) side to a position slightly beyond the PN junction (23).
  • the open front electrode (5) shown in Fig. 4 is formed on the front main surface (24) of the light emitting diode wafer (2).
  • the front electrode (5) has a stripe shape extending in the row direction at the same pitch as each row of the back electrode (3), and is located above the electrode forming position in the row direction of the back electrode (3).
  • a window (6) of about 250 ⁇ 250 with the electrode metal removed is opened to create an n-type region (22).
  • the light emitting diode wafer (2) which has been subjected to pre-processing with the front and back electrodes (3) and (5), is an insulating substrate as shown in FIG.
  • the back electrodes (3) belonging to the same column are aligned and fixed with a conductive adhesive.
  • the back electrodes (3) belonging to the same column are aligned and fixed with a conductive adhesive.
  • solder As a conductive adhesive to the 10 poles (3), it is heated by contacting the column electrodes (J) on the board (1), and the light emitting diode wafer is heated.
  • the second is mechanically and electrically firmly bonded onto the substrate (1). Further, if necessary, the periphery of the die pad and the substrate (1) may be fixed with a suitable insulating adhesive.
  • FIG. 8 shows another embodiment of the present invention, as described above. After forming the unit display device (16) on the insulating substrate (1) and further arranging a plurality of sets of the unit display device (16) on the main substrate (la), an even larger size is obtained. Of the display device.
  • the number of light emitting diode arrays (8) provided in each unit display device (16) is equalized, and the light emitting diode arrays (8) arranged on the same line are arranged.
  • the front electrodes (5) and (5) of (8) are connected in series with each other by a lead wire (13), and the number of rows and columns of the back electrodes is located on the periphery of the main substrate (1a).
  • the number of connection electrodes (17) and (15) corresponding to the number of electrodes is formed, and the end of each column electrode (11) on the insulating substrate (1) and the front electrode (5) of the emitting diode array (8) are I'm connected.
  • the groove (4) provided on the back main surface (25) side should be cut about 50 by a dicing method, and then about 160 ° C using the back electrode (3) as a mask. Etching with this phosphoric acid solution spreads the shape of an arc with a depth of about 100, as shown in Fig. 7, and cuts off when the light emitting diode end layer (8) is separated. (7) alignment is easy
  • the front and back electrodes (5) and (3) are formed separately from the beginning as described above, but are also formed over the entire surface, and at the same time as the formation of the groove (4) or the notch (7). Minutes ... it can be separated.
  • the number of light emitting diode elements formed on one semiconductor wafer and the pitch can be appropriately increased or decreased, and the P region and the n region can be configured in reverse. .
  • OMPI 5 In the case of selectively emitting light at the window (6a) at the second row and third column in the figure, the third row electrode (11a) from the left on the substrate (1) and the second column electrode ( 12a) by applying a forward voltage selectively between them, as shown in Fig. 6.
  • the P-junction (23mm) emits green light and the opposite window (6a ) Emits light (9).
  • the bandgap of gallium phosphide is about 2.26 eV, while the green light is about 2 eV (wavelength 5650 eV).
  • the display device formed according to the present invention is used for a time display plate or various display devices.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Led Devices (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Led Device Packages (AREA)

Abstract

A method of manufacturing a solid display device utilizing light-emitting diodes arranged in the form of a matrix, comprising the steps of: forming an electrode on the backside main surface of a light-emitting diode wafer (2) having a uniform P-N junction; slitting the backside main surface in length and breadth to form channels (4a) and (4b) extending to the P-N junction so that the P-N junction region is segregated into small sections; forming a back electrode on each such section; forming, on the front main surface of the wafer (2), front electrode (5) having openings (6) in the portion corresponding to the segregated P-N junction sections; mounting the wafer (2) of light-emitting diodes in layers on an insulated substrate (1) provided with parallel wired electrodes (11) arrayed in the form of stripes; and slitting the wafer from the front side of the main surface toward the backside channels (4b) in the direction perpendicular to the parallel wired electrodes (11) to separate the wafer of light-emitting diodes into a stripe-like configuration (8).

Description

明 細 発光ダイ ォ 一 ドを使用 した表示装置の製法 技 術 分 野  Manufacturing technology for display devices using a fine light emitting diode
こ の発明は固体表示装置、 特に発光ダイ オー ドをマ ト リ- ッ ク ス状に配 した表示装置の製造方法に関する。 背 景 技 術  The present invention relates to a method for manufacturing a solid-state display device, particularly a display device in which light-emitting diodes are arranged in a matrix. Background technology
近年、 基板上に多数の発光ダイ オ ー ドをマ ト リ ッ ク ス 状に配列 して表示画面を構成 し、 画像等の表示 行な う 装置が各種提案されてい る。 しか し、 発光ダイ オ ー ド素 子 1 個当 り 'の寸法は高々数百 程度と極めて小さ い為、 こ のダイ ォ ー ド素子を多数個規則正 し く 配列する 作業は 難 し く 、 かかる作業が発光ダイ ォ 一 ドを使用 した表示装 置の製造上の ネ ッ ク と なっていた。  In recent years, various devices have been proposed in which a large number of light-emitting diodes are arranged in a matrix on a substrate to form a display screen and display images and the like. However, since the size of one light emitting diode element is extremely small, at most about several hundreds, it is difficult to arrange a large number of such diode elements regularly. Such work has been the neck in the manufacture of display devices using light emitting diodes.
上記不都合に対し、 第 1 1 図及び第 1 2 図の如 く 、 複 数個の発光ダィ ォ ー ド素子を一列に並べた発光ダイ ォ 一 ドア レ イ （93)を複数列配置 して表示装置を構成する こ と に よ り、 表示装置の構成を簡略化する 試みがな さ れている In response to the above disadvantages, as shown in FIGS. 11 and 12, a plurality of light emitting diode door arrays (93) in which a plurality of light emitting diode elements are arranged in a line are arranged in a plurality of lines. Attempts have been made to simplify the configuration of the display device by configuring the display device.
( 実公昭 4 7 — 4 3 3 0 号公報 ） 。 ' こ の発光ダィ オー ドア レイ （93)は、 一列に連続して配置 さ れた発光ダィ ォ 一 ド素子を完全には分離せずに、 裏主 ， 面側か ら P N 接合部 (95)に達する溝 (94)を設け る こ とによ り 各発光部を電気的に分離する こ とを試みた ものであって 、 かか る構成を と る こ と によ り、 1 行分の発光ダイ ォー ド素子がま と ま って取り扱える為、 製造時の作業能率は 幾分向上する が 各発光ダイ ォ 一 ドア レ イ （93) 自体は小さ く 、 配列作業の困難さ は依然と して同 じであ る。 (Jpn. 'This light-emitting diode array (93) does not completely separate the light-emitting diode elements arranged continuously in a row, but the PN junction ( By providing a groove (94) that reaches This is an attempt to electrically separate each light emitting section.By adopting such a configuration, the light emitting diode elements for one row can be handled collectively. However, although the working efficiency during manufacturing is somewhat improved, each light emitting diode door (93) itself is small, and the difficulty of the arraying operation is still the same.
第 9 図及び第 1 0 図は、 半導体ウェハ表面へ拡散法に よってス ト ラ イ プ状の P N 接合 ©を多数形成 したも ので あ （ 米国特許第 3, 5 5 8, 9 7 4 号明細書 ） 。  9 and 10 show the case where a large number of strip-shaped PN junctions © were formed on the surface of a semiconductor wafer by a diffusion method (US Pat. No. 3,555,974). book ) .
こ れは発光ダイ ォー ド素子が 1 枚のウ ェハ上に縦横方 向に連続して形成さ れている.ので取り 扱いも容易になる が、 その反面、 半導体ウ ェハ上へ密な間隙で多数の P N 接合 (95)を拡散形成する 作業は大変な手間が掛る。 更に発 光ダイ オー ドア レ イ （93)を構成する発光ダイ オ ー ド素子の 所定の 1 素子を発光させる には、 行方向及び列方向に並 ぶ表及び裏電極（97) «を選択して電圧印加 して行な う が、 各素子は互いに分離 していな いか ら、 P N 接合部で起き る 発光（9)に拡が り を生 じ、 隣接の素子に光がに じみ出て 良好な コ ン ト ラ ス ト は得られない。 従って窓部 (99)を具え たマ ス ク （92)を別に用意し表主面側へ電 なければな ら な い等、 多 く の問題が残る。 発 明 の 開 示  In this method, light-emitting diode elements are formed vertically and horizontally on a single wafer, making it easier to handle, but on the other hand, it is denser on the semiconductor wafer. Diffusion forming a large number of PN junctions (95) with a large gap requires a lot of work. Further, in order to cause a predetermined one of the light-emitting diode elements constituting the light-emitting diode array (93) to emit light, the front and back electrodes (97) arranged in the row and column directions are selected. However, since the elements are not separated from each other, the light emission (9) occurring at the PN junction expands, and the light oozes out to the adjacent element. No good contrast can be obtained. Therefore, many problems remain, such as the necessity of preparing a mask (92) having a window (99) separately and applying electricity to the front surface side. Disclosure of the invention
本発明は、 一様な P N 接合を具えた発光ダイ オー ドゥ  The present invention provides a light emitting diode with a uniform PN junction.
OMPI エ ノヽの裏主面側の全面へ 、 P N 接合部に達する縦横溝を 予め設けて P N 接合を素子毎に区画 し、 表主面は各 P N 接合に対応する部分を残 して表電極で覆い、 裏主面を絶 縁基板上に接合 した後 ¾ 表主面側から裏主面に予め.設け られている 溝に向けて切 り込みを入れ.、発光ダイ ォ一 ド ウ エ ノヽを絶縁基板上でス ト ラ イ プ状に分離する こ とを特 徵 とする。 これに よ つて、 発光ダイ ォー ド素子は、 1 枚 の ゥ ェ ハ全体を 1 単位と して取 り扱え、 発光ダイ オ ー ド 素子を配列形成する作業が極めて簡略化さ れる と共に、 コ ン ト ラ ス ト の優れた表示装置を得る こ とが出来る。 図面の簡単な説明 OMPI Vertical and horizontal grooves reaching the PN junction are provided in advance on the entire back principal surface side of the anode to partition the PN junction for each element, and the front principal surface is covered with the front electrode except for the portion corresponding to each PN junction. , towards the groove in advance. provided on the back main surface from ¾ table main surface after bonding the back main surface on insulation substrate put off interrupt., insulate the light emitting die O one de c d Nono It is characterized in that it is separated into stripes on a substrate. As a result, the light emitting diode element can handle one wafer as one unit as a unit, which greatly simplifies the work of forming the light emitting diode elements in an array and reduces the cost. It is possible to obtain a display device with excellent contrast. BRIEF DESCRIPTION OF THE FIGURES
第 1 図 ¾至第 5 図は本発明の実施状況を示す斜面図、 第 6 図は第 5 図 VI — I線に沿う 断面図、 第 7 図は溝形成 工程の他の実施例を示す断面図、 第 8 図は表示装置の他 の実施例を示す斜面図、 第 9 図及び第 1 1 図は従来の表 示装置を示す一部を破断 した平面図、 第 1 0 図は第 9 図 X — X線に沿う 断面図、 第 1 2 図は第 1 1 図 XH — Χϋ線 に沿う 断面図であ る。 発明を実施する ための最良の形態  Fig. 1 to Fig. 5 are bevel views showing the implementation status of the present invention, Fig. 6 is a cross-sectional view along the line VI-I of Fig. 6, and Fig. 7 is a cross-section showing another embodiment of the groove forming process. FIG. 8, FIG. 8 is a perspective view showing another embodiment of the display device, FIG. 9 and FIG. 11 are partially cutaway plan views showing a conventional display device, and FIG. X—a cross-sectional view along the X-ray. FIG. 12 is a cross-sectional view along the XH—Χϋ line in FIG. BEST MODE FOR CARRYING OUT THE INVENTION
先ず第 1 図に示す様に、 セ ラ ミ ッ ク 材の如き絶縁性に 優れた平坦な絶縁基板（1)上に、 互いに平行で且つ基板（1) の全長に亘つて延びる ス ト ラ イ プ状の列電極 αΐ)と、 該列 電極（11)に平行な側縁に略矩形状の電極 (12)を形成する。 各 5 電極（11) (12)の ピ ッ チ及び形成本数は、 表示装置の表示 ドッ ト 数及び各 ド ッ ト間の ピ ッ チ に対応して決め られる。 第 2 図は、 発光ダイ ォー ドウ ェハ（2) の予備加工工程を 示す。 .発光ダイ ォー ド ウ ェハ（2)は例えば 2 5 0 〜 300 /ί の厚さの n型化合物半導体ゥ ヱ ハ ©の裏面から ヱ ピタFirst, as shown in Fig. 1, on a flat insulating substrate (1) having excellent insulation properties such as a ceramic material, And a substantially rectangular electrode (12) formed on a side edge parallel to the column electrode (11). The pitch and the number of the five electrodes (11) and (12) are determined according to the number of display dots of the display device and the pitch between the dots. FIG. 2 shows a preliminary processing step of the light emitting diode wafer (2). The light-emitting diode wafer (2) is, for example, an n-type compound semiconductor with a thickness of 250 to 300 / cm2.
10 キ シャル成長法等によ り 2 0 程度 P 型領域（21)を成長さ せ、 表及び裏主面 (24) (25)間に P N 接合部 (23)を形成 した も の であ る。 該発光ダイ オ ー ド ウ ェハ（2)め裏主面 (25)には、 前 記絶縁基板（1)上に形成 した電極（11) (12)に対応させて裏電極 (3)を例えば 4 0 0 間隔でマ ト リ ッ ク ス状に形成する。 i s 裏電極（3)は裏主面 (25)と ォー ミ ッ ク コ ンタ ク トをと る と共 に、 各電極（3) (3)間に第 3 図の如 く 縦及び横溝 （4a ) ( 4 b ) を設けて、 裏電極（3) (3)を互いに分離する。 各溝 (4)は、 ダ イ シ ン グ法或いはエ ッ チ ン グ法によって形成され、 裏主 面 (25)側か ら P N 接合部 (23)を稍越える位置ま で 様に掘 りApproximately 20 P-type regions (21) are grown by the 10-axis growth method, etc., and a PN junction (23) is formed between the front and back principal surfaces (24, 25). . A back electrode (3) corresponding to the electrodes (11) and (12) formed on the insulating substrate (1) is provided on the back main surface (25) of the light emitting diode wafer (2). For example, they are formed in a matrix at intervals of 400. is The back electrode (3) has an omic contact with the back main surface (25) and has vertical and horizontal grooves (3) between the electrodes (3) and (3) as shown in Fig. 3. 4a) and (4b) are provided to separate the back electrodes (3) and (3) from each other. Each groove (4) is formed by a dicing method or an etching method, and is dug from the back main surface (25) side to a position slightly beyond the PN junction (23).
20 込むこ と によ り、 P N 接合部 (23)を各裏電極（3)に対応させ て分離する。 20 to separate the PN junction (23) corresponding to each back electrode (3).
発光ダイ ォー ドウ ェハ（2)の表主面 (24)側には第 4 図の 口 く 表電極（5)が形成される。 表電極（5)は、 裏電極（3) の各行 と 同ピッ チで且つ行方向に延びる ス ト ラ イ プ状であって 25 、 裏電極（3)の行方向の電極形成位置の上方に一致してお り、 各裏電極（3) (3)との対向位置には電極金属を除去した 2 5 0 X 2 5 0 程度の窓部（6)を開設 して n型領域（22)をThe open front electrode (5) shown in Fig. 4 is formed on the front main surface (24) of the light emitting diode wafer (2). The front electrode (5) has a stripe shape extending in the row direction at the same pitch as each row of the back electrode (3), and is located above the electrode forming position in the row direction of the back electrode (3). Match At the position facing each back electrode (3) (3), a window (6) of about 250 × 250 with the electrode metal removed is opened to create an n-type region (22).
5 露出 させる。 5 Exposure.
上記の如 く 、 表及び裏電極（3) (5)を具えて予備加工を終 えた発光ダイ オー ドウ ェハ（2)は、 第 4 図の如 く 絶縁基板 As described above, the light emitting diode wafer (2), which has been subjected to pre-processing with the front and back electrodes (3) and (5), is an insulating substrate as shown in FIG.
(1)の列電極 01)上に、 同一列に属する 裏電極（3)を一致させ - て導電性接'着剤で固着する。 本実施例に於いては、 裏電On the column electrode 01) of (1), the back electrodes (3) belonging to the same column are aligned and fixed with a conductive adhesive. In this embodiment,
10 極（3)に導電性接着剤と して半田を付着させた後、 基板（1) の列電極（ Jに接触させて加熱 し、 発光ダイ オ ー ドウ ェハAfter applying solder as a conductive adhesive to the 10 poles (3), it is heated by contacting the column electrodes (J) on the board (1), and the light emitting diode wafer is heated.
(2)を基板（1)上へ機械的及び電気的に強固に接合させる。 更に必要に応 じて、 ダイ オー ドゥ ヱハ周囲 と基板（1) とを 適当な絶縁性接着剤で固着 し'て も可い。 (2) is mechanically and electrically firmly bonded onto the substrate (1). Further, if necessary, the periphery of the die pad and the substrate (1) may be fixed with a suitable insulating adhesive.
i s 次に第 5 図に示す如 く 、 基板（1)上に固定された発光ダ ィ ォ 一 ド ウ ェハ（2)の表主面 (24)側の各表電極（5) (5)間'よ り、 裏主面 (25)に設けた横溝 （4 b ) へ向けてダイ シ ン グ法によ り 5 0 幅程度の切 り込み（7)を形成して発光ダイ ォ 一 ド ウ ェハ（2)を列方向に分離 し、 行方向に延びる 発光ダイ ォis Next, as shown in Fig. 5, each surface electrode (5) (5) on the main surface (24) of the light emitting diode wafer (2) fixed on the substrate (1) From the gap, a notch (7) with a width of about 50 is formed by the dicing method toward the lateral groove (4b) provided on the back main surface (25), and the light emitting diode is formed. Separates wafer (2) in column direction and extends in row direction
2 0 — ドア レ イ （8)を形成する。 2 0 — forms the door lay (8).
而 る 後、 各発光ダイ オ ー ドア レ イ （8)上の表電極（5)と、 それに対応する絶縁基板（1)上の行電極 (12)と を リ 一 ド線 (1 で繋 ぐ こ と によ り、 マ ト リ ッ ク ス状の発光部を具えた固 体表示装置が完成する のであ る。  Then, the front electrode (5) on each light emitting diode array (8) and the corresponding row electrode (12) on the insulating substrate (1) are connected by a lead wire (1). As a result, a solid-state display device having a matrix-shaped light-emitting portion is completed.
2 5 第 8 図は、 本発明の他の実施例であって 上記の如 く して絶縁基板（1)上へ単位表示装置（16)を形成 した後、 更に メ ィ ン基板 （l a ) 上へ単位表示装置 (16)を複数組集合配置 する こ と によ り、 一層大型の表示装置を構成する。 FIG. 8 shows another embodiment of the present invention, as described above. After forming the unit display device (16) on the insulating substrate (1) and further arranging a plurality of sets of the unit display device (16) on the main substrate (la), an even larger size is obtained. Of the display device.
本実施例に於いては、 各単位表示装置 (16)に設ける発光 ダイ オ ー ドア レ イ （8)の行数を揃え る と共に、 同一行に位 置する堯光ダイ ォ一 ド ア レ イ.（8) の表電極（5) (5)間を互いに リ ー ド線 (13)で直列接続 し、 更にメ ィ ン基板 （ 1 a ) の周縁 には、 裏電極の行数及び列数に一致する 数の接続電極 (17) (15)を形成 し、 絶縁基板（1)上の各列電極 (11)及び発 ダイ ォ 一 ドア レ イ （8)の表電極 (5)端部を繋いでいる。  In this embodiment, the number of light emitting diode arrays (8) provided in each unit display device (16) is equalized, and the light emitting diode arrays (8) arranged on the same line are arranged. The front electrodes (5) and (5) of (8) are connected in series with each other by a lead wire (13), and the number of rows and columns of the back electrodes is located on the periphery of the main substrate (1a). The number of connection electrodes (17) and (15) corresponding to the number of electrodes is formed, and the end of each column electrode (11) on the insulating substrate (1) and the front electrode (5) of the emitting diode array (8) are I'm connected.
なお、 裏主面 (25)側に設ける 溝（4)は、 ダイ シ ング法で 5 0 程度切 り込んだ後、 更に裏電極（3)をマ ス ク と して約 1 6 0 °Cの リ ン酸液でエ ッチ ングすれば、 第 7 図の如 く 深さが約 1 0 0 のア ーチ状に拡がり、 発光ダイ オー ド 了 レ イ （8)の分離時の切 り込み（7)の位置合せが容易となる The groove (4) provided on the back main surface (25) side should be cut about 50 by a dicing method, and then about 160 ° C using the back electrode (3) as a mask. Etching with this phosphoric acid solution spreads the shape of an arc with a depth of about 100, as shown in Fig. 7, and cuts off when the light emitting diode end layer (8) is separated. (7) alignment is easy
O * O *
又 表及び裏電極（5) (3)は、 上記の如 く 最初から分離 し て形成する外に、 全面に形成 しておき、 溝 · (4)或いは切 り 込み（7)の形成と 同時に分...離する様に して も可い。  The front and back electrodes (5) and (3) are formed separately from the beginning as described above, but are also formed over the entire surface, and at the same time as the formation of the groove (4) or the notch (7). Minutes ... it can be separated.
更に、 1 枚の半導体ウ ェハ上に形成する発光ダイ ォー ド素子の数、 及び ピッ チは適宜増減出来、 又、 P領域及 び n 領域を逆に構成する こ と も可能であ る。  Furthermore, the number of light emitting diode elements formed on one semiconductor wafer and the pitch can be appropriately increased or decreased, and the P region and the n region can be configured in reverse. .
上記の如 く 形成 した固体表示装置の発光は、 例えば第  The light emission of the solid-state display device formed as described above
OMPI 5 図に於いて 2 行 3 列 目 の窓部 （6a) を選択発光させ る 場合、 基板（1)上の左から 3 番目 の行電極 (11a) と、 上か ら 2 番目 の列電極 （12a) 間に順方向の電圧を選択的に印 加する こ と によ り、 第 6 図の如 く 対応する. P 接合部 (23¾) か ら緑色発光を行ない、 対向する 窓部 （ 6 a ) から 光（9)を放出する。 こ の時、 燐化ガ リ ウ ム の禁制帯幅は約 2. 26 eV であ る の に対 'し、 緑色光は約 2 e V (波長 5650OMPI 5 In the case of selectively emitting light at the window (6a) at the second row and third column in the figure, the third row electrode (11a) from the left on the substrate (1) and the second column electrode ( 12a) by applying a forward voltage selectively between them, as shown in Fig. 6. The P-junction (23mm) emits green light and the opposite window (6a ) Emits light (9). At this time, the bandgap of gallium phosphide is about 2.26 eV, while the green light is about 2 eV (wavelength 5650 eV).
A ) と両 者 は接近してい る為、 半導体ゥ ェハ内での減衰 は比較的大き く 、 従って発光を行なっている P N 接合部 (23a) と対向する窓部 （6a) 以外に向かう 光 (90)は途中で 減衰 され、 外部には放出 されず、 コ ン ト ラ ス 卜 の優れた 固体表示装置が得 られる のであ る。 産業上の利用可能性 A) and the two are close to each other, so that the attenuation in the semiconductor wafer is relatively large, and therefore the light traveling to other than the window (6a) facing the PN junction (23a) that emits light. (90) is attenuated on the way and is not emitted to the outside, and a solid-state display device with excellent contrast is obtained. Industrial applicability
本発明によ り 形成される表示装置は、 時刻表示板或い は各種ディ ス プ レイ 装置に利用 さ れる。  The display device formed according to the present invention is used for a time display plate or various display devices.

Claims

1. 絶縁基板上に発光ダイ ォー ドア レイ を配列 し固体表 示装置を製作する方法に於て、 1. A method of arranging a light emitting diode array on an insulating substrate and manufacturing a solid-state display device.
a . 絶縁基板上に、 ス ト ラ イ プ状の列電極を形成する 工程と、  a. forming a strip-shaped column electrode on the insulating substrate;
b . 発光ダイ オー ドウ ェ ハの裏主面上に裏電極を設け る と共に、 裏主面か ら P N 接合部に向けて、 前記列 電極の ピッ チ と同一ピ ッ チ の縦溝と、 該溝に直交す 青  b. A back electrode is provided on the back main surface of the light emitting diode wafer, and a vertical groove having the same pitch as the pitch of the column electrode is provided from the back main surface to the PN junction. Blue perpendicular to groove
る 横溝を夫々形成 して、 互いに分離して縦横方向に 整列する P N 接合の小区画を裏主面へ複数形成する 工程と、  Forming a plurality of PN junction sub-sections on the back main surface which are separated from each other and are aligned in the vertical and horizontal directions.
c . 発光ダイ オ ー ド ゥ ヱハの表主面に対し、 少 く と も 囲  c. At least the surrounding area of the main surface of the light emitting diode
裏主面の P N 接合部の小区画に対向する 部分は除い て表電極で覆う工程と、  A step of covering with a front electrode excluding a portion facing the small section of the PN junction on the back main surface;
d . 裏電極を基板上の列電極上に重ねて発光ダイ ォ一 ド ウ ェハ の裏主面を基板上へ固着する 工程と、  d. stacking the back electrode on the column electrode on the substrate and fixing the back main surface of the light emitting diode wafer to the substrate;
e . 基板上に固着さ れた発光ダイ オ ー ド ウ ェハ の表主 面側か ら、 基板上の列電極と直交する方向で且つ裏 主面に設けた溝に達する 切 り込みを施 し、 該ウ ェハ を列電極 と直交する ス ト ラ イ プ状に分離する工程 'と か ら成る を特徴とする発光ダイ ォー ドを使用 した表 示装置の製法。  e. A cut is made from the front main surface of the light emitting diode wafer fixed on the substrate to the groove provided on the rear main surface in the direction perpendicular to the column electrodes on the substrate. And separating the wafer into stripes perpendicular to the column electrodes. 2. A method for manufacturing a display device using a light emitting diode, comprising the steps of:
2. 特許請求の範囲第 1 項記載の表示装置の製法に於い  2. In the manufacturing method of the display device described in claim 1
OMPI OMPI
/., WIPO て、 発光ダイ オ ー ド ゥ ヱハは、 禁制帯幅よ り 稍小 さ い エ ネ ルギ ー の緑色発光を行な う 隣化ガ リ ゥ ム半導体 /., WIPO In addition, the light emitting diode is a gallium nitride semiconductor that emits green light from an energy slightly smaller than the forbidden band width.
(Ga P) であ る 。  (Ga P).
特許請求の範囲第 2 項.記載の表示装置の製法に於い て、 ウ ェハ裏主面に縦横溝を形成す.る 工程は、 ダイ シ ン グによ り 裏主面へ浅い溝を形成 した後、 リ ン酸液で ェ ツ チ ン グ して 幅を拡げて行なって い る 。  In the method of manufacturing a display device according to claim 2, in the manufacturing method of the display device, vertical and horizontal grooves are formed on the back main surface of the wafer.The step of forming shallow grooves on the back main surface by dicing. After the formation, the width is expanded by etching with a phosphoric acid solution.
— OMPI— OMPI
IPO ノ  IPO no
PCT/JP1979/000175 1978-10-24 1979-07-02 Method of manufacturing display devices utilizing light-emitting diodes WO1980000897A1 (en)

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Cited By (12)

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Publication number Priority date Publication date Assignee Title
US5047364A (en) * 1988-06-27 1991-09-10 Mitsubishi Denki Kabushiki Kaisha Method for making a multi-point emission type semiconductor laser device
US5102824A (en) * 1990-11-05 1992-04-07 California Institute Of Technology Method of manufacturing a distributed light emitting diode flat-screen display for use in televisions
NL1029688C2 (en) * 2005-08-05 2007-02-06 Lemnis Lighting Ip Gmbh Reactive circuit for lighting device, lights-up space by loading several LEDs with full correction current
WO2007052241A2 (en) * 2005-08-05 2007-05-10 Lemnis Lighting Ip Gmbh Method for preparing an electric comprising multiple leds
WO2007052241A3 (en) * 2005-08-05 2007-08-16 Lemnis Lighting Ip Gmbh Method for preparing an electric comprising multiple leds
RU2465683C1 (en) * 2011-08-09 2012-10-27 Вячеслав Николаевич Козубов Method of forming light-emitting arrays
RU2474920C1 (en) * 2011-11-14 2013-02-10 Вячеслав Николаевич Козубов Method to generate light-emitting matrices
RU2492550C1 (en) * 2012-05-22 2013-09-10 Вячеслав Николаевич Козубов Method of forming light-emitting arrays
WO2017046000A1 (en) * 2015-09-18 2017-03-23 Osram Opto Semiconductors Gmbh Light-emitting component and method for producing a light-emitting component
US10504879B2 (en) 2015-09-18 2019-12-10 Osram Opto Semiconductors Gmbh Light-emitting component and method for producing a light-emitting component
EP3451393A4 (en) * 2016-04-29 2019-10-30 Boe Technology Group Co. Ltd. Light-emitting element and method for preparing same
WO2022167285A1 (en) * 2021-02-02 2022-08-11 Ams-Osram International Gmbh Method for producing an arrangement of semiconductor chips, and arrangement of semiconductor chips

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