USRE43674E1 - Post passivation metal scheme for high-performance integrated circuit devices - Google Patents
Post passivation metal scheme for high-performance integrated circuit devices Download PDFInfo
- Publication number
- USRE43674E1 USRE43674E1 US11/518,595 US51859506A USRE43674E US RE43674 E1 USRE43674 E1 US RE43674E1 US 51859506 A US51859506 A US 51859506A US RE43674 E USRE43674 E US RE43674E
- Authority
- US
- United States
- Prior art keywords
- layer
- metal
- over
- dielectric
- passivation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 627
- 239000002184 metal Substances 0.000 title claims abstract description 627
- 238000002161 passivation Methods 0.000 title claims abstract description 228
- 238000009826 distribution Methods 0.000 claims abstract description 34
- 238000009792 diffusion process Methods 0.000 claims abstract description 19
- 229910000679 solder Inorganic materials 0.000 claims abstract description 9
- 239000010410 layer Substances 0.000 claims description 1171
- 239000000758 substrate Substances 0.000 claims description 100
- 239000010949 copper Substances 0.000 claims description 78
- 238000005530 etching Methods 0.000 claims description 65
- 229910052802 copper Inorganic materials 0.000 claims description 60
- 238000001465 metallisation Methods 0.000 claims description 57
- 238000000059 patterning Methods 0.000 claims description 51
- RYGMFSIKBFXOCR-UHFFFAOYSA-N copper Chemical compound data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nMzAwcHgnIGhlaWdodD0nMzAwcHgnIHZpZXdCb3g9JzAgMCAzMDAgMzAwJz4KPCEtLSBFTkQgT0YgSEVBREVSIC0tPgo8cmVjdCBzdHlsZT0nb3BhY2l0eToxLjA7ZmlsbDojRkZGRkZGO3N0cm9rZTpub25lJyB3aWR0aD0nMzAwJyBoZWlnaHQ9JzMwMCcgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgeD0nMTM4JyB5PScxNzAnIGNsYXNzPSdhdG9tLTAnIHN0eWxlPSdmb250LXNpemU6NDBweDtmb250LXN0eWxlOm5vcm1hbDtmb250LXdlaWdodDpub3JtYWw7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOm5vbmU7Zm9udC1mYW1pbHk6c2Fucy1zZXJpZjt0ZXh0LWFuY2hvcjpzdGFydDtmaWxsOiMzQjQxNDMnID5DPC90ZXh0Pgo8dGV4dCB4PScxNjUuNicgeT0nMTcwJyBjbGFzcz0nYXRvbS0wJyBzdHlsZT0nZm9udC1zaXplOjQwcHg7Zm9udC1zdHlsZTpub3JtYWw7Zm9udC13ZWlnaHQ6bm9ybWFsO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTpub25lO2ZvbnQtZmFtaWx5OnNhbnMtc2VyaWY7dGV4dC1hbmNob3I6c3RhcnQ7ZmlsbDojM0I0MTQzJyA+dTwvdGV4dD4KPC9zdmc+Cg== data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nODVweCcgaGVpZ2h0PSc4NXB4JyB2aWV3Qm94PScwIDAgODUgODUnPgo8IS0tIEVORCBPRiBIRUFERVIgLS0+CjxyZWN0IHN0eWxlPSdvcGFjaXR5OjEuMDtmaWxsOiNGRkZGRkY7c3Ryb2tlOm5vbmUnIHdpZHRoPSc4NScgaGVpZ2h0PSc4NScgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgeD0nMzUuMDQ1NScgeT0nNTMuNTkwOScgY2xhc3M9J2F0b20tMCcgc3R5bGU9J2ZvbnQtc2l6ZToyM3B4O2ZvbnQtc3R5bGU6bm9ybWFsO2ZvbnQtd2VpZ2h0Om5vcm1hbDtmaWxsLW9wYWNpdHk6MTtzdHJva2U6bm9uZTtmb250LWZhbWlseTpzYW5zLXNlcmlmO3RleHQtYW5jaG9yOnN0YXJ0O2ZpbGw6IzNCNDE0MycgPkM8L3RleHQ+Cjx0ZXh0IHg9JzUxLjA0MDknIHk9JzUzLjU5MDknIGNsYXNzPSdhdG9tLTAnIHN0eWxlPSdmb250LXNpemU6MjNweDtmb250LXN0eWxlOm5vcm1hbDtmb250LXdlaWdodDpub3JtYWw7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOm5vbmU7Zm9udC1mYW1pbHk6c2Fucy1zZXJpZjt0ZXh0LWFuY2hvcjpzdGFydDtmaWxsOiMzQjQxNDMnID51PC90ZXh0Pgo8L3N2Zz4K [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 49
- 229920000642 polymer Polymers 0.000 claims description 41
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N silicon Chemical compound data:image/svg+xml;base64,<?xml version='1.0' encoding='iso-8859-1'?>
<svg version='1.1' baseProfile='full'
              xmlns='http://www.w3.org/2000/svg'
                      xmlns:rdkit='http://www.rdkit.org/xml'
                      xmlns:xlink='http://www.w3.org/1999/xlink'
                  xml:space='preserve'
width='300px' height='300px' viewBox='0 0 300 300'>
<!-- END OF HEADER -->
<rect style='opacity:1.0;fill:#FFFFFF;stroke:none' width='300' height='300' x='0' y='0'> </rect>
<text x='138' y='170' class='atom-0' style='font-size:40px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >S</text>
<text x='165.6' y='170' class='atom-0' style='font-size:40px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >i</text>
<path d='M 178.898,138 L 178.891,137.828 L 178.869,137.657 L 178.832,137.489 L 178.781,137.325 L 178.716,137.166 L 178.637,137.012 L 178.546,136.867 L 178.443,136.729 L 178.328,136.601 L 178.202,136.483 L 178.067,136.377 L 177.923,136.282 L 177.771,136.201 L 177.614,136.132 L 177.45,136.078 L 177.283,136.037 L 177.113,136.012 L 176.941,136 L 176.769,136.004 L 176.598,136.023 L 176.429,136.056 L 176.264,136.103 L 176.103,136.165 L 175.948,136.24 L 175.801,136.328 L 175.661,136.429 L 175.53,136.541 L 175.41,136.664 L 175.301,136.797 L 175.203,136.939 L 175.118,137.088 L 175.046,137.245 L 174.988,137.407 L 174.944,137.573 L 174.915,137.743 L 174.9,137.914 L 174.9,138.086 L 174.915,138.257 L 174.944,138.427 L 174.988,138.593 L 175.046,138.755 L 175.118,138.912 L 175.203,139.061 L 175.301,139.203 L 175.41,139.336 L 175.53,139.459 L 175.661,139.571 L 175.801,139.672 L 175.948,139.76 L 176.103,139.835 L 176.264,139.897 L 176.429,139.944 L 176.598,139.977 L 176.769,139.996 L 176.941,140 L 177.113,139.988 L 177.283,139.963 L 177.45,139.922 L 177.614,139.868 L 177.771,139.799 L 177.923,139.718 L 178.067,139.623 L 178.202,139.517 L 178.328,139.399 L 178.443,139.271 L 178.546,139.133 L 178.637,138.988 L 178.716,138.834 L 178.781,138.675 L 178.832,138.511 L 178.869,138.343 L 178.891,138.172 L 178.898,138 L 176.898,138 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 178.898,162 L 178.891,161.828 L 178.869,161.657 L 178.832,161.489 L 178.781,161.325 L 178.716,161.166 L 178.637,161.012 L 178.546,160.867 L 178.443,160.729 L 178.328,160.601 L 178.202,160.483 L 178.067,160.377 L 177.923,160.282 L 177.771,160.201 L 177.614,160.132 L 177.45,160.078 L 177.283,160.037 L 177.113,160.012 L 176.941,160 L 176.769,160.004 L 176.598,160.023 L 176.429,160.056 L 176.264,160.103 L 176.103,160.165 L 175.948,160.24 L 175.801,160.328 L 175.661,160.429 L 175.53,160.541 L 175.41,160.664 L 175.301,160.797 L 175.203,160.939 L 175.118,161.088 L 175.046,161.245 L 174.988,161.407 L 174.944,161.573 L 174.915,161.743 L 174.9,161.914 L 174.9,162.086 L 174.915,162.257 L 174.944,162.427 L 174.988,162.593 L 175.046,162.755 L 175.118,162.912 L 175.203,163.061 L 175.301,163.203 L 175.41,163.336 L 175.53,163.459 L 175.661,163.571 L 175.801,163.672 L 175.948,163.76 L 176.103,163.835 L 176.264,163.897 L 176.429,163.944 L 176.598,163.977 L 176.769,163.996 L 176.941,164 L 177.113,163.988 L 177.283,163.963 L 177.45,163.922 L 177.614,163.868 L 177.771,163.799 L 177.923,163.718 L 178.067,163.623 L 178.202,163.517 L 178.328,163.399 L 178.443,163.271 L 178.546,163.133 L 178.637,162.988 L 178.716,162.834 L 178.781,162.675 L 178.832,162.511 L 178.869,162.343 L 178.891,162.172 L 178.898,162 L 176.898,162 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 178.898,146 L 178.891,145.828 L 178.869,145.657 L 178.832,145.489 L 178.781,145.325 L 178.716,145.166 L 178.637,145.012 L 178.546,144.867 L 178.443,144.729 L 178.328,144.601 L 178.202,144.483 L 178.067,144.377 L 177.923,144.282 L 177.771,144.201 L 177.614,144.132 L 177.45,144.078 L 177.283,144.037 L 177.113,144.012 L 176.941,144 L 176.769,144.004 L 176.598,144.023 L 176.429,144.056 L 176.264,144.103 L 176.103,144.165 L 175.948,144.24 L 175.801,144.328 L 175.661,144.429 L 175.53,144.541 L 175.41,144.664 L 175.301,144.797 L 175.203,144.939 L 175.118,145.088 L 175.046,145.245 L 174.988,145.407 L 174.944,145.573 L 174.915,145.743 L 174.9,145.914 L 174.9,146.086 L 174.915,146.257 L 174.944,146.427 L 174.988,146.593 L 175.046,146.755 L 175.118,146.912 L 175.203,147.061 L 175.301,147.203 L 175.41,147.336 L 175.53,147.459 L 175.661,147.571 L 175.801,147.672 L 175.948,147.76 L 176.103,147.835 L 176.264,147.897 L 176.429,147.944 L 176.598,147.977 L 176.769,147.996 L 176.941,148 L 177.113,147.988 L 177.283,147.963 L 177.45,147.922 L 177.614,147.868 L 177.771,147.799 L 177.923,147.718 L 178.067,147.623 L 178.202,147.517 L 178.328,147.399 L 178.443,147.271 L 178.546,147.133 L 178.637,146.988 L 178.716,146.834 L 178.781,146.675 L 178.832,146.511 L 178.869,146.343 L 178.891,146.172 L 178.898,146 L 176.898,146 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 178.898,154 L 178.891,153.828 L 178.869,153.657 L 178.832,153.489 L 178.781,153.325 L 178.716,153.166 L 178.637,153.012 L 178.546,152.867 L 178.443,152.729 L 178.328,152.601 L 178.202,152.483 L 178.067,152.377 L 177.923,152.282 L 177.771,152.201 L 177.614,152.132 L 177.45,152.078 L 177.283,152.037 L 177.113,152.012 L 176.941,152 L 176.769,152.004 L 176.598,152.023 L 176.429,152.056 L 176.264,152.103 L 176.103,152.165 L 175.948,152.24 L 175.801,152.328 L 175.661,152.429 L 175.53,152.541 L 175.41,152.664 L 175.301,152.797 L 175.203,152.939 L 175.118,153.088 L 175.046,153.245 L 174.988,153.407 L 174.944,153.573 L 174.915,153.743 L 174.9,153.914 L 174.9,154.086 L 174.915,154.257 L 174.944,154.427 L 174.988,154.593 L 175.046,154.755 L 175.118,154.912 L 175.203,155.061 L 175.301,155.203 L 175.41,155.336 L 175.53,155.459 L 175.661,155.571 L 175.801,155.672 L 175.948,155.76 L 176.103,155.835 L 176.264,155.897 L 176.429,155.944 L 176.598,155.977 L 176.769,155.996 L 176.941,156 L 177.113,155.988 L 177.283,155.963 L 177.45,155.922 L 177.614,155.868 L 177.771,155.799 L 177.923,155.718 L 178.067,155.623 L 178.202,155.517 L 178.328,155.399 L 178.443,155.271 L 178.546,155.133 L 178.637,154.988 L 178.716,154.834 L 178.781,154.675 L 178.832,154.511 L 178.869,154.343 L 178.891,154.172 L 178.898,154 L 176.898,154 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
</svg>
 data:image/svg+xml;base64,<?xml version='1.0' encoding='iso-8859-1'?>
<svg version='1.1' baseProfile='full'
              xmlns='http://www.w3.org/2000/svg'
                      xmlns:rdkit='http://www.rdkit.org/xml'
                      xmlns:xlink='http://www.w3.org/1999/xlink'
                  xml:space='preserve'
width='85px' height='85px' viewBox='0 0 85 85'>
<!-- END OF HEADER -->
<rect style='opacity:1.0;fill:#FFFFFF;stroke:none' width='85' height='85' x='0' y='0'> </rect>
<text x='35.0455' y='53.5909' class='atom-0' style='font-size:23px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >S</text>
<text x='51.0409' y='53.5909' class='atom-0' style='font-size:23px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >i</text>
<path d='M 60.3067,35.0455 L 60.3024,34.9458 L 60.2896,34.8469 L 60.2683,34.7495 L 60.2387,34.6542 L 60.201,34.5619 L 60.1555,34.4731 L 60.1026,34.3886 L 60.0426,34.3089 L 59.976,34.2347 L 59.9032,34.1665 L 59.8248,34.1048 L 59.7415,34.0501 L 59.6537,34.0027 L 59.5622,33.9631 L 59.4676,33.9314 L 59.3707,33.908 L 59.2721,33.8931 L 59.1725,33.8866 L 59.0728,33.8888 L 58.9737,33.8995 L 58.8758,33.9187 L 58.7799,33.9462 L 58.6868,33.9819 L 58.5971,34.0254 L 58.5114,34.0765 L 58.4305,34.1348 L 58.3549,34.1998 L 58.2851,34.2711 L 58.2217,34.3481 L 58.1652,34.4303 L 58.116,34.517 L 58.0744,34.6077 L 58.0407,34.7015 L 58.0152,34.798 L 57.9982,34.8962 L 57.9896,34.9956 L 57.9896,35.0953 L 57.9982,35.1947 L 58.0152,35.2929 L 58.0407,35.3894 L 58.0744,35.4833 L 58.116,35.5739 L 58.1652,35.6606 L 58.2217,35.7428 L 58.2851,35.8198 L 58.3549,35.8911 L 58.4305,35.9561 L 58.5114,36.0144 L 58.5971,36.0655 L 58.6868,36.109 L 58.7799,36.1447 L 58.8758,36.1722 L 58.9737,36.1914 L 59.0728,36.2021 L 59.1725,36.2043 L 59.2721,36.1978 L 59.3707,36.1829 L 59.4676,36.1595 L 59.5622,36.1279 L 59.6537,36.0882 L 59.7415,36.0408 L 59.8248,35.9861 L 59.9032,35.9244 L 59.976,35.8562 L 60.0426,35.782 L 60.1026,35.7023 L 60.1555,35.6178 L 60.201,35.529 L 60.2387,35.4367 L 60.2683,35.3414 L 60.2896,35.244 L 60.3024,35.1451 L 60.3067,35.0455 L 59.1476,35.0455 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 60.3067,48.9545 L 60.3024,48.8549 L 60.2896,48.756 L 60.2683,48.6586 L 60.2387,48.5633 L 60.201,48.471 L 60.1555,48.3822 L 60.1026,48.2977 L 60.0426,48.218 L 59.976,48.1438 L 59.9032,48.0756 L 59.8248,48.0139 L 59.7415,47.9592 L 59.6537,47.9118 L 59.5622,47.8721 L 59.4676,47.8405 L 59.3707,47.8171 L 59.2721,47.8022 L 59.1725,47.7957 L 59.0728,47.7979 L 58.9737,47.8086 L 58.8758,47.8278 L 58.7799,47.8553 L 58.6868,47.891 L 58.5971,47.9345 L 58.5114,47.9856 L 58.4305,48.0439 L 58.3549,48.1089 L 58.2851,48.1802 L 58.2217,48.2572 L 58.1652,48.3394 L 58.116,48.4261 L 58.0744,48.5167 L 58.0407,48.6106 L 58.0152,48.7071 L 57.9982,48.8053 L 57.9896,48.9047 L 57.9896,49.0044 L 57.9982,49.1038 L 58.0152,49.202 L 58.0407,49.2985 L 58.0744,49.3923 L 58.116,49.483 L 58.1652,49.5697 L 58.2217,49.6519 L 58.2851,49.7289 L 58.3549,49.8002 L 58.4305,49.8652 L 58.5114,49.9235 L 58.5971,49.9746 L 58.6868,50.0181 L 58.7799,50.0538 L 58.8758,50.0813 L 58.9737,50.1005 L 59.0728,50.1112 L 59.1725,50.1134 L 59.2721,50.1069 L 59.3707,50.092 L 59.4676,50.0686 L 59.5622,50.0369 L 59.6537,49.9973 L 59.7415,49.9499 L 59.8248,49.8952 L 59.9032,49.8335 L 59.976,49.7653 L 60.0426,49.6911 L 60.1026,49.6114 L 60.1555,49.5269 L 60.201,49.4381 L 60.2387,49.3458 L 60.2683,49.2505 L 60.2896,49.1531 L 60.3024,49.0542 L 60.3067,48.9545 L 59.1476,48.9545 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 60.3067,39.6818 L 60.3024,39.5822 L 60.2896,39.4833 L 60.2683,39.3858 L 60.2387,39.2906 L 60.201,39.1983 L 60.1555,39.1095 L 60.1026,39.025 L 60.0426,38.9453 L 59.976,38.8711 L 59.9032,38.8029 L 59.8248,38.7412 L 59.7415,38.6864 L 59.6537,38.6391 L 59.5622,38.5994 L 59.4676,38.5678 L 59.3707,38.5444 L 59.2721,38.5294 L 59.1725,38.523 L 59.0728,38.5251 L 58.9737,38.5359 L 58.8758,38.555 L 58.7799,38.5826 L 58.6868,38.6183 L 58.5971,38.6618 L 58.5114,38.7129 L 58.4305,38.7712 L 58.3549,38.8362 L 58.2851,38.9075 L 58.2217,38.9845 L 58.1652,39.0667 L 58.116,39.1534 L 58.0744,39.244 L 58.0407,39.3379 L 58.0152,39.4343 L 57.9982,39.5326 L 57.9896,39.632 L 57.9896,39.7317 L 57.9982,39.831 L 58.0152,39.9293 L 58.0407,40.0257 L 58.0744,40.1196 L 58.116,40.2103 L 58.1652,40.297 L 58.2217,40.3792 L 58.2851,40.4562 L 58.3549,40.5274 L 58.4305,40.5925 L 58.5114,40.6507 L 58.5971,40.7018 L 58.6868,40.7454 L 58.7799,40.7811 L 58.8758,40.8086 L 58.9737,40.8278 L 59.0728,40.8385 L 59.1725,40.8406 L 59.2721,40.8342 L 59.3707,40.8192 L 59.4676,40.7959 L 59.5622,40.7642 L 59.6537,40.7246 L 59.7415,40.6772 L 59.8248,40.6225 L 59.9032,40.5608 L 59.976,40.4926 L 60.0426,40.4183 L 60.1026,40.3387 L 60.1555,40.2541 L 60.201,40.1654 L 60.2387,40.073 L 60.2683,39.9778 L 60.2896,39.8804 L 60.3024,39.7815 L 60.3067,39.6818 L 59.1476,39.6818 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 60.3067,44.3182 L 60.3024,44.2185 L 60.2896,44.1196 L 60.2683,44.0222 L 60.2387,43.927 L 60.201,43.8346 L 60.1555,43.7459 L 60.1026,43.6613 L 60.0426,43.5817 L 59.976,43.5074 L 59.9032,43.4392 L 59.8248,43.3775 L 59.7415,43.3228 L 59.6537,43.2754 L 59.5622,43.2358 L 59.4676,43.2041 L 59.3707,43.1808 L 59.2721,43.1658 L 59.1725,43.1594 L 59.0728,43.1615 L 58.9737,43.1722 L 58.8758,43.1914 L 58.7799,43.2189 L 58.6868,43.2546 L 58.5971,43.2982 L 58.5114,43.3493 L 58.4305,43.4075 L 58.3549,43.4726 L 58.2851,43.5438 L 58.2217,43.6208 L 58.1652,43.703 L 58.116,43.7897 L 58.0744,43.8804 L 58.0407,43.9743 L 58.0152,44.0707 L 57.9982,44.169 L 57.9896,44.2683 L 57.9896,44.368 L 57.9982,44.4674 L 58.0152,44.5657 L 58.0407,44.6621 L 58.0744,44.756 L 58.116,44.8466 L 58.1652,44.9333 L 58.2217,45.0155 L 58.2851,45.0925 L 58.3549,45.1638 L 58.4305,45.2288 L 58.5114,45.2871 L 58.5971,45.3382 L 58.6868,45.3817 L 58.7799,45.4174 L 58.8758,45.445 L 58.9737,45.4641 L 59.0728,45.4749 L 59.1725,45.477 L 59.2721,45.4706 L 59.3707,45.4556 L 59.4676,45.4322 L 59.5622,45.4006 L 59.6537,45.3609 L 59.7415,45.3136 L 59.8248,45.2588 L 59.9032,45.1971 L 59.976,45.1289 L 60.0426,45.0547 L 60.1026,44.975 L 60.1555,44.8905 L 60.201,44.8017 L 60.2387,44.7094 L 60.2683,44.6142 L 60.2896,44.5167 L 60.3024,44.4178 L 60.3067,44.3182 L 59.1476,44.3182 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
</svg>
 [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 41
- 229910052710 silicon Inorganic materials 0.000 claims description 41
- 239000010703 silicon Substances 0.000 claims description 41
- 229920001721 Polyimide Polymers 0.000 claims description 34
- 239000004642 Polyimide Substances 0.000 claims description 34
- 239000004065 semiconductor Substances 0.000 claims description 34
- 229910052737 gold Inorganic materials 0.000 claims description 32
- 238000000151 deposition Methods 0.000 claims description 31
- 229910052782 aluminium Inorganic materials 0.000 claims description 29
- 238000007747 plating Methods 0.000 claims description 28
- 229920002120 photoresistant polymer Polymers 0.000 claims description 21
- 238000004544 sputter deposition Methods 0.000 claims description 18
- 229910008599 TiW Inorganic materials 0.000 claims description 17
- 238000009713 electroplating Methods 0.000 claims description 17
- 229910052759 nickel Inorganic materials 0.000 claims description 15
- 229910052804 chromium Inorganic materials 0.000 claims description 14
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminum Chemical compound data:image/svg+xml;base64,<?xml version='1.0' encoding='iso-8859-1'?>
<svg version='1.1' baseProfile='full'
              xmlns='http://www.w3.org/2000/svg'
                      xmlns:rdkit='http://www.rdkit.org/xml'
                      xmlns:xlink='http://www.w3.org/1999/xlink'
                  xml:space='preserve'
width='300px' height='300px' viewBox='0 0 300 300'>
<!-- END OF HEADER -->
<rect style='opacity:1.0;fill:#FFFFFF;stroke:none' width='300' height='300' x='0' y='0'> </rect>
<text x='138' y='170' class='atom-0' style='font-size:40px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >A</text>
<text x='165.6' y='170' class='atom-0' style='font-size:40px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >l</text>
<path d='M 178.898,150 L 178.891,149.828 L 178.869,149.657 L 178.832,149.489 L 178.781,149.325 L 178.716,149.166 L 178.637,149.012 L 178.546,148.867 L 178.443,148.729 L 178.328,148.601 L 178.202,148.483 L 178.067,148.377 L 177.923,148.282 L 177.771,148.201 L 177.614,148.132 L 177.45,148.078 L 177.283,148.037 L 177.113,148.012 L 176.941,148 L 176.769,148.004 L 176.598,148.023 L 176.429,148.056 L 176.264,148.103 L 176.103,148.165 L 175.948,148.24 L 175.801,148.328 L 175.661,148.429 L 175.53,148.541 L 175.41,148.664 L 175.301,148.797 L 175.203,148.939 L 175.118,149.088 L 175.046,149.245 L 174.988,149.407 L 174.944,149.573 L 174.915,149.743 L 174.9,149.914 L 174.9,150.086 L 174.915,150.257 L 174.944,150.427 L 174.988,150.593 L 175.046,150.755 L 175.118,150.912 L 175.203,151.061 L 175.301,151.203 L 175.41,151.336 L 175.53,151.459 L 175.661,151.571 L 175.801,151.672 L 175.948,151.76 L 176.103,151.835 L 176.264,151.897 L 176.429,151.944 L 176.598,151.977 L 176.769,151.996 L 176.941,152 L 177.113,151.988 L 177.283,151.963 L 177.45,151.922 L 177.614,151.868 L 177.771,151.799 L 177.923,151.718 L 178.067,151.623 L 178.202,151.517 L 178.328,151.399 L 178.443,151.271 L 178.546,151.133 L 178.637,150.988 L 178.716,150.834 L 178.781,150.675 L 178.832,150.511 L 178.869,150.343 L 178.891,150.172 L 178.898,150 L 176.898,150 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 178.898,168.455 L 178.891,168.283 L 178.869,168.112 L 178.832,167.944 L 178.781,167.779 L 178.716,167.62 L 178.637,167.467 L 178.546,167.321 L 178.443,167.184 L 178.328,167.056 L 178.202,166.938 L 178.067,166.831 L 177.923,166.737 L 177.771,166.655 L 177.614,166.587 L 177.45,166.532 L 177.283,166.492 L 177.113,166.466 L 176.941,166.455 L 176.769,166.459 L 176.598,166.477 L 176.429,166.51 L 176.264,166.558 L 176.103,166.619 L 175.948,166.695 L 175.801,166.783 L 175.661,166.883 L 175.53,166.995 L 175.41,167.118 L 175.301,167.251 L 175.203,167.393 L 175.118,167.543 L 175.046,167.699 L 174.988,167.861 L 174.944,168.028 L 174.915,168.197 L 174.9,168.369 L 174.9,168.541 L 174.915,168.712 L 174.944,168.882 L 174.988,169.048 L 175.046,169.21 L 175.118,169.366 L 175.203,169.516 L 175.301,169.658 L 175.41,169.791 L 175.53,169.914 L 175.661,170.026 L 175.801,170.126 L 175.948,170.215 L 176.103,170.29 L 176.264,170.351 L 176.429,170.399 L 176.598,170.432 L 176.769,170.45 L 176.941,170.454 L 177.113,170.443 L 177.283,170.417 L 177.45,170.377 L 177.614,170.322 L 177.771,170.254 L 177.923,170.172 L 178.067,170.078 L 178.202,169.971 L 178.328,169.853 L 178.443,169.725 L 178.546,169.588 L 178.637,169.442 L 178.716,169.289 L 178.781,169.13 L 178.832,168.965 L 178.869,168.797 L 178.891,168.626 L 178.898,168.455 L 176.898,168.455 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 178.898,131.545 L 178.891,131.374 L 178.869,131.203 L 178.832,131.035 L 178.781,130.87 L 178.716,130.711 L 178.637,130.558 L 178.546,130.412 L 178.443,130.275 L 178.328,130.147 L 178.202,130.029 L 178.067,129.922 L 177.923,129.828 L 177.771,129.746 L 177.614,129.678 L 177.45,129.623 L 177.283,129.583 L 177.113,129.557 L 176.941,129.546 L 176.769,129.55 L 176.598,129.568 L 176.429,129.601 L 176.264,129.649 L 176.103,129.71 L 175.948,129.785 L 175.801,129.874 L 175.661,129.974 L 175.53,130.086 L 175.41,130.209 L 175.301,130.342 L 175.203,130.484 L 175.118,130.634 L 175.046,130.79 L 174.988,130.952 L 174.944,131.118 L 174.915,131.288 L 174.9,131.459 L 174.9,131.631 L 174.915,131.803 L 174.944,131.972 L 174.988,132.139 L 175.046,132.301 L 175.118,132.457 L 175.203,132.607 L 175.301,132.749 L 175.41,132.882 L 175.53,133.005 L 175.661,133.117 L 175.801,133.217 L 175.948,133.305 L 176.103,133.381 L 176.264,133.442 L 176.429,133.49 L 176.598,133.523 L 176.769,133.541 L 176.941,133.545 L 177.113,133.534 L 177.283,133.508 L 177.45,133.468 L 177.614,133.413 L 177.771,133.345 L 177.923,133.263 L 178.067,133.169 L 178.202,133.062 L 178.328,132.944 L 178.443,132.816 L 178.546,132.679 L 178.637,132.533 L 178.716,132.38 L 178.781,132.221 L 178.832,132.056 L 178.869,131.888 L 178.891,131.717 L 178.898,131.545 L 176.898,131.545 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 178.898,150 L 178.891,149.828 L 178.869,149.657 L 178.832,149.489 L 178.781,149.325 L 178.716,149.166 L 178.637,149.012 L 178.546,148.867 L 178.443,148.729 L 178.328,148.601 L 178.202,148.483 L 178.067,148.377 L 177.923,148.282 L 177.771,148.201 L 177.614,148.132 L 177.45,148.078 L 177.283,148.037 L 177.113,148.012 L 176.941,148 L 176.769,148.004 L 176.598,148.023 L 176.429,148.056 L 176.264,148.103 L 176.103,148.165 L 175.948,148.24 L 175.801,148.328 L 175.661,148.429 L 175.53,148.541 L 175.41,148.664 L 175.301,148.797 L 175.203,148.939 L 175.118,149.088 L 175.046,149.245 L 174.988,149.407 L 174.944,149.573 L 174.915,149.743 L 174.9,149.914 L 174.9,150.086 L 174.915,150.257 L 174.944,150.427 L 174.988,150.593 L 175.046,150.755 L 175.118,150.912 L 175.203,151.061 L 175.301,151.203 L 175.41,151.336 L 175.53,151.459 L 175.661,151.571 L 175.801,151.672 L 175.948,151.76 L 176.103,151.835 L 176.264,151.897 L 176.429,151.944 L 176.598,151.977 L 176.769,151.996 L 176.941,152 L 177.113,151.988 L 177.283,151.963 L 177.45,151.922 L 177.614,151.868 L 177.771,151.799 L 177.923,151.718 L 178.067,151.623 L 178.202,151.517 L 178.328,151.399 L 178.443,151.271 L 178.546,151.133 L 178.637,150.988 L 178.716,150.834 L 178.781,150.675 L 178.832,150.511 L 178.869,150.343 L 178.891,150.172 L 178.898,150 L 176.898,150 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
</svg>
 data:image/svg+xml;base64,<?xml version='1.0' encoding='iso-8859-1'?>
<svg version='1.1' baseProfile='full'
              xmlns='http://www.w3.org/2000/svg'
                      xmlns:rdkit='http://www.rdkit.org/xml'
                      xmlns:xlink='http://www.w3.org/1999/xlink'
                  xml:space='preserve'
width='85px' height='85px' viewBox='0 0 85 85'>
<!-- END OF HEADER -->
<rect style='opacity:1.0;fill:#FFFFFF;stroke:none' width='85' height='85' x='0' y='0'> </rect>
<text x='35.0455' y='53.5909' class='atom-0' style='font-size:23px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >A</text>
<text x='51.0409' y='53.5909' class='atom-0' style='font-size:23px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >l</text>
<path d='M 60.3067,42 L 60.3024,41.9004 L 60.2896,41.8015 L 60.2683,41.704 L 60.2387,41.6088 L 60.201,41.5164 L 60.1555,41.4277 L 60.1026,41.3431 L 60.0426,41.2635 L 59.976,41.1893 L 59.9032,41.1211 L 59.8248,41.0594 L 59.7415,41.0046 L 59.6537,40.9572 L 59.5622,40.9176 L 59.4676,40.886 L 59.3707,40.8626 L 59.2721,40.8476 L 59.1725,40.8412 L 59.0728,40.8433 L 58.9737,40.854 L 58.8758,40.8732 L 58.7799,40.9008 L 58.6868,40.9364 L 58.5971,40.98 L 58.5114,41.0311 L 58.4305,41.0894 L 58.3549,41.1544 L 58.2851,41.2257 L 58.2217,41.3027 L 58.1652,41.3848 L 58.116,41.4716 L 58.0744,41.5622 L 58.0407,41.6561 L 58.0152,41.7525 L 57.9982,41.8508 L 57.9896,41.9501 L 57.9896,42.0499 L 57.9982,42.1492 L 58.0152,42.2475 L 58.0407,42.3439 L 58.0744,42.4378 L 58.116,42.5284 L 58.1652,42.6152 L 58.2217,42.6973 L 58.2851,42.7743 L 58.3549,42.8456 L 58.4305,42.9106 L 58.5114,42.9689 L 58.5971,43.02 L 58.6868,43.0636 L 58.7799,43.0992 L 58.8758,43.1268 L 58.9737,43.146 L 59.0728,43.1567 L 59.1725,43.1588 L 59.2721,43.1524 L 59.3707,43.1374 L 59.4676,43.114 L 59.5622,43.0824 L 59.6537,43.0428 L 59.7415,42.9954 L 59.8248,42.9406 L 59.9032,42.8789 L 59.976,42.8107 L 60.0426,42.7365 L 60.1026,42.6569 L 60.1555,42.5723 L 60.201,42.4836 L 60.2387,42.3912 L 60.2683,42.296 L 60.2896,42.1985 L 60.3024,42.0996 L 60.3067,42 L 59.1476,42 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 60.3067,46.6364 L 60.3024,46.5367 L 60.2896,46.4378 L 60.2683,46.3404 L 60.2387,46.2451 L 60.201,46.1528 L 60.1555,46.064 L 60.1026,45.9795 L 60.0426,45.8998 L 59.976,45.8256 L 59.9032,45.7574 L 59.8248,45.6957 L 59.7415,45.641 L 59.6537,45.5936 L 59.5622,45.554 L 59.4676,45.5223 L 59.3707,45.4989 L 59.2721,45.484 L 59.1725,45.4775 L 59.0728,45.4797 L 58.9737,45.4904 L 58.8758,45.5096 L 58.7799,45.5371 L 58.6868,45.5728 L 58.5971,45.6163 L 58.5114,45.6675 L 58.4305,45.7257 L 58.3549,45.7907 L 58.2851,45.862 L 58.2217,45.939 L 58.1652,46.0212 L 58.116,46.1079 L 58.0744,46.1986 L 58.0407,46.2924 L 58.0152,46.3889 L 57.9982,46.4871 L 57.9896,46.5865 L 57.9896,46.6862 L 57.9982,46.7856 L 58.0152,46.8839 L 58.0407,46.9803 L 58.0744,47.0742 L 58.116,47.1648 L 58.1652,47.2515 L 58.2217,47.3337 L 58.2851,47.4107 L 58.3549,47.482 L 58.4305,47.547 L 58.5114,47.6053 L 58.5971,47.6564 L 58.6868,47.6999 L 58.7799,47.7356 L 58.8758,47.7631 L 58.9737,47.7823 L 59.0728,47.793 L 59.1725,47.7952 L 59.2721,47.7888 L 59.3707,47.7738 L 59.4676,47.7504 L 59.5622,47.7188 L 59.6537,47.6791 L 59.7415,47.6317 L 59.8248,47.577 L 59.9032,47.5153 L 59.976,47.4471 L 60.0426,47.3729 L 60.1026,47.2932 L 60.1555,47.2087 L 60.201,47.1199 L 60.2387,47.0276 L 60.2683,46.9323 L 60.2896,46.8349 L 60.3024,46.736 L 60.3067,46.6364 L 59.1476,46.6364 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 60.3067,37.3636 L 60.3024,37.264 L 60.2896,37.1651 L 60.2683,37.0677 L 60.2387,36.9724 L 60.201,36.8801 L 60.1555,36.7913 L 60.1026,36.7068 L 60.0426,36.6271 L 59.976,36.5529 L 59.9032,36.4847 L 59.8248,36.423 L 59.7415,36.3683 L 59.6537,36.3209 L 59.5622,36.2812 L 59.4676,36.2496 L 59.3707,36.2262 L 59.2721,36.2112 L 59.1725,36.2048 L 59.0728,36.207 L 58.9737,36.2177 L 58.8758,36.2369 L 58.7799,36.2644 L 58.6868,36.3001 L 58.5971,36.3436 L 58.5114,36.3947 L 58.4305,36.453 L 58.3549,36.518 L 58.2851,36.5893 L 58.2217,36.6663 L 58.1652,36.7485 L 58.116,36.8352 L 58.0744,36.9258 L 58.0407,37.0197 L 58.0152,37.1161 L 57.9982,37.2144 L 57.9896,37.3138 L 57.9896,37.4135 L 57.9982,37.5129 L 58.0152,37.6111 L 58.0407,37.7076 L 58.0744,37.8014 L 58.116,37.8921 L 58.1652,37.9788 L 58.2217,38.061 L 58.2851,38.138 L 58.3549,38.2093 L 58.4305,38.2743 L 58.5114,38.3325 L 58.5971,38.3837 L 58.6868,38.4272 L 58.7799,38.4629 L 58.8758,38.4904 L 58.9737,38.5096 L 59.0728,38.5203 L 59.1725,38.5225 L 59.2721,38.516 L 59.3707,38.5011 L 59.4676,38.4777 L 59.5622,38.446 L 59.6537,38.4064 L 59.7415,38.359 L 59.8248,38.3043 L 59.9032,38.2426 L 59.976,38.1744 L 60.0426,38.1002 L 60.1026,38.0205 L 60.1555,37.936 L 60.201,37.8472 L 60.2387,37.7549 L 60.2683,37.6596 L 60.2896,37.5622 L 60.3024,37.4633 L 60.3067,37.3636 L 59.1476,37.3636 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 60.3067,42 L 60.3024,41.9004 L 60.2896,41.8015 L 60.2683,41.704 L 60.2387,41.6088 L 60.201,41.5164 L 60.1555,41.4277 L 60.1026,41.3431 L 60.0426,41.2635 L 59.976,41.1893 L 59.9032,41.1211 L 59.8248,41.0594 L 59.7415,41.0046 L 59.6537,40.9572 L 59.5622,40.9176 L 59.4676,40.886 L 59.3707,40.8626 L 59.2721,40.8476 L 59.1725,40.8412 L 59.0728,40.8433 L 58.9737,40.854 L 58.8758,40.8732 L 58.7799,40.9008 L 58.6868,40.9364 L 58.5971,40.98 L 58.5114,41.0311 L 58.4305,41.0894 L 58.3549,41.1544 L 58.2851,41.2257 L 58.2217,41.3027 L 58.1652,41.3848 L 58.116,41.4716 L 58.0744,41.5622 L 58.0407,41.6561 L 58.0152,41.7525 L 57.9982,41.8508 L 57.9896,41.9501 L 57.9896,42.0499 L 57.9982,42.1492 L 58.0152,42.2475 L 58.0407,42.3439 L 58.0744,42.4378 L 58.116,42.5284 L 58.1652,42.6152 L 58.2217,42.6973 L 58.2851,42.7743 L 58.3549,42.8456 L 58.4305,42.9106 L 58.5114,42.9689 L 58.5971,43.02 L 58.6868,43.0636 L 58.7799,43.0992 L 58.8758,43.1268 L 58.9737,43.146 L 59.0728,43.1567 L 59.1725,43.1588 L 59.2721,43.1524 L 59.3707,43.1374 L 59.4676,43.114 L 59.5622,43.0824 L 59.6537,43.0428 L 59.7415,42.9954 L 59.8248,42.9406 L 59.9032,42.8789 L 59.976,42.8107 L 60.0426,42.7365 L 60.1026,42.6569 L 60.1555,42.5723 L 60.201,42.4836 L 60.2387,42.3912 L 60.2683,42.296 L 60.2896,42.1985 L 60.3024,42.0996 L 60.3067,42 L 59.1476,42 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
</svg>
 [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 11
- 229910052719 titanium Inorganic materials 0.000 claims description 11
- 150000002739 metals Chemical class 0.000 claims description 3
- 238000007772 electroless plating Methods 0.000 claims description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nMzAwcHgnIGhlaWdodD0nMzAwcHgnIHZpZXdCb3g9JzAgMCAzMDAgMzAwJz4KPCEtLSBFTkQgT0YgSEVBREVSIC0tPgo8cmVjdCBzdHlsZT0nb3BhY2l0eToxLjA7ZmlsbDojRkZGRkZGO3N0cm9rZTpub25lJyB3aWR0aD0nMzAwJyBoZWlnaHQ9JzMwMCcgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgeD0nMTM4JyB5PScxNzAnIGNsYXNzPSdhdG9tLTAnIHN0eWxlPSdmb250LXNpemU6NDBweDtmb250LXN0eWxlOm5vcm1hbDtmb250LXdlaWdodDpub3JtYWw7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOm5vbmU7Zm9udC1mYW1pbHk6c2Fucy1zZXJpZjt0ZXh0LWFuY2hvcjpzdGFydDtmaWxsOiMzQjQxNDMnID5OPC90ZXh0Pgo8dGV4dCB4PScxNjUuNicgeT0nMTcwJyBjbGFzcz0nYXRvbS0wJyBzdHlsZT0nZm9udC1zaXplOjQwcHg7Zm9udC1zdHlsZTpub3JtYWw7Zm9udC13ZWlnaHQ6bm9ybWFsO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTpub25lO2ZvbnQtZmFtaWx5OnNhbnMtc2VyaWY7dGV4dC1hbmNob3I6c3RhcnQ7ZmlsbDojM0I0MTQzJyA+aTwvdGV4dD4KPC9zdmc+Cg== data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nODVweCcgaGVpZ2h0PSc4NXB4JyB2aWV3Qm94PScwIDAgODUgODUnPgo8IS0tIEVORCBPRiBIRUFERVIgLS0+CjxyZWN0IHN0eWxlPSdvcGFjaXR5OjEuMDtmaWxsOiNGRkZGRkY7c3Ryb2tlOm5vbmUnIHdpZHRoPSc4NScgaGVpZ2h0PSc4NScgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgeD0nMzUuMDQ1NScgeT0nNTMuNTkwOScgY2xhc3M9J2F0b20tMCcgc3R5bGU9J2ZvbnQtc2l6ZToyM3B4O2ZvbnQtc3R5bGU6bm9ybWFsO2ZvbnQtd2VpZ2h0Om5vcm1hbDtmaWxsLW9wYWNpdHk6MTtzdHJva2U6bm9uZTtmb250LWZhbWlseTpzYW5zLXNlcmlmO3RleHQtYW5jaG9yOnN0YXJ0O2ZpbGw6IzNCNDE0MycgPk48L3RleHQ+Cjx0ZXh0IHg9JzUxLjA0MDknIHk9JzUzLjU5MDknIGNsYXNzPSdhdG9tLTAnIHN0eWxlPSdmb250LXNpemU6MjNweDtmb250LXN0eWxlOm5vcm1hbDtmb250LXdlaWdodDpub3JtYWw7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOm5vbmU7Zm9udC1mYW1pbHk6c2Fucy1zZXJpZjt0ZXh0LWFuY2hvcjpzdGFydDtmaWxsOiMzQjQxNDMnID5pPC90ZXh0Pgo8L3N2Zz4K [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims 20
- 239000011651 chromium Substances 0.000 claims 8
- 239000010936 titanium Substances 0.000 claims 7
- VYZAMTAEIAYCRO-UHFFFAOYSA-N chromium Chemical compound data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nMzAwcHgnIGhlaWdodD0nMzAwcHgnIHZpZXdCb3g9JzAgMCAzMDAgMzAwJz4KPCEtLSBFTkQgT0YgSEVBREVSIC0tPgo8cmVjdCBzdHlsZT0nb3BhY2l0eToxLjA7ZmlsbDojRkZGRkZGO3N0cm9rZTpub25lJyB3aWR0aD0nMzAwJyBoZWlnaHQ9JzMwMCcgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgeD0nMTM4JyB5PScxNzAnIGNsYXNzPSdhdG9tLTAnIHN0eWxlPSdmb250LXNpemU6NDBweDtmb250LXN0eWxlOm5vcm1hbDtmb250LXdlaWdodDpub3JtYWw7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOm5vbmU7Zm9udC1mYW1pbHk6c2Fucy1zZXJpZjt0ZXh0LWFuY2hvcjpzdGFydDtmaWxsOiMzQjQxNDMnID5DPC90ZXh0Pgo8dGV4dCB4PScxNjUuNicgeT0nMTcwJyBjbGFzcz0nYXRvbS0wJyBzdHlsZT0nZm9udC1zaXplOjQwcHg7Zm9udC1zdHlsZTpub3JtYWw7Zm9udC13ZWlnaHQ6bm9ybWFsO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTpub25lO2ZvbnQtZmFtaWx5OnNhbnMtc2VyaWY7dGV4dC1hbmNob3I6c3RhcnQ7ZmlsbDojM0I0MTQzJyA+cjwvdGV4dD4KPHBhdGggZD0nTSAxODEuNjk5LDE0NiBMIDE4MS42OTIsMTQ1LjgyOCBMIDE4MS42NywxNDUuNjU3IEwgMTgxLjYzMywxNDUuNDg5IEwgMTgxLjU4MiwxNDUuMzI1IEwgMTgxLjUxNywxNDUuMTY2IEwgMTgxLjQzOCwxNDUuMDEyIEwgMTgxLjM0NywxNDQuODY3IEwgMTgxLjI0NCwxNDQuNzI5IEwgMTgxLjEyOSwxNDQuNjAxIEwgMTgxLjAwMywxNDQuNDgzIEwgMTgwLjg2OCwxNDQuMzc3IEwgMTgwLjcyNCwxNDQuMjgyIEwgMTgwLjU3MywxNDQuMjAxIEwgMTgwLjQxNSwxNDQuMTMyIEwgMTgwLjI1MiwxNDQuMDc4IEwgMTgwLjA4NCwxNDQuMDM3IEwgMTc5LjkxNCwxNDQuMDEyIEwgMTc5Ljc0MiwxNDQgTCAxNzkuNTcsMTQ0LjAwNCBMIDE3OS4zOTksMTQ0LjAyMyBMIDE3OS4yMywxNDQuMDU2IEwgMTc5LjA2NSwxNDQuMTAzIEwgMTc4LjkwNCwxNDQuMTY1IEwgMTc4Ljc0OSwxNDQuMjQgTCAxNzguNjAyLDE0NC4zMjggTCAxNzguNDYyLDE0NC40MjkgTCAxNzguMzMxLDE0NC41NDEgTCAxNzguMjExLDE0NC42NjQgTCAxNzguMTAyLDE0NC43OTcgTCAxNzguMDA0LDE0NC45MzkgTCAxNzcuOTE5LDE0NS4wODggTCAxNzcuODQ3LDE0NS4yNDUgTCAxNzcuNzg5LDE0NS40MDcgTCAxNzcuNzQ1LDE0NS41NzMgTCAxNzcuNzE2LDE0NS43NDMgTCAxNzcuNzAxLDE0NS45MTQgTCAxNzcuNzAxLDE0Ni4wODYgTCAxNzcuNzE2LDE0Ni4yNTcgTCAxNzcuNzQ1LDE0Ni40MjcgTCAxNzcuNzg5LDE0Ni41OTMgTCAxNzcuODQ3LDE0Ni43NTUgTCAxNzcuOTE5LDE0Ni45MTIgTCAxNzguMDA0LDE0Ny4wNjEgTCAxNzguMTAyLDE0Ny4yMDMgTCAxNzguMjExLDE0Ny4zMzYgTCAxNzguMzMxLDE0Ny40NTkgTCAxNzguNDYyLDE0Ny41NzEgTCAxNzguNjAyLDE0Ny42NzIgTCAxNzguNzQ5LDE0Ny43NiBMIDE3OC45MDQsMTQ3LjgzNSBMIDE3OS4wNjUsMTQ3Ljg5NyBMIDE3OS4yMywxNDcuOTQ0IEwgMTc5LjM5OSwxNDcuOTc3IEwgMTc5LjU3LDE0Ny45OTYgTCAxNzkuNzQyLDE0OCBMIDE3OS45MTQsMTQ3Ljk4OCBMIDE4MC4wODQsMTQ3Ljk2MyBMIDE4MC4yNTIsMTQ3LjkyMiBMIDE4MC40MTUsMTQ3Ljg2OCBMIDE4MC41NzMsMTQ3Ljc5OSBMIDE4MC43MjQsMTQ3LjcxOCBMIDE4MC44NjgsMTQ3LjYyMyBMIDE4MS4wMDMsMTQ3LjUxNyBMIDE4MS4xMjksMTQ3LjM5OSBMIDE4MS4yNDQsMTQ3LjI3MSBMIDE4MS4zNDcsMTQ3LjEzMyBMIDE4MS40MzgsMTQ2Ljk4OCBMIDE4MS41MTcsMTQ2LjgzNCBMIDE4MS41ODIsMTQ2LjY3NSBMIDE4MS42MzMsMTQ2LjUxMSBMIDE4MS42NywxNDYuMzQzIEwgMTgxLjY5MiwxNDYuMTcyIEwgMTgxLjY5OSwxNDYgTCAxNzkuNjk5LDE0NiBaJyBzdHlsZT0nZmlsbDojMDAwMDAwO2ZpbGwtcnVsZTpldmVub2RkO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTojMDAwMDAwO3N0cm9rZS13aWR0aDowcHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MTsnIC8+CjxwYXRoIGQ9J00gMTgxLjY5OSwxNTQgTCAxODEuNjkyLDE1My44MjggTCAxODEuNjcsMTUzLjY1NyBMIDE4MS42MzMsMTUzLjQ4OSBMIDE4MS41ODIsMTUzLjMyNSBMIDE4MS41MTcsMTUzLjE2NiBMIDE4MS40MzgsMTUzLjAxMiBMIDE4MS4zNDcsMTUyLjg2NyBMIDE4MS4yNDQsMTUyLjcyOSBMIDE4MS4xMjksMTUyLjYwMSBMIDE4MS4wMDMsMTUyLjQ4MyBMIDE4MC44NjgsMTUyLjM3NyBMIDE4MC43MjQsMTUyLjI4MiBMIDE4MC41NzMsMTUyLjIwMSBMIDE4MC40MTUsMTUyLjEzMiBMIDE4MC4yNTIsMTUyLjA3OCBMIDE4MC4wODQsMTUyLjAzNyBMIDE3OS45MTQsMTUyLjAxMiBMIDE3OS43NDIsMTUyIEwgMTc5LjU3LDE1Mi4wMDQgTCAxNzkuMzk5LDE1Mi4wMjMgTCAxNzkuMjMsMTUyLjA1NiBMIDE3OS4wNjUsMTUyLjEwMyBMIDE3OC45MDQsMTUyLjE2NSBMIDE3OC43NDksMTUyLjI0IEwgMTc4LjYwMiwxNTIuMzI4IEwgMTc4LjQ2MiwxNTIuNDI5IEwgMTc4LjMzMSwxNTIuNTQxIEwgMTc4LjIxMSwxNTIuNjY0IEwgMTc4LjEwMiwxNTIuNzk3IEwgMTc4LjAwNCwxNTIuOTM5IEwgMTc3LjkxOSwxNTMuMDg4IEwgMTc3Ljg0NywxNTMuMjQ1IEwgMTc3Ljc4OSwxNTMuNDA3IEwgMTc3Ljc0NSwxNTMuNTczIEwgMTc3LjcxNiwxNTMuNzQzIEwgMTc3LjcwMSwxNTMuOTE0IEwgMTc3LjcwMSwxNTQuMDg2IEwgMTc3LjcxNiwxNTQuMjU3IEwgMTc3Ljc0NSwxNTQuNDI3IEwgMTc3Ljc4OSwxNTQuNTkzIEwgMTc3Ljg0NywxNTQuNzU1IEwgMTc3LjkxOSwxNTQuOTEyIEwgMTc4LjAwNCwxNTUuMDYxIEwgMTc4LjEwMiwxNTUuMjAzIEwgMTc4LjIxMSwxNTUuMzM2IEwgMTc4LjMzMSwxNTUuNDU5IEwgMTc4LjQ2MiwxNTUuNTcxIEwgMTc4LjYwMiwxNTUuNjcyIEwgMTc4Ljc0OSwxNTUuNzYgTCAxNzguOTA0LDE1NS44MzUgTCAxNzkuMDY1LDE1NS44OTcgTCAxNzkuMjMsMTU1Ljk0NCBMIDE3OS4zOTksMTU1Ljk3NyBMIDE3OS41NywxNTUuOTk2IEwgMTc5Ljc0MiwxNTYgTCAxNzkuOTE0LDE1NS45ODggTCAxODAuMDg0LDE1NS45NjMgTCAxODAuMjUyLDE1NS45MjIgTCAxODAuNDE1LDE1NS44NjggTCAxODAuNTczLDE1NS43OTkgTCAxODAuNzI0LDE1NS43MTggTCAxODAuODY4LDE1NS42MjMgTCAxODEuMDAzLDE1NS41MTcgTCAxODEuMTI5LDE1NS4zOTkgTCAxODEuMjQ0LDE1NS4yNzEgTCAxODEuMzQ3LDE1NS4xMzMgTCAxODEuNDM4LDE1NC45ODggTCAxODEuNTE3LDE1NC44MzQgTCAxODEuNTgyLDE1NC42NzUgTCAxODEuNjMzLDE1NC41MTEgTCAxODEuNjcsMTU0LjM0MyBMIDE4MS42OTIsMTU0LjE3MiBMIDE4MS42OTksMTU0IEwgMTc5LjY5OSwxNTQgWicgc3R5bGU9J2ZpbGw6IzAwMDAwMDtmaWxsLXJ1bGU6ZXZlbm9kZDtmaWxsLW9wYWNpdHk6MTtzdHJva2U6IzAwMDAwMDtzdHJva2Utd2lkdGg6MHB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjE7JyAvPgo8L3N2Zz4K data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nODVweCcgaGVpZ2h0PSc4NXB4JyB2aWV3Qm94PScwIDAgODUgODUnPgo8IS0tIEVORCBPRiBIRUFERVIgLS0+CjxyZWN0IHN0eWxlPSdvcGFjaXR5OjEuMDtmaWxsOiNGRkZGRkY7c3Ryb2tlOm5vbmUnIHdpZHRoPSc4NScgaGVpZ2h0PSc4NScgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgeD0nMzUuMDQ1NScgeT0nNTMuNTkwOScgY2xhc3M9J2F0b20tMCcgc3R5bGU9J2ZvbnQtc2l6ZToyM3B4O2ZvbnQtc3R5bGU6bm9ybWFsO2ZvbnQtd2VpZ2h0Om5vcm1hbDtmaWxsLW9wYWNpdHk6MTtzdHJva2U6bm9uZTtmb250LWZhbWlseTpzYW5zLXNlcmlmO3RleHQtYW5jaG9yOnN0YXJ0O2ZpbGw6IzNCNDE0MycgPkM8L3RleHQ+Cjx0ZXh0IHg9JzUxLjA0MDknIHk9JzUzLjU5MDknIGNsYXNzPSdhdG9tLTAnIHN0eWxlPSdmb250LXNpemU6MjNweDtmb250LXN0eWxlOm5vcm1hbDtmb250LXdlaWdodDpub3JtYWw7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOm5vbmU7Zm9udC1mYW1pbHk6c2Fucy1zZXJpZjt0ZXh0LWFuY2hvcjpzdGFydDtmaWxsOiMzQjQxNDMnID5yPC90ZXh0Pgo8cGF0aCBkPSdNIDYyLjA5MjQsMzkuNjgxOCBMIDYyLjA4ODEsMzkuNTgyMiBMIDYyLjA3NTMsMzkuNDgzMyBMIDYyLjA1NCwzOS4zODU4IEwgNjIuMDI0NCwzOS4yOTA2IEwgNjEuOTg2NywzOS4xOTgzIEwgNjEuOTQxMiwzOS4xMDk1IEwgNjEuODg4MywzOS4wMjUgTCA2MS44MjgzLDM4Ljk0NTMgTCA2MS43NjE3LDM4Ljg3MTEgTCA2MS42ODg5LDM4LjgwMjkgTCA2MS42MTA2LDM4Ljc0MTIgTCA2MS41MjcyLDM4LjY4NjQgTCA2MS40Mzk0LDM4LjYzOTEgTCA2MS4zNDc5LDM4LjU5OTQgTCA2MS4yNTMzLDM4LjU2NzggTCA2MS4xNTY0LDM4LjU0NDQgTCA2MS4wNTc4LDM4LjUyOTQgTCA2MC45NTgzLDM4LjUyMyBMIDYwLjg1ODUsMzguNTI1MSBMIDYwLjc1OTQsMzguNTM1OSBMIDYwLjY2MTUsMzguNTU1IEwgNjAuNTY1NywzOC41ODI2IEwgNjAuNDcyNSwzOC42MTgzIEwgNjAuMzgyOCwzOC42NjE4IEwgNjAuMjk3MiwzOC43MTI5IEwgNjAuMjE2MiwzOC43NzEyIEwgNjAuMTQwNiwzOC44MzYyIEwgNjAuMDcwOCwzOC45MDc1IEwgNjAuMDA3NSwzOC45ODQ1IEwgNTkuOTUwOSwzOS4wNjY3IEwgNTkuOTAxNywzOS4xNTM0IEwgNTkuODYwMSwzOS4yNDQgTCA1OS44MjY0LDM5LjMzNzkgTCA1OS44MDEsMzkuNDM0MyBMIDU5Ljc4MzksMzkuNTMyNiBMIDU5Ljc3NTMsMzkuNjMyIEwgNTkuNzc1MywzOS43MzE3IEwgNTkuNzgzOSwzOS44MzEgTCA1OS44MDEsMzkuOTI5MyBMIDU5LjgyNjQsNDAuMDI1NyBMIDU5Ljg2MDEsNDAuMTE5NiBMIDU5LjkwMTcsNDAuMjEwMyBMIDU5Ljk1MDksNDAuMjk3IEwgNjAuMDA3NSw0MC4zNzkyIEwgNjAuMDcwOCw0MC40NTYyIEwgNjAuMTQwNiw0MC41Mjc0IEwgNjAuMjE2Miw0MC41OTI1IEwgNjAuMjk3Miw0MC42NTA3IEwgNjAuMzgyOCw0MC43MDE4IEwgNjAuNDcyNSw0MC43NDU0IEwgNjAuNTY1Nyw0MC43ODExIEwgNjAuNjYxNSw0MC44MDg2IEwgNjAuNzU5NCw0MC44Mjc4IEwgNjAuODU4NSw0MC44Mzg1IEwgNjAuOTU4Myw0MC44NDA2IEwgNjEuMDU3OCw0MC44MzQyIEwgNjEuMTU2NCw0MC44MTkyIEwgNjEuMjUzMyw0MC43OTU5IEwgNjEuMzQ3OSw0MC43NjQyIEwgNjEuNDM5NCw0MC43MjQ2IEwgNjEuNTI3Miw0MC42NzcyIEwgNjEuNjEwNiw0MC42MjI1IEwgNjEuNjg4OSw0MC41NjA4IEwgNjEuNzYxNyw0MC40OTI2IEwgNjEuODI4Myw0MC40MTgzIEwgNjEuODg4Myw0MC4zMzg3IEwgNjEuOTQxMiw0MC4yNTQxIEwgNjEuOTg2Nyw0MC4xNjU0IEwgNjIuMDI0NCw0MC4wNzMgTCA2Mi4wNTQsMzkuOTc3OCBMIDYyLjA3NTMsMzkuODgwNCBMIDYyLjA4ODEsMzkuNzgxNSBMIDYyLjA5MjQsMzkuNjgxOCBMIDYwLjkzMzMsMzkuNjgxOCBaJyBzdHlsZT0nZmlsbDojMDAwMDAwO2ZpbGwtcnVsZTpldmVub2RkO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTojMDAwMDAwO3N0cm9rZS13aWR0aDowcHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MTsnIC8+CjxwYXRoIGQ9J00gNjIuMDkyNCw0NC4zMTgyIEwgNjIuMDg4MSw0NC4yMTg1IEwgNjIuMDc1Myw0NC4xMTk2IEwgNjIuMDU0LDQ0LjAyMjIgTCA2Mi4wMjQ0LDQzLjkyNyBMIDYxLjk4NjcsNDMuODM0NiBMIDYxLjk0MTIsNDMuNzQ1OSBMIDYxLjg4ODMsNDMuNjYxMyBMIDYxLjgyODMsNDMuNTgxNyBMIDYxLjc2MTcsNDMuNTA3NCBMIDYxLjY4ODksNDMuNDM5MiBMIDYxLjYxMDYsNDMuMzc3NSBMIDYxLjUyNzIsNDMuMzIyOCBMIDYxLjQzOTQsNDMuMjc1NCBMIDYxLjM0NzksNDMuMjM1OCBMIDYxLjI1MzMsNDMuMjA0MSBMIDYxLjE1NjQsNDMuMTgwOCBMIDYxLjA1NzgsNDMuMTY1OCBMIDYwLjk1ODMsNDMuMTU5NCBMIDYwLjg1ODUsNDMuMTYxNSBMIDYwLjc1OTQsNDMuMTcyMiBMIDYwLjY2MTUsNDMuMTkxNCBMIDYwLjU2NTcsNDMuMjE4OSBMIDYwLjQ3MjUsNDMuMjU0NiBMIDYwLjM4MjgsNDMuMjk4MiBMIDYwLjI5NzIsNDMuMzQ5MyBMIDYwLjIxNjIsNDMuNDA3NSBMIDYwLjE0MDYsNDMuNDcyNiBMIDYwLjA3MDgsNDMuNTQzOCBMIDYwLjAwNzUsNDMuNjIwOCBMIDU5Ljk1MDksNDMuNzAzIEwgNTkuOTAxNyw0My43ODk3IEwgNTkuODYwMSw0My44ODA0IEwgNTkuODI2NCw0My45NzQzIEwgNTkuODAxLDQ0LjA3MDcgTCA1OS43ODM5LDQ0LjE2OSBMIDU5Ljc3NTMsNDQuMjY4MyBMIDU5Ljc3NTMsNDQuMzY4IEwgNTkuNzgzOSw0NC40Njc0IEwgNTkuODAxLDQ0LjU2NTcgTCA1OS44MjY0LDQ0LjY2MjEgTCA1OS44NjAxLDQ0Ljc1NiBMIDU5LjkwMTcsNDQuODQ2NiBMIDU5Ljk1MDksNDQuOTMzMyBMIDYwLjAwNzUsNDUuMDE1NSBMIDYwLjA3MDgsNDUuMDkyNSBMIDYwLjE0MDYsNDUuMTYzOCBMIDYwLjIxNjIsNDUuMjI4OCBMIDYwLjI5NzIsNDUuMjg3MSBMIDYwLjM4MjgsNDUuMzM4MiBMIDYwLjQ3MjUsNDUuMzgxNyBMIDYwLjU2NTcsNDUuNDE3NCBMIDYwLjY2MTUsNDUuNDQ1IEwgNjAuNzU5NCw0NS40NjQxIEwgNjAuODU4NSw0NS40NzQ5IEwgNjAuOTU4Myw0NS40NzcgTCA2MS4wNTc4LDQ1LjQ3MDYgTCA2MS4xNTY0LDQ1LjQ1NTYgTCA2MS4yNTMzLDQ1LjQzMjIgTCA2MS4zNDc5LDQ1LjQwMDYgTCA2MS40Mzk0LDQ1LjM2MDkgTCA2MS41MjcyLDQ1LjMxMzYgTCA2MS42MTA2LDQ1LjI1ODggTCA2MS42ODg5LDQ1LjE5NzEgTCA2MS43NjE3LDQ1LjEyODkgTCA2MS44MjgzLDQ1LjA1NDcgTCA2MS44ODgzLDQ0Ljk3NSBMIDYxLjk0MTIsNDQuODkwNSBMIDYxLjk4NjcsNDQuODAxNyBMIDYyLjAyNDQsNDQuNzA5NCBMIDYyLjA1NCw0NC42MTQyIEwgNjIuMDc1Myw0NC41MTY3IEwgNjIuMDg4MSw0NC40MTc4IEwgNjIuMDkyNCw0NC4zMTgyIEwgNjAuOTMzMyw0NC4zMTgyIFonIHN0eWxlPSdmaWxsOiMwMDAwMDA7ZmlsbC1ydWxlOmV2ZW5vZGQ7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOiMwMDAwMDA7c3Ryb2tlLXdpZHRoOjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxOycgLz4KPC9zdmc+Cg== [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims 5
- 229910052709 silver Inorganic materials 0.000 claims 5
- 229910052721 tungsten Inorganic materials 0.000 claims 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N titanium Chemical compound data:image/svg+xml;base64,<?xml version='1.0' encoding='iso-8859-1'?>
<svg version='1.1' baseProfile='full'
              xmlns='http://www.w3.org/2000/svg'
                      xmlns:rdkit='http://www.rdkit.org/xml'
                      xmlns:xlink='http://www.w3.org/1999/xlink'
                  xml:space='preserve'
width='300px' height='300px' viewBox='0 0 300 300'>
<!-- END OF HEADER -->
<rect style='opacity:1.0;fill:#FFFFFF;stroke:none' width='300' height='300' x='0' y='0'> </rect>
<text x='138' y='170' class='atom-0' style='font-size:40px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >T</text>
<text x='165.6' y='170' class='atom-0' style='font-size:40px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >i</text>
<path d='M 179.564,138 L 179.556,137.828 L 179.534,137.657 L 179.497,137.489 L 179.446,137.325 L 179.381,137.166 L 179.303,137.012 L 179.212,136.867 L 179.108,136.729 L 178.993,136.601 L 178.868,136.483 L 178.732,136.377 L 178.588,136.282 L 178.437,136.201 L 178.279,136.132 L 178.116,136.078 L 177.949,136.037 L 177.779,136.012 L 177.607,136 L 177.435,136.004 L 177.264,136.023 L 177.095,136.056 L 176.929,136.103 L 176.769,136.165 L 176.614,136.24 L 176.466,136.328 L 176.326,136.429 L 176.196,136.541 L 176.076,136.664 L 175.966,136.797 L 175.869,136.939 L 175.784,137.088 L 175.712,137.245 L 175.654,137.407 L 175.61,137.573 L 175.58,137.743 L 175.566,137.914 L 175.566,138.086 L 175.58,138.257 L 175.61,138.427 L 175.654,138.593 L 175.712,138.755 L 175.784,138.912 L 175.869,139.061 L 175.966,139.203 L 176.076,139.336 L 176.196,139.459 L 176.326,139.571 L 176.466,139.672 L 176.614,139.76 L 176.769,139.835 L 176.929,139.897 L 177.095,139.944 L 177.264,139.977 L 177.435,139.996 L 177.607,140 L 177.779,139.988 L 177.949,139.963 L 178.116,139.922 L 178.279,139.868 L 178.437,139.799 L 178.588,139.718 L 178.732,139.623 L 178.868,139.517 L 178.993,139.399 L 179.108,139.271 L 179.212,139.133 L 179.303,138.988 L 179.381,138.834 L 179.446,138.675 L 179.497,138.511 L 179.534,138.343 L 179.556,138.172 L 179.564,138 L 177.564,138 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 179.564,162 L 179.556,161.828 L 179.534,161.657 L 179.497,161.489 L 179.446,161.325 L 179.381,161.166 L 179.303,161.012 L 179.212,160.867 L 179.108,160.729 L 178.993,160.601 L 178.868,160.483 L 178.732,160.377 L 178.588,160.282 L 178.437,160.201 L 178.279,160.132 L 178.116,160.078 L 177.949,160.037 L 177.779,160.012 L 177.607,160 L 177.435,160.004 L 177.264,160.023 L 177.095,160.056 L 176.929,160.103 L 176.769,160.165 L 176.614,160.24 L 176.466,160.328 L 176.326,160.429 L 176.196,160.541 L 176.076,160.664 L 175.966,160.797 L 175.869,160.939 L 175.784,161.088 L 175.712,161.245 L 175.654,161.407 L 175.61,161.573 L 175.58,161.743 L 175.566,161.914 L 175.566,162.086 L 175.58,162.257 L 175.61,162.427 L 175.654,162.593 L 175.712,162.755 L 175.784,162.912 L 175.869,163.061 L 175.966,163.203 L 176.076,163.336 L 176.196,163.459 L 176.326,163.571 L 176.466,163.672 L 176.614,163.76 L 176.769,163.835 L 176.929,163.897 L 177.095,163.944 L 177.264,163.977 L 177.435,163.996 L 177.607,164 L 177.779,163.988 L 177.949,163.963 L 178.116,163.922 L 178.279,163.868 L 178.437,163.799 L 178.588,163.718 L 178.732,163.623 L 178.868,163.517 L 178.993,163.399 L 179.108,163.271 L 179.212,163.133 L 179.303,162.988 L 179.381,162.834 L 179.446,162.675 L 179.497,162.511 L 179.534,162.343 L 179.556,162.172 L 179.564,162 L 177.564,162 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 179.564,146 L 179.556,145.828 L 179.534,145.657 L 179.497,145.489 L 179.446,145.325 L 179.381,145.166 L 179.303,145.012 L 179.212,144.867 L 179.108,144.729 L 178.993,144.601 L 178.868,144.483 L 178.732,144.377 L 178.588,144.282 L 178.437,144.201 L 178.279,144.132 L 178.116,144.078 L 177.949,144.037 L 177.779,144.012 L 177.607,144 L 177.435,144.004 L 177.264,144.023 L 177.095,144.056 L 176.929,144.103 L 176.769,144.165 L 176.614,144.24 L 176.466,144.328 L 176.326,144.429 L 176.196,144.541 L 176.076,144.664 L 175.966,144.797 L 175.869,144.939 L 175.784,145.088 L 175.712,145.245 L 175.654,145.407 L 175.61,145.573 L 175.58,145.743 L 175.566,145.914 L 175.566,146.086 L 175.58,146.257 L 175.61,146.427 L 175.654,146.593 L 175.712,146.755 L 175.784,146.912 L 175.869,147.061 L 175.966,147.203 L 176.076,147.336 L 176.196,147.459 L 176.326,147.571 L 176.466,147.672 L 176.614,147.76 L 176.769,147.835 L 176.929,147.897 L 177.095,147.944 L 177.264,147.977 L 177.435,147.996 L 177.607,148 L 177.779,147.988 L 177.949,147.963 L 178.116,147.922 L 178.279,147.868 L 178.437,147.799 L 178.588,147.718 L 178.732,147.623 L 178.868,147.517 L 178.993,147.399 L 179.108,147.271 L 179.212,147.133 L 179.303,146.988 L 179.381,146.834 L 179.446,146.675 L 179.497,146.511 L 179.534,146.343 L 179.556,146.172 L 179.564,146 L 177.564,146 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 179.564,154 L 179.556,153.828 L 179.534,153.657 L 179.497,153.489 L 179.446,153.325 L 179.381,153.166 L 179.303,153.012 L 179.212,152.867 L 179.108,152.729 L 178.993,152.601 L 178.868,152.483 L 178.732,152.377 L 178.588,152.282 L 178.437,152.201 L 178.279,152.132 L 178.116,152.078 L 177.949,152.037 L 177.779,152.012 L 177.607,152 L 177.435,152.004 L 177.264,152.023 L 177.095,152.056 L 176.929,152.103 L 176.769,152.165 L 176.614,152.24 L 176.466,152.328 L 176.326,152.429 L 176.196,152.541 L 176.076,152.664 L 175.966,152.797 L 175.869,152.939 L 175.784,153.088 L 175.712,153.245 L 175.654,153.407 L 175.61,153.573 L 175.58,153.743 L 175.566,153.914 L 175.566,154.086 L 175.58,154.257 L 175.61,154.427 L 175.654,154.593 L 175.712,154.755 L 175.784,154.912 L 175.869,155.061 L 175.966,155.203 L 176.076,155.336 L 176.196,155.459 L 176.326,155.571 L 176.466,155.672 L 176.614,155.76 L 176.769,155.835 L 176.929,155.897 L 177.095,155.944 L 177.264,155.977 L 177.435,155.996 L 177.607,156 L 177.779,155.988 L 177.949,155.963 L 178.116,155.922 L 178.279,155.868 L 178.437,155.799 L 178.588,155.718 L 178.732,155.623 L 178.868,155.517 L 178.993,155.399 L 179.108,155.271 L 179.212,155.133 L 179.303,154.988 L 179.381,154.834 L 179.446,154.675 L 179.497,154.511 L 179.534,154.343 L 179.556,154.172 L 179.564,154 L 177.564,154 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
</svg>
 data:image/svg+xml;base64,<?xml version='1.0' encoding='iso-8859-1'?>
<svg version='1.1' baseProfile='full'
              xmlns='http://www.w3.org/2000/svg'
                      xmlns:rdkit='http://www.rdkit.org/xml'
                      xmlns:xlink='http://www.w3.org/1999/xlink'
                  xml:space='preserve'
width='85px' height='85px' viewBox='0 0 85 85'>
<!-- END OF HEADER -->
<rect style='opacity:1.0;fill:#FFFFFF;stroke:none' width='85' height='85' x='0' y='0'> </rect>
<text x='35.0455' y='53.5909' class='atom-0' style='font-size:23px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >T</text>
<text x='51.0409' y='53.5909' class='atom-0' style='font-size:23px;font-style:normal;font-weight:normal;fill-opacity:1;stroke:none;font-family:sans-serif;text-anchor:start;fill:#3B4143' >i</text>
<path d='M 60.731,35.0455 L 60.7267,34.9458 L 60.7139,34.8469 L 60.6926,34.7495 L 60.663,34.6542 L 60.6253,34.5619 L 60.5798,34.4731 L 60.5269,34.3886 L 60.4669,34.3089 L 60.4003,34.2347 L 60.3275,34.1665 L 60.2491,34.1048 L 60.1658,34.0501 L 60.078,34.0027 L 59.9865,33.9631 L 59.8919,33.9314 L 59.795,33.908 L 59.6964,33.8931 L 59.5968,33.8866 L 59.4971,33.8888 L 59.398,33.8995 L 59.3001,33.9187 L 59.2042,33.9462 L 59.1111,33.9819 L 59.0214,34.0254 L 58.9357,34.0765 L 58.8548,34.1348 L 58.7792,34.1998 L 58.7094,34.2711 L 58.646,34.3481 L 58.5895,34.4303 L 58.5403,34.517 L 58.4987,34.6077 L 58.465,34.7015 L 58.4395,34.798 L 58.4224,34.8962 L 58.4139,34.9956 L 58.4139,35.0953 L 58.4224,35.1947 L 58.4395,35.2929 L 58.465,35.3894 L 58.4987,35.4833 L 58.5403,35.5739 L 58.5895,35.6606 L 58.646,35.7428 L 58.7094,35.8198 L 58.7792,35.8911 L 58.8548,35.9561 L 58.9357,36.0144 L 59.0214,36.0655 L 59.1111,36.109 L 59.2042,36.1447 L 59.3001,36.1722 L 59.398,36.1914 L 59.4971,36.2021 L 59.5968,36.2043 L 59.6964,36.1978 L 59.795,36.1829 L 59.8919,36.1595 L 59.9865,36.1279 L 60.078,36.0882 L 60.1658,36.0408 L 60.2491,35.9861 L 60.3275,35.9244 L 60.4003,35.8562 L 60.4669,35.782 L 60.5269,35.7023 L 60.5798,35.6178 L 60.6253,35.529 L 60.663,35.4367 L 60.6926,35.3414 L 60.7139,35.244 L 60.7267,35.1451 L 60.731,35.0455 L 59.5719,35.0455 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 60.731,48.9545 L 60.7267,48.8549 L 60.7139,48.756 L 60.6926,48.6586 L 60.663,48.5633 L 60.6253,48.471 L 60.5798,48.3822 L 60.5269,48.2977 L 60.4669,48.218 L 60.4003,48.1438 L 60.3275,48.0756 L 60.2491,48.0139 L 60.1658,47.9592 L 60.078,47.9118 L 59.9865,47.8721 L 59.8919,47.8405 L 59.795,47.8171 L 59.6964,47.8022 L 59.5968,47.7957 L 59.4971,47.7979 L 59.398,47.8086 L 59.3001,47.8278 L 59.2042,47.8553 L 59.1111,47.891 L 59.0214,47.9345 L 58.9357,47.9856 L 58.8548,48.0439 L 58.7792,48.1089 L 58.7094,48.1802 L 58.646,48.2572 L 58.5895,48.3394 L 58.5403,48.4261 L 58.4987,48.5167 L 58.465,48.6106 L 58.4395,48.7071 L 58.4224,48.8053 L 58.4139,48.9047 L 58.4139,49.0044 L 58.4224,49.1038 L 58.4395,49.202 L 58.465,49.2985 L 58.4987,49.3923 L 58.5403,49.483 L 58.5895,49.5697 L 58.646,49.6519 L 58.7094,49.7289 L 58.7792,49.8002 L 58.8548,49.8652 L 58.9357,49.9235 L 59.0214,49.9746 L 59.1111,50.0181 L 59.2042,50.0538 L 59.3001,50.0813 L 59.398,50.1005 L 59.4971,50.1112 L 59.5968,50.1134 L 59.6964,50.1069 L 59.795,50.092 L 59.8919,50.0686 L 59.9865,50.0369 L 60.078,49.9973 L 60.1658,49.9499 L 60.2491,49.8952 L 60.3275,49.8335 L 60.4003,49.7653 L 60.4669,49.6911 L 60.5269,49.6114 L 60.5798,49.5269 L 60.6253,49.4381 L 60.663,49.3458 L 60.6926,49.2505 L 60.7139,49.1531 L 60.7267,49.0542 L 60.731,48.9545 L 59.5719,48.9545 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 60.731,39.6818 L 60.7267,39.5822 L 60.7139,39.4833 L 60.6926,39.3858 L 60.663,39.2906 L 60.6253,39.1983 L 60.5798,39.1095 L 60.5269,39.025 L 60.4669,38.9453 L 60.4003,38.8711 L 60.3275,38.8029 L 60.2491,38.7412 L 60.1658,38.6864 L 60.078,38.6391 L 59.9865,38.5994 L 59.8919,38.5678 L 59.795,38.5444 L 59.6964,38.5294 L 59.5968,38.523 L 59.4971,38.5251 L 59.398,38.5359 L 59.3001,38.555 L 59.2042,38.5826 L 59.1111,38.6183 L 59.0214,38.6618 L 58.9357,38.7129 L 58.8548,38.7712 L 58.7792,38.8362 L 58.7094,38.9075 L 58.646,38.9845 L 58.5895,39.0667 L 58.5403,39.1534 L 58.4987,39.244 L 58.465,39.3379 L 58.4395,39.4343 L 58.4224,39.5326 L 58.4139,39.632 L 58.4139,39.7317 L 58.4224,39.831 L 58.4395,39.9293 L 58.465,40.0257 L 58.4987,40.1196 L 58.5403,40.2103 L 58.5895,40.297 L 58.646,40.3792 L 58.7094,40.4562 L 58.7792,40.5274 L 58.8548,40.5925 L 58.9357,40.6507 L 59.0214,40.7018 L 59.1111,40.7454 L 59.2042,40.7811 L 59.3001,40.8086 L 59.398,40.8278 L 59.4971,40.8385 L 59.5968,40.8406 L 59.6964,40.8342 L 59.795,40.8192 L 59.8919,40.7959 L 59.9865,40.7642 L 60.078,40.7246 L 60.1658,40.6772 L 60.2491,40.6225 L 60.3275,40.5608 L 60.4003,40.4926 L 60.4669,40.4183 L 60.5269,40.3387 L 60.5798,40.2541 L 60.6253,40.1654 L 60.663,40.073 L 60.6926,39.9778 L 60.7139,39.8804 L 60.7267,39.7815 L 60.731,39.6818 L 59.5719,39.6818 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
<path d='M 60.731,44.3182 L 60.7267,44.2185 L 60.7139,44.1196 L 60.6926,44.0222 L 60.663,43.927 L 60.6253,43.8346 L 60.5798,43.7459 L 60.5269,43.6613 L 60.4669,43.5817 L 60.4003,43.5074 L 60.3275,43.4392 L 60.2491,43.3775 L 60.1658,43.3228 L 60.078,43.2754 L 59.9865,43.2358 L 59.8919,43.2041 L 59.795,43.1808 L 59.6964,43.1658 L 59.5968,43.1594 L 59.4971,43.1615 L 59.398,43.1722 L 59.3001,43.1914 L 59.2042,43.2189 L 59.1111,43.2546 L 59.0214,43.2982 L 58.9357,43.3493 L 58.8548,43.4075 L 58.7792,43.4726 L 58.7094,43.5438 L 58.646,43.6208 L 58.5895,43.703 L 58.5403,43.7897 L 58.4987,43.8804 L 58.465,43.9743 L 58.4395,44.0707 L 58.4224,44.169 L 58.4139,44.2683 L 58.4139,44.368 L 58.4224,44.4674 L 58.4395,44.5657 L 58.465,44.6621 L 58.4987,44.756 L 58.5403,44.8466 L 58.5895,44.9333 L 58.646,45.0155 L 58.7094,45.0925 L 58.7792,45.1638 L 58.8548,45.2288 L 58.9357,45.2871 L 59.0214,45.3382 L 59.1111,45.3817 L 59.2042,45.4174 L 59.3001,45.445 L 59.398,45.4641 L 59.4971,45.4749 L 59.5968,45.477 L 59.6964,45.4706 L 59.795,45.4556 L 59.8919,45.4322 L 59.9865,45.4006 L 60.078,45.3609 L 60.1658,45.3136 L 60.2491,45.2588 L 60.3275,45.1971 L 60.4003,45.1289 L 60.4669,45.0547 L 60.5269,44.975 L 60.5798,44.8905 L 60.6253,44.8017 L 60.663,44.7094 L 60.6926,44.6142 L 60.7139,44.5167 L 60.7267,44.4178 L 60.731,44.3182 L 59.5719,44.3182 Z' style='fill:#000000;fill-rule:evenodd;fill-opacity:1;stroke:#000000;stroke-width:0px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;' />
</svg>
 [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims 4
- 239000000853 adhesive Substances 0.000 claims 3
- 230000001070 adhesive Effects 0.000 claims 3
- 230000001681 protective Effects 0.000 claims 3
- 239000011241 protective layer Substances 0.000 claims 2
- UMIVXZPTRXBADB-UHFFFAOYSA-N Benzocyclobutene Chemical compound data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nMzAwcHgnIGhlaWdodD0nMzAwcHgnIHZpZXdCb3g9JzAgMCAzMDAgMzAwJz4KPCEtLSBFTkQgT0YgSEVBREVSIC0tPgo8cmVjdCBzdHlsZT0nb3BhY2l0eToxLjA7ZmlsbDojRkZGRkZGO3N0cm9rZTpub25lJyB3aWR0aD0nMzAwJyBoZWlnaHQ9JzMwMCcgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHBhdGggY2xhc3M9J2JvbmQtMCcgZD0nTSAxMy42MzY0LDE5OS45MTMgTCAxMy42MzY0LDEwMC4wODcnIHN0eWxlPSdmaWxsOm5vbmU7ZmlsbC1ydWxlOmV2ZW5vZGQ7c3Ryb2tlOiMzQjQxNDM7c3Ryb2tlLXdpZHRoOjIuMHB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjEnIC8+CjxwYXRoIGNsYXNzPSdib25kLTAnIGQ9J00gMzMuNjAxNCwxODQuOTM5IEwgMzMuNjAxNCwxMTUuMDYxJyBzdHlsZT0nZmlsbDpub25lO2ZpbGwtcnVsZTpldmVub2RkO3N0cm9rZTojM0I0MTQzO3N0cm9rZS13aWR0aDoyLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxJyAvPgo8cGF0aCBjbGFzcz0nYm9uZC03JyBkPSdNIDEzLjYzNjQsMTk5LjkxMyBMIDEwMC4wODcsMjQ5LjgyNScgc3R5bGU9J2ZpbGw6bm9uZTtmaWxsLXJ1bGU6ZXZlbm9kZDtzdHJva2U6IzNCNDE0MztzdHJva2Utd2lkdGg6Mi4wcHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MScgLz4KPHBhdGggY2xhc3M9J2JvbmQtMScgZD0nTSAxMy42MzY0LDEwMC4wODcgTCAxMDAuMDg3LDUwLjE3NDknIHN0eWxlPSdmaWxsOm5vbmU7ZmlsbC1ydWxlOmV2ZW5vZGQ7c3Ryb2tlOiMzQjQxNDM7c3Ryb2tlLXdpZHRoOjIuMHB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjEnIC8+CjxwYXRoIGNsYXNzPSdib25kLTInIGQ9J00gMTAwLjA4Nyw1MC4xNzQ5IEwgMTg2LjUzOSwxMDAuMDg3JyBzdHlsZT0nZmlsbDpub25lO2ZpbGwtcnVsZTpldmVub2RkO3N0cm9rZTojM0I0MTQzO3N0cm9rZS13aWR0aDoyLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxJyAvPgo8cGF0aCBjbGFzcz0nYm9uZC0yJyBkPSdNIDEwMy4wNzMsNzQuOTUyIEwgMTYzLjU4OCwxMDkuODkxJyBzdHlsZT0nZmlsbDpub25lO2ZpbGwtcnVsZTpldmVub2RkO3N0cm9rZTojM0I0MTQzO3N0cm9rZS13aWR0aDoyLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxJyAvPgo8cGF0aCBjbGFzcz0nYm9uZC0zJyBkPSdNIDE4Ni41MzksMTAwLjA4NyBMIDI4Ni4zNjQsMTAwLjA4Nycgc3R5bGU9J2ZpbGw6bm9uZTtmaWxsLXJ1bGU6ZXZlbm9kZDtzdHJva2U6IzNCNDE0MztzdHJva2Utd2lkdGg6Mi4wcHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MScgLz4KPHBhdGggY2xhc3M9J2JvbmQtOCcgZD0nTSAxODYuNTM5LDEwMC4wODcgTCAxODYuNTM5LDE5OS45MTMnIHN0eWxlPSdmaWxsOm5vbmU7ZmlsbC1ydWxlOmV2ZW5vZGQ7c3Ryb2tlOiMzQjQxNDM7c3Ryb2tlLXdpZHRoOjIuMHB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjEnIC8+CjxwYXRoIGNsYXNzPSdib25kLTQnIGQ9J00gMjg2LjM2NCwxMDAuMDg3IEwgMjg2LjM2NCwxOTkuOTEzJyBzdHlsZT0nZmlsbDpub25lO2ZpbGwtcnVsZTpldmVub2RkO3N0cm9rZTojM0I0MTQzO3N0cm9rZS13aWR0aDoyLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxJyAvPgo8cGF0aCBjbGFzcz0nYm9uZC01JyBkPSdNIDI4Ni4zNjQsMTk5LjkxMyBMIDE4Ni41MzksMTk5LjkxMycgc3R5bGU9J2ZpbGw6bm9uZTtmaWxsLXJ1bGU6ZXZlbm9kZDtzdHJva2U6IzNCNDE0MztzdHJva2Utd2lkdGg6Mi4wcHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MScgLz4KPHBhdGggY2xhc3M9J2JvbmQtNicgZD0nTSAxODYuNTM5LDE5OS45MTMgTCAxMDAuMDg3LDI0OS44MjUnIHN0eWxlPSdmaWxsOm5vbmU7ZmlsbC1ydWxlOmV2ZW5vZGQ7c3Ryb2tlOiMzQjQxNDM7c3Ryb2tlLXdpZHRoOjIuMHB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjEnIC8+CjxwYXRoIGNsYXNzPSdib25kLTYnIGQ9J00gMTYzLjU4OCwxOTAuMTA5IEwgMTAzLjA3MywyMjUuMDQ4JyBzdHlsZT0nZmlsbDpub25lO2ZpbGwtcnVsZTpldmVub2RkO3N0cm9rZTojM0I0MTQzO3N0cm9rZS13aWR0aDoyLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxJyAvPgo8L3N2Zz4K data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nODVweCcgaGVpZ2h0PSc4NXB4JyB2aWV3Qm94PScwIDAgODUgODUnPgo8IS0tIEVORCBPRiBIRUFERVIgLS0+CjxyZWN0IHN0eWxlPSdvcGFjaXR5OjEuMDtmaWxsOiNGRkZGRkY7c3Ryb2tlOm5vbmUnIHdpZHRoPSc4NScgaGVpZ2h0PSc4NScgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHBhdGggY2xhc3M9J2JvbmQtMCcgZD0nTSAzLjM2MzY0LDU2LjE0MTkgTCAzLjM2MzY0LDI3Ljg1ODEnIHN0eWxlPSdmaWxsOm5vbmU7ZmlsbC1ydWxlOmV2ZW5vZGQ7c3Ryb2tlOiMzQjQxNDM7c3Ryb2tlLXdpZHRoOjEuMHB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjEnIC8+CjxwYXRoIGNsYXNzPSdib25kLTAnIGQ9J00gOS4wMjAzOSw1MS44OTkzIEwgOS4wMjAzOSwzMi4xMDA3JyBzdHlsZT0nZmlsbDpub25lO2ZpbGwtcnVsZTpldmVub2RkO3N0cm9rZTojM0I0MTQzO3N0cm9rZS13aWR0aDoxLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxJyAvPgo8cGF0aCBjbGFzcz0nYm9uZC03JyBkPSdNIDMuMzYzNjQsNTYuMTQxOSBMIDI3Ljg1ODEsNzAuMjgzOCcgc3R5bGU9J2ZpbGw6bm9uZTtmaWxsLXJ1bGU6ZXZlbm9kZDtzdHJva2U6IzNCNDE0MztzdHJva2Utd2lkdGg6MS4wcHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MScgLz4KPHBhdGggY2xhc3M9J2JvbmQtMScgZD0nTSAzLjM2MzY0LDI3Ljg1ODEgTCAyNy44NTgxLDEzLjcxNjInIHN0eWxlPSdmaWxsOm5vbmU7ZmlsbC1ydWxlOmV2ZW5vZGQ7c3Ryb2tlOiMzQjQxNDM7c3Ryb2tlLXdpZHRoOjEuMHB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjEnIC8+CjxwYXRoIGNsYXNzPSdib25kLTInIGQ9J00gMjcuODU4MSwxMy43MTYyIEwgNTIuMzUyNiwyNy44NTgxJyBzdHlsZT0nZmlsbDpub25lO2ZpbGwtcnVsZTpldmVub2RkO3N0cm9rZTojM0I0MTQzO3N0cm9rZS13aWR0aDoxLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxJyAvPgo8cGF0aCBjbGFzcz0nYm9uZC0yJyBkPSdNIDI4LjcwMzksMjAuNzM2NCBMIDQ1Ljg1LDMwLjYzNTcnIHN0eWxlPSdmaWxsOm5vbmU7ZmlsbC1ydWxlOmV2ZW5vZGQ7c3Ryb2tlOiMzQjQxNDM7c3Ryb2tlLXdpZHRoOjEuMHB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjEnIC8+CjxwYXRoIGNsYXNzPSdib25kLTMnIGQ9J00gNTIuMzUyNiwyNy44NTgxIEwgODAuNjM2NCwyNy44NTgxJyBzdHlsZT0nZmlsbDpub25lO2ZpbGwtcnVsZTpldmVub2RkO3N0cm9rZTojM0I0MTQzO3N0cm9rZS13aWR0aDoxLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxJyAvPgo8cGF0aCBjbGFzcz0nYm9uZC04JyBkPSdNIDUyLjM1MjYsMjcuODU4MSBMIDUyLjM1MjYsNTYuMTQxOScgc3R5bGU9J2ZpbGw6bm9uZTtmaWxsLXJ1bGU6ZXZlbm9kZDtzdHJva2U6IzNCNDE0MztzdHJva2Utd2lkdGg6MS4wcHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MScgLz4KPHBhdGggY2xhc3M9J2JvbmQtNCcgZD0nTSA4MC42MzY0LDI3Ljg1ODEgTCA4MC42MzY0LDU2LjE0MTknIHN0eWxlPSdmaWxsOm5vbmU7ZmlsbC1ydWxlOmV2ZW5vZGQ7c3Ryb2tlOiMzQjQxNDM7c3Ryb2tlLXdpZHRoOjEuMHB4O3N0cm9rZS1saW5lY2FwOmJ1dHQ7c3Ryb2tlLWxpbmVqb2luOm1pdGVyO3N0cm9rZS1vcGFjaXR5OjEnIC8+CjxwYXRoIGNsYXNzPSdib25kLTUnIGQ9J00gODAuNjM2NCw1Ni4xNDE5IEwgNTIuMzUyNiw1Ni4xNDE5JyBzdHlsZT0nZmlsbDpub25lO2ZpbGwtcnVsZTpldmVub2RkO3N0cm9rZTojM0I0MTQzO3N0cm9rZS13aWR0aDoxLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxJyAvPgo8cGF0aCBjbGFzcz0nYm9uZC02JyBkPSdNIDUyLjM1MjYsNTYuMTQxOSBMIDI3Ljg1ODEsNzAuMjgzOCcgc3R5bGU9J2ZpbGw6bm9uZTtmaWxsLXJ1bGU6ZXZlbm9kZDtzdHJva2U6IzNCNDE0MztzdHJva2Utd2lkdGg6MS4wcHg7c3Ryb2tlLWxpbmVjYXA6YnV0dDtzdHJva2UtbGluZWpvaW46bWl0ZXI7c3Ryb2tlLW9wYWNpdHk6MScgLz4KPHBhdGggY2xhc3M9J2JvbmQtNicgZD0nTSA0NS44NSw1My4zNjQzIEwgMjguNzAzOSw2My4yNjM2JyBzdHlsZT0nZmlsbDpub25lO2ZpbGwtcnVsZTpldmVub2RkO3N0cm9rZTojM0I0MTQzO3N0cm9rZS13aWR0aDoxLjBweDtzdHJva2UtbGluZWNhcDpidXR0O3N0cm9rZS1saW5lam9pbjptaXRlcjtzdHJva2Utb3BhY2l0eToxJyAvPgo8L3N2Zz4K C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 claims 1
- 229920001971 elastomer Polymers 0.000 claims 1
- 239000000806 elastomer Substances 0.000 claims 1
- 230000000873 masking Effects 0.000 claims 1
- 239000002131 composite material Substances 0.000 abstract description 7
- 239000000203 mixture Substances 0.000 abstract description 4
- 239000010931 gold Substances 0.000 description 36
- 238000000034 method Methods 0.000 description 12
- 230000003071 parasitic Effects 0.000 description 8
- 150000001875 compounds Chemical class 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nMzAwcHgnIGhlaWdodD0nMzAwcHgnIHZpZXdCb3g9JzAgMCAzMDAgMzAwJz4KPCEtLSBFTkQgT0YgSEVBREVSIC0tPgo8cmVjdCBzdHlsZT0nb3BhY2l0eToxLjA7ZmlsbDojRkZGRkZGO3N0cm9rZTpub25lJyB3aWR0aD0nMzAwJyBoZWlnaHQ9JzMwMCcgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgeD0nMTM4JyB5PScxNzAnIGNsYXNzPSdhdG9tLTAnIHN0eWxlPSdmb250LXNpemU6NDBweDtmb250LXN0eWxlOm5vcm1hbDtmb250LXdlaWdodDpub3JtYWw7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOm5vbmU7Zm9udC1mYW1pbHk6c2Fucy1zZXJpZjt0ZXh0LWFuY2hvcjpzdGFydDtmaWxsOiMzQjQxNDMnID5BPC90ZXh0Pgo8dGV4dCB4PScxNjUuNicgeT0nMTcwJyBjbGFzcz0nYXRvbS0wJyBzdHlsZT0nZm9udC1zaXplOjQwcHg7Zm9udC1zdHlsZTpub3JtYWw7Zm9udC13ZWlnaHQ6bm9ybWFsO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTpub25lO2ZvbnQtZmFtaWx5OnNhbnMtc2VyaWY7dGV4dC1hbmNob3I6c3RhcnQ7ZmlsbDojM0I0MTQzJyA+dTwvdGV4dD4KPC9zdmc+Cg== data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nODVweCcgaGVpZ2h0PSc4NXB4JyB2aWV3Qm94PScwIDAgODUgODUnPgo8IS0tIEVORCBPRiBIRUFERVIgLS0+CjxyZWN0IHN0eWxlPSdvcGFjaXR5OjEuMDtmaWxsOiNGRkZGRkY7c3Ryb2tlOm5vbmUnIHdpZHRoPSc4NScgaGVpZ2h0PSc4NScgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgeD0nMzUuMDQ1NScgeT0nNTMuNTkwOScgY2xhc3M9J2F0b20tMCcgc3R5bGU9J2ZvbnQtc2l6ZToyM3B4O2ZvbnQtc3R5bGU6bm9ybWFsO2ZvbnQtd2VpZ2h0Om5vcm1hbDtmaWxsLW9wYWNpdHk6MTtzdHJva2U6bm9uZTtmb250LWZhbWlseTpzYW5zLXNlcmlmO3RleHQtYW5jaG9yOnN0YXJ0O2ZpbGw6IzNCNDE0MycgPkE8L3RleHQ+Cjx0ZXh0IHg9JzUxLjA0MDknIHk9JzUzLjU5MDknIGNsYXNzPSdhdG9tLTAnIHN0eWxlPSdmb250LXNpemU6MjNweDtmb250LXN0eWxlOm5vcm1hbDtmb250LXdlaWdodDpub3JtYWw7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOm5vbmU7Zm9udC1mYW1pbHk6c2Fucy1zZXJpZjt0ZXh0LWFuY2hvcjpzdGFydDtmaWxsOiMzQjQxNDMnID51PC90ZXh0Pgo8L3N2Zz4K [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 239000000356 contaminant Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 238000005272 metallurgy Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000006011 modification reaction Methods 0.000 description 2
- 210000003229 CMP Anatomy 0.000 description 1
- 206010063829 Device malfunction Diseases 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000003247 decreasing Effects 0.000 description 1
- 230000004059 degradation Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 231100001004 fissure Toxicity 0.000 description 1
- 238000005755 formation reaction Methods 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 239000002365 multiple layer Substances 0.000 description 1
- TWXTWZIUMCFMSG-UHFFFAOYSA-N nitride(3-) Chemical compound data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nMzAwcHgnIGhlaWdodD0nMzAwcHgnIHZpZXdCb3g9JzAgMCAzMDAgMzAwJz4KPCEtLSBFTkQgT0YgSEVBREVSIC0tPgo8cmVjdCBzdHlsZT0nb3BhY2l0eToxLjA7ZmlsbDojRkZGRkZGO3N0cm9rZTpub25lJyB3aWR0aD0nMzAwJyBoZWlnaHQ9JzMwMCcgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgeD0nMTM4JyB5PScxNzAnIGNsYXNzPSdhdG9tLTAnIHN0eWxlPSdmb250LXNpemU6NDBweDtmb250LXN0eWxlOm5vcm1hbDtmb250LXdlaWdodDpub3JtYWw7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOm5vbmU7Zm9udC1mYW1pbHk6c2Fucy1zZXJpZjt0ZXh0LWFuY2hvcjpzdGFydDtmaWxsOiM0Mjg0RjQnID5OPC90ZXh0Pgo8dGV4dCB4PScxNjUuNicgeT0nMTU0JyBjbGFzcz0nYXRvbS0wJyBzdHlsZT0nZm9udC1zaXplOjI2cHg7Zm9udC1zdHlsZTpub3JtYWw7Zm9udC13ZWlnaHQ6bm9ybWFsO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTpub25lO2ZvbnQtZmFtaWx5OnNhbnMtc2VyaWY7dGV4dC1hbmNob3I6c3RhcnQ7ZmlsbDojNDI4NEY0JyA+MzwvdGV4dD4KPHRleHQgeD0nMTc4LjQwOCcgeT0nMTU0JyBjbGFzcz0nYXRvbS0wJyBzdHlsZT0nZm9udC1zaXplOjI2cHg7Zm9udC1zdHlsZTpub3JtYWw7Zm9udC13ZWlnaHQ6bm9ybWFsO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTpub25lO2ZvbnQtZmFtaWx5OnNhbnMtc2VyaWY7dGV4dC1hbmNob3I6c3RhcnQ7ZmlsbDojNDI4NEY0JyA+LTwvdGV4dD4KPC9zdmc+Cg== data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0nMS4wJyBlbmNvZGluZz0naXNvLTg4NTktMSc/Pgo8c3ZnIHZlcnNpb249JzEuMScgYmFzZVByb2ZpbGU9J2Z1bGwnCiAgICAgICAgICAgICAgeG1sbnM9J2h0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnJwogICAgICAgICAgICAgICAgICAgICAgeG1sbnM6cmRraXQ9J2h0dHA6Ly93d3cucmRraXQub3JnL3htbCcKICAgICAgICAgICAgICAgICAgICAgIHhtbG5zOnhsaW5rPSdodHRwOi8vd3d3LnczLm9yZy8xOTk5L3hsaW5rJwogICAgICAgICAgICAgICAgICB4bWw6c3BhY2U9J3ByZXNlcnZlJwp3aWR0aD0nODVweCcgaGVpZ2h0PSc4NXB4JyB2aWV3Qm94PScwIDAgODUgODUnPgo8IS0tIEVORCBPRiBIRUFERVIgLS0+CjxyZWN0IHN0eWxlPSdvcGFjaXR5OjEuMDtmaWxsOiNGRkZGRkY7c3Ryb2tlOm5vbmUnIHdpZHRoPSc4NScgaGVpZ2h0PSc4NScgeD0nMCcgeT0nMCc+IDwvcmVjdD4KPHRleHQgeD0nMzUuMDQ1NScgeT0nNTMuNTkwOScgY2xhc3M9J2F0b20tMCcgc3R5bGU9J2ZvbnQtc2l6ZToyM3B4O2ZvbnQtc3R5bGU6bm9ybWFsO2ZvbnQtd2VpZ2h0Om5vcm1hbDtmaWxsLW9wYWNpdHk6MTtzdHJva2U6bm9uZTtmb250LWZhbWlseTpzYW5zLXNlcmlmO3RleHQtYW5jaG9yOnN0YXJ0O2ZpbGw6IzQyODRGNCcgPk48L3RleHQ+Cjx0ZXh0IHg9JzUxLjA0MDknIHk9JzQ0LjMxODInIGNsYXNzPSdhdG9tLTAnIHN0eWxlPSdmb250LXNpemU6MTVweDtmb250LXN0eWxlOm5vcm1hbDtmb250LXdlaWdodDpub3JtYWw7ZmlsbC1vcGFjaXR5OjE7c3Ryb2tlOm5vbmU7Zm9udC1mYW1pbHk6c2Fucy1zZXJpZjt0ZXh0LWFuY2hvcjpzdGFydDtmaWxsOiM0Mjg0RjQnID4zPC90ZXh0Pgo8dGV4dCB4PSc1OC40NjM3JyB5PSc0NC4zMTgyJyBjbGFzcz0nYXRvbS0wJyBzdHlsZT0nZm9udC1zaXplOjE1cHg7Zm9udC1zdHlsZTpub3JtYWw7Zm9udC13ZWlnaHQ6bm9ybWFsO2ZpbGwtb3BhY2l0eToxO3N0cm9rZTpub25lO2ZvbnQtZmFtaWx5OnNhbnMtc2VyaWY7dGV4dC1hbmNob3I6c3RhcnQ7ZmlsbDojNDI4NEY0JyA+LTwvdGV4dD4KPC9zdmc+Cg== [N-3] TWXTWZIUMCFMSG-UHFFFAOYSA-N 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
-
- 40, a silicon substrate on the surface of which has been created an interconnect network
- 42, a sample number of semiconductor circuits that have been created in or on the surface of the substrate 40
- 44, two electrostatic discharge (ESD) circuits created in or on the surface of the substrate 40, one ESD circuit is provided for each pin that is accessible for external connections (pins 52, see below)
- 46 is a layer of interconnect lines; these interconnect lines are above the surface of substrate 40 and under the layer 48 of passivation and represent a typical application of prior art fine-line interconnects; these fine-line interconnects of layer 46 typically have high resistance and high parasitic capacitance
- 48 is a layer of passivation that is deposited over the surface of the layer 46 of interconnect lines; this conventional layer 48 of passivation is used to protect the underlying devices and the underlying fine-line interconnections
- 50 is a power or ground bus that connects to the circuits 42 via fine-line interconnect lines provided in layer 46; this power or ground bus is typically of wider metal since this power or ground bus carries the accumulated current or ground connection for the devices 42
- 52 are two power or ground pins that pass through the layer 48 of passivation and that have been connected to the power or ground bus 50.
-
- 45 are two ESD circuits that are provided in or on the surface of the substrate 40; ESD circuits are always required for any external connection to an input/output (I/O) pin
- 45′ which are circuits that can be receiver or driver or I/O circuits for input (receiver) or output (driver) or I/O purposes respectively
- 54 is a clock or signal bus, and
- 56 are clock or signal pins that have been extended through the layer 48 of passivation.
-
- pins 56 must be connected to ESD and driver/receiver or I/O circuits 45
- for signal or clock pins 56, these pins must be connected not only to ESD circuits but also to driver or receiver or I/O circuits, highlighted as circuit 45′ in
FIG. 2 - after (clock and signal) stimuli have passed through the ESD and driver/receiver or I/O circuits, these stimuli are further routed using, under prior art methods, fine-line interconnect wires. A layer of passivation is deposited over the dielectric layer in which the interconnect network has been created.
-
- 40 is the silicon substrate on the surface of which interconnect lines are created in accordance with the invention
- 42 are semiconductor circuits that are created in or on the surface of substrate 40, the semiconductor circuits having one or more active devices
- 58 are connection pads to the semiconductor devices 42 that have been created in or on the surface of substrate 40
- 60 is a layer of fine-line interconnects that has been created overlying connection pads 58 to the semiconductor devices 42
- 61 is one of the vias or a local fine line interconnections that have been provided for layer 60, more such vias or local fine line interconnections are shown in
FIG. 3 but are, for reasons of simplicity, not highlighted - 62 is a layer of passivation that has been deposited overlying the layer 60 of fine-line interconnects. In creating layer 62 of passivation, a layer of approximately 0.5 μm. PECVD oxide can be deposited first followed by a layer of approximately 0.7 μm. nitride. Passivation layer 62 is very important because it protects the device wafer from moisture and foreign ion contamination. The positioning of this layer between the sub-micron process (of the integrated circuit) and the tens-micron process (of the interconnecting metallization structure) is of critical importance since it allows for a cheaper process that possibly has less stringent clean room requirements for the process of creating the interconnecting metallization structure.
- 63 is one of vias that passes through layer 62 of passivation, more such vias are shown in
FIG. 3 but are, for reasons of simplicity, not highlighted - 64 is a layer of post-passivation dielectric in which, as a post-passivation metal scheme process, interconnects have been created; in some applications, the metal can also be created directly on top of the layer 62 of passivation
- 74 is the combined (for multiple connection pads in layer 58) power or ground bus
- 67 is a via or a local thick metal scheme that is created overlying the layer 62 of passivation, more such vias or local thick metal schemes are shown in
FIG. 3 but are, for reasons of simplicity, not highlighted - 74′ is the power or ground bond pad for the multiple semiconductor devices in layer 58.
-
- provides an ESD circuit for each pin that is used for external input/output interconnect
- provides, after ESD stimuli have passed in parallel through the ESD circuits, a fine-line interconnect network for further distribution of the power and ground stimuli, and
- the fine-line power and ground distribution network is created underneath a layer of passivation.
-
- does not need to create an ESD circuit for each pin that is used for external input/output interconnect; this in view of the more robust wiring and the power/ground bond pad that drives the ESD circuit, resulting in reduced power loss by an unexpected power surge over the interconnect line, resulting in more power being delivered to an ESD circuit, and
- allows for the power and ground interconnects to be directly connected to the internal circuits of a semiconductor device, this either without an ESD circuit or with a smaller than regular ESD circuit (as previously explained).
-
- the prior art fine line interconnect lines are created underneath a layer of passivation, the wide, thick interconnect lines of the invention are created above a first and second layer of passivation
- the fine-line interconnect lines are typically created in a layer of inorganic dielectric, the thick wide interconnect lines are typically created in a layer of dielectric comprising polymer. This because an inorganic material cannot be deposited as a thick layer of dielectric because such a layer of dielectric would develop fissures and crack as a result
- fine-line interconnect metal is typically created using methods of sputter with resist etching or of damascene processes using oxide etch with electroplating after which CMP is applied. Either one of these two approaches cannot create thick metal due to cost considerations or oxide cracking
- thick, wide interconnect lines can be created by first sputtering a thin metal base layer, coating and patterning a thick layer of photoresist, applying a thick layer of metal by electroplating, removing the patterned photoresist and performing metal base etching (of the sputtered thin metal base). This method allows for the creation of a pattern of very thick metal, metal thickness in excess of 1 μm can in this manner be achieved while the thickness of the layer of dielectric in which the thick metal interconnect lines are created can be in excess of 2 μm
- the thick, wide metal is formed after formation of the layer of passivation. The semiconductor devices and the fine line interconnection are already well protected by the layer of passivation from mobile ions, moisture and other contaminants. The wide, thick wire can then be formed using unconventional processes which however in most Integrated Circuit fabrication facilities are restrictive in use in for instance applying polymers, Au, Cr, Ni dry film etc. Furthermore, environmental requirements during fabrication can be relaxed.
-
- 40, the cross section of the surface of a silicon substrate
- 42, active semiconductor devices that have been created in or on the surface of substrate 40
- 60, a layer of dielectric in and through which fine-line interconnect wires have been created; these interconnect wires make contact with the underlying active semiconductor devices 42 and have in addition been provided with points of electrical contact or top metal in the surface of layer 60
- 10, two examples of top metal that has been provided in the surface of layer 60, making contact with the fine-line interconnect wires that have been created in layer 60
- 62, a layer of passivation deposited over the surface of layer 60, including the surface of top metal contacts 10; the passivation layer 62 is used to protect the underlying active devices (layer 42) and the fine-line interconnections (layer 60 of dielectric)
- 11, 12 and 13 respectively a first, a second and a third thick layer of dielectric; these three layers of dielectric significantly are created over the surface of layer 62 of passivation and are the layers of dielectric in and through which the thick interconnect metal of the invention is created, including at least one contact pad in the surface of the upper layer of dielectric that makes electrical contact with the thick interconnect metal of layers 11, 12 and 13 14, 15 and 16; for purposes of cost-reduction, the layer 11 can be omitted, i.e. the layer 14 of metal is directly formed on the surface of the layer 62 of passivation
- 14, a first layer of patterned and etched metal overlying first layer 11 of dielectric and being in contact with top metal 10 by means of openings created through the first layer 11 of dielectric and the layer 62 of passivation
- 15 and 16, a second layer of patterned and etched metal overlying second layer 12 of dielectric and being in contact with the first layer 14 of patterned and etched metal by means of openings created through the second layer 12 of dielectric; layer 16 can for instance serve as a contact pad, layer 15 provides further interconnect to surrounding circuitry (not shown); layers 15 and 16 can be used for purposes other than forming contacts, these layers can also be used as conductive layers such as layers of signal interconnects
- 17, an opening created through the third layer 13 of dielectric, exposing the surface of patterned and etched layer 16 of metal, forming a contact pad over the surface of this exposure
- 18, a wire bond connection that establishes electrical contact between the contact pad 16 and surrounding circuitry (not shown).
-
- layer 14 can comprise a compound layer of Cr/Cu/Ni where the layer of Cu forms the bulk, low-resistance layer of metal, the lower layer of Cr provides adhesion to the overlying layer of Cu and the upper layer of Ni protects the surface of the layer of copper, and
- layers 15 and 16 can comprise a compound layer of Cr/Cu/Ni/Au where the layer of copper provides the bulk, low-resistance layer of metal, the lower layer of Cr provides adhesion to the overlying layer of Cu and the underlying polyimide, the layer of Ni overlying the layer of Cu serves as a diffusion barrier layer while the upper layer of Au is the wire-bondable layer of metal.
-
- 40, the cross section of the surface of a silicon substrate
- 42, active semiconductor devices that have been created in or on the surface of substrate 40
- 60, a layer of dielectric in and through which fine-line interconnect wires have been created; these interconnect wires make contact with the underlying active semiconductor devices 42 and have in addition been provided with points of electrical contact or top metal in the surface of layer 60
- 10, top metal that has been provided in the surface of layer 60, making contact with the fine-line interconnect wires that have been created in layer 60
- 62, a layer of passivation deposited over the surface of layer 60, including the surface of top metal contact 10
- 11 a first thick layer of dielectric; this layer 11 of dielectric is created over the surface of layer 62 of passivation; for purposes of-cost-reduction, the first layer 11 of dielectric can be omitted in some applications
- 19 and 20, layers of patterned and etched metal forming a bonding pad/low resistance interconnect layer. The upper layer 20 comprises a selected metal which is selected for purposes of providing low-resistance interconnect while this layer can simultaneously be used for wire-bonding purposes, preferably using Au or Al. The lower layer 19 is used for purposes of adhesion to the layer of dielectric as well as for forming a diffusion layer to the contact pad 10.
- The processing flow that is provided for the creation of the structure that has been shown in cross section in
FIG. 6 is as follows:
- 1. conventionally performing Front-Of-Line (FOL) processing, comprising processing of layer 42 of active semiconductor devices, layer 60 of fine-line interconnect metal thereby including the creation of top metal 10 and layer 62 of passivation
- 2. patterning and etching an opening through the layer 62 of passivation, this opening being aligned with a portion of the top metal 10, exposing the surface of top metal 10; it is clear that where at this time only one opening is indicated, the invention is not limited to the creation of one opening through the layer 62 of passivation but can create as many openings as are desired for a device layout
- 3. depositing a first layer 11 of dielectric, preferably comprising polyimide; for purposes of cost reduction, this layer can be omitted in some applications
- 4. patterning and etching the deposited first layer 11 of dielectric, creating an opening through this first layer of dielectric; this opening being aligned with the opening that has been created through the layer 62 of passivation, making this opening being aligned with a portion of the layer 10 of top metal
- 5. successively creating layers of barrier metal such as TiW (layer 19) over which a layer (layer 20) of Au or Al is created, preferably using the method of metal sputtering for the creation of these layer 19 of metal; it must specifically be noted that layer 19 is a composite sputtered layer comprising about 3,000 Angstrom of TiW and about 1,000 Angstrom of Au; layer 20 is a thick layer of Au created by using electroplating techniques; layer 20 is therefore not only used as a bond pad but can additionally be used for interconnect wiring; these latter comments further emphasize that the invention provides for the creation of a metal system that can be simultaneously used for the creation of conductive interconnect traces and for wire bonding purposes; it must as a consequence be pointed out that aspects of separately creating either interconnect traces or wire bond pads are not addressed or provided for by the invention.
- 6. creating an exposure mask, preferably comprising photoresist, over the surface of sputtered layers 19, this mask exposing these layers over a surface area of the metal layers 19 that is to form as a metal system that can be simultaneously used for low resistance conduction and wire bonding, this mask exposing the surface areas where the wiring and the bond pad are required
- 7. applying a Au plating to the exposed surface of the layer 19; layer 20 is a thick layer of Au created by using electroplating techniques; layer 20 is therefore not only used as a bond pad but can additionally be used for interconnect wiring; these latter comments further emphasize that the invention provides for the creation of a metal system that can be simultaneously used for the creation of conductive interconnect traces and for wire bonding purposes; it must as a consequence be pointed out that aspects of separately creating either interconnect traces or wire bond pads are not addressed or provided for by the invention
- 8. removing the exposed photoresist, and
- 9. etching layers 19 using the plated Au is a mask. Thus, a metal system has been created for low-resistance interconnects and for wire-bonding purposes.
-
- providing a substrate 40, active devices 42 having been created in or on the surface of the substrate 40, a layer 60 of fine-line interconnect metal including top metal 10 being connected to the active devices 42 having been provided over the surface of the substrate 40, a layer 62 of passivation having been provided over the surface of the layer 60 of fine-line interconnect metal;
- patterning and etching an opening through the layer 62 of passivation, this opening being aligned with a portion 10 of the top metal, exposing the surface 10 of top metal;
- successively creating a first layer (one layer of layers 19) of metal comprising TiW over which a second layer metal (one layer of layers 19) comprising Au is created, preferably using the method of metal sputtering for the creation of these layers 19;
- creating an exposure mask (not shown in FIG. 6), preferably comprising photoresist, over the surface of sputtered second layer of metal comprising Au, this mask exposing the second layer of metal over a surface area that is to form the low-resistance interconnection and the bond pad;
- applying a bulk metal 20 plating to the exposed surface of the second layer of metal comprising Au;
- removing the exposure mask; and
- etching the second layer of metal comprising Au and the first layer of metal comprising TiW in accordance with the plated layer 20 of bulk metal, leaving in place the first and the second layers 19 of metal where the plated layer 20 of bulk metal plating has been applied, thereby providing a metal system serving as both low-resistance conduction and wirebonding pads.
-
- 21, a first layer of metal, preferably comprising Cr or Ti or TiW or a compound thereof; layer 21 serves as an adhesion layer between the overlying layer 22 of Cu and the underlying layer 11 of dielectric; a thin layer of copper (not shown) is subsequently sputtered over the surface 21 to serve as a seed layer for the electroplating of layer 22, layer 22 is not yet formed at this time
- 22, a second layer of metal of the bond pad, preferably comprising Cu or a Cu compound, selected for its low-resistance characteristics
- 23, a third layer of metal of the bond pad, preferably comprising Ni or a Ni compound
- 12, a second layer of dielectric, an opening 25 has been created through this layer of dielectric, exposing the surface of layer 23 for the creation of the fourth layer 24 of metal of the bond pad, and
- 24, a fourth layer of metal of the bond pad, preferably comprising Au or an Au compound.
- 1. conventionally performing Front-Of-Line (FOL) processing, comprising processing of layer 42 of active semiconductor devices, layer 60 of fine-line interconnect metal thereby including the creation of top metal 10 and layer 62 of passivation
- 2. patterning and etching an opening through the layer 62 of passivation, this opening is to be aligned with a portion of the top metal 10, exposing the surface of top metal 10
- 3. depositing a first layer 11 of dielectric, preferably comprising polyimide; in some applications, this layer of dielectric can be omitted for reasons of cost-reduction
- 4. patterning and etching the deposited first layer 11 of dielectric, creating an opening through this first layer of dielectric; this opening is to be aligned with the opening that has been created through the layer 62 of passivation making this opening being aligned with a portion of the layer 10 of top metal
- 5. creating layers 21 (comprising Cr or Ti or TiW) and a layer of Cu (not shown), preferably using the method of metal sputtering for the creation of these layers of metal
- 6. creating an exposure mask, preferably comprising photoresist, over the surface of sputtered layers 21, this mask exposing these layers over a surface area of the metal layer 21 that is to form as a bond pad, this mask further covering all surface areas of the layer 22 21 that are not serving as a bond pad
- 7. applying a Cu plating (not shown in
FIG. 7 ) layer 22 to the exposed surface of the layer 21 - 8. applying a Ni plating to the copper plated surface of layers layer 22, creating layer 23
- 9. removing the exposed photoresist, and
- 10. etching layer 21 essentially in accordance with the applied Ni and Cu plating layers 23 and 22, leaving in place layer 21 where the Cu and Ni plating (layer 22 and 23) has layers 22 and 23 have been applied, thereby leaving in place layers 21, 22 and 23 that serve as low-resistance interconnection, exposing the surface of layer 23, further exposing the surface of the first layer 11 of dielectric
- 11. depositing a second layer 12 of dielectric, preferable comprising polyimide, over the exposed surface of layer 23 and the exposed surface of the first layer 11 of dielectric
- 12. patterning and etching the deposited second layer 12 of dielectric, creating an opening 25 through the second layer 12 of dielectric that aligns with the patterned and etched layers 21, 22 and 23, exposing the surface of layer 23, and
- 13. performing electroless gold plating to the exposed surface of layer 23, creating bond pad 24.
-
- providing a substrate 40, active devices 42 having been created in or on the surface of the substrate 40, a layer 60 of fine-line interconnect metal having been provided over the surface of the substrate 40, at least one layer 10 of patterned top metal having been provided over the surface of the layer 60 of fine-line interconnect metal, the at least one layer of patterned top metal having been connected to the layer 60 of fine-line interconnect metal, a layer 62 of passivation having been provided over the surface of the layer 60 of fine-line interconnect metal;
- patterning and etching at least one first opening through the layer 62 of passivation, the at least one first opening being aligned with a portion 10 of the at least one layer of top metal, exposing the surface 10 of the at least one layer of top metal;
- creating a first layer 21 of metal, serving as a diffusion barrier and an adhesion layer, over the surface of the layer 62 of passivation, preferably using metal sputtering for the creation of the first layer 21 of metal;
- creating a second layer (not shown in FIG. 7) of seed metal for subsequent processing of electroplating, preferably using methods of metal sputtering;
- creating an exposure mask (not shown in FIG. 7), preferably comprising photoresist, over the surface of the sputtered second layer of metal, the exposure mask exposing the second layer of metal over a surface area of the second layer of metal that is to form a low resistance interconnection;
- applying a first metal plating to the exposed surface of the second layer of metal, creating a third layer 22 of metal to form a low-resistance interconnection over the exposed surface area of the second layer of metal;
- applying a second metal plating to the exposed surface of the third layer of metal, creating a fourth layer 23 of metal to form a diffusion barrier over the surface area of the third layer 23 of metal;
- removing the exposure mask;
- etching the first and second layers (21 and seed layer) of metal in accordance with the applied third and fourth metal plating, thereby leaving in place the first, the second, the third and the fourth layers (21, seed layer, 22 and 23) of metal that serve as diffusion barrier, electroplating seed layer, low-resistance layer and diffusion barrier respectively;
- depositing a second layer 12 of dielectric, preferably comprising polyimide, over the exposed surface of the fourth layer 23 of metal and the exposed surface of the layer 62 of passivation;
- patterning and etching the deposited layer 12 of dielectric, creating an opening 25 through the layer 12 of dielectric that aligns with a portion of the patterned and etched first, second, third and fourth layers (21, seed layer, 22 and 23) of metal, exposing the surface of the fourth layer 23 of metal; and
- applying a third metal plating to the exposed surface of the fifth layer 24 of metal, preferably using electroless plating, creating a bond pad.
- 1. conventionally performing Front-Of-Line (FOL) processing, comprising processing of layer 42 of active semiconductor devices, layer 60 of fine-line interconnect metal thereby including the creation of top metal 10 and layer 62 of passivation
- 2. patterning and etching an opening through the layer 62 of passivation, this opening is to be aligned with a portion of the top metal 10, exposing the surface of top metal 10
- 3. depositing a first layer 11 of dielectric, preferably comprising polyimide; this layer of dielectric can be omitted in some applications
- 4. patterning and etching the deposited first layer 11 of dielectric, creating an opening through this first layer 11 of dielectric; this opening is to be aligned with the opening that has been created through the layer 62 of passivation making this opening being aligned with a portion of the layer 10 of top metal
- 5. creating a layer 21 of Cr or Ti or TiW, preferably using the method of metal sputtering for the creation of these layers of metal; a thin layer of copper (not shown) is sputtered over the surface of layer 21 to serve as a seed layer for the electroplating of overlying layer 22, layer 22 is not yet formed at this time
- 6. creating a exposure mask, preferably comprising photoresist, over the surface of sputtered layer 21, this mask exposing this layer over a surface area of the metal layer 21 that is to form as the low resistance interconnection and a bond pad, this mask further covering all surface areas of the layer 21 that are not serving as a bond pad
- 7. applying a Cu plating to the exposed surface of the layers 21, creating layer 22
- 8. applying a Ni plating to the exposed surface of the layers 22, creating layer 23
- 9. applying a Au plating to the exposed surface of the layers 23, creating layer 24; this essentially creates a three layered mask of layers 21 (over which a thin layer of copper, not shown, has been sputtered), 22 and 23
- 10. removing the exposure mask
- 11. etching layers 21 (and the thereover sputtered thin layer of copper) essentially in accordance with the applied Au plating, leaving in place layers 21, 22, 23 and 24 where the Au plating has been applied, thereby leaving in place layers 21, 22, 23 and 24 that serve as the low resistance interconnection and a bond pad, exposing the surface of layer 24, further exposing the surface of the first layer 11 of dielectric
- 12. depositing a second layer 12 of dielectric, preferable comprising polyimide, over the exposed surface of layer 24 and the exposed surface of the first layer 11 of dielectric
- 13. patterning and etching the deposited second layer 12 of dielectric, creating an opening 26 through the second layer 12 of dielectric that aligns with a portion of the patterned and etched layers 21, 22, 23 and 24, exposing the surface of layer 24.
-
- providing a substrate 40, active devices 42 having been created in or on the surface of the substrate 40, a layer 60 of fine-line interconnect metal having been provided over the surface of the substrate 40, at least one layer 10 of patterned top metal having been provided over the surface of the layer 60 of fine-line interconnect metal, the at least one layer 10 of patterned top metal having been connected to the layer 60 of fine-line interconnect metal, a layer 62 of passivation having been provided over the surface of the layer 60 of fine-line interconnect metal;
- patterning and etching at least one first opening through the layer 62 of passivation, the at least one first opening being aligned with a portion of the at least one layer 10 of top metal, exposing the surface of the at least one layer 10 of top metal;
- creating a first layer 21 of metal over the surface of the layer 62 of passivation, preferably using the method of metal sputtering for the creation of this layer 21 of metal;
- sputtering a thin second layer (not shown in FIG. 8) over the surface of the first layer 21 of metal, the second layer serving as an electroplating seed layer;
- creating an exposure mask (not shown in FIG. 8), preferably comprising photoresist, over the surface of the sputtered second layer of metal, the exposure mask exposing the surface of the second layer of metal over a surface area that is to serve as a low-resistance interconnection and a bond pad;
- creating a third layer 22 of metal over the exposed surface of the second layer of metal;
- creating a fourth layer 23 of metal over the exposed surface of the third layer 22 of metal;
- creating a fifth layer 24 of metal over the exposed surface of the fourth layer 23 of metal;
- removing the exposure mask;
- etching the first and the second layers (21 and seed layer) of metal in accordance with the created fifth layer 24 of metal, leaving in place the first, second, third, fourth and fifth layers (21, seed layer, 22, 23 and 24) of metal where the fifth layer 24 of metal has been applied, these layers serving as a low-resistance interconnection and a bond pad, exposing the surface of the fifth layer 24 of metal, further exposing the surface of the layer 62 of passivation;
- depositing a layer 12 of dielectric, preferable comprising polyimide, over the exposed surface of the fifth layer 24 of metal and the exposed surface of the layer 62 of passivation;
- patterning and etching the deposited second layer 12 of dielectric, creating an opening 26 through the second layer of dielectric that aligns with a portion of the patterned and etched first, second, third, fourth and fifth layers of metal, exposing the surface of the fifth layer 24 of metal, creating a bond pad.
- 1. conventionally performing Front-Of-Line (FOL) processing, comprising processing of layer 42 of active semiconductor devices, layer 60 of fine-line interconnect metal thereby including the creation of top metal 10 and layer 62 of passivation
- 2. patterning and etching an opening through the layer 62 of passivation, this opening is to be aligned with a portion of the top metal 10, exposing the surface of top metal 10
- 3. depositing a first layer 11 of dielectric, preferably comprising polyimide; in some applications, this layer of dielectric can be omitted for cost reasons
- 4. patterning and etching the deposited first layer 11 of dielectric, creating an opening through this first layer of dielectric; this opening is to be aligned with the opening that has been created through the layer 62 of passivation making this opening being aligned with a portion of the layer 10 of top metal
- 5. creating a layer 21 of Al; this layer of Al is thicker than 1 μm and is preferably created using methods of metal sputtering
- 6. creating an exposure mask, preferably comprising photoresist, over the surface of sputtered Al layer 21; this mask exposes a surface area except the surface of the Al layer 21 that is to form a low-resistance interconnection and a bond pad, this mask further covering all surface areas of the metal layer that are not serving as a bond pad
- 7. etching the Al metal layer in accordance with the exposure mask, preferably using wet etching
- 8. removing the exposure mask
- 9. depositing a second layer 12 of dielectric, preferable comprising polyimide, over the exposed surface of layer 24 21 and the exposed surface of the first layer 11 of dielectric
- 10. patterning and etching the deposited second layer 12 of dielectric, creating an opening 26 through the second layer 12 of dielectric that aligns with a portion of the patterned and etched layer 21, exposing the surface of layer 24 21, the exposed surface of layer 24 21 serving as a bond pad.
-
- providing a substrate 40, active devices 42 having been created in or on the surface of the substrate 40, a layer 60 of fine-line interconnect metal having been provided over the surface of the substrate 40, at least one layer 10 of patterned top metal having been provided over the surface of the layer 60 of fine-line interconnect metal, said at least one layer 10 of patterned top metal having been connected to said layer 60 of fine-line interconnect metal, a layer 62 of passivation having been provided over the surface of the layer 60 of fine-line interconnect metal;
- patterning and etching at least one first opening through the layer 62 of passivation, said at least one first opening being aligned with a portion of said at least one layer 10 of top metal, exposing the surface of said at least one layer 10 of top metal;
- depositing a first layer 11 of dielectric over the surface of said layer 62 of passivation, including at least one opening created through said layer 62 of passivation, said first layer 11 of dielectric preferably comprising polyimide;
- patterning and etching the deposited first layer 11 of dielectric, creating at least one second opening through this first layer 11 of dielectric, said at least one second opening being aligned with said at least one first opening through the layer 62 of passivation;
- creating a layer 21 of metal over the surface of said first layer 11 of dielectric including inside surfaces of said second opening created through said first layer 11 of dielectric, preferably using the method of metal sputtering for the creation of this layer 11 of metal;
- creating an exposure mask (not shown in FIG. 9), preferably comprising photoresist, over the surface of sputtered layer 21 of metal, said exposure mask covering this layer over a surface area of the metal layer 21 that is to serve as a low-resistance interconnection and a bond pad;
- etching the layer 21 of metal in accordance with the exposure mask, exposing the surface of said first layer 11 of dielectric;
- removing the exposure mask, exposing the surface of said layer 21 of metal;
- depositing a second layer 12 of dielectric, preferable comprising polyimide, over the exposed surface of the fourth layer of metal and the exposed surface of the first layer 11 of dielectric; and
- patterning and etching the deposited second layer 12 of dielectric, creating an opening 26 through the second layer 12 of dielectric that aligns with a portion of the patterned and etched layer 21 of metal, exposing the surface of the layer 21 of metal, the exposed surface of the layer 21 of metal serving as a bond pad.
- 1. conventionally performing Front-Of-Line (FOL) processing, comprising processing of layer 42 of active semiconductor devices, layer 60 of fine-line interconnect metal thereby including the creation of top metal 10 and 10′ and layer 62 of passivation; top metal 10 and 10′ is a metal that is wire-bondable
- 2. patterning and etching openings 28, 31 and 32 through the layer 62 of passivation, openings 28 and 31 to be aligned with a portion of the top metal 10′, exposing the surface of top metal 10′; opening 32 to be aligned with a portion of the top metal 10, exposing the surface of top metal 10
- 3. depositing a first layer 11 of dielectric, preferably comprising polyimide; in some applications, this layer of dielectric can be omitted
- 4. patterning and etching the deposited first layer 11 of dielectric, creating openings through this first layer of dielectric; these openings are to be aligned with the openings 28, 31 and 32
- 5. creating a layer 21 of TiW or Ti or Cr over which a thin layer of Cu (not shown) is created; the thin layer of copper (not shown) serves as a seed layer for the electroplating of an overlying layer
- 6. creating an exposure mask, preferably comprising photoresist, to expose area 100; area 100 can be an interconnecting network covering a large portion of the chip area, connecting to areas 10′, a portion of which forms a wire bonding pad exposed through opening 28; the length of area 100 can be large since low resistance interconnect metal is used, while 10′ should be short since higher resistance metal is used
- 7. applying a Cu plating 22 to the exposed surface of the layer 21 in area 100
- 8. applying a Ni plating 23 to the exposed surface of the layers 22 in area 100
- 9. removing the exposure mask
- 10. etching (the thin layer of copper, not shown) and layer 21 of TiW using the patterned layers 22 and 23 as a mask, for this etch a H2O2 is used, thereby avoiding etch damage to the surface of layer 10′ of aluminum in the bond pad 28
- 11. depositing a second layer 12 of dielectric, preferably comprising polyimide, over the complete surface of the wafer
- 12. patterning and etching the layer 12 of dielectric outside area 100′, to open region 29, exposing the surface of the bond pad exposed through opening 28.
-
- providing a substrate 40, active devices 42 having been created in or on the surface of the substrate 40, a layer 60 of fine-line interconnect metal including top metal being connected to the active devices 42 having been provided over the surface of the substrate 40, the top metal 10 comprising wire-bondable metal 10′, the top metal 10 comprising at least one first portion of top metal which comprises a bond pad 10′, the top metal 10 further comprising at least one second portion of top metal that needs to be connected to the first portion of top metal, a layer 62 of passivation having been provided over the surface of the layer 60 of fine-line interconnect metal;
- patterning and etching a first, second and a third openings 28, 31 and 32 through the layer 62 of passivation, the first opening 28 being aligned with a portion of the first portion of top metal, the second opening 31 being aligned with a portion of the second portion of top metal, the third opening 32 being aligned with a portion of the second portion of top metal, exposing the surface of the first and second portion of top metal;
- depositing a first layer 11 of dielectric, preferably comprising polyimide, over the surface of the layer 62 of passivation, including the first, second and third openings 28, 31 and 32 created in the layer 62 of passivation;
- patterning and etching the deposited first layer 11 of dielectric, creating a fourth, a fifth and a sixth openings through the first layer 11 of dielectric, the fourth opening 29 through the first layer 11 of dielectric being aligned with the first opening 28 created through the layer 62 of passivation, the fifth and sixth openings through the first layer 11 of dielectric respectively being aligned with the second and third openings 31 and 32 created through the layer 62 of passivation;
- creating a first layer 21 of metal over the surface of the first layer 11 of dielectric, creating a second layer (not shown in FIG. 10) of metal serving as seed layer over the surface of the first layer 21 of metal;
- creating an exposure mask (not shown in FIG. 10), preferably comprising photoresist, over the surface of the created second layer of metal, exposing the second layer of metal only over the surface area of the second layer of metal at least in a region over and between the second and third opening while not exposing the first opening;
- creating a patterned third layer 22 of metal over the exposed surface of the second layer of metal;
- creating a patterned fourth layer 23 of metal over the surface of the patterned third layer 22 of metal;
- removing the exposure mask, exposing the surface of the second layer of metal, leaving in place a mask of the patterned third and fourth layers 23 of metal in place overlying the second layer of metal;
- etching the second and the first layers (seed layer and 21) of metal in accordance with the mask of third and fourth layers 22 and 23 of metal overlying these second and first layers (seed layer and 21) of metal, thereby avoiding etch damage to the surface of the top metal 10′ in the bond pad, thereby exposing the surface of the first layer 11 of dielectric;
- depositing a second layer 12 of dielectric over the surface of the patterned fourth layer 23 of metal and the surface of the first layer 11 of dielectric, preferable comprising polyimide; and
- patterning and etching the deposited second layer 12 of dielectric, creating an opening through the second layer 12 of dielectric that aligns with the bond pad.
Claims (119)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/691,497 US6495442B1 (en) | 2000-10-18 | 2000-10-18 | Post passivation interconnection schemes on top of the IC chips |
US10/004,027 US6605528B1 (en) | 2000-10-18 | 2001-10-24 | Post passivation metal scheme for high-performance integrated circuit devices |
US20364605A true | 2005-08-12 | 2005-08-12 | |
US11/518,595 USRE43674E1 (en) | 2000-10-18 | 2006-09-08 | Post passivation metal scheme for high-performance integrated circuit devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/518,595 USRE43674E1 (en) | 2000-10-18 | 2006-09-08 | Post passivation metal scheme for high-performance integrated circuit devices |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date | |
---|---|---|---|---|
US10/004,027 Reissue US6605528B1 (en) | 2000-10-18 | 2001-10-24 | Post passivation metal scheme for high-performance integrated circuit devices |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE43674E1 true USRE43674E1 (en) | 2012-09-18 |
Family
ID=46800871
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/518,595 Expired - Lifetime USRE43674E1 (en) | 2000-10-18 | 2006-09-08 | Post passivation metal scheme for high-performance integrated circuit devices |
Country Status (1)
Country | Link |
---|---|
US (1) | USRE43674E1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8994173B2 (en) | 2013-06-26 | 2015-03-31 | International Business Machines Corporation | Solder bump connection and method of making |
Citations (134)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4060828A (en) * | 1975-08-22 | 1977-11-29 | Hitachi, Ltd. | Semiconductor device having multi-layer wiring structure with additional through-hole interconnection |
US4300184A (en) | 1979-07-11 | 1981-11-10 | Johnson Controls, Inc. | Conformal coating for electrical circuit assemblies |
US4685998A (en) | 1984-03-22 | 1987-08-11 | Thomson Components - Mostek Corp. | Process of forming integrated circuits with contact pads in a standard array |
US4789647A (en) | 1986-01-08 | 1988-12-06 | U.S. Philips Corporation | Method of manufacturing a semiconductor device, in which a metallization with a thick connection electrode is provided on a semiconductor body |
US4927505A (en) | 1988-07-05 | 1990-05-22 | Motorola Inc. | Metallization scheme providing adhesion and barrier properties |
US5046161A (en) | 1988-02-23 | 1991-09-03 | Nec Corporation | Flip chip type semiconductor device |
US5055907A (en) | 1989-01-25 | 1991-10-08 | Mosaic, Inc. | Extended integration semiconductor structure with wiring layers |
US5061985A (en) | 1988-06-13 | 1991-10-29 | Hitachi, Ltd. | Semiconductor integrated circuit device and process for producing the same |
US5083187A (en) | 1990-05-16 | 1992-01-21 | Texas Instruments Incorporated | Integrated circuit device having bumped power supply buses over active surface areas and method of manufacture thereof |
US5106461A (en) | 1989-04-04 | 1992-04-21 | Massachusetts Institute Of Technology | High-density, multi-level interconnects, flex circuits, and tape for tab |
US5145571A (en) * | 1990-08-03 | 1992-09-08 | Bipolar Integrated Technology, Inc. | Gold interconnect with sidewall-spacers |
US5162264A (en) | 1989-04-20 | 1992-11-10 | International Business Machines Corporation | Integrated circuit package |
US5196371A (en) | 1989-12-18 | 1993-03-23 | Epoxy Technology, Inc. | Flip chip bonding method using electrically conductive polymer bumps |
US5212403A (en) | 1990-09-10 | 1993-05-18 | Hitachi, Ltd. | Integrated circuit device having an ic chip mounted on the wiring substrate and having suitable mutual connections between internal circuits |
US5226232A (en) | 1990-05-18 | 1993-07-13 | Hewlett-Packard Company | Method for forming a conductive pattern on an integrated circuit |
US5244833A (en) | 1989-07-26 | 1993-09-14 | International Business Machines Corporation | Method for manufacturing an integrated circuit chip bump electrode using a polymer layer and a photoresist layer |
US5277756A (en) | 1990-07-02 | 1994-01-11 | Digital Equipment Corporation | Post fabrication processing of semiconductor chips |
KR940007290B1 (en) | 1991-12-14 | 1994-08-12 | 현대전자산업 주식회사 | Manufacturing method of wirebonding pad |
US5372967A (en) | 1992-01-27 | 1994-12-13 | Motorola, Inc. | Method for fabricating a vertical trench inductor |
US5384488A (en) | 1992-06-15 | 1995-01-24 | Texas Instruments Incorporated | Configuration and method for positioning semiconductor device bond pads using additional process layers |
US5461333A (en) | 1993-03-15 | 1995-10-24 | At&T Ipm Corp. | Multi-chip modules having chip-to-chip interconnections with reduced signal voltage level and swing |
US5461545A (en) | 1990-08-24 | 1995-10-24 | Thomson-Csf | Process and device for hermetic encapsulation of electronic components |
US5468984A (en) | 1994-11-02 | 1995-11-21 | Texas Instruments Incorporated | ESD protection structure using LDMOS diodes with thick copper interconnect |
US5479049A (en) | 1993-02-01 | 1995-12-26 | Sharp Kabushiki Kaisha | Solid state image sensor provided with a transparent resin layer having water repellency and oil repellency and flattening a surface thereof |
US5481205A (en) | 1992-06-29 | 1996-01-02 | At&T Corp. | Temporary connections for fast electrical access to electronic devices |
US5501006A (en) | 1993-09-22 | 1996-03-26 | Motorola, Inc. | Method for connection of signals to an integrated circuit |
US5532512A (en) | 1994-10-03 | 1996-07-02 | General Electric Company | Direct stacked and flip chip power semiconductor device structures |
US5541135A (en) | 1995-05-30 | 1996-07-30 | Motorola, Inc. | Method of fabricating a flip chip semiconductor device having an inductor |
US5569956A (en) | 1995-08-31 | 1996-10-29 | National Semiconductor Corporation | Interposer connecting leadframe and integrated circuit |
US5576680A (en) | 1994-03-01 | 1996-11-19 | Amer-Soi | Structure and fabrication process of inductors on semiconductor chip |
US5607877A (en) * | 1993-12-28 | 1997-03-04 | Fujitsu Limited | Projection-electrode fabrication method |
US5635767A (en) | 1995-06-02 | 1997-06-03 | Motorola, Inc. | Semiconductor device having built-in high frequency bypass capacitor |
US5641997A (en) | 1993-09-14 | 1997-06-24 | Kabushiki Kaisha Toshiba | Plastic-encapsulated semiconductor device |
US5659201A (en) | 1995-06-05 | 1997-08-19 | Advanced Micro Devices, Inc. | High conductivity interconnection line |
US5665989A (en) | 1995-01-03 | 1997-09-09 | Lsi Logic | Programmable microsystems in silicon |
US5686764A (en) | 1996-03-20 | 1997-11-11 | Lsi Logic Corporation | Flip chip package with reduced number of package layers |
US5691248A (en) | 1995-07-26 | 1997-11-25 | International Business Machines Corporation | Methods for precise definition of integrated circuit chip edges |
US5701666A (en) | 1994-08-31 | 1997-12-30 | Motorola, Inc. | Method for manufacturing a stimulus wafer for use in a wafer-to-wafer testing system to test integrated circuits located on a product wafer |
US5719448A (en) | 1989-03-07 | 1998-02-17 | Seiko Epson Corporation | Bonding pad structures for semiconductor integrated circuits |
US5731945A (en) | 1995-02-22 | 1998-03-24 | International Business Machines Corporation | Multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes |
US5736792A (en) | 1995-08-30 | 1998-04-07 | Texas Instruments Incorporated | Method of protecting bond wires during molding and handling |
US5767010A (en) | 1995-03-20 | 1998-06-16 | Mcnc | Solder bump fabrication methods and structure including a titanium barrier layer |
US5789303A (en) | 1994-11-28 | 1998-08-04 | Northern Telecom Limited | Method of adding on chip capacitors to an integrated circuit |
US5792594A (en) | 1996-04-01 | 1998-08-11 | Motorola, Inc. | Metallization and termination process for an integrated circuit chip |
US5818748A (en) | 1995-11-21 | 1998-10-06 | International Business Machines Corporation | Chip function separation onto separate stacked chips |
US5834844A (en) | 1995-03-24 | 1998-11-10 | Shinko Electric Industries Co., Ltd. | Semiconductor device having an element with circuit pattern thereon |
US5854513A (en) | 1995-07-14 | 1998-12-29 | Lg Electronics Inc. | Semiconductor device having a bump structure and test electrode |
US5854740A (en) | 1995-04-27 | 1998-12-29 | Lg Semicon Co., Ltd. | Electronic circuit board with semiconductor chip mounted thereon, and manufacturing method therefor |
US5869901A (en) * | 1995-10-17 | 1999-02-09 | Nissan Motor Co., Ltd. | Semiconductor device having aluminum interconnection and method of manufacturing the same |
US5883435A (en) | 1996-07-25 | 1999-03-16 | International Business Machines Corporation | Personalization structure for semiconductor devices |
US5884990A (en) | 1996-08-23 | 1999-03-23 | International Business Machines Corporation | Integrated circuit inductor |
US5892273A (en) | 1994-10-03 | 1999-04-06 | Kabushiki Kaisha Toshiba | Semiconductor package integral with semiconductor chip |
US5952726A (en) | 1996-11-12 | 1999-09-14 | Lsi Logic Corporation | Flip chip bump distribution on die |
US5969424A (en) | 1997-03-19 | 1999-10-19 | Fujitsu Limited | Semiconductor device with pad structure |
US5994766A (en) | 1998-09-21 | 1999-11-30 | Vlsi Technology, Inc. | Flip chip circuit arrangement with redistribution layer that minimizes crosstalk |
US6008102A (en) | 1998-04-09 | 1999-12-28 | Motorola, Inc. | Method of forming a three-dimensional integrated inductor |
US6011314A (en) | 1999-02-01 | 2000-01-04 | Hewlett-Packard Company | Redistribution layer and under bump material structure for converting periphery conductive pads to an array of solder bumps |
US6020640A (en) | 1996-12-19 | 2000-02-01 | Texas Instruments Incorporated | Thick plated interconnect and associated auxillary interconnect |
US6022792A (en) | 1996-03-13 | 2000-02-08 | Seiko Instruments, Inc. | Semiconductor dicing and assembling method |
US6066877A (en) | 1994-12-30 | 2000-05-23 | Siliconix Incorporated | Vertical power MOSFET having thick metal layer to reduce distributed resistance |
US6075290A (en) | 1998-02-26 | 2000-06-13 | National Semiconductor Corporation | Surface mount die: wafer level chip-scale package and process for making the same |
US6077726A (en) | 1998-07-30 | 2000-06-20 | Motorola, Inc. | Method and apparatus for stress relief in solder bump formation on a semiconductor device |
TW401628B (en) | 1998-04-09 | 2000-08-11 | Fujitsu Ltd | Semiconductor device with copper wiring and semiconductor device manufacturing method |
US6103552A (en) | 1998-08-10 | 2000-08-15 | Lin; Mou-Shiung | Wafer scale packaging scheme |
US6111301A (en) * | 1998-04-24 | 2000-08-29 | International Business Machines Corporation | Interconnection with integrated corrosion stop |
US6140241A (en) * | 1999-03-18 | 2000-10-31 | Taiwan Semiconductor Manufacturing Company | Multi-step electrochemical copper deposition process with improved filling capability |
US6144100A (en) | 1997-06-05 | 2000-11-07 | Texas Instruments Incorporated | Integrated circuit with bonding layer over active circuitry |
TW417269B (en) | 1998-07-23 | 2001-01-01 | Applied Materials Inc | Integrated circuit interconnect lines having sidewall layers |
US6168974B1 (en) | 1993-11-16 | 2001-01-02 | Formfactor, Inc. | Process of mounting spring contacts to semiconductor devices |
US6180426B1 (en) | 1999-03-01 | 2001-01-30 | Mou-Shiung Lin | High performance sub-system design and assembly |
US6184143B1 (en) | 1997-09-08 | 2001-02-06 | Hitachi, Ltd. | Semiconductor integrated circuit device and fabrication process thereof |
US6187680B1 (en) | 1998-10-07 | 2001-02-13 | International Business Machines Corporation | Method/structure for creating aluminum wirebound pad on copper BEOL |
US6229221B1 (en) | 1998-12-04 | 2001-05-08 | U.S. Philips Corporation | Integrated circuit device |
TW441020B (en) | 2000-02-24 | 2001-06-16 | United Microelectronics Corp | Method for forming cap layer of self-aligned copper interconnect |
US6272736B1 (en) | 1998-11-13 | 2001-08-14 | United Microelectronics Corp. | Method for forming a thin-film resistor |
US6287893B1 (en) * | 1997-10-20 | 2001-09-11 | Flip Chip Technologies, L.L.C. | Method for forming chip scale package |
US6288447B1 (en) | 1999-01-22 | 2001-09-11 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device including a plurality of interconnection layers |
US6300234B1 (en) | 2000-06-26 | 2001-10-09 | Motorola, Inc. | Process for forming an electrical device |
US6300242B1 (en) * | 1999-04-28 | 2001-10-09 | Matsuhita Electronics Corporation | Semiconductor device and method of fabricating the same |
US6303423B1 (en) | 1998-12-21 | 2001-10-16 | Megic Corporation | Method for forming high performance system-on-chip using post passivation process |
US6306749B1 (en) | 1999-06-08 | 2001-10-23 | Winbond Electronics Corp | Bond pad with pad edge strengthening structure |
US20010035452A1 (en) | 2000-03-24 | 2001-11-01 | Test Howard R. | Wire bonding process for copper-metallized integrated circuits |
US6326690B2 (en) * | 1999-06-25 | 2001-12-04 | Applied Materials, Inc. | Method of titanium/titanium nitride integration |
US20010051426A1 (en) | 1999-11-22 | 2001-12-13 | Scott K. Pozder | Method for forming a semiconductor device having a mechanically robust pad interface. |
US20020000671A1 (en) | 1998-12-15 | 2002-01-03 | Edgar R. Zuniga | Bonding over integrated circuits |
US6342444B1 (en) * | 1999-03-11 | 2002-01-29 | Kabushiki Kaisha Toshiba | Method of forming diffusion barrier for copper interconnects |
US6359328B1 (en) | 1998-12-31 | 2002-03-19 | Intel Corporation | Methods for making interconnects and diffusion barriers in integrated circuits |
US6362087B1 (en) | 2000-05-05 | 2002-03-26 | Aptos Corporation | Method for fabricating a microelectronic fabrication having formed therein a redistribution structure |
US20020043723A1 (en) | 2000-10-16 | 2002-04-18 | Hironobu Shimizu | Semiconductor device and manufacturing method thereof |
US6383916B1 (en) | 1998-12-21 | 2002-05-07 | M. S. Lin | Top layers of metal for high performance IC's |
US6410435B1 (en) | 1999-10-01 | 2002-06-25 | Agere Systems Guardian Corp. | Process for fabricating copper interconnect for ULSI integrated circuits |
US6417094B1 (en) * | 1998-12-31 | 2002-07-09 | Newport Fab, Llc | Dual-damascene interconnect structures and methods of fabricating same |
US6426562B2 (en) * | 1996-03-07 | 2002-07-30 | Micron Technology, Inc. | Mask repattern process |
US6429120B1 (en) | 2000-01-18 | 2002-08-06 | Micron Technology, Inc. | Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals |
US6459135B1 (en) | 1999-03-23 | 2002-10-01 | Memscap S.A. | Monolithic integrated circuit incorporating an inductive component and process for fabricating such an integrated circuit |
US6472745B1 (en) | 1999-01-18 | 2002-10-29 | Shinko Electric Industries Co., Ltd. | Semiconductor device |
US20020158334A1 (en) | 2001-04-30 | 2002-10-31 | Intel Corporation | Microelectronic device having signal distribution functionality on an interfacial layer thereof |
US6476507B1 (en) | 1999-08-10 | 2002-11-05 | Towa Corporation | Resin sealing method and resin sealing apparatus |
US6476506B1 (en) | 2001-09-28 | 2002-11-05 | Motorola, Inc. | Packaged semiconductor with multiple rows of bond pads and method therefor |
US20020182859A1 (en) * | 2000-01-18 | 2002-12-05 | Micron Technology, Inc. | Structures and methods to enhance copper metallization |
US6492198B2 (en) * | 1999-09-29 | 2002-12-10 | Samsung Electronics, Co., Ltd. | Method for fabricating a semiconductor device |
US6495442B1 (en) | 2000-10-18 | 2002-12-17 | Magic Corporation | Post passivation interconnection schemes on top of the IC chips |
US6511901B1 (en) * | 1999-11-05 | 2003-01-28 | Atmel Corporation | Metal redistribution layer having solderable pads and wire bondable pads |
US6515369B1 (en) | 2001-10-03 | 2003-02-04 | Megic Corporation | High performance system-on-chip using post passivation process |
US6518092B2 (en) | 2000-07-13 | 2003-02-11 | Oki Electric Industry Co., Ltd. | Semiconductor device and method for manufacturing |
US20030036256A1 (en) | 2000-07-07 | 2003-02-20 | Efland Taylor R. | Integrated circuit with bonding layer over active circuitry |
US6544880B1 (en) | 1999-06-14 | 2003-04-08 | Micron Technology, Inc. | Method of improving copper interconnects of semiconductor devices for bonding |
US6566261B2 (en) * | 2000-09-07 | 2003-05-20 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
US6578754B1 (en) | 2000-04-27 | 2003-06-17 | Advanpack Solutions Pte. Ltd. | Pillar connections for semiconductor chips and method of manufacture |
US6593649B1 (en) | 2001-05-17 | 2003-07-15 | Megic Corporation | Methods of IC rerouting option for multiple package system applications |
US6593222B2 (en) | 2001-09-07 | 2003-07-15 | Lattice Corporation | Method to improve the reliability of thermosonic gold to aluminum wire bonds |
US6614091B1 (en) | 2002-03-13 | 2003-09-02 | Motorola, Inc. | Semiconductor device having a wire bond pad and method therefor |
US6621164B2 (en) * | 1999-09-30 | 2003-09-16 | Samsung Electronics Co., Ltd. | Chip size package having concave pattern in the bump pad area of redistribution patterns and method for manufacturing the same |
US6620720B1 (en) * | 2000-04-10 | 2003-09-16 | Agere Systems Inc | Interconnections to copper IC's |
US6639299B2 (en) | 2001-04-17 | 2003-10-28 | Casio Computer Co., Ltd. | Semiconductor device having a chip size package including a passive element |
US6646347B2 (en) | 2001-11-30 | 2003-11-11 | Motorola, Inc. | Semiconductor power device and method of formation |
US6653563B2 (en) | 2001-03-30 | 2003-11-25 | Intel Corporation | Alternate bump metallurgy bars for power and ground routing |
US20030218246A1 (en) | 2002-05-22 | 2003-11-27 | Hirofumi Abe | Semiconductor device passing large electric current |
US6680544B2 (en) | 2001-06-13 | 2004-01-20 | Via Technologies, Inc. | Flip-chip bump arrangement for decreasing impedance |
US20040023450A1 (en) | 2001-02-08 | 2004-02-05 | Mitsuaki Katagiri | Semiconductor integrated circuit device and its manufacturing method |
US6707124B2 (en) | 1992-10-26 | 2004-03-16 | Texas Instruments Incorporated | HID land grid array packaged device having electrical and optical interconnects |
US6710460B2 (en) | 2000-02-03 | 2004-03-23 | Seiko Epson Corporation | Semiconductor devices and methods for manufacturing the same |
US6756295B2 (en) | 1998-12-21 | 2004-06-29 | Megic Corporation | Chip structure and process for forming the same |
US6780748B2 (en) | 2001-12-07 | 2004-08-24 | Hitachi, Ltd. | Method of fabricating a wafer level chip size package utilizing a maskless exposure |
US6798050B1 (en) | 1999-09-22 | 2004-09-28 | Kabushiki Kaisha Toshiba | Semiconductor device having semiconductor element with copper pad mounted on wiring substrate and method for fabricating the same |
US6844631B2 (en) | 2002-03-13 | 2005-01-18 | Freescale Semiconductor, Inc. | Semiconductor device having a bond pad and method therefor |
US6861740B2 (en) | 2002-04-29 | 2005-03-01 | Via Technologies, Inc. | Flip-chip die and flip-chip package substrate |
US6943440B2 (en) | 2003-09-09 | 2005-09-13 | Intel Corporation | Methods of processing thick ILD layers using spray coating or lamination for C4 wafer level thick metal integrated flow |
US6954000B2 (en) * | 1999-12-24 | 2005-10-11 | Micron Technology, Inc. | Semiconductor component with redistribution circuit having conductors and test contacts |
US6963136B2 (en) | 2000-12-18 | 2005-11-08 | Renesas Technology Corporation | Semiconductor integrated circuit device |
US6979647B2 (en) | 2003-09-02 | 2005-12-27 | Texas Instruments Incorporated | Method for chemical etch control of noble metals in the presence of less noble metals |
US7012335B2 (en) | 2000-02-22 | 2006-03-14 | Samsung Electronics Co., Ltd. | Semiconductor device wiring and method of manufacturing the same |
US7060607B2 (en) | 2000-10-13 | 2006-06-13 | Texas Instruments Incorporated | Circuit method integrating the power distribution functions of the circuits and leadframes into the chip surface |
US7239028B2 (en) | 2002-08-09 | 2007-07-03 | Oki Electric Industry Co., Ltd. | Semiconductor device with signal line having decreased characteristic impedance |
-
2006
- 2006-09-08 US US11/518,595 patent/USRE43674E1/en not_active Expired - Lifetime
Patent Citations (141)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4060828A (en) * | 1975-08-22 | 1977-11-29 | Hitachi, Ltd. | Semiconductor device having multi-layer wiring structure with additional through-hole interconnection |
US4300184A (en) | 1979-07-11 | 1981-11-10 | Johnson Controls, Inc. | Conformal coating for electrical circuit assemblies |
US4685998A (en) | 1984-03-22 | 1987-08-11 | Thomson Components - Mostek Corp. | Process of forming integrated circuits with contact pads in a standard array |
US4789647A (en) | 1986-01-08 | 1988-12-06 | U.S. Philips Corporation | Method of manufacturing a semiconductor device, in which a metallization with a thick connection electrode is provided on a semiconductor body |
US5046161A (en) | 1988-02-23 | 1991-09-03 | Nec Corporation | Flip chip type semiconductor device |
US5061985A (en) | 1988-06-13 | 1991-10-29 | Hitachi, Ltd. | Semiconductor integrated circuit device and process for producing the same |
US4927505A (en) | 1988-07-05 | 1990-05-22 | Motorola Inc. | Metallization scheme providing adhesion and barrier properties |
US5055907A (en) | 1989-01-25 | 1991-10-08 | Mosaic, Inc. | Extended integration semiconductor structure with wiring layers |
US5719448A (en) | 1989-03-07 | 1998-02-17 | Seiko Epson Corporation | Bonding pad structures for semiconductor integrated circuits |
US5106461A (en) | 1989-04-04 | 1992-04-21 | Massachusetts Institute Of Technology | High-density, multi-level interconnects, flex circuits, and tape for tab |
US5162264A (en) | 1989-04-20 | 1992-11-10 | International Business Machines Corporation | Integrated circuit package |
US5244833A (en) | 1989-07-26 | 1993-09-14 | International Business Machines Corporation | Method for manufacturing an integrated circuit chip bump electrode using a polymer layer and a photoresist layer |
US5196371A (en) | 1989-12-18 | 1993-03-23 | Epoxy Technology, Inc. | Flip chip bonding method using electrically conductive polymer bumps |
US5083187A (en) | 1990-05-16 | 1992-01-21 | Texas Instruments Incorporated | Integrated circuit device having bumped power supply buses over active surface areas and method of manufacture thereof |
US5226232A (en) | 1990-05-18 | 1993-07-13 | Hewlett-Packard Company | Method for forming a conductive pattern on an integrated circuit |
US5277756A (en) | 1990-07-02 | 1994-01-11 | Digital Equipment Corporation | Post fabrication processing of semiconductor chips |
US5145571A (en) * | 1990-08-03 | 1992-09-08 | Bipolar Integrated Technology, Inc. | Gold interconnect with sidewall-spacers |
US5461545A (en) | 1990-08-24 | 1995-10-24 | Thomson-Csf | Process and device for hermetic encapsulation of electronic components |
US5212403A (en) | 1990-09-10 | 1993-05-18 | Hitachi, Ltd. | Integrated circuit device having an ic chip mounted on the wiring substrate and having suitable mutual connections between internal circuits |
KR940007290B1 (en) | 1991-12-14 | 1994-08-12 | 현대전자산업 주식회사 | Manufacturing method of wirebonding pad |
US5372967A (en) | 1992-01-27 | 1994-12-13 | Motorola, Inc. | Method for fabricating a vertical trench inductor |
US5384488A (en) | 1992-06-15 | 1995-01-24 | Texas Instruments Incorporated | Configuration and method for positioning semiconductor device bond pads using additional process layers |
US5481205A (en) | 1992-06-29 | 1996-01-02 | At&T Corp. | Temporary connections for fast electrical access to electronic devices |
US6707124B2 (en) | 1992-10-26 | 2004-03-16 | Texas Instruments Incorporated | HID land grid array packaged device having electrical and optical interconnects |
US5479049A (en) | 1993-02-01 | 1995-12-26 | Sharp Kabushiki Kaisha | Solid state image sensor provided with a transparent resin layer having water repellency and oil repellency and flattening a surface thereof |
US5461333A (en) | 1993-03-15 | 1995-10-24 | At&T Ipm Corp. | Multi-chip modules having chip-to-chip interconnections with reduced signal voltage level and swing |
US5641997A (en) | 1993-09-14 | 1997-06-24 | Kabushiki Kaisha Toshiba | Plastic-encapsulated semiconductor device |
US5501006A (en) | 1993-09-22 | 1996-03-26 | Motorola, Inc. | Method for connection of signals to an integrated circuit |
US6168974B1 (en) | 1993-11-16 | 2001-01-02 | Formfactor, Inc. | Process of mounting spring contacts to semiconductor devices |
US5607877A (en) * | 1993-12-28 | 1997-03-04 | Fujitsu Limited | Projection-electrode fabrication method |
US5576680A (en) | 1994-03-01 | 1996-11-19 | Amer-Soi | Structure and fabrication process of inductors on semiconductor chip |
US5701666A (en) | 1994-08-31 | 1997-12-30 | Motorola, Inc. | Method for manufacturing a stimulus wafer for use in a wafer-to-wafer testing system to test integrated circuits located on a product wafer |
US5892273A (en) | 1994-10-03 | 1999-04-06 | Kabushiki Kaisha Toshiba | Semiconductor package integral with semiconductor chip |
US5532512A (en) | 1994-10-03 | 1996-07-02 | General Electric Company | Direct stacked and flip chip power semiconductor device structures |
US5468984A (en) | 1994-11-02 | 1995-11-21 | Texas Instruments Incorporated | ESD protection structure using LDMOS diodes with thick copper interconnect |
US5789303A (en) | 1994-11-28 | 1998-08-04 | Northern Telecom Limited | Method of adding on chip capacitors to an integrated circuit |
US6066877A (en) | 1994-12-30 | 2000-05-23 | Siliconix Incorporated | Vertical power MOSFET having thick metal layer to reduce distributed resistance |
US5665989A (en) | 1995-01-03 | 1997-09-09 | Lsi Logic | Programmable microsystems in silicon |
US5731945A (en) | 1995-02-22 | 1998-03-24 | International Business Machines Corporation | Multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes |
US5807791A (en) | 1995-02-22 | 1998-09-15 | International Business Machines Corporation | Methods for fabricating multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes |
US5767010A (en) | 1995-03-20 | 1998-06-16 | Mcnc | Solder bump fabrication methods and structure including a titanium barrier layer |
US5834844A (en) | 1995-03-24 | 1998-11-10 | Shinko Electric Industries Co., Ltd. | Semiconductor device having an element with circuit pattern thereon |
US5854740A (en) | 1995-04-27 | 1998-12-29 | Lg Semicon Co., Ltd. | Electronic circuit board with semiconductor chip mounted thereon, and manufacturing method therefor |
US5541135A (en) | 1995-05-30 | 1996-07-30 | Motorola, Inc. | Method of fabricating a flip chip semiconductor device having an inductor |
US5635767A (en) | 1995-06-02 | 1997-06-03 | Motorola, Inc. | Semiconductor device having built-in high frequency bypass capacitor |
US5659201A (en) | 1995-06-05 | 1997-08-19 | Advanced Micro Devices, Inc. | High conductivity interconnection line |
US5854513A (en) | 1995-07-14 | 1998-12-29 | Lg Electronics Inc. | Semiconductor device having a bump structure and test electrode |
US5691248A (en) | 1995-07-26 | 1997-11-25 | International Business Machines Corporation | Methods for precise definition of integrated circuit chip edges |
US5736792A (en) | 1995-08-30 | 1998-04-07 | Texas Instruments Incorporated | Method of protecting bond wires during molding and handling |
US5569956A (en) | 1995-08-31 | 1996-10-29 | National Semiconductor Corporation | Interposer connecting leadframe and integrated circuit |
US5869901A (en) * | 1995-10-17 | 1999-02-09 | Nissan Motor Co., Ltd. | Semiconductor device having aluminum interconnection and method of manufacturing the same |
US5818748A (en) | 1995-11-21 | 1998-10-06 | International Business Machines Corporation | Chip function separation onto separate stacked chips |
US6426562B2 (en) * | 1996-03-07 | 2002-07-30 | Micron Technology, Inc. | Mask repattern process |
US6022792A (en) | 1996-03-13 | 2000-02-08 | Seiko Instruments, Inc. | Semiconductor dicing and assembling method |
US5686764A (en) | 1996-03-20 | 1997-11-11 | Lsi Logic Corporation | Flip chip package with reduced number of package layers |
US5792594A (en) | 1996-04-01 | 1998-08-11 | Motorola, Inc. | Metallization and termination process for an integrated circuit chip |
US5883435A (en) | 1996-07-25 | 1999-03-16 | International Business Machines Corporation | Personalization structure for semiconductor devices |
US5884990A (en) | 1996-08-23 | 1999-03-23 | International Business Machines Corporation | Integrated circuit inductor |
US5952726A (en) | 1996-11-12 | 1999-09-14 | Lsi Logic Corporation | Flip chip bump distribution on die |
US6020640A (en) | 1996-12-19 | 2000-02-01 | Texas Instruments Incorporated | Thick plated interconnect and associated auxillary interconnect |
US5969424A (en) | 1997-03-19 | 1999-10-19 | Fujitsu Limited | Semiconductor device with pad structure |
US6144100A (en) | 1997-06-05 | 2000-11-07 | Texas Instruments Incorporated | Integrated circuit with bonding layer over active circuitry |
US6184143B1 (en) | 1997-09-08 | 2001-02-06 | Hitachi, Ltd. | Semiconductor integrated circuit device and fabrication process thereof |
US6287893B1 (en) * | 1997-10-20 | 2001-09-11 | Flip Chip Technologies, L.L.C. | Method for forming chip scale package |
US6075290A (en) | 1998-02-26 | 2000-06-13 | National Semiconductor Corporation | Surface mount die: wafer level chip-scale package and process for making the same |
TW401628B (en) | 1998-04-09 | 2000-08-11 | Fujitsu Ltd | Semiconductor device with copper wiring and semiconductor device manufacturing method |
US6008102A (en) | 1998-04-09 | 1999-12-28 | Motorola, Inc. | Method of forming a three-dimensional integrated inductor |
US6111301A (en) * | 1998-04-24 | 2000-08-29 | International Business Machines Corporation | Interconnection with integrated corrosion stop |
TW417269B (en) | 1998-07-23 | 2001-01-01 | Applied Materials Inc | Integrated circuit interconnect lines having sidewall layers |
US6077726A (en) | 1998-07-30 | 2000-06-20 | Motorola, Inc. | Method and apparatus for stress relief in solder bump formation on a semiconductor device |
US6103552A (en) | 1998-08-10 | 2000-08-15 | Lin; Mou-Shiung | Wafer scale packaging scheme |
US6350705B1 (en) | 1998-08-10 | 2002-02-26 | Mecic Corporation | Wafer scale packaging scheme |
US5994766A (en) | 1998-09-21 | 1999-11-30 | Vlsi Technology, Inc. | Flip chip circuit arrangement with redistribution layer that minimizes crosstalk |
US6187680B1 (en) | 1998-10-07 | 2001-02-13 | International Business Machines Corporation | Method/structure for creating aluminum wirebound pad on copper BEOL |
US6272736B1 (en) | 1998-11-13 | 2001-08-14 | United Microelectronics Corp. | Method for forming a thin-film resistor |
US6229221B1 (en) | 1998-12-04 | 2001-05-08 | U.S. Philips Corporation | Integrated circuit device |
US20020000671A1 (en) | 1998-12-15 | 2002-01-03 | Edgar R. Zuniga | Bonding over integrated circuits |
US6756295B2 (en) | 1998-12-21 | 2004-06-29 | Megic Corporation | Chip structure and process for forming the same |
US6383916B1 (en) | 1998-12-21 | 2002-05-07 | M. S. Lin | Top layers of metal for high performance IC's |
US6303423B1 (en) | 1998-12-21 | 2001-10-16 | Megic Corporation | Method for forming high performance system-on-chip using post passivation process |
US6455885B1 (en) | 1998-12-21 | 2002-09-24 | Megic Corporation | Inductor structure for high performance system-on-chip using post passivation process |
US6417094B1 (en) * | 1998-12-31 | 2002-07-09 | Newport Fab, Llc | Dual-damascene interconnect structures and methods of fabricating same |
US6359328B1 (en) | 1998-12-31 | 2002-03-19 | Intel Corporation | Methods for making interconnects and diffusion barriers in integrated circuits |
US6472745B1 (en) | 1999-01-18 | 2002-10-29 | Shinko Electric Industries Co., Ltd. | Semiconductor device |
US6288447B1 (en) | 1999-01-22 | 2001-09-11 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device including a plurality of interconnection layers |
US6011314A (en) | 1999-02-01 | 2000-01-04 | Hewlett-Packard Company | Redistribution layer and under bump material structure for converting periphery conductive pads to an array of solder bumps |
US6180426B1 (en) | 1999-03-01 | 2001-01-30 | Mou-Shiung Lin | High performance sub-system design and assembly |
US6342444B1 (en) * | 1999-03-11 | 2002-01-29 | Kabushiki Kaisha Toshiba | Method of forming diffusion barrier for copper interconnects |
US6140241A (en) * | 1999-03-18 | 2000-10-31 | Taiwan Semiconductor Manufacturing Company | Multi-step electrochemical copper deposition process with improved filling capability |
US6459135B1 (en) | 1999-03-23 | 2002-10-01 | Memscap S.A. | Monolithic integrated circuit incorporating an inductive component and process for fabricating such an integrated circuit |
US6300242B1 (en) * | 1999-04-28 | 2001-10-09 | Matsuhita Electronics Corporation | Semiconductor device and method of fabricating the same |
US6306749B1 (en) | 1999-06-08 | 2001-10-23 | Winbond Electronics Corp | Bond pad with pad edge strengthening structure |
US6544880B1 (en) | 1999-06-14 | 2003-04-08 | Micron Technology, Inc. | Method of improving copper interconnects of semiconductor devices for bonding |
US6326690B2 (en) * | 1999-06-25 | 2001-12-04 | Applied Materials, Inc. | Method of titanium/titanium nitride integration |
US6476507B1 (en) | 1999-08-10 | 2002-11-05 | Towa Corporation | Resin sealing method and resin sealing apparatus |
US6798050B1 (en) | 1999-09-22 | 2004-09-28 | Kabushiki Kaisha Toshiba | Semiconductor device having semiconductor element with copper pad mounted on wiring substrate and method for fabricating the same |
US6492198B2 (en) * | 1999-09-29 | 2002-12-10 | Samsung Electronics, Co., Ltd. | Method for fabricating a semiconductor device |
US6621164B2 (en) * | 1999-09-30 | 2003-09-16 | Samsung Electronics Co., Ltd. | Chip size package having concave pattern in the bump pad area of redistribution patterns and method for manufacturing the same |
US6410435B1 (en) | 1999-10-01 | 2002-06-25 | Agere Systems Guardian Corp. | Process for fabricating copper interconnect for ULSI integrated circuits |
US6511901B1 (en) * | 1999-11-05 | 2003-01-28 | Atmel Corporation | Metal redistribution layer having solderable pads and wire bondable pads |
US20010051426A1 (en) | 1999-11-22 | 2001-12-13 | Scott K. Pozder | Method for forming a semiconductor device having a mechanically robust pad interface. |
US6954000B2 (en) * | 1999-12-24 | 2005-10-11 | Micron Technology, Inc. | Semiconductor component with redistribution circuit having conductors and test contacts |
US6429120B1 (en) | 2000-01-18 | 2002-08-06 | Micron Technology, Inc. | Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals |
US20020182859A1 (en) * | 2000-01-18 | 2002-12-05 | Micron Technology, Inc. | Structures and methods to enhance copper metallization |
US6710460B2 (en) | 2000-02-03 | 2004-03-23 | Seiko Epson Corporation | Semiconductor devices and methods for manufacturing the same |
US7012335B2 (en) | 2000-02-22 | 2006-03-14 | Samsung Electronics Co., Ltd. | Semiconductor device wiring and method of manufacturing the same |
TW441020B (en) | 2000-02-24 | 2001-06-16 | United Microelectronics Corp | Method for forming cap layer of self-aligned copper interconnect |
US6800555B2 (en) | 2000-03-24 | 2004-10-05 | Texas Instruments Incorporated | Wire bonding process for copper-metallized integrated circuits |
US20010035452A1 (en) | 2000-03-24 | 2001-11-01 | Test Howard R. | Wire bonding process for copper-metallized integrated circuits |
US6620720B1 (en) * | 2000-04-10 | 2003-09-16 | Agere Systems Inc | Interconnections to copper IC's |
US6578754B1 (en) | 2000-04-27 | 2003-06-17 | Advanpack Solutions Pte. Ltd. | Pillar connections for semiconductor chips and method of manufacture |
US6362087B1 (en) | 2000-05-05 | 2002-03-26 | Aptos Corporation | Method for fabricating a microelectronic fabrication having formed therein a redistribution structure |
US6300234B1 (en) | 2000-06-26 | 2001-10-09 | Motorola, Inc. | Process for forming an electrical device |
US6683380B2 (en) | 2000-07-07 | 2004-01-27 | Texas Instruments Incorporated | Integrated circuit with bonding layer over active circuitry |
US20030036256A1 (en) | 2000-07-07 | 2003-02-20 | Efland Taylor R. | Integrated circuit with bonding layer over active circuitry |
US6518092B2 (en) | 2000-07-13 | 2003-02-11 | Oki Electric Industry Co., Ltd. | Semiconductor device and method for manufacturing |
US6566261B2 (en) * | 2000-09-07 | 2003-05-20 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
US7060607B2 (en) | 2000-10-13 | 2006-06-13 | Texas Instruments Incorporated | Circuit method integrating the power distribution functions of the circuits and leadframes into the chip surface |
US20020043723A1 (en) | 2000-10-16 | 2002-04-18 | Hironobu Shimizu | Semiconductor device and manufacturing method thereof |
US6649509B1 (en) | 2000-10-18 | 2003-11-18 | Megic Corporation | Post passivation metal scheme for high-performance integrated circuit devices |
US6495442B1 (en) | 2000-10-18 | 2002-12-17 | Magic Corporation | Post passivation interconnection schemes on top of the IC chips |
US6605528B1 (en) | 2000-10-18 | 2003-08-12 | Megic Corporation | Post passivation metal scheme for high-performance integrated circuit devices |
US6963136B2 (en) | 2000-12-18 | 2005-11-08 | Renesas Technology Corporation | Semiconductor integrated circuit device |
US20040023450A1 (en) | 2001-02-08 | 2004-02-05 | Mitsuaki Katagiri | Semiconductor integrated circuit device and its manufacturing method |
US6653563B2 (en) | 2001-03-30 | 2003-11-25 | Intel Corporation | Alternate bump metallurgy bars for power and ground routing |
US6639299B2 (en) | 2001-04-17 | 2003-10-28 | Casio Computer Co., Ltd. | Semiconductor device having a chip size package including a passive element |
US20020158334A1 (en) | 2001-04-30 | 2002-10-31 | Intel Corporation | Microelectronic device having signal distribution functionality on an interfacial layer thereof |
US6593649B1 (en) | 2001-05-17 | 2003-07-15 | Megic Corporation | Methods of IC rerouting option for multiple package system applications |
US6680544B2 (en) | 2001-06-13 | 2004-01-20 | Via Technologies, Inc. | Flip-chip bump arrangement for decreasing impedance |
US6593222B2 (en) | 2001-09-07 | 2003-07-15 | Lattice Corporation | Method to improve the reliability of thermosonic gold to aluminum wire bonds |
US6476506B1 (en) | 2001-09-28 | 2002-11-05 | Motorola, Inc. | Packaged semiconductor with multiple rows of bond pads and method therefor |
US6515369B1 (en) | 2001-10-03 | 2003-02-04 | Megic Corporation | High performance system-on-chip using post passivation process |
US6646347B2 (en) | 2001-11-30 | 2003-11-11 | Motorola, Inc. | Semiconductor power device and method of formation |
US6780748B2 (en) | 2001-12-07 | 2004-08-24 | Hitachi, Ltd. | Method of fabricating a wafer level chip size package utilizing a maskless exposure |
US6614091B1 (en) | 2002-03-13 | 2003-09-02 | Motorola, Inc. | Semiconductor device having a wire bond pad and method therefor |
US6844631B2 (en) | 2002-03-13 | 2005-01-18 | Freescale Semiconductor, Inc. | Semiconductor device having a bond pad and method therefor |
US6861740B2 (en) | 2002-04-29 | 2005-03-01 | Via Technologies, Inc. | Flip-chip die and flip-chip package substrate |
US20030218246A1 (en) | 2002-05-22 | 2003-11-27 | Hirofumi Abe | Semiconductor device passing large electric current |
US7239028B2 (en) | 2002-08-09 | 2007-07-03 | Oki Electric Industry Co., Ltd. | Semiconductor device with signal line having decreased characteristic impedance |
US6979647B2 (en) | 2003-09-02 | 2005-12-27 | Texas Instruments Incorporated | Method for chemical etch control of noble metals in the presence of less noble metals |
US6943440B2 (en) | 2003-09-09 | 2005-09-13 | Intel Corporation | Methods of processing thick ILD layers using spray coating or lamination for C4 wafer level thick metal integrated flow |
Non-Patent Citations (32)
Title |
---|
Bohr, M. "The New Era of Scaling in an SoC World," International Solid-State Circuits Conference (2009) pp. 23-28. |
Bohr, M. "The New Era of Scaling in an SoC World," International Solid-State Circuits Conference (2009) Presentation Slides 1-66. |
Edelstein, D. et al. "Full Copper Wiring in a Sub-0.25 pm CMOS ULSI Technology," Technical Digest IEEE International Electron Devices Meeting (1997) pp. 773-776. |
Edelstein, D.C., "Advantages of Copper Interconnects," Proceedings of the 12th International IEEE VLSI Multilevel Interconnection Conference (1995) pp. 301-307. |
Gao, X. et al. "An improved electrostatic discharge protection structure for reducing triggering voltage and parasitic capacitance," Solid-State Electronics, 27 (2003), pp. 1105-1110. |
Geffken, R. M. "An Overview of Polyimide Use in Integrated Circuits and Packaging," Proceedings of the Third International Symposium on Ultra Large Scale Integration Science and Technology (1991) pp. 667-677. |
Groves, R. et al. "High Q Inductors in a SiGe BiCMOS Process Utilizing a Thick Metal Process Add-on Module," Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (1999) pp. 149-152. |
Hu, C-K. et al. "Copper-Polyimide Wiring Technology for VLSI Circuits," Materials Research Society Symposium Proceedings VLSI V (1990) pp. 369-373. |
Ingerly, D. et al. "Low-K Interconnect Stack with Thick Metal 9 Redistribution Layer and Cu Die Bump for 45nm High Volume Manufacturing," International Interconnect Technology Conference (2008) pp. 216-218. |
Jenei, S. et al. "High Q Inductor Add-on Module in Thick Cu/SiLK(TM) single damascene," Proceedings from the IEEE International Interconnect Technology Conference (2001) pp. 107-109. |
Jenei, S. et al. "High Q Inductor Add-on Module in Thick Cu/SiLK™ single damascene," Proceedings from the IEEE International Interconnect Technology Conference (2001) pp. 107-109. |
Kumar, R. et al. "A Family of 45nm IA Processors," IEEE International Solid-State Circuits Conference, Session 3, Microprocessor Technologies, 3.2 (2009) pp. 58-59. |
Kurd, N. et al. "Next Generation Intel® Micro-architecture (Nehalem) Clocking Architecture," Symposium on VLSI Circuits Digest of Technical Papers (2008) pp. 62-63. |
Lee, Y-H. et al. "Effect of ESD Layout on the Assembly Yield and Reliability," International Electron Devices Meeting (2006) pp. 1-4. |
Lin, M.S. "Post Passivation Technology(TM)-Megic® Way to System Solutions," Presentation given at TSMC Technology Symposium, Japan (Oct. 1, 2003) pp. 1-32. |
Lin, M.S. "Post Passivation Technology™—Megic® Way to System Solutions," Presentation given at TSMC Technology Symposium, Japan (Oct. 1, 2003) pp. 1-32. |
Lin, M.S. et al. "A New IC Interconnection Scheme and Design Architecture for High Performance ICs at Very Low Fabrication Cost-Post Passivation Interconnection," Proceedings of the IEEE Custom Integrated Circuits Conference (Sep. 24, 2003) pp. 533-536. |
Lin, M.S. et al. "A New IC Interconnection Scheme and Design Architecture for High Performance ICs at Very Low Fabrication Cost—Post Passivation Interconnection," Proceedings of the IEEE Custom Integrated Circuits Conference (Sep. 24, 2003) pp. 533-536. |
Lin, M.S. et al. "A New System-on-a-Chip (SOC) Technology-High Q Post Passivation Inductors," Proceedings from the 53rd Electronic Components and Technology Conference (May 30, 2003) pp. 1503-1509. |
Lin, M.S. et al. "A New System-on-a-Chip (SOC) Technology—High Q Post Passivation Inductors," Proceedings from the 53rd Electronic Components and Technology Conference (May 30, 2003) pp. 1503-1509. |
Luther, B. et al. "Planar Copper-Polyimide Back End of the Line Interconnections for ULSI Devices," Proceedings of the 10th International IEEE VLSI Multilevel Interconnection Conference (1993) pp. 15-21. |
Maloney, T. et al. "Novel Clamp Circuits for IC Power Supply Protection," IEEE Transactions on Components, Packaging, and Manufacturing Technology, Part C, vol. 19, No. 3 (Jul. 1996) pp. 150-161. |
Maloney, T. et al. "Stacked PMOS Clamps for High Voltage Power Supply Protection," Electrical Overstress/Electrostatic Discharge Symposium Proceedings (1999) pp. 70-77. |
Master, R. et al. "Ceramic Mini-Ball Grid Array Package for High Speed Device," Proceedings from the 45th Electronic Components and Technology Conference (1995) pp. 46-50. |
Megic Corp. "Megic way to system solutions through bumping and redistribution," (Brochure) (Feb. 6, 2004) pp. 1-3. |
Mistry, K. et al. "A 45nm Logic Technology with High-k+ Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging," IEEE International Electron Devices Meeting (2007) pp. 247-250. |
Roesch, W. et al. "Cycling copper flip chip interconnects," Microelectronics Reliability, 44 (2004) pp. 1047-1054. |
Sakran, N. et al. "The Implementation of the 65nm Dual-Core 64b Merom Processor," IEEE International Solid-State Circuits Conference, Session 5, Microprocessors, 5.6 (2007) pp. 106-107, p. 590. |
Theng, C. et al. "An Automated Tool Deployment for ESD (Electro-Static-Discharge) Correct-by-Construction Strategy in 90 nm Process," IEEE International Conference on Semiconductor Electronics (2004) pp. 61-67. |
Venkatesan, S. et al. "A High Performance 1.8V, 0.20 pm CMOS Technology with Copper Metallization," Technical Digest IEEE International Electron Devices Meeting (1997) pp. 769-772. |
Yeoh, A. et al. "Copper Die Bumps (First Level Interconnect) and Low-K Dielectrics in 65nm High Volume Manufacturing," Electronic Components and Technology Conference (2006) pp. 1611-1615. |
Yeoh, T-S. "ESD Effects On Power Supply Clamps," Proceedings of the 6th International Sympoisum on Physical & Failure Analysis of Integrated Circuits (1997) pp. 121-124. |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8994173B2 (en) | 2013-06-26 | 2015-03-31 | International Business Machines Corporation | Solder bump connection and method of making |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101414589B (en) | IC structure and method for forming the same | |
US7385292B2 (en) | Top layers of metal for high performance IC's | |
US6313537B1 (en) | Semiconductor device having multi-layered pad and a manufacturing method thereof | |
US6815324B2 (en) | Reliable metal bumps on top of I/O pads after removal of test probe marks | |
US6511901B1 (en) | Metal redistribution layer having solderable pads and wire bondable pads | |
US8129265B2 (en) | High performance system-on-chip discrete components using post passivation process | |
US6144100A (en) | Integrated circuit with bonding layer over active circuitry | |
US7964973B2 (en) | Chip structure | |
US5629240A (en) | Method for direct attachment of an on-chip bypass capacitor in an integrated circuit | |
US7969006B2 (en) | Integrated circuit chips with fine-line metal and over-passivation metal | |
US8178435B2 (en) | High performance system-on-chip inductor using post passivation process | |
US6020640A (en) | Thick plated interconnect and associated auxillary interconnect | |
US9287345B2 (en) | Semiconductor structure with thin film resistor and terminal bond pad | |
US7531417B2 (en) | High performance system-on-chip passive device using post passivation process | |
CN100461397C (en) | Semiconductor device having a wire bond pad and method therefor | |
US7494912B2 (en) | Terminal pad structures and methods of fabricating same | |
US7701063B2 (en) | Semiconductor device | |
US6847117B2 (en) | Semiconductor device including a passivation film to cover directly an interface of a bump and an intermediated layer | |
US7394161B2 (en) | Chip structure with pads having bumps or wirebonded wires formed thereover or used to be tested thereto | |
US7459792B2 (en) | Via layout with via groups placed in interlocked arrangement | |
US6383916B1 (en) | Top layers of metal for high performance IC's | |
US7148575B2 (en) | Semiconductor device having bonding pad above low-k dielectric film | |
KR101163974B1 (en) | Routing under bond pad for the replacement of an interconnect layer | |
US5668399A (en) | Semiconductor device with increased on chip decoupling capacitance | |
US7375026B2 (en) | Local multilayered metallization |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: MEGIC CORPORATION, TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LIN, MOU-SHIUNG;LEI, MING-TA;LEE, JIN-YUAN;AND OTHERS;REEL/FRAME:030766/0828 Effective date: 20011022 Owner name: MEGICA CORPORATION, TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MEGICA CORPORATION;REEL/FRAME:030770/0876 Effective date: 20060428 |
|
AS | Assignment |
Owner name: MEGICA CORPORATION, TAIWAN Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY NAME NEEDS TO CHANGE FROM MEGICA TO MEGIC PREVIOUSLY RECORDED ON REEL 030770 FRAME 0876. ASSIGNOR(S) HEREBY CONFIRMS THE MEGIC CORPORATION TO MEGICA CORPORATION;ASSIGNOR:MEGIC CORPORATION;REEL/FRAME:030997/0336 Effective date: 20060428 |
|
AS | Assignment |
Owner name: MEGIT ACQUISITION CORP., CALIFORNIA Free format text: MERGER;ASSIGNOR:MEGICA CORPORATION;REEL/FRAME:031283/0198 Effective date: 20130611 |
|
AS | Assignment |
Owner name: QUALCOMM INCORPORATED, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MEGIT ACQUISITION CORP.;REEL/FRAME:033303/0124 Effective date: 20140709 |
|
FPAY | Fee payment |
Year of fee payment: 12 |