TW357449B - Electro-Static Discharge (ESD) protective circuit - Google Patents

Electro-Static Discharge (ESD) protective circuit

Info

Publication number
TW357449B
TW357449B TW085101294A TW85101294A TW357449B TW 357449 B TW357449 B TW 357449B TW 085101294 A TW085101294 A TW 085101294A TW 85101294 A TW85101294 A TW 85101294A TW 357449 B TW357449 B TW 357449B
Authority
TW
Taiwan
Prior art keywords
nod
grounding
level
transistor
resistor
Prior art date
Application number
TW085101294A
Other languages
Chinese (zh)
Inventor
Jin-Yuan Li
meng-song Liang
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Priority to TW085101294A priority Critical patent/TW357449B/en
Application granted granted Critical
Publication of TW357449B publication Critical patent/TW357449B/en

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

A sort of MOS ESD protective circuit, for protection of a semiconductor from being damaged by ESD, being this ESD protective cirucit formed on a semiconductive substrate having silicon doped, including: a input wire, a output wire, a first nod, a second nod and a third nod, as well as the grounding wiring, both the first and the second impedance with a proximate end and a remote end, the first nod being connected to the proximate end of the input wire and the proximate end connected to the first resistor, the second nod being connected to the proximate end of the second resistor and the remote end of the first resistor, the third nod being connected to the remote end of the second resistor and the output wiring, including the first level a first MOSFET transistor and a grounding formed in the substrate, having the first MOS transistor a source/drain circuit being connected to between the first nod and the grounding, having the MOS transistor a control gate connected to the grounding, including the second level a serial MOSFET transistor in serial and the last transistor having a second level output, including the third level a third MOSFET device, having a control gate connected to the second level outupt and a source electrode and drain electrode connected to the wiring between the third nod and the grounding, thus for consumption of the power of a multi energy of the transistor.
TW085101294A 1996-02-02 1996-02-02 Electro-Static Discharge (ESD) protective circuit TW357449B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW085101294A TW357449B (en) 1996-02-02 1996-02-02 Electro-Static Discharge (ESD) protective circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW085101294A TW357449B (en) 1996-02-02 1996-02-02 Electro-Static Discharge (ESD) protective circuit

Publications (1)

Publication Number Publication Date
TW357449B true TW357449B (en) 1999-05-01

Family

ID=57940448

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085101294A TW357449B (en) 1996-02-02 1996-02-02 Electro-Static Discharge (ESD) protective circuit

Country Status (1)

Country Link
TW (1) TW357449B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7892965B2 (en) 2000-10-18 2011-02-22 Megica Corporation Post passivation interconnection schemes on top of IC chip

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7892965B2 (en) 2000-10-18 2011-02-22 Megica Corporation Post passivation interconnection schemes on top of IC chip
US7902067B2 (en) 2000-10-18 2011-03-08 Megica Corporation Post passivation interconnection schemes on top of the IC chips
US7915161B2 (en) 2000-10-18 2011-03-29 Megica Corporation Post passivation interconnection schemes on top of IC chip
US7919865B2 (en) 2000-10-18 2011-04-05 Megica Corporation Post passivation interconnection schemes on top of IC chip
US7923366B2 (en) 2000-10-18 2011-04-12 Megica Corporation Post passivation interconnection schemes on top of IC chip
US8004088B2 (en) 2000-10-18 2011-08-23 Megica Corporation Post passivation interconnection schemes on top of IC chip
US8188603B2 (en) 2000-10-18 2012-05-29 Megica Corporation Post passivation interconnection schemes on top of IC chip
US8435883B2 (en) 2000-10-18 2013-05-07 Megica Corporation Post passivation interconnection schemes on top of IC chips
US8461686B2 (en) 2000-10-18 2013-06-11 Megica Corporation Post passivation interconnection schemes on top of IC chip
US8492900B2 (en) 2000-10-18 2013-07-23 Megica Corporation Post passivation interconnection schemes on top of IC chip

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees