US9070738B2 - SCR component with temperature-stable characteristics - Google Patents

SCR component with temperature-stable characteristics Download PDF

Info

Publication number
US9070738B2
US9070738B2 US14/494,692 US201414494692A US9070738B2 US 9070738 B2 US9070738 B2 US 9070738B2 US 201414494692 A US201414494692 A US 201414494692A US 9070738 B2 US9070738 B2 US 9070738B2
Authority
US
United States
Prior art keywords
silicon
conductivity type
region
areas
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
US14/494,692
Other languages
English (en)
Other versions
US20150084094A1 (en
Inventor
Samuel Menard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMICROELECTRONICS INTERNATIONAL NV
Original Assignee
STMicroelectronics Tours SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Tours SAS filed Critical STMicroelectronics Tours SAS
Assigned to STMICROELECTRONICS (TOURS) SAS reassignment STMICROELECTRONICS (TOURS) SAS ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: MENARD, SAMUEL
Publication of US20150084094A1 publication Critical patent/US20150084094A1/en
Application granted granted Critical
Publication of US9070738B2 publication Critical patent/US9070738B2/en
Assigned to STMICROELECTRONICS INTERNATIONAL N.V. reassignment STMICROELECTRONICS INTERNATIONAL N.V. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: STMICROELECTRONICS (TOURS) SAS
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/74Thyristor-type devices, e.g. having four-zone regenerative action
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/2807Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being Si or Ge or C and their alloys except Si
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/083Anode or cathode regions of thyristors or gated bipolar-mode devices
    • H01L29/0839Cathode regions of thyristors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1012Base regions of thyristors
    • H01L29/102Cathode base regions of thyristors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/30Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
    • H01L29/32Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66363Thyristors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/74Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/7404Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device
    • H01L29/7408Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device the device being a capacitor or a resistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/083Anode or cathode regions of thyristors or gated bipolar-mode devices
    • H01L29/0834Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66545Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate

Definitions

  • the present disclosure relates to SCR-type components of vertical structure and to the manufacturing of such components.
  • SCR-type components are components having a structure including a stack of at least four semiconductor layers and/or regions of alternated conductivity types. Such components are, for example, thyristors, triacs, unidirectional or bidirectional Shockley diodes.
  • FIGS. 1A and 1B respectively are a top view and a cross-section view of an example of a thyristor.
  • FIG. 1B is a cross-section view along broken line B-B of FIG. 1A .
  • These drawings schematically show the thyristor comprising a vertical stack of four semiconductor layers and/or regions 3 , 5 , 7 , and 9 having alternated conductivity types, respectively PNPN.
  • Heavily-doped N-type region 9 (N+) is formed in P-type doped layer 7 .
  • a cathode metallization 11 covers region 9 .
  • a gate metallization 13 covers a central portion 14 of layer 7 .
  • An anode metallization 15 covers the lower surface of layer 3 .
  • Metallizations 11 , 13 , and 15 respectively form a cathode electrode K, a gate electrode G, and an anode electrode A.
  • Region 9 is interrupted in areas 17 where cathode metallization 11 comes into contact with layer 7 .
  • Areas 17 are currently called emitter short-circuits or emitter short-circuit holes. Such emitter short-circuits 17 are known to improve the dV/dt behavior of the thyristor, thus decreasing the risk of untimely turning-on of the thyristor by voltage peaks.
  • two curves 20 and 22 respectively illustrate the temperature dependence T of turn-on current I GT and of hold current I H in a thyristor of the type described in relation with FIGS. 1A and 1B .
  • the values of the current are indicated as values normalized with respect to their value at 25° C.
  • Curves 20 and 22 show that the values of currents I H and I GT decrease as temperature T increases.
  • the value of I GT is two times greater than at 25° C. and, at 140° C., the value of I GT is approximately two times smaller than at 25° C.
  • the dI/dt characteristic on switching and the dV/dt turn-on characteristic of a thyristor also depend on the operating temperature.
  • An SCR-type component having characteristics which remain as constant as possible over the entire operating temperature range of the component is needed.
  • an embodiment provides an SCR-type component of vertical structure having a main upper electrode formed on a silicon region of a first conductivity type, itself formed in a silicon layer of the second conductivity type, wherein said region is interrupted: in first areas where the material of said layer comes into contact with said electrode, and in second areas made of resistive porous silicon extending between said layer and said electrode.
  • the thickness of the second porous silicon areas is greater than the thickness of the region.
  • the resistivity at 25° C. of the porous silicon is in the range from 10 3 to 10 4 ⁇ cm.
  • the first areas and the second areas are regularly distributed across the surface of the region.
  • the number of first areas is identical to the number of second areas.
  • An embodiment provides a method of manufacturing porous silicon areas in an SCR-type component with a well, comprising the successive steps of: providing a semiconductor structure comprising a silicon region of a first conductivity type formed in a silicon layer of the second conductivity type, said region being interrupted in areas, the structure being laterally delimited by a peripheral silicon wall of the second conductivity type; depositing a masking layer on the upper surface of the structure by leaving said areas and the upper surface of the peripheral wall exposed; plunging the assembly in electrolytic baths, a first bath being in contact with the upper surface of the structure, a second bath being in contact with the lower surface of the structure, a positive electrode and a negative electrode being respectively plunged into the second bath and into the first bath; and applying a voltage between the positive electrode and the negative electrode to have a current flow in the peripheral wall, a portion of the current flowing in said layer and the areas to form porous silicon in said areas.
  • the electrolytic baths are made of a mixture comprising water, hydrofluoric acid, ethanol, or acetic acid.
  • FIGS. 1A and 1B previously described, respectively are a top view and a cross-section view of an example of thyristor
  • FIG. 2 shows the temperature dependence of currents I GT and I H in a thyristor
  • FIGS. 3A and 3B respectively are a top view and a cross-section view of an embodiment of a thyristor
  • FIG. 4 shows the variation of current I GT according to temperature in different thyristors
  • FIGS. 5A and 5B are cross-section views illustrating a method of manufacturing porous silicon areas.
  • FIGS. 3A and 3B respectively are a top view and a simplified cross-section view of an embodiment of a thyristor.
  • FIG. 3B is a cross-section view along broken line B-B of FIG. 3A .
  • the same elements are designated with the same reference numerals as in FIGS. 1A and 1B .
  • emitter short-circuits 17 are formed by the material of layer 7 , which is P-type doped silicon.
  • some of the emitter short-circuits 17 are instead formed with emitter short-circuits, referred to as 30 , that are made of slightly-conductive porous silicon.
  • the porous silicon of emitter short-circuits 30 extends from cathode metallization 11 into layer 7 , preferably through the entire thickness of region 9 , and may partly extend below the region 9 in region 7 .
  • the porous silicon of emitter short-circuits 30 is resistive to enable a current to flow there-through between cathode metallization 11 and layer 7 .
  • the resistivity at 25° C. of the porous silicon of emitter short-circuits 30 is selected in a range from 10 3 to 10 4 ⁇ cm.
  • Emitter short-circuits 17 and 30 there are the same number of silicon emitter short-circuits 17 and of porous silicon emitter short-circuits 30 .
  • Emitter short-circuits 17 and 30 may be regularly arranged across the surface of region 9 .
  • the thicknesses of the different layers and/or regions could be:
  • the doping concentrations could for example be:
  • FIG. 4 shows the temperature dependence of current IGT in different thyristors.
  • a curve 40 illustrates the variation of current IGT according to temperature for a thyristor of the type described in relation with FIGS. 1A and 1B .
  • current I GT decreases significantly as the temperature increases.
  • current I GT has a value of 4.4 mA at 0° C.; to be compared with 1 mA only at 140° C.
  • Curve 42 illustrates the temperature dependence of current I GT in a thyristor of same dimensions and doping levels as the thyristor corresponding to curve 40 , but comprising porous silicon emitter short-circuits 30 .
  • Current I GT is 2.3 mA at 0° C. and 1 mA at 140° C.
  • Curve 44 illustrates the temperature dependence of current I GT in a thyristor similar to the thyristor corresponding to curve 42 , but where the thickness of region 9 has been decreased.
  • Current I GT is 3.3 mA at 0° C. and 2 mA at 140° C.
  • Current I GT of a thyristor is inversely proportional to the value of resistance R GK between gate metallization 13 and cathode metallization 11 .
  • the value of resistance R GK is mainly dependent on the resistivity of the doped silicon of layer 7 . Since the resistivity of silicon depends significantly on the temperature and increases as the temperature increases, resistance R GK increases with temperature and it can be understood that the value of current I GT decreases with temperature.
  • resistance R GK depends not only on the resistivity of the P-type doped silicon but also on the resistivity of the resistive porous silicon of emitter short-circuits 30 . At least in the operating temperature range of the thyristor, which may be between ⁇ 40 and 150° C., conversely to the resistivity of single-crystal silicon, the resistivity of the porous silicon decreases as the temperature increases. The resistivity of these two materials varying in opposite manner when the temperature varies, resistance R GK and current I GT are less temperature-dependent.
  • Total gate current I GT is shared between paths I 1 and I 2 and becomes less temperature-dependent.
  • porous silicon emitter short-circuits 30 associated with doped silicon emitter short-circuits 17 improve the temperature stability of current I GT
  • porous silicon emitter short-circuits 30 also improve the temperature stability of hold current I H , of the dV/dt turning-on, and of the switching dI/dt of an SCR-type component, for example, of a thyristor.
  • FIGS. 5A and 5B are cross-section views illustrating an embodiment of a method of manufacturing porous silicon areas in an SCR component, such as a thyristor, with emitter short-circuits.
  • the thyristor is of the type having a well, laterally delimited by a P-type doped peripheral wall 50 .
  • FIG. 5A shows a thyristor structure comprising a stack of four semiconductor regions and/or layers 3 , 5 , 7 , and 9 having alternated conductivity types, respectively PNPN, such as described in relation with FIGS. 1A , 1 B, 3 A, and 3 B.
  • Heavily-doped N-type region 9 (N + ) is interrupted in a central portion 14 and in areas 17 and 17 ′. In areas 17 and 17 ′, the material of P-type doped layer 7 comes into contact with the upper surface of the structure.
  • An electrically-insulating masking layer 52 covers the entire upper surface of the structure except for peripheral wall 50 and for areas 17 ′.
  • layer 52 may be made of Si 3 N 4 .
  • Electrolytic baths 54 and 56 are respectively in contact with the upper surface and with the lower surface of the thyristor. A positive electrode and a negative electrode area are respectively plunged into bath 56 and into bath 54 .
  • electrolytic baths 54 and 56 may be made of a mixture comprising water, hydrofluoric acid, ethanol, or acetic acid.
  • a current 58 flows from the positive electrode to the negative electrode through bath 56 , lateral region 50 , and bath 54 .
  • FIG. 5B shows the thyristor obtained after treatment.
  • a porous silicon insulating region 62 has been formed in the upper portion of peripheral wall 50 during the flowing of current 58 .
  • Region 62 extends in the entire upper portion of wall 50 and may have a thickness greater than that of layer 7 .
  • resistive porous silicon 30 has been formed from the upper surface of the thyristor all the way to layer 7 , through the entire thickness of region 9 , and may partly extend into layer 7 .
  • the thickness, the resistivity, and the porosity of the porous silicon of emitter short-circuits 30 may be adjusted by those skilled in the art by selecting the nature and the concentration of the electrolytic baths, the value of current 58 , the current flow time and the doping layer of layer 7 .
  • Porous silicon area 62 will be more resistive than regions 30 if a doping level smaller than that of layer 7 is selected for wall 50 , for example, respectively from 10 16 to 10 17 at./cm 3 and more than 10 18 at./cm 3 .
  • the thyristor comprises eight emitter short-circuit holes, this number may vary and be smaller or much greater.
  • the ratio of the number of porous silicon emitter short-circuits 30 to the number of silicon emitter short-circuits 17 may be different from 1.
  • porous silicon emitter short-circuits in SCR-type components to obtain temperature-stable characteristics
  • the emitter short-circuits may easily be adapted by those skilled in the art for any type of SCR component, for example, triacs or uni- or bidirectional Shockley diodes, with the same results on the temperature stability of the characteristics of the components.
  • bidirectional components symmetrical structures comprising emitter short-circuits of the two previously-described types on each of their surfaces may be provided.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thyristors (AREA)
US14/494,692 2013-09-26 2014-09-24 SCR component with temperature-stable characteristics Active US9070738B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1359295A FR3011124A1 (fr) 2013-09-26 2013-09-26 Composant scr a caracteristiques stables en temperature
FR1359295 2013-09-26

Publications (2)

Publication Number Publication Date
US20150084094A1 US20150084094A1 (en) 2015-03-26
US9070738B2 true US9070738B2 (en) 2015-06-30

Family

ID=49713260

Family Applications (1)

Application Number Title Priority Date Filing Date
US14/494,692 Active US9070738B2 (en) 2013-09-26 2014-09-24 SCR component with temperature-stable characteristics

Country Status (3)

Country Link
US (1) US9070738B2 (zh)
CN (3) CN104518018B (zh)
FR (1) FR3011124A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8240218B2 (en) * 2010-03-01 2012-08-14 Infineon Technologies Ag Stress sensing devices and methods
FR3011124A1 (fr) * 2013-09-26 2015-03-27 St Microelectronics Tours Sas Composant scr a caracteristiques stables en temperature
FR3049768B1 (fr) 2016-03-31 2018-07-27 Stmicroelectronics (Tours) Sas Composant de puissance protege contre les surchauffes
FR3091021B1 (fr) * 2018-12-20 2021-01-08 St Microelectronics Tours Sas Thyristor vertical

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4016017A (en) * 1975-11-28 1977-04-05 International Business Machines Corporation Integrated circuit isolation structure and method for producing the isolation structure
US4180416A (en) * 1978-09-27 1979-12-25 International Business Machines Corporation Thermal migration-porous silicon technique for forming deep dielectric isolation
EP0035841A2 (en) 1980-03-06 1981-09-16 Westinghouse Brake And Signal Company Limited A shorted-emitter thyristor device
US4546367A (en) * 1982-06-21 1985-10-08 Eaton Corporation Lateral bidirectional notch FET with extended gate insulator
US4772926A (en) * 1979-01-26 1988-09-20 Zaidan Hojin Handotai Kenkyu Shinkokai Insulated gate static induction type thyristor
US20050127470A1 (en) * 2003-12-12 2005-06-16 Mitsubishi Denki Kabushiki Kaisha Dielectric isolation type semiconductor device and method for manufacturing the same
US20050253170A1 (en) * 2004-04-21 2005-11-17 Mitsubishi Denki Kabushiki Kaisha Dielectric isolation type semiconductor device
US20110101416A1 (en) * 2009-10-29 2011-05-05 Infineon Technologies Austria Ag Bipolar semiconductor device and manufacturing method
US20140077284A1 (en) * 2012-09-19 2014-03-20 Mitsubishi Electric Corporation Semiconductor device

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001085715A (ja) * 1999-09-09 2001-03-30 Canon Inc 半導体層の分離方法および太陽電池の製造方法
US6605493B1 (en) * 2001-08-29 2003-08-12 Taiwan Semiconductor Manufacturing Company Silicon controlled rectifier ESD structures with trench isolation
JP2004211262A (ja) * 2003-01-08 2004-07-29 Kuraray Co Ltd 耐摩耗性の良好な皮革様シート
US7267741B2 (en) * 2003-11-14 2007-09-11 Lam Research Corporation Silicon carbide components of semiconductor substrate processing apparatuses treated to remove free-carbon
JP4982948B2 (ja) * 2004-08-19 2012-07-25 富士電機株式会社 半導体装置の製造方法
CN2793749Y (zh) * 2004-11-11 2006-07-05 中国科学院近代物理研究所 硅多条探测器信号引出装置
US8182590B2 (en) * 2005-04-29 2012-05-22 University Of Rochester Ultrathin porous nanoscale membranes, methods of making, and uses thereof
US20070069300A1 (en) * 2005-09-29 2007-03-29 International Business Machines Corporation Planar ultra-thin semiconductor-on-insulator channel mosfet with embedded source/drain
WO2007143197A2 (en) * 2006-06-02 2007-12-13 Qd Vision, Inc. Light-emitting devices and displays with improved performance
US7719026B2 (en) * 2007-04-11 2010-05-18 Fairchild Semiconductor Corporation Un-assisted, low-trigger and high-holding voltage SCR
CN101339955B (zh) * 2008-06-16 2010-09-22 启东市捷捷微电子有限公司 门极灵敏触发单向可控硅芯片及其生产方法
CN101393929A (zh) * 2008-11-10 2009-03-25 吉林华微电子股份有限公司 双正斜角槽终端半导体分立器件可控硅及其制造方法
US8912602B2 (en) * 2009-04-14 2014-12-16 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and methods for forming the same
US8344416B2 (en) * 2009-05-15 2013-01-01 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuits using guard rings for ESD, systems, and methods for forming the integrated circuits
CN101931001B (zh) * 2009-06-24 2012-05-30 湖北台基半导体股份有限公司 一种非对称快速晶闸管
TWI472477B (zh) * 2010-03-02 2015-02-11 Univ Nat Taiwan 矽奈米結構與其製造方法及應用
CN101807598B (zh) * 2010-03-17 2011-12-14 浙江大学 一种pnpnp型双向可控硅
CN102330147B (zh) * 2010-07-14 2015-11-25 郭志凯 一种硅片生产外延设备及其系统
CN102231395B (zh) * 2011-06-17 2013-11-13 郭建国 绝缘栅型硅光伏电源组件
CN102709159A (zh) * 2012-06-28 2012-10-03 上海集成电路研发中心有限公司 SoC衬底及其制造方法
CN103117309A (zh) * 2013-02-22 2013-05-22 南京邮电大学 一种横向功率器件结构及其制备方法
FR3011124A1 (fr) * 2013-09-26 2015-03-27 St Microelectronics Tours Sas Composant scr a caracteristiques stables en temperature

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4016017A (en) * 1975-11-28 1977-04-05 International Business Machines Corporation Integrated circuit isolation structure and method for producing the isolation structure
US4180416A (en) * 1978-09-27 1979-12-25 International Business Machines Corporation Thermal migration-porous silicon technique for forming deep dielectric isolation
US4772926A (en) * 1979-01-26 1988-09-20 Zaidan Hojin Handotai Kenkyu Shinkokai Insulated gate static induction type thyristor
EP0035841A2 (en) 1980-03-06 1981-09-16 Westinghouse Brake And Signal Company Limited A shorted-emitter thyristor device
US4546367A (en) * 1982-06-21 1985-10-08 Eaton Corporation Lateral bidirectional notch FET with extended gate insulator
US20050127470A1 (en) * 2003-12-12 2005-06-16 Mitsubishi Denki Kabushiki Kaisha Dielectric isolation type semiconductor device and method for manufacturing the same
US20050253170A1 (en) * 2004-04-21 2005-11-17 Mitsubishi Denki Kabushiki Kaisha Dielectric isolation type semiconductor device
US20110101416A1 (en) * 2009-10-29 2011-05-05 Infineon Technologies Austria Ag Bipolar semiconductor device and manufacturing method
US20140077284A1 (en) * 2012-09-19 2014-03-20 Mitsubishi Electric Corporation Semiconductor device

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Gupta et al: "Technologies for porous silicon devices", Semiconductor Science and Technology, vol. 10, No. 5, May 1995 (5 pages).
INPI Search Report and Written Opinion for FR1359295 dated Jun. 11, 2014 (9 pages).

Also Published As

Publication number Publication date
CN104518018A (zh) 2015-04-15
CN109585288B (zh) 2022-01-07
CN204289459U (zh) 2015-04-22
FR3011124A1 (fr) 2015-03-27
CN104518018B (zh) 2018-11-09
CN109585288A (zh) 2019-04-05
US20150084094A1 (en) 2015-03-26

Similar Documents

Publication Publication Date Title
US20210119042A1 (en) Methods of Reducing the Electrical and Thermal Resistance of SIC Substrates and Device Made Thereby
US9530875B2 (en) High-voltage vertical power component
JP5482886B2 (ja) 半導体装置
SE432497B (sv) Halvledaranordning med ett bipolert halvledarkopplingselement
US9070738B2 (en) SCR component with temperature-stable characteristics
US10068999B2 (en) Vertical power component
US9048215B2 (en) Semiconductor device having a high breakdown voltage
JP2018049908A (ja) 半導体装置及びその製造方法
JP2004519100A (ja) バイポーラダイオード
US8901601B2 (en) Vertical power component
JP2022160610A (ja) 半導体装置
CN103137658A (zh) 半导体器件的含导电颗粒的绝缘体与半导体构成的耐压层
US8785970B2 (en) HF-controlled bidirectional switch
KR101216561B1 (ko) 반도체장치
US8704270B2 (en) Shockley diode having a low turn-on voltage
US10811406B2 (en) Semiconductor device and diode
CN104009081B (zh) 功率半导体器件及其制造方法
US20100001315A1 (en) Semiconductor device
US8575647B2 (en) Bidirectional shockley diode with extended mesa
US20120061803A1 (en) Asymmetrical bidirectional protection component
TW202249288A (zh) 電子元件

Legal Events

Date Code Title Description
AS Assignment

Owner name: STMICROELECTRONICS (TOURS) SAS, FRANCE

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MENARD, SAMUEL;REEL/FRAME:033803/0698

Effective date: 20140528

STCF Information on status: patent grant

Free format text: PATENTED CASE

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 4

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 8

AS Assignment

Owner name: STMICROELECTRONICS INTERNATIONAL N.V., SWITZERLAND

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:STMICROELECTRONICS (TOURS) SAS;REEL/FRAME:063277/0334

Effective date: 20230125