US7642659B2 - Wire pad of semiconductor device - Google Patents

Wire pad of semiconductor device Download PDF

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Publication number
US7642659B2
US7642659B2 US11/853,547 US85354707A US7642659B2 US 7642659 B2 US7642659 B2 US 7642659B2 US 85354707 A US85354707 A US 85354707A US 7642659 B2 US7642659 B2 US 7642659B2
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layer
film
metal interconnect
low
nitride film
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US20080073791A1 (en
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Cheon-Man Shim
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Adeia Semiconductor Advanced Technologies Inc
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Dongbu HitekCo Ltd
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Definitions

  • a wire pad of a semiconductor device includes low-k layer 100 , oxide layer 102 , SiCN layer 104 , nitride film 106 , and TEOS film 108 , which are sequentially formed to predetermined thicknesses.
  • Layers 105 a , 105 b and 105 c are formed between SiCN layer 104 and nitride film 106 .
  • Layers 107 a and 107 b are formed between nitride film 106 and TEOS film 108 while layer 109 is formed over TEOS film 108 .
  • Example FIG. 2 illustrates a device for performing an EM/SM (Electro-migration/Stress-migration) test of a semiconductor device through the application of a force for a predetermined time.
  • Semiconductor device 1 is located at one side of PCB 5 , and includes pad ‘a’ which electrically connected to PCB 5 using wires 6 .
  • Semiconductor pad ‘a’ is electrically connected to wire 6 via contact ‘b.’
  • Wire portion ‘c’ electrically connects wire 6 at another end to pad ‘e’ of PCB 5 at contact ‘d.’
  • An EM/SM test of plural semiconductor devices 1 having eight pads was carried out was carried out by applying predetermined force to the points of action ‘f’ of the wire 6 for a predetermined test time.
  • Table 1 illustrates the results of the EM/SM test of the semiconductor device 1 .
  • the EM/SM test ‘x’ denotes that the wire is not bounded in the regions (a) to (e) even when predetermined force is applied to the point (f) of action for a predetermined test time.
  • Table 1 shows that the wires 6 were easily bounded in the regions between ‘a’ to ‘e’, when a predetermined force, for example, approximately 0.5 g, is applied to the points ‘f’ of action of wire 6 in the EM/SM test.
  • a predetermined force for example, approximately 0.5 g
  • the low-k layer has a low mechanical strength and a bonding force between the low-k layer.
  • SiCN (or SiCON) layer serving as a barrier layer, is weak. Accordingly, the semiconductor device may be deficient in terms of wire bounding in wire bonds.
  • a wire pad for a semiconductor device which does not cause a wire to be bounded in wire bonding.
  • Embodiments relate to a wire pad of a semiconductor device including: a low-k layer formed on and/or over the entire upper surface of the semiconductor device to a predetermined thickness; an oxide layer formed on and/or over the entire upper surface of the low-k layer to a predetermined thickness; a SiCN layer formed on and/or over the entire upper surface of the oxide layer to a predetermined thickness; an undoped silicate glass (USG) film formed on and/or over the entire upper surface of the SiCN layer to a predetermined thickness; a nitride film formed on and/or over the entire upper surface of the USG film to a predetermined thickness; a tetra ethyl ortho silicate (TEOS) film formed on and/or over the entire upper surface of the nitride film to a predetermined thickness; a first metal interconnect extending through the low-k layer to the USG film using a damascene process on the low-k layer to the TEOS film; a second metal interconnect passing through the n
  • Embodiments relate to a wire pad of a semiconductor device including a low-k layer formed on and/or over and/or over the entire upper surface of the semiconductor device to a predetermined thickness; a first TEOS film formed on and/or over the entire upper surface of the low-k layer to a predetermined thickness; a SiCN layer formed on and/or over the entire upper surface of the first TEOS film to a predetermined thickness; an USG film formed on and/or over the entire upper surface of the SiCN layer to a predetermined thickness; a nitride film formed on and/or over the entire upper surface of the USG film to a predetermined thickness; a second TEOS film formed on and/or over the entire upper surface of the nitride film to a predetermined thickness; a first metal interconnect passing through the low-k layer to the USG film using a damascene process on and/or over the low-k layer to the second TEOS film; a second metal interconnect extending from the nitride film to
  • Example FIG. 1 illustrates a semiconductor device.
  • Example FIG. 2 illustrates a block diagram of a structure for an EM/SM test of a semiconductor device.
  • Example FIG. 3 illustrates a semiconductor device, in accordance with embodiments.
  • Example FIG. 4 illustrates a block diagram of an EM/SM test of a semiconductor device, in accordance with embodiments.
  • Example FIG. 5 illustrates a semiconductor device, in accordance with embodiments.
  • Example FIG. 6 illustrates a block diagram of an EM/SM test of a semiconductor device, in accordance with embodiments.
  • a wire pad of a semiconductor device in accordance with embodiments may include low-k layer 300 , oxide layer 302 , SiCN layer 304 , undoped silicate glass (USG) film 306 , nitride film 308 , and tetra ethyl ortho silicate (TEOS) film 310 , which are sequentially formed to predetermined thicknesses.
  • Layers 305 a , 305 b and 305 c are formed between SiCN layer 304 and USG film 306 .
  • Layers 307 a and 307 b are formed between USG film 306 and nitride film 308 .
  • Layers 309 a and 309 b are formed between nitride film 308 and TEOS film 310 while layer 311 is formed over TEOS film 310 .
  • Nitride film 308 may be composed of SiN.
  • First metal interconnect 312 which may be composed of copper, may extend from low-k layer 300 to USG film 306 using a damascene process.
  • Second metal interconnect 314 which may be composed of a compound including aluminum and copper, extends from nitride film 308 to TEOS film 310 .
  • Pad ‘a’ of semiconductor device 400 can be bonded to wire 404 using contact ‘b.’
  • Wire 404 can be bonded at another end to pad ‘e’ of PCB 402 using contact ‘d.’
  • An EM/SM test of twenty-five semiconductor devices 400 having eight pads was conducted by applying predetermined force to point of action ‘f’ adjacent portion ‘c’ of wire 404 for a predetermined test time.
  • Example Table 2 shows the results of the EM/SM test of semiconductor devices 400 .
  • embodiments relate to a wire pad of a semiconductor device including low-k layer 500 , first TEOS film 502 , SiCN layer 504 , USG film 505 , nitride film 506 , and second TEOS film 508 , which are sequentially formed to predetermined thicknesses.
  • Layers 503 a , 503 b and 503 c are formed between SiCN layer 504 and USG film 505 .
  • Layers 507 a and 507 b are formed between USG film 505 and nitride film 506 .
  • Layers 509 a and 509 b are formed between nitride film 506 and second TEOS film 508 while layer 510 is formed over second TEOS film 508 .
  • Nitride film 506 may be composed of SiN.
  • First metal interconnect 514 which may be composed of copper, extends from low-k layer 500 to USG film 505 using a damascene process.
  • Second metal interconnect 516 which may be composed of an aluminum-copper compound, extends from nitride film 506 to second TEOS film 508 .
  • ‘x’ denotes that the wire is not bounded in the regions between ‘a’ and ‘e’ when a predetermined force, for example, 5 g or more, is applied to the point of action ‘f’ for a predetermined test time. Further, data without any of designation ‘a’ to ‘e’ denote that the wire is bounded in region ‘d.’
  • example Table 2 illustrates that wire 404 were bounded in the regions ‘a’ to ‘e’ when such a predetermined force is applied to the point of action ‘f’ of wire 404 .
  • the wire pad of semiconductor device 400 including oxide layer 302 , USG film 306 formed between SiCN layer 304 and nitride layer 308 , has a wire bonding force that is ten times that exhibited by other semiconductor devices.
  • embodiments relate to a wire pad of a semiconductor device including low-k layer 500 , first TEOS film 502 , SiGN layer 504 , USG film 505 , nitride film 506 , and second TEOS film 508 , which are sequentially formed to predetermined thicknesses.
  • Layers 503 a , 503 b and 503 c are formed between SiGN layer 504 and USG film 505 .
  • Layers 507 a and 507 b are formed between USG film 505 and nitride film 506 .
  • Layers 509 a and 509 b are formed between nitride film 506 and second TEOS film 508 while layer 510 is formed over second TEOS film 508 .
  • Nitride film 506 may be composed of SiN.
  • First metal interconnect 514 which may be composed of copper, extends from low-k layer 500 to USG film 505 using a damascene process.
  • Second metal interconnect 516 which may be composed of an aluminum-copper compound, extends from nitride film 506 to second TEOS film 508 .
  • an EM/SM test of semiconductor device 600 located at one side of PCB 602 and electrically connected to PCB 402 using wire 604 .
  • Pad ‘a’ of semiconductor device 600 can be bonded to wire 604 using contact ‘b.’
  • Wire 604 can be bonded at another end to pad ‘e’ of PCB 602 using contact ‘d.’
  • An EM/SM test of twenty-five semiconductor devices 600 having eight pads was conducted by applying predetermined force to point of action ‘f’ adjacent portion ‘c’ of wire 404 for a predetermined test time.
  • Example Table 3 shows the results of the EM/SM test of semiconductor devices 600 .
  • ‘x’ denotes that the wire is not bounded in the regions between ‘a’ and ‘e’ when a predetermined force, for example, 5 g or more, is applied to the point of action ‘f’ for a predetermined test time. Further, data without any of designation ‘a’ to ‘e’ denote that the wire is bounded in region ‘d.’
  • example Table 3 shows that wires 604 were bounded in regions ‘a’ to ‘e’ when the predetermined force is applied to point of action ‘f.’
  • embodiments relate to a wire pad of semiconductor device 600 including first TEOS film 502 formed between low-k layer 500 and SiCN layer 504 , exhibits an enhanced wire bonding force that is ten times that of wire pads of other semiconductor devices.
  • a wire pad of a semiconductor device is beneficial for not causing a wire to be bounded in wire bonding, thereby making it unnecessary to place or otherwise locate the semiconductor pad to one side in an EM/SM test. Moreover, the overall time required to produce an EM/SM test wafer is reduced.

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