US5418565A - CFA compatible resolution reduction in a single sensor electronic camera - Google Patents

CFA compatible resolution reduction in a single sensor electronic camera Download PDF

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Publication number
US5418565A
US5418565A US08/196,603 US19660394A US5418565A US 5418565 A US5418565 A US 5418565A US 19660394 A US19660394 A US 19660394A US 5418565 A US5418565 A US 5418565A
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image
resolution
pixels
color
camera
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Craig M. Smith
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Intellectual Ventures Fund 83 LLC
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Eastman Kodak Co
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Priority to EP95101821A priority patent/EP0667718A3/de
Priority to JP7025194A priority patent/JPH07264606A/ja
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Assigned to LASER-PACIFIC MEDIA CORPORATION, FPC INC., NPEC INC., CREO MANUFACTURING AMERICA LLC, KODAK AVIATION LEASING LLC, KODAK REALTY, INC., KODAK PORTUGUESA LIMITED, KODAK (NEAR EAST), INC., KODAK IMAGING NETWORK, INC., KODAK AMERICAS, LTD., KODAK PHILIPPINES, LTD., EASTMAN KODAK COMPANY, FAR EAST DEVELOPMENT LTD., QUALEX INC., EASTMAN KODAK INTERNATIONAL CAPITAL COMPANY, INC., PAKON, INC. reassignment LASER-PACIFIC MEDIA CORPORATION PATENT RELEASE Assignors: CITICORP NORTH AMERICA, INC., WILMINGTON TRUST, NATIONAL ASSOCIATION
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00—Geometric image transformation in the plane of the image
    • G06T3/40—Scaling the whole image or part thereof
    • G06T3/4015—Demosaicing, e.g. colour filter array [CFA], Bayer pattern
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/00127—Connection or combination of a still picture apparatus with another apparatus, e.g. for storage, processing or transmission of still picture signals or of information associated with a still picture
    • H04N1/00204—Connection or combination of a still picture apparatus with another apparatus, e.g. for storage, processing or transmission of still picture signals or of information associated with a still picture with a digital computer or a digital computer system, e.g. an internet server
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/21—Intermediate information storage
    • H04N1/2104—Intermediate information storage for one or a few pictures
    • H04N1/2112—Intermediate information storage for one or a few pictures using still video cameras
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/21—Intermediate information storage
    • H04N1/2104—Intermediate information storage for one or a few pictures
    • H04N1/2112—Intermediate information storage for one or a few pictures using still video cameras
    • H04N1/2137—Intermediate information storage for one or a few pictures using still video cameras with temporary storage before final recording, e.g. in a frame buffer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60—Control of cameras or camera modules
    • H04N23/63—Control of cameras or camera modules by using electronic viewfinders
    • H04N23/631—Graphical user interfaces [GUI] specially adapted for controlling image capture or setting capture parameters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/80—Camera processing pipelines; Components thereof
    • H04N23/84—Camera processing pipelines; Components thereof for processing colour signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/10—Circuitry of solid-state image sensors [SSIS]; Control thereof for transforming different wavelengths into image signals
    • H04N25/11—Arrangement of colour filter arrays [CFA]; Filter mosaics
    • H04N25/13—Arrangement of colour filter arrays [CFA]; Filter mosaics characterised by the spectral characteristics of the filter elements
    • H04N25/134—Arrangement of colour filter arrays [CFA]; Filter mosaics characterised by the spectral characteristics of the filter elements based on three different wavelength filter elements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N2101/00—Still video cameras
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N2201/00—Indexing scheme relating to scanning, transmission or reproduction of documents or the like, and to details thereof
    • H04N2201/0008—Connection or combination of a still picture apparatus with another apparatus
    • H04N2201/0034—Details of the connection, e.g. connector, interface
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N2201/00—Indexing scheme relating to scanning, transmission or reproduction of documents or the like, and to details thereof
    • H04N2201/0077—Types of the still picture apparatus
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N2201/00—Indexing scheme relating to scanning, transmission or reproduction of documents or the like, and to details thereof
    • H04N2201/21—Intermediate information storage
    • H04N2201/212—Selecting different recording or reproducing modes, e.g. high or low resolution, field or frame
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N2209/00—Details of colour television systems
    • H04N2209/04—Picture signal generators
    • H04N2209/041—Picture signal generators using solid-state devices
    • H04N2209/042—Picture signal generators using solid-state devices having a single pick-up sensor
    • H04N2209/045—Picture signal generators using solid-state devices having a single pick-up sensor using mosaic colour filter
    • H04N2209/046—Colour interpolation to calculate the missing colour values
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60—Control of cameras or camera modules
    • H04N23/65—Control of camera operation in relation to power supply

Definitions

  • This invention relates to the field of electronic imaging, and, in particular, to an electronic still camera providing image capture at a plurality of resolution levels.
  • FIG. 1 shows how the red (R), green (G), and blue (B) pixels are commonly arranged in a CFA pattern on the surface of an image sensor.
  • the illustrated pattern is the well known Bayer array, which is described in U.S. Pat. No. 3,971,065, incorporated herein by reference.
  • each photosensitive pixel produces a single color signal.
  • each pixel is associated with three color values and therefore can be processed by a variety of known image processing techniques, depending on the needs of the system. Some examples of such processing include image sharpening, color correction, or halftoning.
  • FIG. 2A shows an example of one such low-resolution pattern, with a circle surrounding each sampled pixel.
  • the electronic camera described in Ser. No. 085,516 is capable of storing full resolution CFA images or reduced resolution images, or a combination of images of the different resolutions.
  • all of the methods have the same disadvantage. They all create a low resolution CFA image that is spatially different from the original CFA image.
  • FIG. 2B which shows another low resolution CFA image
  • the red pixels and the blue pixels are not centered with respect to the green pixels. Consequently, interpolated low resolution pixels are calculated using pixels that are not centered in the same geometric pattern as the original CFA image. This happens because it is difficult to find a subsampling pattern for the Bayer array that would replicate the geometric spacing of the original CFA pattern, at least for moderate levels of resolution reduction.
  • the shifted geometry of the reduced resolution pixels has the following disadvantages.
  • the CFA interpolation is designed for the full resolution CFA geometry. If the interpolation is applied to the shifted geometry of the low resolution pixels, e.g. as shown in either FIG. 2A or FIG. 2B, it will cause artifacts in the image. To avoid this, it is necessary to implement a separate, and typically more complicated, interpolation algorithm.
  • the compression algorithm may not be optimal for the low resolution pixel geometries. This can cause the compression algorithm to compress at a higher bit rate or lower quality. For example, unwanted color shadows and color fringing can show up in the subsequently decompressed image.
  • an electronic camera adapted for capturing and processing images of different resolution includes an image sensor, means for generating an image signal, means for selecting one of a plurality of resolution levels, and a processor for producing a reduced resolution image.
  • the image sensor includes a two-dimensional array of photosites covered by a pattern of chrominance and luminance color filters, and generates an image signal corresponding to a two-dimensional image captured by the sensor.
  • the plurality of resolution levels provide a full resolution image arranged according to the pattern of color filters, and at least one reduced resolution image.
  • the processor produces the reduced resolution image by averaging areas of the captured image to produce a reduced resolution image arranged according to a pattern that replicates the pattern of color filters seen in the full resolution image.
  • the advantageous effect of the invention is that image processing algorithms designed for full resolution CFA images can also be used on reduced resolution CFA images. More specifically, compression and interpolation algorithms that necessarily make assumptions about CFA geometrics in their methodologies do not have to be redesigned to handle low resolution images.
  • FIG. 1 is a diagram of the Bayer color filter array pattern as known in the prior art
  • FIGS. 2A and 2B are diagrams of known subsampling patterns that can be applied to the Bayer array shown in FIG. 1;
  • FIG. 3 is a block diagram of a single sensor color camera with CFA compatible resolution reduction in accordance with the invention.
  • FIG. 4 is a flowchart showing the operation of the camera shown in FIG. 3;
  • FIG. 5 is a view of a portion of the sensor shown in FIG. 3;
  • FIG. 6 shows diagrams of the pixel locations (filter patterns) used in the disclosed algorithms to generate low resolution pixels
  • FIG. 7 is a diagram showing how the filter patterns of FIG. 6 are applied to the original, high resolution image.
  • FIG. 8 is a diagram showing the geometrical regularity of the low resolution CFA geometry resulting from the processing shown in FIG. 7.
  • FIG. 3 the elements of a single sensor electronic camera are shown in block form.
  • the camera is divided generally into an input section 10 for receiving image light and capturing an image, a processing and storage section 12 for processing and storing captured images, a control and display section 14 for user interface with the camera, and a detachable docking unit 16 for transferring stored images from the processing and storage section 12 to a host computer 18.
  • the camera shown in FIG. 3 is sometimes referred to as a dockable electronic still camera, since it relates to the computer 16 generally through the docking unit 16 (although, as will be described, a serial port is provided on the camera body itself for direct connection with the computer 18).
  • the operation of the camera is generally shown in FIG. 4.
  • the camera is generally removed from the docking unit 16 and used at a location significantly remote from the computer 18.
  • the camera is periodically returned to the computer, and images are then downloaded through the docking unit 16 (or the serial port) to free up the camera memory for more photographs.
  • the camera provides the user with the option to store some, or all, of the images at less than the highest resolution level, so that more images may be stored in the camera memory before having to return to the computer 18 to download the images.
  • the purpose of the invention is to filter and subsample a CFA image for a lower resolution in a way that maintains the original CFA geometry.
  • the desired resolution level is checked in section 19b. If a lower resolution is selected, the camera filters and subsamples the pixel data according to the technique of the invention (later described), and stores the resultant low resolution image in its nonvolatile memory in section 19c. Such storage may include compression.
  • One advantage of the invention is obtained at this point, namely, that the compression algorithm designed for the full resolution image can also be used in the section 19c on the reduced resolution image.
  • the input section 10 includes a lens 20 for imaging light from an object 22 through a shutter and aperture control 24 and an optical low pass filter 26 upon a charge-coupled device (CCD) image sensor 28.
  • the sensor 28 is shown in further detail in FIG. 5 to include a color filter array 30 overlying an array of photosites 32 (shown for illustration through a cut-away portion 34 of the color filter array 30).
  • the color filter array 30 has a plurality of red, green, and blue elements 36a, 36b, and 36c arranged in a predetermined geometrical arrangement, in this case the familiar "Bayer array" described in U.S. Pat. No. 3,971,065, which is incorporated herein by reference.
  • a characteristic of one form of the "Bayer array” is that the luminance picture elements (pixels), i.e., corresponding to the green element 36b, are arranged horizontally and vertically in a checkerboard pattern, and the chrominance pixels, i.e., corresponding to the red and blue color elements 36a and 36c, are each vertically and horizontally adjacent to a luminance pixel.
  • a driver 38 (shown in FIG. 3) generates clocking signals for controlling the image integration time and the vertical transfer of image pixels to a high speed horizontal register 40 (shown in FIG. 5).
  • An output capacitive node 42 produces a signal which is amplified, processed, and stored in the processing and storage section 12.
  • the input section 10 further includes a lens cap 44 connected to a main switch 46 that activates the camera when the cap 44 is moved to expose the lens 20 to image light, and a close-up lens 48 that can be optionally moved into the path of image light for close-up exposures.
  • the input section also includes an optical viewfinder 50 for framing the object 22 in relation to the sensor 28, a flash unit 52 for illuminating the object 22, and a photocell 54 for converting image intensity information into an electrical signal that is used in the processing and storage section 12 to regulate the shutter and aperture control 24.
  • the processing and storage section 12 includes a correlated double sampling circuit 56 for providing analog image samples to an analog-to-digital (A/D) converter 58.
  • the digitized signals are corrected for white balance, gamma, and other conventional distortions by a correction read-only memory (ROM) 60, which provides output signals that are applied to a frame buffer memory 62, which is a dynamic random-access memory (RAM).
  • ROM read-only memory
  • the buffered image signals are processed, e.g., compressed, in a digital signal processor (DSP) 64 and then stored in an output memory, such as flash electrically programmable read-only memory (EPROM) 66.
  • DSP digital signal processor
  • EPROM flash electrically programmable read-only memory
  • a serial path from the flash EPROM memory 66 to a serial port 68 is provided through a universal synchronous/asynchronous receiver/transmitter (UART) 70 and an RS232 driver 72.
  • UART universal synchronous/asynchronous receiver/transmitter
  • RS232 driver 72 RS232 driver
  • a faster parallel path is provided through connectors 74a and 74b via a small computer systems interface (SCSI) controller 76 in the docking unit 16 to a parallel port 78.
  • SCSI small computer systems interface
  • a timing generator 80 provides timing signals to the aforementioned elements in the processing and storage section 12, in particular providing timing input to a microprocessor controller 82 and address timing to the frame buffer memory 62, the DSP 64, the flash EPROM memory 66, and a latching and decoding circuit 84.
  • the microprocessor controller 82 in turn controls the A/D converter 58, the correction ROM 60, the flash unit 52, and a stepping motor driver 86, which controls operation of the shutter and aperture control 24.
  • the microprocessor controller 82 also controls a display element 50a in the viewfinder 50 (for indicating flash ready, under/over exposure, and the like), and receives exposure data from the photocell 54.
  • a plurality of switches are provided in the control and display section 14 for manually activating a variety of additional features.
  • Some switches directly activate the respective features, while other switches activate a menu of choices on a liquid crystal display (LCD) 90.
  • a switch 88a moves the close-up lens 48 into position
  • a switch 88b allows the user to select which of two (high or low) different resolution levels of sensor data are stored in the flash memory 66
  • a switch 88c activates a low resolution "burst" mode in which several pictures are rapidly taken
  • a switch 88d activates the flash unit 52
  • a switch 88e activates a self-timer delay mode.
  • a capture switch 88f initiates each exposure.
  • the liquid crystal display (LCD) 90 indicates the selected feature values.
  • further input may be provided, e.g., levels of compression (number of bits) may be selected, and the color mode (black/white or color) may be designated.
  • a battery 92 provides power to the camera through a power switcher 94 and a DC/DC converter 96 when the camera is disconnected from the docking unit 16.
  • the computer supplies power to an AC/DC converter 98 in the docking unit 16, which in turns powers a battery charger 100 that connects to the camera and charges the battery 92.
  • activation of the capture switch 88f allows the camera to capture an image, which is then stored in the flash EPROM memory 66, together with other images, until they can be downloaded to the computer 18.
  • the image which is read out from the sensor 28 has, in one embodiment, a total of 512 lines and 768 pixels per line. Since the sensor 28 incorporates a "Bayer" color filter pattern, the digitized values from the A/D converter 58 correspond to values from the various color elements 36a, 36b, 36c on the sensor 28. As an example, eight bit digital pixel values are read from the CCD sensor 28 via ROM 60 at relatively high readout rate and stored in the dynamic RAM frame buffer memory 62.
  • the image signals are then read from the frame buffer memory 62 at a relatively slower speed, compressed using a differential pulse code modulation (DPCM) algorithm (which compresses the image from 8 bits per pixel to 3 bits per pixel) implemented in the DSP 64 pursuant to instructions stored in a program ROM 64a, and stored in the flash EPROM memory 66, which can hold several compressed images. This process typically takes about 4 seconds, which means that full resolution images can only be stored in the flash EPROM memory 66 every 4 seconds.
  • the use of the buffer memory 62 allows the DSP 64 to operate at a throughput rate different from the CCD sensor 28.
  • the aforementioned latching and decoding circuit 84 accomplishes this separation of throughput rates by coordinating the requirement of the DSP 64 with control of the frame buffer memory 62 and the flash EPROM memory 66.
  • the camera includes the switch 88b which allows the user to select the image record size, that is, which of (at least) two different resolution levels of sensor data are stored in the flash memory 66.
  • the switch 88b activates the "low resolution” mode
  • the controller 82 directs the digital signal processor 64 to initiate processing and output of, e.g., a quarter size image.
  • This quarter size image is then compressed by the DSP 64, and stored in the flash EPROM memory 66. It is thus possible to store four times as many low resolution images as high resolution images in the flash memory 66.
  • a suitable "subsampling" pattern is required.
  • the color filter array pixels must be subsampled properly. This subsampling should be done in a manner that maintains good luminance resolution, without introducing false color "aliasing" artifacts.
  • the improvement obtained by the invention is based on subsampling according to a filtering pattern that generates a low resolution image that replicates the pixel geometry of the original CFA image-in this embodiment, a low resolution image with the same checkerboard geometry as the original Bayer CFA image. This simplifies the image processing for the rest of the image chain because the same algorithms can be used regardless of the selected image resolution.
  • the filtering and subsampling patterns described in this invention it is possible to use one set of image processing routines to process the image in the host computer. This makes implementation and maintenance of the image processing function much simpler.
  • FIG. 6 shows the patterns of the surrounding pixels that are used to calculate a low resolution pixel centered in each pattern for each of the colors, as well as the equations for calculating the low resolution pixel values.
  • the filtering patterns shown in FIG. 6 are applied to the original CFA image as shown in FIG. 7.
  • the resulting low resolution image, after processing is completed in accordance with FIGS. 6 and 7, is shown in FIG. 8 as a lower resolution replication of the original Bayer CFA pattern. Note, in particular, that the original geometric spacing has been preserved.
  • the equations shown in FIG. 6 that are used to filter the image in the preferred embodiment are designed so that all of the coefficients are powers of two. This allows for easy implementation in many digital systems. Other sets of coefficients could easily be used in these equations. To further reduce implementation complexity, some of the coefficients, especially in the red and blue channels, could be set to zero. If more complexity is possible, the coefficients could be set to any real numbers. As long as the resulting low resolution image has the same geometry as the original CFA image, it is within the scope of this invention.
  • the full resolution image is stored in the frame buffer memory 62 in the low resolution mode, and the DSP 64 processes the values from multiple pixels of the same color to form the CFA compatible color subsampled image, by averaging some of the pixels as set out by the algorithms of FIG. 6.
  • the pixels covered by the filter patterns illustrated by FIG. 6 are obtained by suitably programming the microprocessor controller 82 to instruct the digital signal processor 64 to select the appropriate pixel values, and the digital signal processor 64 is itself programmed to perform the respective filter calculations. All such programming is straight-forward and conventional.
US08/196,603 1994-02-15 1994-02-15 CFA compatible resolution reduction in a single sensor electronic camera Expired - Lifetime US5418565A (en)

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US08/196,603 US5418565A (en) 1994-02-15 1994-02-15 CFA compatible resolution reduction in a single sensor electronic camera
EP95101821A EP0667718A3 (de) 1994-02-15 1995-02-10 Elektronische Stehbildkamera mit durch den Benutzer wählbarer Bildauflösung.
JP7025194A JPH07264606A (ja) 1994-02-15 1995-02-14 Ｃｆａコンパチブルで解像度を低減した単一センサ付電子カメラ

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JPH07264606A (ja) 1995-10-13
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