US20130235243A1 - Solid-state image pickup apparatus and electronic apparatus - Google Patents

Solid-state image pickup apparatus and electronic apparatus Download PDF

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Publication number
US20130235243A1
US20130235243A1 US13/768,468 US201313768468A US2013235243A1 US 20130235243 A1 US20130235243 A1 US 20130235243A1 US 201313768468 A US201313768468 A US 201313768468A US 2013235243 A1 US2013235243 A1 US 2013235243A1
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wirings
image pickup
solid
state image
pickup apparatus
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Takuya Sano
Toshifumi Wakano
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Sony Corp
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Sony Corp
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Publication of US20130235243A1 publication Critical patent/US20130235243A1/en
Priority to US14/842,369 priority Critical patent/US9806120B2/en
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    • H04N5/374—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/809—Constructional details of image sensors of hybrid image sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/199—Back-illuminated image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/805—Coatings
    • H10F39/8053—Colour filters
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/805—Coatings
    • H10F39/8057—Optical shielding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/811—Interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/813—Electronic components shared by multiple pixels, e.g. one amplifier shared by two pixels

Definitions

  • the present disclosure relates to a solid-state image pickup apparatus and an electronic apparatus.
  • CMOS complementary metal oxide semiconductor
  • solid-state image pickup apparatus involves a low power source voltage and low power consumption. Therefore, the CMOS solid-state image pickup apparatus is used for a digital still camera, a digital video camera, and various mobile terminal apparatuses such as a camera-equipped cellular phone, for example.
  • the CMOS solid-state image pickup apparatus is provided with pixels constituted of photodiodes serving as photoelectric conversion units and a plurality of pixel transistors. Further, the CMOS solid-state image pickup apparatus includes a pixel unit in which a plurality of pixels are arranged in a two-dimensional array form and a peripheral circuit unit disposed on the periphery of the pixel unit.
  • the back surface irradiation type CMOS solid-state image pickup apparatus has a light incident surface on an opposite side (back surface of substrate) to a side on which a wiring is provided (front surface of substrate). Therefore, it is possible to provide the wiring of a pixel unit on a photodiode, with the result that the degree of freedom of a layout is dramatically increased.
  • CMOS solid-state image pickup apparatus of a pixel sharing type in which a plurality of photodiodes are caused to share a pixel transistor group excluding a transfer transistor is also known (see, Japanese Patent Application Laid-open Nos. 2008-294218 and 2009-135319).
  • CMOS solid-state image pickup apparatus when an interval between adjacent wirings becomes smaller as the pixel size becomes finer, capacitive coupling between the wirings does not become negligible.
  • a pulse voltage supplied to a transfer gate varies due to an influence of another wiring.
  • a potential in a substrate under the transfer gate varies.
  • the potential variation causes charges accumulated in the photodiodes to leak into a floating diffusion (FD), which causes problems of a change in saturation signal amount (Qs), an increase in variation of the saturation signal amount between the photodiodes, and the like. In this way, if the variation in the saturation signal amount is large for each pixel, the image quality of the solid-state image pickup apparatus degrades.
  • a solid-state image pickup apparatus including a pixel region in which a plurality of pixels each including a photoelectric conversion element are arranged, transfer wirings formed on the pixel region in parallel to each other with uniform opening widths, and different wirings formed in a wiring layer above the transfer wirings. At least a part of the different wirings is overlapped with the transfer wirings on a plan position, and the transfer wirings and the different wirings form a light shielding structure in the pixel region.
  • an electronic apparatus including the solid-state image pickup apparatus and a signal processing circuit configured to process an output signal of the solid-state image pickup apparatus.
  • the transfer wirings are arranged in parallel to each other with uniform opening widths. Therefore, the coupling capacitance between the transfer wirings becomes constant, and a variation of a saturation signal amount between pixels becomes constant. Thus, the saturation signal amount between the pixels is equalized, with the result that the image quality of the solid-state image pickup apparatus can be upgraded.
  • FIG. 1 is a plan view showing the structure of a solid-state image pickup apparatus according to a first embodiment of the present disclosure
  • FIGS. 2A and 2B are schematic diagrams each showing the structure of the solid-state image pickup apparatus
  • FIG. 3 is a cross-sectional view showing the structure of the solid-state image pickup apparatus according to the first embodiment
  • FIGS. 4A and 4B are a cross-sectional structure and a plan structure of wiring layers, respectively;
  • FIG. 5 is a diagram showing the structure of a pixel structure of a 4 pixel sharing unit
  • FIGS. 6A is a plan view showing the structure of a light shielding structure of the solid-state image pickup apparatus according to the first embodiment, and FIG. 6B is a cross-sectional view of wiring layers that constitute the light shielding structure;
  • FIG. 7A is a plan view showing the structure of a light shielding structure of a solid-state image pickup apparatus according to a second embodiment
  • FIG. 7B is a cross-sectional view of wiring layers that constitute the light shielding structure
  • FIG. 8A is a plan view showing the structure of a light shielding structure of a solid-state image pickup apparatus according to a third embodiment
  • FIG. 8B is a cross-sectional view of wiring layers that constitute the light shielding structure
  • FIG. 9A is a plan view showing the structure of a light shielding structure of a solid-state image pickup apparatus according to a fourth embodiment
  • FIG. 9B is a cross-sectional view of wiring layers that constitute the light shielding structure
  • FIG. 10 is a diagram showing the structure of an electronic apparatus.
  • a horizontal overflow structure is formed as a countermeasure against blooming.
  • charges are caused to escape from below a transfer gate through a floating diffusion. Therefore, in the back surface irradiation type CMOS solid-state image pickup apparatus, due to an influence of the horizontal overflow structure, the potential at the transfer gate is likely to vary.
  • the change in saturation signal amount (Qs) or an increase in variation in the saturation signal amount between the photodiodes may be caused, for example.
  • the solid-state image pickup apparatus as a method for downsizing a plurality of chips and a plurality of functions, such an effort that the plurality of chips are bonded to each other to make a high-speed transfer possible is started.
  • a photoelectric conversion element unit and a peripheral circuit unit are formed so as to be very close to each other, so a problem inherent in an image sensor is caused.
  • a photoelectric conversion element uses fine carriers (electrons) as signals, so an influence of heat or an electromagnetic field from a circuit therearound tends to be mixed therein as a noise.
  • minute hot carrier light emission which is negligible in a normal circuit operation of a transistor or a diode, significantly affects the characteristics of the image sensor.
  • the hot carrier light emission is caused by generating and recoupling holes and electrons that are generated at a time when carriers accelerated between a source and a drain are subjected to collisional ionization at a drain corner or by causing a state transition of either one.
  • the light is generated minutely but steadily even in a transistor having no problem in characteristics.
  • the light is diffused in all directions, so an influence thereof becomes smaller at a distance.
  • the photoelectric conversion element and a circuit are disposed very closely, the light is not diffused very much, and photons are considerably implanted into the photoelectric conversion element.
  • the light shielding structure is formed by additionally providing a light shielding film
  • the light shielding film is made of a material such as W, Cu, Ti, TiN, and C.
  • An absorption film may be formed by using a material that absorbs light instead of the light shielding film.
  • a wiring structure is provided which is capable of achieving the equalization of the coupling capacitance and the light shielding structure without additionally providing a new structure for light shielding.
  • FIG. 1 is the schematic structure of a MOS solid-state image pickup apparatus which is applied to a solid-state image pickup apparatus of this embodiment.
  • the MOS solid-state image pickup apparatus is applied to a solid-state image pickup apparatus of each embodiment.
  • a solid-state image pickup apparatus 1 in this embodiment includes a semiconductor substrate (not shown), a pixel region (so-called pixel array) 3 in which pixels 2 including a plurality of photoelectric conversion units are arranged in a regular two-dimensional array pattern on the semiconductor substrate (not shown), for example, on a silicon substrate, and a peripheral circuit unit.
  • the pixel 2 includes a photodiode serving as the photoelectric conversion unit and a plurality of pixel transistors (so-called MOS transistors), for example.
  • the plurality of pixel transistors can be constituted of three transistors of a transfer transistor, a reset transistor, and an amplification transistor, for example. Further, a selection transistor can be added thereto, and thus the four transistors can constitute the pixel transistors.
  • An equivalent circuit of a unit pixel is the same as a normal case, so a detailed description thereof will be omitted.
  • the pixel 2 can be formed as one unit pixel. Further, the pixel 2 can also be a pixel sharing structure.
  • the pixel sharing structure is the structure in which the plurality of photodiodes share transistors excluding the transfer transistor and the floating diffusion that forms the transfer transistor.
  • the peripheral circuit unit includes a vertical drive circuit 4 , column signal processing circuits 5 , a horizontal drive circuit 6 , an output circuit 7 , a control circuit 8 , and the like.
  • the control circuit 8 receives data for giving an instruction of an operation mode or the like and an input clock and outputs data such as internal information of the solid-state image pickup apparatus. That is, in the control circuit 8 , on the basis of a vertical synchronization signal, a horizontal synchronization signal, and a master clock, a clock signal and a control signal as a reference of an operation of the vertical drive circuit 4 , the column signal processing circuits 5 , and the horizontal drive circuit 6 , and the like is generated. The signals are input to the vertical drive circuit 4 , the column signal processing circuits 5 , and the horizontal drive circuit 6 , and the like.
  • the vertical drive circuit 4 is formed of a shift register, for example, and selects a pixel drive wiring, supplies pulses for driving pixels to the pixel drive wiring selected, and drives pixels in the unit of a row.
  • the vertical drive circuit 4 performs selection scanning for the pixels 2 in the pixel area 3 in the unit of a row sequentially in a vertical direction, and supplies, to the column signal processing circuit 5 , a pixel signal based on a signal charge generated in accordance with a reception light quantity in the photodiode or the like as the photoelectric conversion unit of the pixels 2 through a vertical signal line 9 .
  • the column signal processing circuit 5 is provided for each of columns or the like of the pixels 2 and performs signal processing of a noise removal or the like for each pixel column with respect to a signal output from the pixels 2 of one column. That is, the column signal processing circuit 5 performs signal processing such as a CDS for removing a fixed pattern noise inherent in the pixels 2 , signal amplification, and an AD conversion. On an output stage of the column signal processing circuit 5 , a horizontal selection switch (not shown) is connected with a horizontal signal line 10 .
  • the horizontal drive circuit 6 is formed of a shift register or the like, sequentially outputs horizontal scanning pulses, thereby selecting the column signal processing circuits 5 in order, and causes each of the column signal processing circuits 5 to output a pixel signal to the horizontal signal line 10 .
  • the output circuit 7 performs signal processing for signals sequentially supplied from the column signal processing circuits 5 through the horizontal signal line 10 and outputs the signals. For example, only buffering may be performed, or a black level adjustment, a column variation correction, various digital signal processing, and the like may be performed.
  • An input and output terminal 12 is used to transmit and receive signals to and from outside.
  • FIGS. 2A and 2B are schematic structural diagrams each showing the structure of the MOS solid-state image pickup apparatus according to this embodiment.
  • a pixel region 23 is mounted on a first semiconductor chip unit 22 , and a control circuit 24 and a logic circuit 25 including a signal processing circuit are mounted on a semiconductor chip unit 26 .
  • the first semiconductor chip unit 22 and the second semiconductor chip unit 26 are electrically connected with each other, thereby forming the MOS solid-state image pickup apparatus 21 as one semiconductor chip.
  • the pixel region 23 and the control circuit 24 are mounted on the first semiconductor chip unit 22
  • the logic circuit 25 including the signal processing circuit for performing signal processing is mounted on the second semiconductor chip unit 26 .
  • the first semiconductor chip unit 21 and the second semiconductor chip unit 26 are electrically connected with each other, thereby forming the MOS solid-state image pickup apparatus 27 as one semiconductor chip.
  • the pixel region 23 and a control circuit unit which is suitable for control of the pixel region as a part of the control circuit are mounted on the first semiconductor chip unit 22 .
  • the logic circuit 25 and a control circuit unit which is suitable for control of the logic circuit as another part of the control circuit are mounted on the second semiconductor chip unit 26 .
  • the first semiconductor chip unit 22 and the second semiconductor chip unit 26 are electrically connected with each other, thereby forming the MOS solid-state image pickup apparatus 27 as one semiconductor chip.
  • the MOS solid-state image pickup apparatus in the above example has the structure in which semiconductor chips of different kinds are layered and has a characteristic thereof in the structure to be described later.
  • FIG. 3 shows the solid-state image pickup apparatus, in particular, the MOS solid-state image pickup apparatus according to the first embodiment.
  • the MOS solid-state image pickup apparatus according to this embodiment is a back surface irradiation type solid-state image pickup apparatus.
  • the structure shown in FIG. 2B is applied, but the structure shown in FIG. 2A or the structure in which the control circuit is mounted separately on the first and second semiconductor chip units can also be applied.
  • the structures can be applied in the same way.
  • the solid-state image pickup apparatus is formed by bonding a first semiconductor chip unit 31 and a second semiconductor chip unit 45 to each other.
  • a pixel array (hereinafter, referred to as pixel region 23 ) in which a photodiode PD serving as a photoelectric conversion unit and pixels constituted of a plurality of pixel transistors are two-dimensionally arranged and a control circuit 24 are formed.
  • the photodiode PD has an n-type semiconductor region 34 in a semiconductor well region 32 and a p-type semiconductor region 35 on the surface side of a substrate.
  • a gate electrode 36 is formed through a gate insulating film, and a source and drain region 33 that forms a pair with the gate electrode 36 forms pixel transistors Tr 1 and Tr 2 .
  • the two pixel transistors Tr 1 and Tr 2 are shown so as to be representative of the plurality of pixel transistors.
  • the pixel transistor Tr 1 adjacent to the photodiode PD corresponds to the transfer transistor, and the source and drain region thereof corresponds to the floating diffusion FD.
  • Unit pixels are isolated by an element isolation region 38 .
  • control circuit 24 is constituted of a plurality of MOS transistors formed in the semiconductor well region 32 .
  • the plurality of MOS transistors that constitute the control circuit 24 are represented by MOS transistors Tr 3 and Tr 4 .
  • the MOS transistors Tr 3 and Tr 4 are each formed by n-type source and drain region 33 and the gate electrode 36 formed through the gate insulating film.
  • a multilayer wiring layer 41 formed by arranging wirings 40 for a plurality of layers through an interlayer insulating film 39 .
  • the wiring 40 is formed of a copper wiring, for example.
  • the pixel transistor and the MOS transistor of the control circuit are connected to a necessary wiring 40 through a connected conductor 44 that penetrates a first insulating film 43 a and a second insulating film 43 b .
  • the first insulating film 43 a is formed of a silicon oxide film, for example, and the second insulating film 43 b is formed of a silicon nitride film, for example, that serves as an etching stopper.
  • an antireflection film 61 is formed on the back surface of the semiconductor well region 32 .
  • a waveguide 70 formed of a waveguide material film (for example, SiN film) 69 is formed on a region on the antireflection film 61 which corresponds to each of the photodiodes PD.
  • a light shielding film 63 that shields light with respect to a necessary area.
  • a color filter 73 and an on-chip micro lens 74 are formed through a flattening film 71 so as to correspond to each of the photodiodes PD.
  • a logic circuit 25 including a signal processing circuit for performing signal processing is formed on the semiconductor chip unit 45 .
  • the logic circuit 25 is formed by forming a plurality of MOS transistors in, for example, a p-type semiconductor well region 46 so as to be isolated by an element isolation region 50 .
  • the plurality of MOS transistors are represented by MOS transistors Tr 6 , Tr 7 , and Tr 8 .
  • the MOS transistors Tr 6 , Tr 7 , and Tr 8 each have a pair of n-type source and drain region 47 and a gate electrode 48 formed through the gate insulating film.
  • a multilayer wiring layer 55 is formed in which a wiring 53 in a plurality of layers and a wiring 57 having a barrier metal layer 58 are disposed through an interlayer insulating film 49 .
  • the MOS transistors Tr 6 , Tr 7 , and Tr 8 are each connected to the necessary wiring 53 through a connected conductor 54 that penetrates the first insulating film 43 a and the second insulating film 43 b.
  • the first semiconductor chip unit 31 and the second semiconductor chip unit 45 are bonded to each other with an adhesive layer 60 or the like so that the multilayer wiring layers 41 and 55 thereof face each other.
  • a stress correction film 59 for reducing a bonding stress is formed on a bonded surface of the multilayer wiring layer 55 on the side of the second semiconductor chip unit 45 .
  • the bonding can also be performed by plasma bonding.
  • first semiconductor chip unit 31 and the second semiconductor chip unit 45 are electrically connected through a connected conductor 68 . That is, a connection hole is formed which penetrates the semiconductor well region 32 of the first semiconductor chip unit 31 and reaches the necessary wiring 40 of the multilayer wiring layer 41 . Further, a connection hole is formed which penetrates the semiconductor well region 32 of the first semiconductor chip unit 31 and the multilayer wiring layer 41 and reaches the necessary wiring 53 of the multilayer wiring layer 55 .
  • the connected conductor 68 that are connected to those connection holes are buried, thereby electrically connecting the first semiconductor chip unit 31 and the second semiconductor chip unit 45 .
  • An insulating film 67 surrounds the connected conductor 68 therearound so that the connected conductor 68 is insulated from the semiconductor well region 32 .
  • the wirings 40 and 57 that are connected to the connected conductor 68 correspond to vertical signal lines.
  • the connected conductor 68 is connected to an electrode pad (not shown) or may be set as an electrode pad.
  • the connected conductor 68 is formed after the semiconductor chip unit 31 and the second semiconductor chip unit 45 are bonded to each other, and then the semiconductor well region 32 of the first semiconductor chip unit 31 is thinned. After that, a cap film 72 , the flattening film 71 , the color filter 73 , and the on-chip micro lens 74 are formed. In the semiconductor well region 32 , an insulating spacer layer 42 is formed around the connected conductor 68 .
  • a light shielding structure is formed by wiring in an area that covers the pixel region with no space and is between the photodiode PD of the pixel region 23 and the logic circuit 25 .
  • the wiring 40 is disposed so as to cover the pixel region with no space.
  • the wirings 40 are overlapped with each other to some extent, with the result that it is possible to prevent a light diffraction influence and suppress incident light from a lower portion.
  • transfer wirings disposed at equal intervals in the same layer and other wirings disposed in a different layer so as to be overlapped with the transfer wirings to a certain degree are combined.
  • the light shielding structure that shields light radiated at the time of an operation of an active element of the peripheral circuit unit only by the wiring layers without additionally providing a layer for light shielding.
  • the active element a MOS transistor, a protection diode, or the like is used.
  • FIGS. 4A and 4B each show a structural example of the light shielding structure by the wiring.
  • FIG. 4A is a diagram showing a cross-sectional view of the wiring layer
  • FIG. 4B is a diagram showing a plan view of the wiring layer.
  • At least two layers of a wiring 40 A and a wiring 40 B constitute the light shielding structure.
  • a lamination interval between the wiring 40 A on a lower layer and the wiring 40 B on an upper layer is set as a distance 81 .
  • a length by which the wiring 40 A on the lower layer and the wiring 40 B on the upper layer are overlapped with each other in a plane direction is set as an overlap amount 82 .
  • An interval between the wirings 40 A on the lower layer is set as an opening width 83 .
  • the overlap amount 82 is defined by the distance 81 and the opening width 83 between the wirings.
  • the hot carrier light is generated as a point light source, so it is necessary to shield light that is incident obliquely.
  • the overlap amount 82 is set to be larger than at least the distance 81 between the wirings, with the result that the light shielding performance for the hot carrier light in an oblique direction is increased.
  • the opening widths 83 of the wirings between the wirings 40 A formed in the same layer are set to be equal. Furthermore, the overlap amounts 82 are uniformly formed. With this structure, the positional relationship between the wirings 40 A and 40 B can be equalized, and therefore the coupling capacitance can be equalized.
  • FIG. 5 shows the structure of the pixel unit formed of a 4 pixel sharing unit, which is applied to this embodiment.
  • the 4 pixel sharing unit in which the photodiodes PD (PD 1 to PD 4 ) of four pixels are arranged is disposed in a two-dimensional array form, thereby forming the pixel unit.
  • the 4 pixel sharing unit has the structure in which one floating diffusion FD is shared by the four photodiodes PD (two in a horizontal direction and two in a vertical direction).
  • the unit includes four photodiodes PD 1 to PD 4 , transfer gate electrodes 75 to 78 for the photodiodes PD 1 to PD 4 , respectively, and the one floating diffusion FD.
  • the photodiodes PD 1 to PD 4 , the floating diffusion FD, and the transfer gate electrodes 75 to 78 constitute transfer transistors Tr 11 to Tr 14 , respectively.
  • the floating diffusion FD is disposed on a center portion surrounded by the four photodiodes PD 1 to PD 4 , and the transfer gate electrodes 75 to 78 are disposed on positions corresponding to corner portions of the photodiodes PD 1 to PD 4 on the side of the center portion, respectively.
  • a selection transistor Tr 23 and an amplification transistor Tr 22 are disposed above the 4 pixel sharing unit.
  • a reset transistor Tr 21 is disposed below the 4 pixel sharing unit.
  • the selection transistor Tr 23 includes a pair of source and drain regions 94 and 95 and a selection gate electrode 79 .
  • the amplification transistor Tr 22 includes a pair of source and drain regions 95 and 96 and an amplification gate electrode 80 .
  • the reset transistor includes a pair of source and drain regions 97 and 98 and a reset gate electrode 99 .
  • the gate electrodes are each formed of a polysilicon film.
  • the FD 1 is connected to the amplification gate electrode 80 of the amplification transistor Tr 23 and the source region of the reset transistor Tr 21 .
  • the light shielding structure described above is formed. It is desirable that the light shielding region by the wiring layer entirely covers the region in which the photodiodes PD are formed.
  • the region in which the photodiodes PD are formed is not entirely covered, it is possible to obtain the effect of the light shielding structure.
  • a square region including a short side of each of the photodiodes PD 2 to PD 4 as one side is subjected to the light shielding.
  • the light shielding structure is formed by wiring on the light shielding region 100 , it is possible to obtain a sufficient light shielding effect. In this way, in the case where the light shielding layer that partially covers the region of the photodiode PD is provided without entirely covering the region in which the photodiode PD is formed, it is also possible to obtain the effect of the light shielding structure.
  • the back surface irradiation type CMOS solid-state image pickup apparatus As shown in FIG. 3 , on the front surface side of the semiconductor substrate, a pixel transistor is formed, and the wiring layer in which wirings of the plurality of layers formed of metal layers are disposed through the interlayer insulating film is formed thereabove. On the back surface side of the semiconductor substrate, the color filter layer and the on-chip lens are formed, and light enters the back surface of the substrate. That is, the back surface irradiation type has the structure in which the wiring layers are formed on the opposite side to the light incident surface.
  • FIG. 6 shows the light shielding structure formed on the pixel unit according to the first embodiment.
  • FIG. 6A is a plan view showing the structure of various wirings formed on the 4 pixel sharing unit.
  • FIG. 6B is a cross-sectional view of the wiring structure shown in FIG. 6A taken along the line A-A.
  • the pixel unit of the 4 pixel sharing unit shown in FIG. 6A has the same structure as that shown in FIG. 5 .
  • the same parts are denoted by the same reference symbols, and a detailed description thereof will be omitted.
  • the wirings that form the light shielding structure on the pixel unit includes a transfer wiring and other wirings arranged in parallel to the transfer wiring.
  • a pulse wiring and a dummy wiring are used as the wirings disposed in parallel to the transfer wiring.
  • the wirings other than the transfer wiring are not particularly limited, and various wirings provided in the CMOS solid-state image pickup apparatus, dummy wirings, or the like can be used as appropriate.
  • transfer wirings 84 to 87 which are extended in a horizontal direction when viewed from above and arranged in a vertical direction in parallel to each other are arranged at necessary intervals. For example, out of the four transfer wirings 84 to 87 , at least one transfer wiring is disposed across the photodiode PD. In this example, transfer wirings 84 and 87 are formed across the vicinity of the center of the photodiodes PD.
  • the transfer wirings 84 to 87 are connected to the transfer gate electrodes 75 to 78 of the transfer transistors Tr 11 to Tr 14 of the 4 pixel sharing unit. At this time, it is desirable that the four transfer wirings 84 to 87 have the same wiring width and the same wiring interval.
  • pulse wirings 88 to 91 are provided so as to be adjacent to the four transfer wirings 84 to 87 .
  • the pulse wirings 88 and 89 and the pulse wirings 90 and 91 are provided, respectively.
  • the pulse wirings 88 to 91 are arranged so as to be in parallel to the transfer wirings 84 to 87 . It is desirable that the pulse wirings 88 to 91 and the transfer wirings 84 to 87 have the same wiring width and the same wiring interval.
  • the wirings including the transfer wirings 84 and 87 and the pulse wirings 88 to 91 are formed in the same wiring layer.
  • dummy wirings 92 are formed in a wiring layer different from the wiring layer in which the transfer wirings 84 and 87 and the pulse wirings 88 to 91 are formed. As shown in FIGS. 6A and 6B , the dummy wirings 92 are disposed so as to be overlapped with the transfer wirings 84 to 87 and the pulse wirings 88 to 91 .
  • the dummy wirings 92 may be electrically floated or may be fixed to a power source voltage and a ground.
  • the transfer wirings 84 to 87 and the pulse wirings 88 to 91 are provided in a lower wiring layer, and the dummy wirings 92 are provided in an upper wiring layer.
  • the transfer wirings 84 to 87 and the pulse wirings 88 to 91 in the lower layer and the dummy wirings 92 in the upper layer have the overlap amount 82 larger than the distance 81 between the wirings of the wiring layer.
  • the opening widths 83 of the transfer wirings 84 to 87 and the pulse wirings 88 to 91 are formed to be uniform. Furthermore, the opening widths 83 of the dummy wirings 92 are formed to have a certain length.
  • the transfer wirings 84 to 87 , the pulse wirings 88 to 91 , and the dummy wirings 92 are disposed as described above, with the result that a light shielding structure is formed between the photodiodes PD and the active elements such as a logic circuit disposed to be close to the photodiodes PD. Therefore, it is possible to shield hot carrier light generated in the MOS transistor of the logic circuit or the like by the wiring layer that forms the light shielding structure. In addition, it is also possible to shield light generated when a diode for protection is operated by the wiring layer that forms the light shielding structure. Thus, it is possible to prevent the hot carrier light from entering the photodiodes PD of the pixel unit.
  • the transfer wirings 84 to 87 and pulse wirings 88 to 91 and the dummy wirings 92 have the overlap amounts 82 larger than the distances 81 between the wirings, with the result that it is possible to shield diagonally incident hot carrier light due to the influence of the diffraction of light. Therefore, it is possible to provide the light shielding structure capable of further suppressing the hot carrier light that enters the photodiodes PD.
  • the transfer wirings 84 to 87 and pulse wirings 88 to 91 and the dummy wirings 92 have the opening widths 83 which are uniform, with the result that it is possible to set positional relationship between the wirings to be the same. Therefore, it is possible to equalize the coupling capacitance between the wirings and equalize the potential variation of the transfer gates.
  • the potential variation of the transfer wirings becomes the same for each transfer gate, which can suppress the variation of the saturation signal amounts of the pixels.
  • FIGS. 7A and 7B each show a wiring structure that forms the light shielding structure, which is provided on a pixel unit in which a pixel sharing unit is formed.
  • FIG. 7A is a plan view showing the structure of various wirings formed on the 4 pixel sharing unit shown in FIG. 5 .
  • FIG. 7B is a cross-sectional view of the wiring structure taken along the line A-A of FIG. 7A .
  • the transfer wirings 84 to 87 and the pulse wirings 88 to 91 are disposed as in the first embodiment. Above a wiring layer in which the transfer wirings 84 to 87 and the pulse wirings 88 to 91 are formed, a wiring layer in which the dummy wiring 92 is formed is provided.
  • the dummy wiring 92 covers the photodiodes PD of the 4 pixel sharing unit so as to cover the transfer wirings 84 to 87 and the pulse wirings 88 to 91 . It is desirable that a region where the dummy wiring 92 is formed is equal to or larger than the light shielding region shown in FIG. 5 . In particular, it is desirable to form the dummy wiring 92 on the entire surface of the pixel unit.
  • the dummy wiring 92 may be electrically floated or may be fixed to a power source voltage or a ground.
  • the transfer wirings 84 to 87 and the pulse wirings 88 to 91 have the uniform opening widths 83 between the wirings shown in FIGS. 4A and 4B .
  • the dummy wiring 92 entirely covers the transfer wirings 84 to 87 and the pulse wirings 88 to 91 , so the overlap amount 82 is uniform for each wiring.
  • the widths of the transfer wirings 84 to 87 and the pulse wirings 88 to 91 are set to be larger than the distance 81 between the wirings, thereby setting the overlap amount 82 to be larger than the distance 81 between the wirings.
  • the transfer wirings 84 to 87 , the pulse wirings 88 to 91 , and the dummy wiring 92 are disposed as described above, with the result that it is possible to set positional relationship between wirings to be the same. Therefore, it is possible to equalize the coupling capacitance between the wirings and equalize the potential variations of the transfer gates. Accordingly, the same influence of the potential variations of the transfer wirings is provided, which can suppress the variation of the saturation signal amounts between the photodiodes.
  • the transfer wirings 84 to 87 , the pulse wirings 88 to 91 , and the dummy wiring 92 are formed, with the result that the light shielding structure having the overlap amount 82 larger than the distance 81 between the wirings on the pixel unit.
  • the structure is particularly effective for the prevention of diagonally incident hot carrier light due to the influence of the diffraction of light.
  • the structure of a solid-state image pickup apparatus according to a third embodiment will be described.
  • the third embodiment it is also possible to apply the solid-state image pickup apparatus as in the first embodiment except the structure of wirings that form a light shielding structure. Therefore, in the following, the structure of the wirings that form the light shielding structure will be described.
  • FIGS. 8A and 8B each show a wiring structure that forms the light shielding structure, which is provided on the pixel unit in which the pixel sharing unit is formed.
  • FIG. 8A is a plan view showing the structure of various wirings formed on the 4 pixel sharing unit shown in FIG. 5 mentioned above.
  • FIG. 8B is a cross-sectional view of the wiring structure taken along the line A-A of FIG. 8A .
  • the transfer wirings 84 to 87 and the pulse wirings 88 to 91 are disposed in the same way as the first embodiment.
  • a wiring layer in which the transfer wirings 84 to 87 and the pulse wirings 88 to 91 are formed is provided above the wiring layer in which the transfer wirings 84 to 87 and the pulse wirings 88 to 91 are formed.
  • the light shielding structure by the wirings according to the third embodiment is an example in which an opening portion is formed on a part of the light shielding structure. Therefore, the structure shown in FIGS. 8A and 8B has the opening portion on the pixel unit and outside the light shielding region of the photodiodes PD in addition to the light shielding structure according to the second embodiment.
  • the opening portion may be formed on the pixel unit.
  • the dummy wiring 92 covers the photodiodes PD of the 4 pixel sharing unit so as to cover the transfer wirings 84 to 87 and the pulse wirings 88 to 91 . It is desirable that a region in which the dummy wiring 92 is formed is equal to or larger than the light shielding region shown in FIG. 5 . In particular, it is desirable to form the dummy wiring 92 over the entire pixel unit.
  • the dummy wiring 92 may be electrically floated or may be fixed to a power source voltage and a ground.
  • an opening portion 101 from which a part of the wiring is removed is formed.
  • a region where an upper wiring layer and a lower wiring layer do not have an overlap corresponds to the opening portion 101 . That is, in the example of the third embodiment, a region where the transfer wirings 84 to 87 and the pulse wirings 88 to 91 that are formed in the lower wiring layer and the dummy wiring 92 is not formed in the upper wiring layer corresponds to the opening portion 101 of the light shielding structure by the wirings.
  • the opening portion 101 It is desirable to form the opening portion 101 on a position excluding the photodiodes PD of the pixel unit in order to shield the hot carrier light generated in the MOS transistor disposed nearby. But, if an opening that does not affect an obtaining image of the solid-state image pickup apparatus, for example, such an opening that only hot carrier light of a detection limit or less is incident on the photodiodes PD is formed, the opening portion 101 may be provided on the photodiodes PD.
  • a square region that has at least a side corresponding to a short side of the photodiode PD is the light shielding region 100 .
  • a position where the opening portion 101 is formed and the number of opening portions 101 to be formed are not limited, as long as the center of the opening is not on the photodiode PD.
  • the transfer wirings 84 to 87 and the pulse wirings 88 to 91 have such positional relationship that the opening widths 83 between wirings shown in FIGS. 4A and 4B are uniform. As long as the disposition of the transfer wirings 84 to 87 and the pulse wirings 88 to 91 has uniformity, uniformity with the dummy wiring does not matter. In the region where the opening portion 101 is formed, the positional relationship between the transfer wirings and the dummy wiring does not keep the uniformity with other region, but the uniformity between the transfer wirings and the dummy wiring has almost no influence on the coupling capacitance and thus may be negligible.
  • the transfer wirings 84 to 87 and the pulse wirings 88 to 91 are disposed, thereby making it possible to set the positional relationship between the wirings to be the same. Therefore, it is possible to equalize the coupling capacitance between the wirings and equalize the potential variations of the transfer gates. Therefore, influences of the potential variations of the transfer wirings become the same for each transfer gate, so it is possible to suppress a variation of the saturation signal amount between the photodiodes.
  • the dummy wiring 92 that covers the transfer wirings 84 to 87 and the pulse wirings 88 to 91 is formed, thereby forming the light shielding structure having the overlap amount 82 larger than the distance 81 between the wirings on the pixel unit.
  • the structure is particularly effective for the prevention of diagonally incident hot carrier light due to the influence of the diffraction of light.
  • a solid-state image pickup apparatus According to a fourth embodiment, it is also possible to apply the solid-state image pickup apparatus as in the first embodiment except the structure of wirings that form a light shielding structure. Therefore, in the following, the structure of the wirings that form the light shielding structure will be described.
  • FIGS. 9A and 9B each show a wiring structure that forms the light shielding structure, which is provided on the pixel unit in which the pixel sharing unit is formed.
  • FIG. 9A is a plan view showing the structure of various wirings formed on the 4 pixel sharing unit shown in FIG. 5 mentioned above.
  • FIG. 9B is a cross-sectional view of the wiring structure taken along the line A-A of FIG. 9A .
  • the transfer wirings 84 to 87 and the dummy wirings 92 are formed. Further, in an upper wiring layer, the pulse wirings 88 to 91 and dummy wirings 93 are formed.
  • the transfer wirings 84 to 87 and the dummy wirings 92 that are extended in a horizontal direction when viewed from above and arranged in a vertical direction in parallel to each other are disposed alternately at desired intervals.
  • the pulse wirings 88 to 91 and the dummy wirings 93 that are extended in the horizontal direction when viewed from above and arranged in the vertical direction in parallel to each other are disposed alternately at desired intervals.
  • the transfer wirings 84 to 87 and dummy wirings 93 and the transfer wirings 84 to 87 and pulse wirings 88 to 91 respectively have the overlap amounts 82 larger than the distance 81 between the wirings of the wiring layers like the wirings 40 A and 40 B shown in FIG. 4 .
  • the dummy wirings 92 and pulse wirings 88 to 91 and the dummy wirings 92 and dummy wirings 93 respectively have the overlap amounts 82 larger than the distance 81 between the wirings of the wiring layers like the wirings 40 A and 40 B shown in FIG. 4 .
  • the overlap amounts 82 of the wirings are each set to be a certain length.
  • the opening widths 83 between the transfer wirings 84 to 87 and the dummy wirings 92 and the opening widths 83 between the pulse wirings 88 to 91 and the dummy wirings 93 are each set to be a certain length. Furthermore, the intervals between the transfer wirings 84 to 87 in the lower layer and the pulse wirings 88 to 91 in the upper layer are set to be constant.
  • the transfer wirings 84 to 87 , the pulse wirings 88 to 91 , and the dummy wirings 92 and 93 as described above, it is possible to set the positional relationship between wirings to be the same. Therefore, it is possible to equalize the coupling capacitance between the wirings and equalize the potential variations of the transfer gates. As a result, the influence of the potential variations of the transfer wirings become the same for each transfer gate, which can suppress a variation of the saturation signal amount between the photodiodes.
  • the transfer wirings 84 to 87 , the pulse wirings 88 to 91 , and the dummy wirings 92 and 93 the light shielding structure having the overlap amount 82 larger than the distance 81 of the wirings on the pixel unit.
  • the structure is particularly effective for the prevention of diagonally incident hot carrier light due to the influence of the diffraction of light.
  • the transfer wirings 84 to 87 and the pulse wirings 88 to 91 may be formed in different wiring layers.
  • the light shielding structure in which the transfer wirings 84 to 87 and the pulse wirings 88 to 91 are overlapped with each other may be formed.
  • the dummy wirings may be formed in both the wiring layers.
  • the light shielding structure by the wirings in addition to the light shielding structure with the overlaps of the transfer wirings 84 to 87 , the pulse wirings 88 to 91 with the dummy wirings 92 as in the first to third embodiments.
  • the solid-state image pickup apparatus is applicable to a camera system such as a digital camera and a video camera, a cellular phone having an image pickup function, or an electronic apparatus such as another apparatus equipped with an image pickup function.
  • a camera system such as a digital camera and a video camera
  • a cellular phone having an image pickup function or an electronic apparatus such as another apparatus equipped with an image pickup function.
  • FIG. 10 as an example of an electronic apparatus, a schematic structure in the case where the solid-state image pickup apparatus is applied to a camera capable of taking a still image or a moving image will be shown.
  • a camera 110 in this example is provided with a solid-state image pickup apparatus 111 , an optical system 112 that guides incident light to a light receiving sensor unit of the solid-state image pickup apparatus 111 , a shutter apparatus 113 provided between the solid-state image pickup apparatus 111 and the optical system 112 , and a drive circuit 114 that drives the solid-state image pickup apparatus 111 . Further, the camera 110 is provided with a signal processing circuit 115 that processes an output signal of the solid-state image pickup apparatus 111 .
  • the optical system (optical lens) 112 forms image light (incident light) from a subject on an image pickup surface (not shown) of the solid-state image pickup apparatus 111 .
  • image light incident light
  • the optical system 112 may be constituted of an optical lens group including a plurality of optical lenses.
  • the shutter apparatus 113 controls a light irradiation time period and a light shielding time period of incident light with respect to the solid-state image pickup apparatus 111 .
  • the drive circuit 114 supplies a drive signal to the solid-state image pickup apparatus 111 and the shutter apparatus 113 . Then, the drive circuit 114 controls a signal output operation of the solid-state image pickup apparatus 111 to the signal processing circuit 115 and a shutter operation of the shutter apparatus 113 with the drive signal supplied. That is, in this example, with the drive signal (timing signal) supplied from the drive circuit 114 , a signal transfer operation from the solid-state image pickup apparatus 111 to the signal processing circuit 115 is performed.
  • the signal processing circuit 115 performs various signal processes for a signal transferred from the solid-state image pickup apparatus 111 .
  • the signal (image signal) that is subjected to the various signal processes is stored in a storage medium (not shown) such as a memory or output to a monitor (not shown).
  • the electronic apparatus such as the camera 110
  • the solid-state image pickup apparatus 111 it is possible to suppress a variation of a saturation signal amount along with the miniaturization of a pixel size.
  • the number of wiring layers used for the light shielding structure may be three or more.
  • the wiring width and the wiring interval are set to be uniform between thee transfer wirings and the other wirings that constitute the light shielding structure, it is also possible to equalize the coupling capacitance.
  • the pixel region and the control circuit and logic circuit are separately manufactured on the substrates, and the substrates of those are bonded are described.
  • the pixel region, the control circuit, and logic circuit may be formed in the same substrate.
  • the pixel region, the control circuit, and the logic circuit may not be provided in a vertical direction and may be provided in the same plane. The present disclosure can be applied to the case where the pixel region, the control circuit, and the logic circuit are disposed close to each other.
  • a solid-state image pickup apparatus including:
  • a pixel region in which a plurality of pixels each including a photoelectric conversion element are arranged
  • the photoelectric conversion element is provided on a first surface of a substrate, and the wiring layer is provided on a second surface of the substrate.
  • the second substrate includes a peripheral circuit unit
  • the light shielding structure is formed between the pixel region and the peripheral circuit unit.
  • an active element configured to perform signal processing and provided close to the photoelectric conversion element.
  • the active element includes at least one of a field-effect transistor and a diode.
  • the different wirings include a pulse wiring and a dummy wiring.
  • An electronic apparatus including:
  • a signal processing circuit configured to process an output signal of the solid-state image pickup apparatus.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130068932A1 (en) * 2010-06-01 2013-03-21 Boly Media Communications (Shenzen) Co., Ltd. Photosensitive devices and methods and circuits for reading the same
US20150076646A1 (en) * 2013-09-13 2015-03-19 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method thereof
US20170053962A1 (en) * 2015-08-21 2017-02-23 Samsung Electronics Co., Ltd. Shared pixel and an image sensor including the same
US20170310859A1 (en) * 2016-04-25 2017-10-26 SK Hynix Inc. Image sensor having outer and inner address markers
US20180098007A1 (en) * 2015-04-07 2018-04-05 Sony Corporation Solid-state imaging device and electronic device
US20180249064A1 (en) * 2014-06-23 2018-08-30 Samsung Electronics Co., Ltd. Auto-focus image sensor and digital image processing device including the same
JPWO2021161855A1 (enrdf_load_stackoverflow) * 2020-02-12 2021-08-19
US11743603B2 (en) * 2017-01-23 2023-08-29 Sony Semiconductor Solutions Corporation Solid-state imaging device and information processing method of solid-state imaging device
US20230290749A1 (en) * 2019-08-06 2023-09-14 Taiwan Semiconductor Manufacturing Company, Ltd. Isolation structure for bond pad structure
US20230345147A1 (en) * 2022-04-25 2023-10-26 Sony Semiconductor Solutions Corporation Image sensing device with event based vision sensor pixels and imaging pixels

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5029624B2 (ja) * 2009-01-15 2012-09-19 ソニー株式会社 固体撮像装置及び電子機器
US10665623B2 (en) * 2015-02-27 2020-05-26 Sony Corporation Semiconductor device, solid-state image pickup element, imaging device, and electronic apparatus
JP6703784B2 (ja) * 2015-12-07 2020-06-03 キヤノン株式会社 撮像装置およびその制御方法ならびに撮像素子
US10297631B2 (en) * 2016-01-29 2019-05-21 Taiwan Semiconductor Manufacturing Co., Ltd. Metal block and bond pad structure
WO2017187738A1 (ja) * 2016-04-25 2017-11-02 オリンパス株式会社 撮像素子、内視鏡および内視鏡システム
JP6910814B2 (ja) * 2017-02-22 2021-07-28 ソニーセミコンダクタソリューションズ株式会社 固体撮像装置および電子機器
JP6912922B2 (ja) 2017-04-12 2021-08-04 ソニーセミコンダクタソリューションズ株式会社 固体撮像素子
CN111295762B (zh) * 2017-11-07 2024-10-22 索尼半导体解决方案公司 固态摄像元件、制造方法和电子设备
JP2020120071A (ja) * 2019-01-28 2020-08-06 ソニーセミコンダクタソリューションズ株式会社 固体撮像装置及び電子機器
CN110364544A (zh) * 2019-07-24 2019-10-22 武汉新芯集成电路制造有限公司 一种晶圆结构及其制造方法、芯片结构
EP4068361A4 (en) * 2019-11-29 2022-12-28 Sony Semiconductor Solutions Corporation IMAGING DEVICE AND ELECTRONIC INSTRUMENT
CN113497905B (zh) * 2020-04-01 2024-03-12 佳能株式会社 光电转换设备、成像系统和移动物体
JP2022163433A (ja) * 2021-04-14 2022-10-26 株式会社ニコン 撮像素子及び撮像装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090295979A1 (en) * 2008-05-29 2009-12-03 Kabushiki Kaisha Toshiba Solid-state image pickup apparatus and camera module
US20100225776A1 (en) * 2009-03-05 2010-09-09 Sony Corporation Solid-state imaging device, fabrication method for the same, and electronic apparatus

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3759435B2 (ja) 2001-07-11 2006-03-22 ソニー株式会社 Ｘ−ｙアドレス型固体撮像素子
JP2004356537A (ja) * 2003-05-30 2004-12-16 Canon Inc 半導体装置及びその製造方法
JP2005150140A (ja) * 2003-11-11 2005-06-09 Sony Corp 半導体撮像装置
JP4752447B2 (ja) 2005-10-21 2011-08-17 ソニー株式会社 固体撮像装置およびカメラ
JP5132102B2 (ja) * 2006-08-01 2013-01-30 キヤノン株式会社 光電変換装置および光電変換装置を用いた撮像システム
JP2008108917A (ja) * 2006-10-25 2008-05-08 Sony Corp 固体撮像装置及び電子機器
JP5104036B2 (ja) 2007-05-24 2012-12-19 ソニー株式会社 固体撮像素子とその製造方法及び撮像装置
JP5292787B2 (ja) 2007-11-30 2013-09-18 ソニー株式会社 固体撮像装置及びカメラ
JP5493316B2 (ja) * 2008-01-17 2014-05-14 ソニー株式会社 固体撮像装置およびその製造方法
JP4835710B2 (ja) * 2009-03-17 2011-12-14 ソニー株式会社 固体撮像装置、固体撮像装置の製造方法、固体撮像装置の駆動方法、及び電子機器
JP5985136B2 (ja) * 2009-03-19 2016-09-06 ソニー株式会社 半導体装置とその製造方法、及び電子機器
JP2011114324A (ja) * 2009-11-30 2011-06-09 Sony Corp 固体撮像装置及び電子機器
TWI420662B (zh) * 2009-12-25 2013-12-21 Sony Corp 半導體元件及其製造方法，及電子裝置
JP5853351B2 (ja) * 2010-03-25 2016-02-09 ソニー株式会社 半導体装置、半導体装置の製造方法、及び電子機器
KR101769969B1 (ko) * 2010-06-14 2017-08-21 삼성전자주식회사 광 블랙 영역 및 활성 화소 영역 사이의 차광 패턴을 갖는 이미지 센서
JP2012064709A (ja) * 2010-09-15 2012-03-29 Sony Corp 固体撮像装置及び電子機器
WO2012144196A1 (ja) * 2011-04-22 2012-10-26 パナソニック株式会社 固体撮像装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090295979A1 (en) * 2008-05-29 2009-12-03 Kabushiki Kaisha Toshiba Solid-state image pickup apparatus and camera module
US20100225776A1 (en) * 2009-03-05 2010-09-09 Sony Corporation Solid-state imaging device, fabrication method for the same, and electronic apparatus

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130068932A1 (en) * 2010-06-01 2013-03-21 Boly Media Communications (Shenzen) Co., Ltd. Photosensitive devices and methods and circuits for reading the same
US20150076646A1 (en) * 2013-09-13 2015-03-19 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method thereof
US9337225B2 (en) * 2013-09-13 2016-05-10 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method thereof
US11375100B2 (en) 2014-06-23 2022-06-28 Samsung Electronics Co., Ltd. Auto-focus image sensor and digital image processing device including the same
US20190215442A1 (en) * 2014-06-23 2019-07-11 Samsung Electronics Co., Ltd. Auto-focus image sensor and digital image processing device including the same
US10979621B2 (en) * 2014-06-23 2021-04-13 Samsung Electronics Co., Ltd. Auto-focus image sensor and digital image processing device including the same
US20180249064A1 (en) * 2014-06-23 2018-08-30 Samsung Electronics Co., Ltd. Auto-focus image sensor and digital image processing device including the same
US10382666B2 (en) * 2014-06-23 2019-08-13 Samsung Electronics Co., Ltd. Auto-focus image sensor and digital image processing device including the same
US20180098007A1 (en) * 2015-04-07 2018-04-05 Sony Corporation Solid-state imaging device and electronic device
US10225497B2 (en) * 2015-04-07 2019-03-05 Sony Corporation Solid-state imaging device and electronic device with symmetrical transistor groups
US10084005B2 (en) * 2015-08-21 2018-09-25 Samsung Electronics Co., Ltd. Shared pixel and an image sensor including the same
US20170053962A1 (en) * 2015-08-21 2017-02-23 Samsung Electronics Co., Ltd. Shared pixel and an image sensor including the same
US10356293B2 (en) * 2016-04-25 2019-07-16 SK Hynix Inc. Image sensor having outer and inner address markers
US20170310859A1 (en) * 2016-04-25 2017-10-26 SK Hynix Inc. Image sensor having outer and inner address markers
CN107305900A (zh) * 2016-04-25 2017-10-31 爱思开海力士有限公司 具有外部和内部地址标记的图像传感器
US11743603B2 (en) * 2017-01-23 2023-08-29 Sony Semiconductor Solutions Corporation Solid-state imaging device and information processing method of solid-state imaging device
US20230290749A1 (en) * 2019-08-06 2023-09-14 Taiwan Semiconductor Manufacturing Company, Ltd. Isolation structure for bond pad structure
US12400984B2 (en) * 2019-08-06 2025-08-26 Taiwan Semiconductor Manufacturing Company, Ltd. Isolation structure for bond pad structure
JPWO2021161855A1 (enrdf_load_stackoverflow) * 2020-02-12 2021-08-19
CN114902420A (zh) * 2020-02-12 2022-08-12 索尼半导体解决方案公司 固态成像元件和成像系统
EP4105968A4 (en) * 2020-02-12 2023-08-02 Sony Semiconductor Solutions Corporation Solid-state imaging element and imaging system
US20230345147A1 (en) * 2022-04-25 2023-10-26 Sony Semiconductor Solutions Corporation Image sensing device with event based vision sensor pixels and imaging pixels
US11979675B2 (en) * 2022-04-25 2024-05-07 Sony Semiconductor Solutions Corporation Image sensing device with event based vision sensor pixels and imaging pixels

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US9806120B2 (en) 2017-10-31

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