US20100190416A1 - Device for polishing the edge of a semiconductor substrate - Google Patents

Device for polishing the edge of a semiconductor substrate Download PDF

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Publication number
US20100190416A1
US20100190416A1 US12/657,842 US65784210A US2010190416A1 US 20100190416 A1 US20100190416 A1 US 20100190416A1 US 65784210 A US65784210 A US 65784210A US 2010190416 A1 US2010190416 A1 US 2010190416A1
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Prior art keywords
substrate
polishing
pad
holder
polishing pad
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Abandoned
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US12/657,842
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English (en)
Inventor
Walter Schwarzenbach
Sebastien Kerdiles
Aziz Alami-Idrissi
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Soitec SA
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Soitec SA
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Assigned to S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES reassignment S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ALAMI-IDRISSI, AZIZ, KERDILES, SEBASTIEN, SCHWARZENBACH, WALTER
Publication of US20100190416A1 publication Critical patent/US20100190416A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B9/00—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor
    • B24B9/02—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground
    • B24B9/06—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain
    • B24B9/065—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain of thin, brittle parts, e.g. semiconductors, wafers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/27—Work carriers
    • B24B37/28—Work carriers for double side lapping of plane surfaces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02079—Cleaning for reclaiming
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Definitions

  • the present disclosure relates to, for example, a device for polishing the edge of a semiconductor substrate that has a protruding residual topography in a peripheral region of the substrate resulting from a layer transfer including an ion implantation step.
  • the present disclosure also relates to a polishing pad used in such a device and a method for reclaiming a surface of a semiconductor substrate that has a protruding residual topography.
  • the so-called Smart CutTM process illustrated in FIG. 1 provides high quality silicon on insulator (SOI) substrates.
  • SOI silicon on insulator
  • two substrates called a handle substrate 101 and a donor substrate 103 , usually a silicon wafer, undergo a certain number of process steps to transfer a layer with a given thickness of the donor substrate 103 onto the handle substrate 101 .
  • an oxide layer 105 is typically generated (e.g. by thermal oxidation or by deposition of an oxide) on the donor substrate 103 to later on form the buried oxide layer (B′OX) of the SOI structure, and an ion implantation step is applied to form a predetermined splitting area 107 defining the to-be-transferred layer.
  • B′OX buried oxide layer
  • the donor substrate 103 is attached to the handle substrate 101 , in particular via bonding, taking advantage of Van der Waal's forces, to obtain a source-handle compound 109 .
  • a detachment of a semiconductor layer 111 together with the buried oxide layer 113 occurs at the predetermined splitting area 107 so that the two layers are transferred onto the handle substrate 101 to obtain the desired silicon on insulator structure 115 .
  • the remaining part 117 of the donor substrate 103 can be recycled and again used in the Smart CutTM type process as a new donor or handle substrate.
  • the Smart CutTM type SOI fabrication process has a significant economic advantage due to the recycling process. Indeed, the process provides an optimized use of the raw material for instance silicon wafers.
  • the negative has a characteristic topography representing protruding residues 119 a and 119 b in an edge region, as illustrated in FIG. 1 , which corresponds to a region where no layer transfer occurred due to the shape of the edge of the initial wafers 103 and/or 101 .
  • the protruding regions 119 a and 119 b actually belong to one essentially ring-shaped residue seen in cross-section.
  • the surface of the negative 117 between the protruding residues 119 a and 119 b has a first inner region 121 at which detachment occurred to provide the transferred layer 111 on the handle substrate 101 and which has a rather rough surface, with roughness values close to 60-70 ⁇ RMS as measured by AFM, to be compared to 1-3 ⁇ for standard Silicon wafer.
  • the edge of the remainder 117 with the protruding residues 119 a and 119 b actually has a chamfered shape and furthermore comprises a step-like structure 123 seen from the internal region 121 comprising the remaining part of the buried oxide layer 125 and the non-transferred silicon 127 over the remaining part of the ion implanted predetermined splitting area 129 .
  • the edge 131 and the backside 133 of the negative 117 are, by the way, also covered by the oxide.
  • the step 123 of the negative 117 typically has a thickness of about 1.000-10.000 ⁇ of silicon and 100-10.000 ⁇ of silicon oxide and has a width w in the lateral direction of the order of 1-2 mm.
  • the protruding residual topography 119 a and 119 b needs to be removed prior to the reuse of the negative 117 as donor substrate 103 or handle substrate 101 .
  • Methods to do so are, for example, known from EP 1 156 531 A1 and U.S. Pat. No. 7,402,520 B2.
  • the following process is applied to get rid of the protruding residual topography:
  • the reclaiming process starts with a de-oxidation step to remove the oxide layer 125 on top of the protruding residual topography on the edge of the remainder 117 as well as on the side 131 and on its backside 133 .
  • the de-oxidation can, for example, be carried out using a HF acid bath, wherein the acid consumes the oxide layer 125 , 131 and 133 .
  • a first polishing step of the edge region of substrate 1 is carried out to at least partially remove the protruding silicon part 127 and implantation residue.
  • a double-sided polishing (DSP) step is carried out to improve the surface roughness in the interior region 121 but also to further remove the step 123 in the direction of the protruding residual topography 119 a and 119 b .
  • DSP double-sided polishing
  • about 10 ⁇ m (5 ⁇ m on each side of the substrate) of the substrate are removed.
  • CMP chemical mechanical polishing step
  • the disclosure includes an exemplary device for polishing the edge of a semiconductor substrate that has a protruding residual topography in a peripheral region of the substrate resulting from transfer process based on an ion implantation step, a bonding step and a detachment step, in particular according to a Smart-CutTM type process.
  • An embodiment of the device according to the invention includes, inter alia, a substrate holder for receiving the semiconductor substrate, and a polishing pad, wherein the polishing pad is arranged and configured such that its cross section in a plane perpendicular to the surface of the substrate holder is curved.
  • the curved cross section has the advantage that the protruding residual topography can be removed over its entire radial extent so that a double side polishing step, like used in the prior art, is no longer necessary.
  • This has the particular advantage that due to the use of the device according to the invention, a polishing process that consumes less material compared to the known process applying DSP can be carried out.
  • polishing using a curved pad has the further advantage that the cross section can be chosen such that the geometry of the substrate, in particular in the edge region, can be kept constant meaning that, in case the substrate is reused, the quality of the products achieved out of recycled substrate remains stable. As a consequence the reclaiming process can be carried out faster and at less cost.
  • the cross section of the polishing pad is curved in a plane perpendicular to the surface of the substrate holder, it is also curved with respect to the surface of the substrate positioned on the substrate holder.
  • the curved surface is arranged towards the substrate holder, thus facing a substrate when positioned on the substrate holder.
  • the plane perpendicular to the surface of the substrate holder is defined by the normal to the substrate holder and, thus, the normal of a substrate positioned on the substrate holder and the radial direction of said substrate positioned on the substrate holder.
  • the polishing pad can be attached to a pad holder which is arranged and configured such that its cross section in the plane perpendicular to the surface of the substrate holder is curved.
  • a pad holder which is arranged and configured such that its cross section in the plane perpendicular to the surface of the substrate holder is curved.
  • the cross section of the polishing pad and/or the pad holder can comprise a concave shaped part.
  • the polishing pad or the pad holder has a surface that is curved inward on the side facing the substrate holder.
  • the concave shape corresponds to the desired final shape of the semiconductor substrate, in particular to a final shape with an edge region without protruding topography and that keeps the original geometry of the substrate, thus with chamfered edge region.
  • This particular shape has the advantage that the protruding part, typically corresponding to a step-like corona at the peripheral edge of the substrate, can be completely removed in one step and even with only one translational movement in one direction (vertical or oblique), and which can be carried out by either the pad/the holder or the substrate holder, Thus, in only one step, which in addition is technically easy to realize, the unwanted protruding region can be removed while, at the same time, the original geometry of the substrate can be kept.
  • the concave shape can be achieved by a continuous curvature or a succession of straight lines.
  • the cross section of the polishing pad and/or the pad holder can have at least one convex shaped part.
  • the convex shape has the advantage that a local polishing can be carried out.
  • an additional edge polishing step can be applied, using for example an edge-polishing technique controlled horizontally (or radially) and polishing the outer part of the peripheral region and the side of the substrate. This way, the remaining implanted layer on the chamfered edge of the wafer, can be also removed.
  • the cross section of the polishing pad and/or the pad holder can have its concave shaped part positioned between two convex shaped parts.
  • the concave part of the polishing pad or pad holder has a shape corresponding to the desired final shape of the edge region of the substrate.
  • the convex part provides a smooth transition between the step like part of the protruding portion and the interior surface of the substrate where detachment occurred.
  • the relative movement between polishing pad/pad holder and substrate/substrate holder also only needs to be in one direction (vertical/oblique).
  • the cross section of the polishing pad and/or the pad holder can have at least one plane part positioned between convex and/or concave shaped parts.
  • Such a polishing pad/pad holder is easy to realize and allows an effective removal of the step part of the protruding topography, thus the part which is positioned above the surface at which detachment occurs.
  • the lateral extension of the plane part is adapted to the lateral width of the residue.
  • an additional edge polishing can be carried out to also polish the edge region of the substrate.
  • the lateral extension of the polishing pad and/or pad holder can be at least 1.5 mm, preferably at least 3 mm, notably in case of wafers with 300 mm diameter.
  • the lateral extension relates to the extension of the polishing pad/pad holder which comes into contact with the substrate to be polished in the radial direction of the substrate.
  • the entire edge region on the circumference of the substrate with protruding parts can be removed.
  • the polishing pad and/or the pad holder can be ring-shaped at least over a segment in the plane parallel to the surface of the substrate holder.
  • a large polishing interacting surface can be provided so that the polishing process can be carried out quickly.
  • a complete ring is in particular preferred with shapes of the polishing pad/pad holder which are such that a simple vertical translation between the pad holder and the substrate is sufficient to get rid of the protruding region.
  • the polishing pad and/or the pad holder can be formed by a plurality of segments.
  • the desired large polishing surface can be achieved in a simple manner.
  • the device can furthermore comprise a control unit configured to move the polishing pad and/or the pad holder perpendicular with respect to the surface of the substrate holder.
  • a control unit configured to move the polishing pad and/or the pad holder perpendicular with respect to the surface of the substrate holder.
  • control unit can also be configured to move the polishing pad and/or the pad holder in a plane parallel to the surface of the substrate holder.
  • the control unit can also be configured to move the polishing pad and/or the pad holder in a plane parallel to the surface of the substrate holder. In case of the concave or convex plane pad holder/polishing pad, still the entire edge region, thus the protruding part and the chamfered region, can be polished.
  • the invention also relates to a pad holder for use in a device according to the above-described features, wherein the surface is configured to receive a polishing pad having a curved surface.
  • the invention is also achieved with a method according to claim 14 , thus a method for reclaiming a surface of a semiconductor substrate that has a protruding residual topography in a peripheral region of the substrate resulting from an ion implantation and layer transfer process.
  • An exemplary method includes the steps of: polishing the surface using a device as described above. With this method, it thus becomes possible to reclaim a semiconductor substrate without having to carry out the double-sided polishing like in the prior art so that the substrate can be reused more often in a Smart CutTM type layer transferring process.
  • the method can be carried out such that more than the protruding parts of the topography are removed during polishing, in particular, the edge parts on the side of the substrate, in particular in the chamfered region.
  • the method can comprise a de-oxidation step to remove any oxide present on the protruding topography. This further facilitates the polishing process.
  • the method can further include an edge polishing step.
  • the edge polishing step can be used to remove undesired material on the edge/side of the substrate.
  • the described polishing method is essentially a mechanical polishing but can nevertheless also be carried out as a chemical mechanical polishing
  • FIG. 1 illustrates a Smart CutTM type transfer process leading to the remainder of a donor substrate comprising a protruding residual topography
  • FIG. 2 illustrates a first embodiment of a device for polishing the edge of a semiconductor substrate
  • FIG. 3 illustrates the cross sectional view of a first polishing pad according to the invention
  • FIG. 4 illustrates the cross sectional view of a second polishing pad according to the invention
  • FIG. 5 illustrates the cross sectional view of a third polishing pad according to the invention
  • FIG. 6 illustrates the cross sectional view of a fourth polishing pad according to the invention.
  • FIGS. 7 a and 7 b illustrate a top view of a polishing pad according to the invention.
  • FIG. 2 schematically illustrates a cross cut view of a device 1 for polishing the edge of a semiconductor substrate according to the invention.
  • the device 1 comprises a substrate holder 3 which is configured for receiving a semiconductor substrate 5 , which does not belong to the device 1 , and a pad holder 7 with a polishing pad 9 facing the semiconductor substrate 5 , attached to it.
  • the device 1 for polishing furthermore comprises a control unit 11 configured to allow a relative movement between the pad holder 7 and the substrate holder 3 . This relative movement is preferably in the vertical direction, like indicated in the figure, but according to variants could follow other directions as the one indicated in FIG. 2 .
  • the substrate 5 corresponds to the negative 117 illustrated in FIG. 1 .
  • the cross section of the pad holder 7 has a curved shape in the plane of the drawing.
  • the drawing plane is perpendicular to the surface 13 of the substrate holder 3 which receives the semiconductor substrate 5 .
  • the drawing plane is thus also a plane that is perpendicular to the surface 15 of substrate 5 where, as explained in the introductory part, detachment occurred.
  • the cross section illustrated in FIG. 2 furthermore corresponds to the plane which not only comprises the normal n of the substrate holder surface 13 and the surface 15 of substrate 5 , but also a radial direction r with respect to the centre of substrate 5 positioned on the substrate holder 3 .
  • the pad holder 7 is illustrated in combination with a distinct polishing pad 9 , nevertheless both elements could also be made out of one single work piece instead.
  • the polishing pad 9 /pad holder 7 and/or the substrate holder 3 actually are rotated about axis n, when the pad and substrate are in contact.
  • FIG. 3 illustrates a first embodiment of pad holder 7 and polishing pad 9 according to the invention. Here both elements are illustrated as one unit.
  • the cross sectional view illustrated in FIG. 3 is the same as the one illustrated in FIG. 2 .
  • the cross section of pad holder 7 /polishing pad 9 has a concave shaped part 21 facing the substrate 5 positioned on the substrate holder 3 .
  • the pad holder 7 /polishing pad 9 has its concave portion 21 extending over at least a width w 1 corresponding to the width w 2 of the edge portion of substrate 5 that carries the protruding residual topography 23 (see also FIG. 1 ).
  • the width w 2 is of the order of 1.5 mm so that w 1 is also of at least 1.5 mm.
  • the width w 1 is chosen to be at least 3 mm. In this case it becomes possible to remove also the protruding topography in the notch region of a semiconductor wafer.
  • the concave shape 21 of the pad holder 7 /polishing pad 9 is chosen such that it corresponds to the negative of the desired final shape for the edge region of substrate 5 .
  • the control unit 11 illustrated in FIG. 2 , is programmed such that at least the area in the edge region positioned above the predetermined splitting area defined by the ions implanted as described above in relation to FIG. 1 and illustrated with the dotted line 27 in FIG. 3 , is removed.
  • control unit 11 can be configured such that the polishing goes beyond the level of surface 15 so that a counter step is obtained. This counter step is illustrated by the dot dashed line 29 in FIG. 3 .
  • Arrows 31 and 33 illustrate two variants concerning the movement of the pad holder 7 /polishing pad 9 with respect to substrate 5 and substrate holder 3 and which is controlled by the control unit 11 .
  • a vertical movement 31 can be carried out to bring the polishing pad 9 /pad holder 7 in contact with respect to the surface of substrate 5 or, instead, an oblique movement 33 , but still only along one single direction, can be carried out.
  • the concave shape is achieved using a continuous curved shape. Instead the concave shape could also be achieved by a succession of straight lines.
  • a standard CMP polishing step is carried out to polish the entire surface of substrate 5 to prepare the semiconductor substrate for reuse.
  • FIG. 4 illustrates a second embodiment of the pad holder 7 ′/polishing pad 9 ′ according to the invention.
  • it has a curved surface facing the substrate 5 positioned on substrate holder 3 .
  • the surface of this embodiment has a convex shape 41 in this embodiment.
  • the portion in the edge region of substrate 5 which extends above the predetermined splitting area 27 or even beyond to achieve a counter step illustrated by the dot dashed line 29 can be removed by suitably programming control unit 11 so that no DSP polishing is necessary, like in the previous embodiment.
  • the pad holder 7 ′/polishing pad 9 ′ could also only be moved in one direction, as illustrated in the embodiment of FIG. 3 , along the direction of arrow 31 or arrow 33 .
  • the step 23 is removed, and an additional edge polishing process step is carried out to remove the unwanted material on the side 47 of substrate 5 .
  • FIG. 5 illustrates a third embodiment of the pad holder 7 ′′ and polishing pad 9 ′′.
  • the shape of the cross section facing the substrate 5 positioned on substrate holder 3 has a plane part 51 positioned between two convex parts 53 , 55 .
  • This shape is specially adapted to remove the step 23 in the edge region of substrate 5 , in particular when it is associated with a vertical movement along arrow 57 controlled by control unit 11 , which is illustrated in FIG. 2 .
  • This embodiment has the advantage that it is easy to realize. It can be associated with an additional edge polishing step to remove the unwanted parts positioned above the predetermined splitting area 27 on the side of substrate 5 .
  • FIG. 6 illustrates a fourth embodiment of a pad holder 7 ′′′ and polishing pad 9 ′′′ which combines a central concave portion 61 and two convex portions 63 , 65 and the side facing the surface 15 of the substrate 5 .
  • the desired final shape of substrate 5 can be achieved with one polishing step, in particular also on the side 25 of substrate 5 , so that an additional edge polishing step becomes obsolete.
  • the transition between the area with the step 23 and the area on the surface of substrate 5 without step 15 (where detachment occurred) is also smooth.
  • All embodiments of the invention have the advantage that the undesired protruding residual topography in the peripheral region of the substrate can be completely removed. As a consequence a double-sided polishing, like in the prior art, is no longer necessary.
  • the material removal during reclaiming of a substrate can be limited, typically to about 2000 to 12000 ⁇ so that the substrate can be recycled more often compared to a process with double sided polishing and at lower cost.
  • the recycling process according to the invention comprises a de-oxidation step, a protruding residual topography polishing step, like described above using the polishing device according to the invention, and eventually an edge polishing step, depending on the pad holder/polishing pad used.
  • the process is terminated by a conventional chemical mechanical polishing step to obtain the desired surface roughness necessary for the reuse of the substrate either as a donor or a handle substrate, like illustrated in FIG. 1 .
  • FIGS. 7 a and 7 b illustrate a top view of the device for polishing according to the invention illustrated in FIG. 2 .
  • FIG. 7 a shows an embodiment according to the invention in which the pad holder 7 has a ring-shape so that the interaction surface between the polishing pad 7 and the substrate 5 positioned on the substrate holder is maximal.
  • the geometries of the pad holder 7 , 7 ′′′/polishing pad 9 , 9 ′′′ according to the first and fourth embodiments can be used.
  • the control unit 11 provides a vertical movement to bring the pad holder/polishing pad in contact with the surface of the substrate 5 .
  • several segments distributed around the circumference of the substrate/substrate holder can be provided.

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US12/657,842 2009-01-29 2010-01-28 Device for polishing the edge of a semiconductor substrate Abandoned US20100190416A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP09290064.6 2009-01-29
EP09290064A EP2213415A1 (en) 2009-01-29 2009-01-29 Device for polishing the edge of a semiconductor substrate

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US (1) US20100190416A1 (zh)
EP (1) EP2213415A1 (zh)
JP (1) JP2010177664A (zh)
KR (1) KR20100088064A (zh)
CN (1) CN101791780A (zh)
SG (1) SG163468A1 (zh)
TW (1) TW201030829A (zh)

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US20110139757A1 (en) * 2010-01-08 2011-06-16 Millman Jr Ronald P Method and apparatus for processing substrate edges
US20130005222A1 (en) * 2011-06-28 2013-01-03 James William Brown Glass edge finishing method
US8658937B2 (en) 2010-01-08 2014-02-25 Uvtech Systems, Inc. Method and apparatus for processing substrate edges
US20140273400A1 (en) * 2011-10-17 2014-09-18 Shin-Etsu Handotai Co., Ltd. Reclaiming processing method for delaminated wafer
WO2015020082A1 (ja) * 2013-08-09 2015-02-12 株式会社 フジミインコーポレーテッド 研磨加工工具及び部材の加工方法
WO2015074480A1 (zh) * 2013-11-22 2015-05-28 上海新傲科技股份有限公司 边缘光滑的半导体衬底的制备方法
US20160064230A1 (en) * 2014-08-26 2016-03-03 Disco Corporation Wafer processing method
US20180033609A1 (en) * 2016-07-28 2018-02-01 QMAT, Inc. Removal of non-cleaved/non-transferred material from donor substrate
TWI694509B (zh) * 2015-06-05 2020-05-21 索泰克公司 雙層移轉之機械分離方法
CN111386600A (zh) * 2018-02-12 2020-07-07 索泰克公司 通过层转移来制造绝缘体上半导体型结构的方法

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CN102717324B (zh) * 2012-05-29 2016-05-11 深圳莱宝高科技股份有限公司 基板处理装置
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