US20090310723A1 - Automatic gain control circuit - Google Patents

Automatic gain control circuit Download PDF

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Publication number
US20090310723A1
US20090310723A1 US12/306,687 US30668707A US2009310723A1 US 20090310723 A1 US20090310723 A1 US 20090310723A1 US 30668707 A US30668707 A US 30668707A US 2009310723 A1 US2009310723 A1 US 2009310723A1
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Prior art keywords
gain
level
signal
received signal
control
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English (en)
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Kazuhisa Ishiguro
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Ricoh Co Ltd
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Ricoh Co Ltd
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Assigned to RICOH CO., LTD. reassignment RICOH CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NSC CO., LTD.
Publication of US20090310723A1 publication Critical patent/US20090310723A1/en
Assigned to RICOH CO., LTD., NSC CO., LTD. reassignment RICOH CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ISHIGURO, KAZUHISA
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3052—Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H04B1/109—Means associated with receiver for limiting or suppressing noise or interference by improving strong signal performance of the receiver when strong unwanted signals are present at the receiver input

Definitions

  • the present invention relates to an automatic gain control circuit, and more particularly to a circuit for carrying out an AGC operation to suppress a distortion of a signal when a strong signal is input to a wireless communicating apparatus such as a radio receiver.
  • a wireless communicating apparatus such as a radio receiver is usually provided with an AGC (Automatic Gain Control) circuit for adjusting a gain of a received signal.
  • An RF (Radio Frequency) AGC circuit adjusts a gain of a radio frequency signal (an RF signal) received by an antenna and maintains a level of the received signal to be constant.
  • the RF-AGC can be implemented by controlling a quantity of attenuation in an antenna damping circuit or a gain of an LNA (Low Noise Amplifier) or the like.
  • the RF-AGC circuit is not operated when an electric field strength of an antenna input signal is not greater than a threshold, and does not reduce the gain of the received signal. However, when a signal having a strong electric field is input to an antenna so that the electric field strength exceeds the threshold, the RF-AGC circuit is operated to reduce the gain of the received signal, thereby preventing an excessive power from being applied to the wireless communicating apparatus.
  • Patent Document 1 WO2005/053171 Publication
  • FIG. 1 is a diagram showing a structure of a conventional radio receiver which carries out AGC processings of an antenna damping circuit and an LNA by using a DSP.
  • an RF signal received through an antenna 101 is supplied to a frequency converting circuit 104 via an antenna damping circuit 102 and an LNA 103 .
  • the frequency converting circuit 104 the RF signal supplied from the LNA 103 and a local oscillating signal supplied from a local oscillating circuit which is not shown are mixed so that an IF signal is generated through a frequency conversion.
  • the IF signal output from the frequency converting circuit 104 is subjected to a band limitation in a BPF 105 and is thus changed into a narrowband IF signal including only one station of a desirable frequency.
  • the narrowband IF signal output from the BPF 105 is amplified by an IF amplifier 106 and is then subjected to an analog/digital conversion through a first A/D converting circuit 107 so that digital data are obtained.
  • the narrowband digital IF signal thus obtained is input to a DSP 111 .
  • the DSP Ill carries out a processing for demodulating the narrowband digital IF signal input from the first A/D converting circuit 107 into a baseband signal, and the baseband signal thus obtained is output to an outside.
  • a broadband RF signal (a signal containing both a desirable wave and a disturbing wave) output from the LNA 103 is also supplied to a detecting circuit 108 .
  • a level of the broadband RF signal is then detected by the detecting circuit 108 so that the level of the RF signal and a predetermined threshold are compared with each other by a comparator 109 .
  • a signal indicative of a relationship between the detected level of the RF signal and the predetermined threshold is output from the comparator 109 .
  • a signal output from the comparator 109 is converted into a digital signal through a second A/D converting circuit 110 and the digital signal is supplied to the DSP 111 .
  • an AGC signal is generated by the DSP 111 based on the digital signal sent from the second A/D converting circuit 110 , and is supplied to a D/A converting circuit 112 .
  • the AGC signal changed into an analog signal by the D/A converting circuit 112 is supplied to the antenna damping circuit 102 or the LNA 103 through an interface circuit 113 so that a quantity of attenuation in the antenna damping circuit 102 or a gain of the LNA 103 is controlled.
  • gains of the antenna damping circuit 102 and the LNA 103 are controlled on an analog basis through the DSP 111 , the D/A converting circuit 112 and the interface circuit 113 in such a manner that the level of the RF signal converges on a threshold which is preset to the comparator 109 .
  • a level of the signal detected by the detecting circuit 108 is equivalent to a level of the broadband RF signal containing both a desirable wave and a disturbing wave. For this reason, it is impossible to distinguish whether the detected level is possessed by the desirable wave or the disturbing wave. Therefore, a value set to prevent the RF signal from being distorted in an input of only the desirable wave is generally used for the threshold of the comparator 109 . In other words, the threshold of the RF-AGC is set to be optimum for the level of the desirable wave.
  • the IF signal output from the IF amplifier 106 is converted into a digital signal through the first A/D converting circuit 107 and the digital signal is supplied to the DSP 111 so that the level of only the desirable wave can be detected by the DSP 111 .
  • the level of the desirable wave is compared with the predetermined value in the DSP 111 and an RSSI (Received Signal Strength Indicator) signal is output to properly control the quantity of attenuation in the antenna damping circuit 102 and the gain of the LNA 103 when the level of the desirable wave is lower than the predetermined value.
  • RSSI Receiveived Signal Strength Indicator
  • the RF-AGC circuit is operated to reduce the gain of the RF signal in response to the signal supplied from the second A/D converting circuit 110 when the level of the desirable wave is lower than the predetermined value and the level of the disturbing wave is higher than the predetermined value.
  • the gain of the desirable wave is also reduced together with the disturbing wave so that an originally low level is further reduced. For this reason, there is a problem in that a desirable receiving sensitivity cannot be taken due to a suppression in a sensitivity.
  • the RSSI signal is used, a control is carried out in such a manner that the gain of the RF signal is not decreased to be equal to or smaller than a certain value even if the level of the disturbing wave is higher than the predetermined value when the level of the desirable wave is lower than the predetermined value. Consequently, it is possible to avoid the problem of the suppression in a sensitivity.
  • the threshold of the comparator 109 is set to be optimum for the level of the desirable wave. In this case, when only the desirable wave is particularly input, it is possible to control the gain so as to prevent the receiving sensitivity from being deteriorated and to inhibit a distortion from occurring on the RF signal.
  • the threshold of the AGC is set to be optimum for the desirable wave and an optimum gain cannot be set to the disturbing wave. For this reason, when the disturbing wave is also input together with the desirable wave, it is hard to optimally control the gain of the RF signal without deteriorating the receiving sensitivity. In particular, there is a problem in that an intermodulation distortion characteristic is deteriorated and a desirable receiving sensitivity cannot be obtained when a two-signal disturbing wave (disturbing waves contained in two signals having close frequencies to each other) is input.
  • the present invention includes a level detecting portion for detecting a level of a desirable wave frequency and that of a disturbing wave frequency, a table information storing portion for storing table information which causes the level detected by the level detecting portion to correspond to a gain of a received signal which is to be adjusted by a gain adjusting portion, and a control portion for referring to the table information based on the level detected by the level detecting portion, thereby controlling the adjustment of the gain of the received signal through the gain adjusting portion.
  • whether the gain adjustment of the received signal is to be carried out is decided based on the signal level of the desirable wave frequency and that of the disturbing wave frequency which are detected for the received signal, a degree at which the gain is to be adjusted is decided intelligently based on the table information by the control portion when the gain adjustment is carried out, and the gain is adjusted based on the result. Therefore, it is possible to optimally set the gain of the received signal when the disturbing wave is received. In particular, it is possible to considerably improve an intermodulation distortion characteristic made when a two-signal disturbing wave is input, thereby obtaining a desirable receiving sensitivity.
  • FIG. 1 is a diagram showing a structure of a conventional radio receiver for carrying out AGC processings of an antenna damping circuit and an LNA by using a DSP,
  • FIG. 2 is a diagram showing an example of the structure of the radio receiver executing an automatic gain control circuit according to the present invention
  • FIG. 3 is a table showing an example of first table information according to the present embodiment
  • FIG. 4 is a table showing an example of second table information according to the present embodiment
  • FIG. 5 is a chart showing an intermodulation characteristic in an input of a two-signal disturbing wave to the radio receiver
  • FIG. 6 is a table showing an example of a control table to be used in the case in which a D/A converting circuit is disposed between a DSP and an interface circuit.
  • FIG. 2 is a diagram showing an example of a structure of a radio receiver executing an automatic gain control circuit according to the present invention.
  • the radio receiver according to the present embodiment includes an antenna 1 , an antenna damping circuit 2 , an LNA 3 , a frequency converting circuit 4 , a BPF 5 , an IF amplifier 6 , a first A/D converting circuit 7 , an AGC amplifier 8 , a second A/D converting circuit 9 , a DSP 10 , an interface circuit 11 , and a table information storing portion 12 .
  • These structures (excluding the antenna 1 ) are integrated into a single semiconductor chip through a CMOS (Complementary Metal Oxide Semiconductor) process, for example.
  • CMOS Complementary Metal Oxide Semiconductor
  • the antenna damping circuit 2 controls an RF signal received through the antenna 1 (a comparatively broadband broadcast wave signal containing a desirable wave frequency and a disturbing wave frequency) to have an attenuation degree which is variably set in response to a control signal supplied from the interface circuit 11 .
  • the LNA 3 amplifies the RF signal passing through the antenna damping circuit 2 with a low noise. A gain of the LNA 3 is controlled in response to the control signal supplied from the interface circuit 11 .
  • the signal amplified by the LNA 3 is supplied to the frequency converting circuit 4 .
  • the frequency converting circuit 4 mixes the RF signal supplied from the LNA 3 with a local oscillating signal supplied from a local oscillating circuit which is not shown, and carries out a frequency conversion to generate and output an IF signal.
  • the frequency converting circuit 4 also has a gain adjusting function and the gain is controlled in response to the control signal supplied from the interface circuit 11 .
  • a gain adjusting portion according to the present invention is constituted by the antenna damping circuit 2 , the LNA 3 and the frequency converting circuit 4 .
  • the BPF 5 carries out a band limitation for the IF signal supplied from the frequency converting circuit 4 , thereby extracting a narrowband IF signal containing only a desirable wave frequency.
  • the IF amplifier 6 amplifies the narrowband IF signal output from the BPF 5 .
  • the first A/D converting circuit 7 analog-digital converts the IF signal output from the IF amplifier 6 .
  • the narrowband digital IF signal thus converted into digital data is input to the DSP 10 .
  • the DSP 10 includes a demodulating portion 10 a, a first level detecting portion 10 b , a second level detecting portion 10 c and a control portion 10 d as a functional structure thereof.
  • the demodulating portion 10 a demodulates the narrowband digital IF signal input from the first A/D converting circuit 7 into a baseband signal and outputs the baseband signal.
  • the AGC amplifier 8 amplifies the broadband IF signal output from the frequency converting circuit 4 .
  • the second A/D converting circuit 9 analog-digital converts the IF signal output from the AGC amplifier 8 .
  • the broadband digital IF signal thus converted into digital data is input to the DSP 10 .
  • the first level detecting portion 10 b of the DSP 10 detects a receiving field strength of a desirable wave frequency contained in the signal received through the antenna 1 (an antenna level of a desirable wave) based on the narrowband digital IF signal input from the first A/D converting circuit 7 .
  • the second level detecting portion 10 c detects a receiving field strength of a disturbing wave frequency contained in the signal received through the antenna 1 (an antenna level of a disturbing wave) based on the narrowband digital IF signal input from the first A/D converting circuit 7 and the broadband digital IF signal input from the second A/D converting circuit 9 .
  • control portion 10 d of the DSP 10 refers to table information (which will be described below in detail) stored in the table information storing portion 12 based on the antenna level of the desirable wave and that of the disturbing wave which are detected by the first and second level detecting portions 10 b and 10 c , thereby controlling an adjustment of a gain of a received signal through a gain adjusting portion in an RF stage (the antenna damping circuit 2 , the LNA 3 and the frequency converting circuit 4 ).
  • control portion 10 d refers to the table information, thereby generating control data for controlling the gain of the RF stage. Then, the control data are output to the interface circuit 11 .
  • the interface circuit 11 generates a control signal for controlling the gains of the antenna damping circuit 2 , the LNA 3 and the frequency converting circuit 4 based on the control data supplied from the DSP 10 and supplies the control signal to the antenna damping circuit 2 , the LNA 3 and the frequency converting circuit 4 . Consequently, the gain of the received signal in the RF stage is controlled.
  • the interface circuit 11 includes a decoder for decoding the control data supplied from the control portion 10 d and an analog switch which is controlled to be changed over based on an output of the decoder, and controls the gain of the received signal in the RF stage by changing over the analog switch. Because of the structure, the analog switch is directly controlled based on the table information stored in the table information storing portion 12 so that the gain of the RF stage can be controlled digitally.
  • an antenna level VD of the desirable wave can be obtained by a calculation expressed in the following (Formula 1).
  • the IF signal input from the first A/D converting circuit 7 to the DSP 10 is a narrowband IF signal containing only a desirable wave frequency.
  • a level of the IF signal input from the first A/D converting circuit 7 to the DSP 10 through the DSP 10 accordingly, it is possible to easily obtain the IF amplifier output level VIF 0 of the desirable wave.
  • the total gain Grf of the RF stage is a total of gains controlled by the DSP 10 itself and set to the antenna damping circuit 2 , the LNA 3 and the frequency converting circuit 4 through the interface circuit 11 , it is grasped by the DSP 10 itself.
  • the gain Gif of the IF amplifier 6 is adjusted (IF-AGC) by the DSP 10 so as not to exceed a maximum input of the first A/D converting circuit 7 , which is not shown. Therefore, the DSP 10 grasps the gain Gif of the IF amplifier 6 .
  • the broadband digital IF signal input from the second A/D converting circuit 9 to the DSP 10 is a broadband IF signal containing both the desirable wave frequency and the disturbing wave frequency. Accordingly, a signal level VAGC is expressed in the following (Formula 2).
  • VAGC ⁇ square root over ( ) ⁇ ( VD ( Grf+Gagc )) 2 +( VUD ( Grf+Gagc )) 2 ⁇ (Formula 2)
  • the level VAGC of the broadband digital IF signal is obtained in accordance with the following (Formula 3). Disturbing wave levels of the two waves are set to be equal to each other.
  • VAGC ⁇ square root over ( ) ⁇ ( VD ( Grf+Gagc )) 2 +2( VUD ( Grf+Gagc )) 2 ⁇ (Formula 3)
  • the gain of the AGC amplifier 8 has a fixed value. Therefore, it is possible to previously grasp the same gain in the DSP 10 .
  • the level VAGC of the broadband digital IF signal and the IF amplifier output level VIF 0 of the desirable wave are known from the (Formula 1) to the (Formula 3), accordingly, it is possible to obtain the antenna level VUD of the disturbing wave.
  • the DSP 10 can easily obtain the IF amplifier output level VIF 0 of the desirable wave by detecting the level of the IF signal input from the first A/D converting circuit 7 .
  • the DSP 10 can easily obtain the level VAGC of the broadband digital IF signal by detecting the level of the IF signal input from the second A/D converting circuit 9 .
  • the AGC amplifier 8 and the second A/D converting circuit 9 in an output stage of the frequency converting circuit 4 and providing a special signal path for detecting the antenna level of the disturbing wave, it is possible to obtain the antenna level VUD of the disturbing wave in accordance with the (Formula 2) or the (Formula 3).
  • the table information indicates a correspondence of the antenna level VD of the desirable wave and the antenna level VUD of the disturbing wave which are detected by the DSP 10 to the gain of the received signal which is to be adjusted by the gain adjusting portion of the RF stage. More specifically, the table information has first table information indicating a correspondence of the antenna level VD of the desirable wave to the gain of the received signal which is to be adjusted by the gain adjusting portion and second table information indicating a correspondence of the antenna level VD of the desirable wave and the antenna level VUD of the disturbing wave to the gain of the received signal which is to be adjusted by the gain adjusting portion.
  • the control portion 10 d of the DSP 10 refers to either the first table information or the second table information based on the antenna level VD of the desirable wave and the antenna level VUD of the disturbing wave which are detected as described above, thereby controlling the adjustment of the gain of the received signal in the RF stage. More specifically, the adjustment of the gain of the received signal in the RF stage is controlled by referring to the first table information when the antenna level VUD of the disturbing wave is smaller than a predetermined value and referring to the second table information when the antenna level VUD of the disturbing wave is equal to or greater than the predetermined value.
  • FIG. 3 is a table showing an example of the first table information.
  • FIG. 4 is a table showing an example of the second table information.
  • the control portion 10 d sequentially controls a gain Ga of the antenna damping circuit 2 , a gain Gn of the LNA 3 and a gain Gm of the frequency converting circuit 4 corresponding to the antenna level VD of the desirable wave based on the first table information, thereby improving an occurrence of a distortion of a received signal.
  • the AGC is operated to control the gains of the antenna damping circuit 2 , the LNA 3 and the frequency converting circuit 4 . More specifically, when the antenna level VD of the desirable wave is 60 to 90 [dB ⁇ ], the received signal is first attenuated by the LNA 3 . When the antenna level VD of the desirable wave is equal to or higher than 100 [dB ⁇ ], moreover, the quantity of attenuation is made insufficient even through a reduction in the gain of the LNA 3 . For this reason, the gain is further reduced by the antenna damping circuit 2 .
  • the gain of the frequency converting circuit 4 is not adjusted at all in the example of FIG. 3 , it may be first controlled.
  • An intermodulation distortion mainly occurs in the antenna 1 and the LNA 3 .
  • the intermodulation distortion is improved by the adjustment of the gain of the frequency converting circuit 4 when the input level of the desirable wave is low.
  • the optimum gain distribution for each stage corresponding to the antenna level VD of the desirable wave can be set based on a simulation value, it is finally evaluated and determined by using an IC on which the circuit shown in FIG. 2 is mounted.
  • the gain is adjusted by utilizing the gain distribution list determined by the second table information illustrated in FIG. 4 . More specifically, the control portion 10 d sequentially controls the gain Ga of the antenna damping circuit 2 , the gain Gn of the LNA 3 , and the gain Gm of the frequency converting circuit 4 corresponding to the antenna level VD of the desirable wave and the antenna level VUD of the disturbing wave based on the second table information, thereby improving the occurrence of the distortion of the received signal.
  • the AGC is operated to control the gains of the antenna damping circuit 2 , the LNA 3 and the frequency converting circuit 4 even if the antenna level VD of the desirable wave is low.
  • the circuit for detecting the antenna level VUD of the disturbing wave is provided on the output of the frequency converting circuit 4 to calculate the levels VD and VUD on antenna ends of the disturbing wave in addition to the desirable wave through the DSP 10 , thereby setting the gain of the antenna damping circuit 2 , the LNA 3 or the frequency converting circuit 4 properly corresponding to the respective levels VD and VUD. Consequently, it is possible to set the optimum gain distribution for the RF stage corresponding to the levels of the desirable wave and the disturbing wave. Therefore, it is possible to optimize a noise and a distortion characteristic, thereby obtaining a desirable receiving sensitivity. It is possible to set an optimum gain distribution for the RF stage. Therefore, it is possible to particularly improve an intermodulation distortion characteristic made when a two-signal disturbing wave is input, thereby obtaining the desirable receiving sensitivity.
  • FIG. 5 is a chart showing an intermodulation characteristic made when a two-signal disturbing wave is input to a radio receiver.
  • a graph shown in A indicates an intermodulation characteristic made when the two-signal disturbing wave is input to the conventional radio receiver illustrated in FIG. 1 .
  • a graph shown in B indicates an intermodulation characteristic made when the two-signal disturbing wave is input to the radio receiver according to the present embodiment illustrated in FIG. 2 .
  • levels of a desirable wave and a disturbing wave in the case in which S/N of an FM demodulating output can be maintained to be 30 [dB].
  • an input level of the desirable wave is to be approximately 72 [dB ⁇ ] or more in an RF-AGC using a conventional method in order to maintain S/N of 30 [dB].
  • the RF-AGC it is possible to maintain S/N of 30 [dB] at a desirable wave input level of approximately 46 [dB ⁇ ].
  • the gain Gn is of the LNA 3 is decreased.
  • This is set based on the simulation value and is a gain distribution example in which the S/N can be maintained to be 30 [dB].
  • the gain of the RF stage is controlled on an analog basis.
  • the present invention is not restricted thereto.
  • the first table information shown in FIG. 3 may be added to the second table information shown in FIG. 4 to obtain single table information. Since the second table information sets the gains for the antenna levels VD and VUD of the desirable wave and the disturbing wave, it is complicated.
  • the antenna level VUD of the disturbing wave having a high using frequency is lower than the first predetermined value in the AGC control, it is preferable to prepare the simple table shown in FIG. 3 . If a variable threshold corresponding to the antenna level of the desirable wave or that of the disturbing wave can be set into an AGC loop, moreover, it is not necessary to always use the table information.
  • a D/A converting circuit may be disposed between the DSP 10 and the interface circuit 11 .
  • the gain of the LNA 3 can be controlled in a resolution in 32 stages.
  • the interface circuit 11 includes a threshold determining circuit for determining a threshold of the AGC of the LNA 3 based on a signal output from the D/A converting circuit.
  • FIG. 6 shows an example of a control table in this case.
  • the analog switch is used for the interface circuit 11 .
  • a fine gain control of AM or the like is required, a large number of analog switches are required so that the interface circuit 11 is complicated.
  • the D/A converting circuit is disposed between the DSP 10 and the interface circuit 11 . Therefore, the interface circuit 11 can be simplified.
  • the D/A converting circuit is not required but the gain of the RF stage can be directly controlled by the DSP 10 . Therefore, there is an advantage that the system can be simplified.
  • the antenna damping circuit 2 and the LNA 3 may be set to be the gain adjusting portions (the frequency converting circuit 4 is set to have a fixed gain).
  • the present invention is useful for an automatic gain adjusting circuit to carry out an AGC operation for suppressing a distortion of a signal when a strong signal is input to a wireless communicating apparatus such as a radio receiver.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Circuits Of Receivers In General (AREA)
  • Superheterodyne Receivers (AREA)
  • Noise Elimination (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
US12/306,687 2006-06-27 2007-02-06 Automatic gain control circuit Abandoned US20090310723A1 (en)

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JP2006-176149 2006-06-27
JP2006176149A JP2008010909A (ja) 2006-06-27 2006-06-27 自動利得制御回路
PCT/JP2007/052443 WO2008001510A1 (fr) 2006-06-27 2007-02-06 Circuit de commande de gain automatique

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130195215A1 (en) * 2012-01-31 2013-08-01 Analog Devices, Inc. Method and apparatus to independently control front end gain and baseband gain
US8804882B2 (en) 2010-04-19 2014-08-12 Casio Computer Co., Ltd. Receiving apparatus, and computer readable memory medium that stores a program
JP2016005009A (ja) * 2014-06-13 2016-01-12 株式会社デンソー 受信装置
US20200119789A1 (en) * 2016-10-13 2020-04-16 Telefonaktiebolaget Lm Ericsson (Publ) Method and device for beam forming

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5169937B2 (ja) * 2009-03-25 2013-03-27 株式会社デンソー 携帯機
JP5772087B2 (ja) * 2011-03-10 2015-09-02 カシオ計算機株式会社 受信装置、および、プログラム
JP2012195735A (ja) * 2011-03-16 2012-10-11 Sony Corp 利得制御回路、通信装置、電子機器、及び、利得制御方法
TWI565232B (zh) * 2014-04-16 2017-01-01 微晶片科技公司 增益控制方法、模組與使用其的無線信號接收器
GB2533300B (en) * 2014-12-15 2017-03-22 Nordic Semiconductor Asa Packet-based radio receiver with automatic gain control
CN104954033B (zh) * 2015-05-29 2017-07-28 复旦大学 一种用于ofdm系统的快速自动增益控制电路及方法
JP7229421B2 (ja) * 2020-03-26 2023-02-27 三菱電機株式会社 受信装置及び制御方法
CN111399001B (zh) * 2020-03-31 2022-05-06 和芯星通科技(北京)有限公司 一种处理宽带干扰方法和装置
CN113310400B (zh) * 2021-05-26 2022-03-15 桂林电子科技大学 一种闭环控制的激光干涉测量同步动态增益补偿方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6356067B1 (en) * 1998-08-10 2002-03-12 Sony/Tektronix Corporation Wide band signal analyzer with wide band and narrow band signal processors
US20050215212A1 (en) * 2004-03-26 2005-09-29 Mitsubishi Denki Kabushiki Kaisha Receiver
US7071116B2 (en) * 2003-06-19 2006-07-04 Nec Electronics Corporation Semiconductor device and method for manufacturing same
US20060217094A1 (en) * 2003-11-26 2006-09-28 Niigata Seimitsu Co., Ltd. Automatic gain control device
US7369826B2 (en) * 2002-12-20 2008-05-06 Sony Deutschland Gmbh Method for monitoring broadcast signals at alternative frequencies and gain control unit
US7602865B2 (en) * 2003-11-22 2009-10-13 Lg Electronics Inc. Apparatus and method for enhancing a reception rate of a receiver

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0752851B2 (ja) * 1987-09-02 1995-06-05 松下電器産業株式会社 Ｆｍ受信装置
JPH04192705A (ja) * 1990-11-27 1992-07-10 Fujitsu Ltd 自動利得制御回路
JP3431544B2 (ja) * 1998-08-10 2003-07-28 テクトロニクス・インターナショナル・セールス・ゲーエムベーハー 広帯域信号アナライザ
JP2001086172A (ja) * 1999-09-10 2001-03-30 Fujitsu Ltd 受信機
JP2005333182A (ja) * 2004-05-18 2005-12-02 Sony Ericsson Mobilecommunications Japan Inc フィルタ装置、携帯無線通信端末
JP2006011994A (ja) * 2004-06-29 2006-01-12 Auto Recovery Technology:Kk 携帯電話のメモリバックアップ装置
JP2006166367A (ja) * 2004-12-10 2006-06-22 Pioneer Electronic Corp 高周波受信機および隣接妨害波の低減方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6356067B1 (en) * 1998-08-10 2002-03-12 Sony/Tektronix Corporation Wide band signal analyzer with wide band and narrow band signal processors
US7369826B2 (en) * 2002-12-20 2008-05-06 Sony Deutschland Gmbh Method for monitoring broadcast signals at alternative frequencies and gain control unit
US7071116B2 (en) * 2003-06-19 2006-07-04 Nec Electronics Corporation Semiconductor device and method for manufacturing same
US7602865B2 (en) * 2003-11-22 2009-10-13 Lg Electronics Inc. Apparatus and method for enhancing a reception rate of a receiver
US20060217094A1 (en) * 2003-11-26 2006-09-28 Niigata Seimitsu Co., Ltd. Automatic gain control device
US20050215212A1 (en) * 2004-03-26 2005-09-29 Mitsubishi Denki Kabushiki Kaisha Receiver

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8804882B2 (en) 2010-04-19 2014-08-12 Casio Computer Co., Ltd. Receiving apparatus, and computer readable memory medium that stores a program
US20130195215A1 (en) * 2012-01-31 2013-08-01 Analog Devices, Inc. Method and apparatus to independently control front end gain and baseband gain
US9001941B2 (en) * 2012-01-31 2015-04-07 Analog Devices, Inc. Method and apparatus to independently control front end gain and baseband gain
JP2016005009A (ja) * 2014-06-13 2016-01-12 株式会社デンソー 受信装置
US20200119789A1 (en) * 2016-10-13 2020-04-16 Telefonaktiebolaget Lm Ericsson (Publ) Method and device for beam forming
US10812160B2 (en) * 2016-10-13 2020-10-20 Telefonaktiebolaget Lm Ericsson (Publ) Method and device for beam forming

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