US20090188625A1 - Etching chamber having flow equalizer and lower liner - Google Patents

Etching chamber having flow equalizer and lower liner Download PDF

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Publication number
US20090188625A1
US20090188625A1 US12/020,696 US2069608A US2009188625A1 US 20090188625 A1 US20090188625 A1 US 20090188625A1 US 2069608 A US2069608 A US 2069608A US 2009188625 A1 US2009188625 A1 US 2009188625A1
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US
United States
Prior art keywords
chamber
liner
disposed
flow equalizer
chamber liner
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/020,696
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English (en)
Inventor
James D. Carducci
Kin Pong Lo
Kallol Bera
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Materials Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to US12/020,696 priority Critical patent/US20090188625A1/en
Assigned to APPLIED MATERIALS, INC. reassignment APPLIED MATERIALS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: LO, KIN PONG, BERA, KALLOL, CARDUCCI, JAMES D.
Assigned to APPLIED MATERIALS, INC. reassignment APPLIED MATERIALS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KUTNEY, MICHAEL C., MR., MILLER, MATTHEW L., MR.
Priority to TW098100965A priority patent/TWI427449B/zh
Priority to PCT/US2009/030708 priority patent/WO2009097181A2/en
Priority to CN200980103385.1A priority patent/CN101926232B/zh
Priority to KR1020107019258A priority patent/KR101365113B1/ko
Publication of US20090188625A1 publication Critical patent/US20090188625A1/en
Priority to US12/624,155 priority patent/US8313578B2/en
Abandoned legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32623—Mechanical discharge control means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32458—Vessel
    • H01J37/32467—Material

Definitions

  • Embodiments of the present invention generally relate to a plasma processing chamber having a lowered flow equalizer and a lower chamber liner.
  • Integrated circuits have evolved into complex devices that can include millions of components (e.g., transistors, capacitors, resistors, and the like) on a single chip.
  • components e.g., transistors, capacitors, resistors, and the like
  • the evolution of chip designs continually requires faster circuitry and greater circuit density.
  • the demands for greater circuit density necessitate a reduction in the dimensions of the integrated circuit components.
  • the minimal dimensions of features of such devices are commonly referred to in the art as critical dimensions.
  • the critical dimensions generally include the minimal widths of the features, such as lines, columns, openings, spaces between the lines, and the like.
  • One problem associated with a conventional plasma etch process used in the manufacture of integrated circuits is the non-uniformity of the etch rate across the substrate, which may be due, in part, to a vacuum pump drawing the etching gas toward the exhaust port and away from the substrate. As gases are more easily pumped from areas of the chamber that are closest to the exhaust port (i.e., the periphery of the substrate), the etching gas is pulled toward the exhaust port and away from the substrate, thereby creating a non-uniform etch on the substrate positioned therein. This non-uniformity may significantly affect performance and increase the cost of fabricating integrated circuits.
  • a plasma apparatus comprises a chamber body, a first chamber liner disposed within the chamber body, a second chamber liner disposed within the chamber body below the first chamber liner, and a flow equalizer disposed within the chamber body and electrically coupled to both the first chamber liner and the second chamber liner.
  • an etching apparatus comprises a chamber body, a substrate support pedestal disposed in the chamber body, a gas introduction showerhead disposed opposite to the substrate support, a first chamber liner disposed in the chamber body such that the substrate support pedestal, the gas introduction showerhead, and the first chamber liner at least partially enclose a processing area.
  • An annular baffle is coupled to the substrate support pedestal and at least partially surrounding the substrate support pedestal.
  • a second chamber liner is coupled to the chamber body and disposed below the first chamber liner.
  • a flow equalizer disposed below the baffle and electrically coupled to both the first chamber liner and the second chamber liner.
  • an etching apparatus comprises a chamber body, a substrate support pedestal disposed in the chamber body, a gas introduction showerhead disposed opposite to the substrate support, a first chamber liner disposed in the chamber body such that the substrate support pedestal, the gas introduction showerhead, and the first chamber liner at least partially enclose a processing area.
  • the first chamber liner has a first annular notch cut into the bottom surface and a first electrically conductive ring is disposed within the first annular notch.
  • An annular baffle is coupled to the substrate support pedestal and at least partially surrounding the substrate support pedestal.
  • a second chamber liner is coupled to the chamber body and disposed below the first chamber liner, wherein the second chamber liner comprises a second annular notch cut into the bottom surface and a second electrically conductive ring is disposed within the second annular notch.
  • a flow equalizer is disposed below the baffle and electrically coupled to both the first chamber liner and the second chamber liner, where the flow equalizer is coupled to the first annular ring and the second annular ring.
  • the flow equalizer has an opening therethrough, wherein the center of the opening is offset from the center of the flow equalizer, and wherein a width of the flow equalizer gradually decreases from a first point to a second point disposed 180 degrees radially from the first point.
  • FIG. 1 is a schematic cross sectional view of an etching apparatus according to one embodiment of the invention.
  • FIG. 2 is a schematic cross sectional view of the coupling between the upper liner, lower liner, and flow equalizer.
  • FIG. 3A is a schematic top view of a flow equalizer according to another embodiment of the invention.
  • FIG. 3B is a schematic cross sectional view of the flow equalizer of FIG. 3A .
  • FIG. 4A is a schematic isometric view of a lower liner according to one embodiment of the invention.
  • FIG. 4B is a schematic bottom view of the lower liner of FIG. 4A .
  • FIG. 4C is a schematic cross sectional view of a coupling location of the lower liner of FIG. 4A .
  • Embodiments of the present invention generally comprise a plasma processing chamber having a lowered flow equalizer and a lower chamber liner.
  • Various embodiments of the present invention will be described below in relation to an etching chamber.
  • dielectric etching chambers such as the ENABLER® etch chamber, which may be part of a semiconductor wafer processing system such as the CENTURA® system, the PRODUCER® etch chamber, the eMax® etch chamber, among others, all of which are available from Applied Materials, Inc. of Santa Clara, Calif. It is contemplated that other plasma reactors, including those from other manufacturers, may be adapted to benefit from the invention.
  • FIG. 1 is a schematic cross sectional view of an etching apparatus 100 according to one embodiment of the invention.
  • the apparatus 100 comprises a chamber body 102 in which a substrate 104 may be disposed on a pedestal 106 opposite a gas introduction showerhead 108 .
  • Processing gas may be supplied to the chamber 102 through the showerhead 108 from a gas source 110 .
  • the pedestal 106 may be biased with current from a power source 130 .
  • the showerhead 108 may be biased with a current from a power source 112 .
  • the processing gas is supplied through the showerhead 108 into the processing area 128 where the processing gas, in plasma form, proceeds to etch material from the substrate 104 .
  • the plasma may extend not only to the substrate 104 , but also to the chamber walls.
  • an upper liner 126 may be present. The upper liner 126 may protect the chamber walls from exposure to the plasma. Additionally, the upper liner 126 may be removed during processing downtime to be cleaned or replaced.
  • a lowered baffle 116 may surround the substrate 104 and the pedestal 106 .
  • the lowered baffle 116 may extend close to the upper liner 126 and have a plurality of slots therethrough.
  • the slots in the baffle 116 permit processing gas to be drawn therethrough to be evacuated out of the processing chamber body 102 .
  • the slots may be sized to eliminate or reduce the amount of plasma that passes through the baffle 116 .
  • Processing gas may also be drawn around the baffle 116 in the area between the baffle 116 and the upper liner 126 .
  • a lower chamber liner 120 may be present to protect the lower chamber walls from the plasma.
  • the lower liner 120 may be removed during processing downtime to be cleaned or replaced.
  • the lower liner 120 may be coupled to the bottom of the chamber body 102 by a countersunk fastening mechanism 124 .
  • the fastening mechanism 124 may comprise a screw.
  • a vacuum pump 114 may evacuate the processing chamber body 102 and thus pull processing gases through the baffle 116 and through the area between the baffle 116 and the upper liner 126 .
  • One or more plenums 122 may be present between the lower liner 120 and the side of the chamber body 102 and the bottom of the chamber body 102 .
  • the one or more plenums 122 function to broaden out the vacuum draw.
  • the one or more plenums 122 may be present along only a portion of the lower liner 120 . Thus, the greatest draw of the vacuum will be in the area closest to the plenum 122 , which is closest to the vacuum pump 114 as opposed to an area furthest away from the plenum 122 and vacuum pump 114 .
  • a flow equalizer 118 may be present to even out the vacuum draw from the processing area 128 .
  • the flow equalizer 118 may be coupled between the upper liner 126 and the lower liner 120 and extend under a portion of the baffle 116 .
  • the flow equalizer 118 may have an opening therethrough so that the flow equalizer 118 may fit around the pedestal 106 .
  • the width of the baffle 116 is greater than the diameter of the opening of the flow equalizer 118 .
  • the flow equalizer 118 extends under the baffle 116 .
  • the flow equalizer 118 extends a greater distance under the baffle 116 at the location closest to the plenum 122 . The distance that the flow equalizer 118 extends under the baffle 116 gradually decreases along a 180 degree radius around the pedestal 106 .
  • the vacuum draw from the processing area 128 may be substantially even along the entire periphery of the substrate 104 .
  • the flow equalizer 118 extends under the baffler 116 the greatest at the location closest to the vacuum pump 14 and the one or more plenums 122 , where the pull from the vacuum pump 114 is greatest.
  • the flow equalizer 118 extends under the baffler 116 the least at the location farthest from the vacuum pump 14 and the one or more plenums 122 , where the pull from the vacuum pump 114 is the least.
  • the vacuum draw from the processing area 128 may be substantially even. An even vacuum draw from the processing area 128 may aid in uniform etching of the substrate 104 .
  • FIG. 2 is a schematic cross sectional view of the coupling 200 between the upper liner 204 , lower liner 206 , and flow equalizer 202 .
  • the flow equalizer 202 is coupled between the upper liner 204 and the lower liner 206 .
  • the upper liner 204 has an annular notch 210 cut therein. Within the notch 210 , an electrically conductive material 208 may be disposed to ensure good electrical contact between the upper liner 204 and the flow equalizer 202 .
  • the lower liner 206 may have an annular notch 212 cut therein. Within the notch 212 , an electrically conductive material 208 may be disposed to ensure good electrical contact between the lower liner 206 and the flow equalizer 202 .
  • the electrically conductive material 208 may comprise copper. In another embodiment, the electrically conductive material 208 may comprise nickel.
  • the flow equalizer 202 is electrically coupled to the upper liner 204 and lower liner 206 , the flow equalizer 202 is grounded with the liners 204 , 206 .
  • the RF current seeking a return path to ground may travel along the flow equalizer 202 and up the upper liner 204 as shown by arrow “A” or down the lower liner 206 as shown by arrow “B”.
  • RF current in the chamber will travel the easiest path to ground.
  • the flow equalizer 202 by being electrically coupled to the liners 204 , 206 , increases the surface area of the path to ground through the liners 204 , 206 and hence, may cause the plasma to extend more uniformly over the substrate in the chamber. If the flow equalizer 202 were electrically floating or grounded to the pedestal, the flow equalizer may actually pull the plasma and create either an edge high etching plasma or a center high etching plasma (depending upon where it is coupled) and thus contribute to uneven etching.
  • FIG. 3A is a schematic top view of a flow equalizer 300 according to another embodiment of the invention.
  • FIG. 3B is a schematic cross sectional view of the flow equalizer 300 of FIG. 3A .
  • the flow equalizer 300 has a ledge 302 which rests on the lower chamber liner and is the electrical coupling point for the flow equalizer 300 to the lower liner and the upper liner in an etching chamber.
  • the flow equalizer 300 has a hole 308 therethrough that has a center line 312 that is offset from the center line 310 of the flow equalizer 300 by a distance shown by arrows “G”.
  • the offset may be between about 0.75 to about 1.25 inches. In another embodiment, the offset may be between about 0.90 to about 1.10 inches.
  • the off-center hole 308 permits the flange 304 of the flow equalizer 304 to gradually decrease in width along a 180 degree radius.
  • the flange 304 is disposed at a location below the ledge 302 such that the flange 304 will reside below the baffle in the etching chamber.
  • FIG. 4A is a schematic isometric view of a lower liner 400 according to one embodiment of the invention.
  • the lower liner 400 comprises an inner wall 402 that extends up from the bottom wall 406 .
  • the inner wall 402 protects the area under the pedestal from any plasma exposure.
  • the outer wall 404 protects the chamber walls below the upper liner from plasma exposure.
  • one or more gas passages 408 may be carved therethrough.
  • the gas passages 408 may be staggered along the outer wall 404 and bottom wall 406 .
  • the gas passages may be substantially identical and arranged across the outer wall 404 and the bottom wall 406 .
  • the gas passages 408 in the outer wall 404 may extend around the outer wall 404 for only a portion corresponding to the plenum in the chamber. If the plenum extends around the entire lower liner 400 , then the gas passages 408 could extend around the entire outer wall 404 . In one embodiment, the gas passages 408 may be present on the outer wall 404 for an area of less than about 50 percent. Similarly, the gas passages in the bottom wall 406 may extend around the bottom wall 406 for only a portion corresponding to the plenum in the chamber. If the plenum extends around the entire bottom, then the gas passages 408 could be present along the entire bottom wall 406 .
  • the gas passages 408 may be sized such as to prevent plasma from passing therethrough.
  • FIG. 4B is a schematic bottom view of the lower liner 400 of FIG. 4A .
  • the gas passages 408 in the bottom wall 406 may extend only part of the way around the liner 400 .
  • the gas passages 408 may be present in less than about 25 percent of the bottom wall 406 .
  • the bottom surface 410 of the bottom wall 406 may have an electrically conductive material 412 disposed therein to electrically couple the lower liner 400 to ground.
  • the electrically conductive material 412 comprises nickel.
  • the electrically conductive material 412 may extend about 270 degrees radially around the bottom surface 410 of the lower liner 400 .
  • FIG. 4C is a schematic cross sectional view of a coupling location of the lower liner 400 of FIG. 4A .
  • the coupling may comprise a countersunk fastening location 414 .
  • the lower liner 400 may be securely fastened to the chamber body such that any movement of the lower liner 400 due to expansion and contraction or jostling of the chamber may be kept to a minimum.
  • the flow equalizer may provide a path to ground through the liners and thus, even out the plasma distribution within the processing area of the chamber. By evening out the plasma distribution, etching uniformity may be increased.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Plasma Technology (AREA)
  • Physical Or Chemical Processes And Apparatus (AREA)
US12/020,696 2008-01-28 2008-01-28 Etching chamber having flow equalizer and lower liner Abandoned US20090188625A1 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
US12/020,696 US20090188625A1 (en) 2008-01-28 2008-01-28 Etching chamber having flow equalizer and lower liner
TW098100965A TWI427449B (zh) 2008-01-28 2009-01-12 具有流量等化器與下內襯之蝕刻腔室
PCT/US2009/030708 WO2009097181A2 (en) 2008-01-28 2009-01-12 Etching chamber having flow equalizer and lower liner
CN200980103385.1A CN101926232B (zh) 2008-01-28 2009-01-12 具有流量均衡器与下内衬的蚀刻腔室
KR1020107019258A KR101365113B1 (ko) 2008-01-28 2009-01-12 유동 이퀄라이저 및 하부 라이너를 구비한 에칭 챔버
US12/624,155 US8313578B2 (en) 2008-01-28 2009-11-23 Etching chamber having flow equalizer and lower liner

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/020,696 US20090188625A1 (en) 2008-01-28 2008-01-28 Etching chamber having flow equalizer and lower liner

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US12/624,155 Continuation US8313578B2 (en) 2008-01-28 2009-11-23 Etching chamber having flow equalizer and lower liner

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US20090188625A1 true US20090188625A1 (en) 2009-07-30

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US (2) US20090188625A1 (ko)
KR (1) KR101365113B1 (ko)
CN (1) CN101926232B (ko)
TW (1) TWI427449B (ko)
WO (1) WO2009097181A2 (ko)

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USD842259S1 (en) * 2017-04-28 2019-03-05 Applied Materials, Inc. Plasma chamber liner
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USD875054S1 (en) * 2017-04-28 2020-02-11 Applied Materials, Inc. Plasma connector liner
USD875053S1 (en) * 2017-04-28 2020-02-11 Applied Materials, Inc. Plasma connector liner
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US10763138B2 (en) * 2012-04-30 2020-09-01 Semes Co., Ltd. Adjustment plate and apparatus for treating substrate having the same
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USD943539S1 (en) 2020-03-19 2022-02-15 Applied Materials, Inc. Confinement plate for a substrate processing chamber
CN114303226A (zh) * 2019-08-28 2022-04-08 应用材料公司 用于处理腔室的高传导性下部屏蔽件
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US11335543B2 (en) * 2020-03-25 2022-05-17 Applied Materials, Inc. RF return path for reduction of parasitic plasma
US11380524B2 (en) 2020-03-19 2022-07-05 Applied Materials, Inc. Low resistance confinement liner for use in plasma chamber
USD971167S1 (en) 2019-08-28 2022-11-29 Applied Materials, Inc. Lower shield for a substrate processing chamber
USD979524S1 (en) 2020-03-19 2023-02-28 Applied Materials, Inc. Confinement liner for a substrate processing chamber
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JP6994502B2 (ja) * 2016-08-26 2022-01-14 アプライド マテリアルズ インコーポレイテッド プラズマ処理チャンバ用プラズマスクリーン
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CN112017933B (zh) * 2019-05-31 2024-03-26 北京北方华创微电子装备有限公司 内衬、反应腔室和半导体加工设备
KR20200145977A (ko) 2019-06-21 2020-12-31 삼성전자주식회사 플라즈마 처리 장치 및 이를 이용한 반도체 소자 제조 방법
CN112185786B (zh) * 2019-07-03 2024-04-05 中微半导体设备(上海)股份有限公司 等离子体处理设备及用于等离子体处理设备的接地环组件
KR102200709B1 (ko) * 2019-11-13 2021-01-12 세메스 주식회사 월 라이너 유닛 및 이를 구비하는 기판 처리 시스템
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