US11733286B2 - Vector analysis calculation-based arc crosstalk signal identification method - Google Patents

Vector analysis calculation-based arc crosstalk signal identification method Download PDF

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US11733286B2
US11733286B2 US17/784,601 US202017784601A US11733286B2 US 11733286 B2 US11733286 B2 US 11733286B2 US 202017784601 A US202017784601 A US 202017784601A US 11733286 B2 US11733286 B2 US 11733286B2
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signal
arc
sampling
voltage
resistor
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US20230022120A1 (en
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Yue Ma
Jianhua Wang
Zhen Liu
Ze'an JIANG
Huarong WANG
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Qingdao Topscomm Communication Co Ltd
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/12—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
    • G01R31/14—Circuits therefor, e.g. for generating test voltages, sensing circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08—Locating faults in cables, transmission lines, or networks
    • G01R31/088—Aspects of digital computing

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  • the present disclosure belongs to the field of fault arc detection, in particular to a method for identifying a crosstalk signal due to a bypass arc.
  • arc faults are one of the important causes of electrical fires.
  • Fault arcs are usually caused by aging and breakage of lines and equipment insulation, or poor electrical connections. When a fault arc occurs, the occurrence of arc may release high temperature, easily causing a fire accident.
  • a current signal in a line is significantly distorted to contain a high-frequency component.
  • an arc signal may be detected by a fault arc detection device in a main circuit. Due to the high similarity between the fault arc in the bypass circuit and the fault arc in the main circuit, the fault arc in the bypass circuit is easily identified as a fault arc in the main circuit, resulting in a false tripping operation by the fault arc detection device in the main circuit.
  • the conventional fault arc detection device is unable to distinguish between an arc and a crosstalk signal. Due to frequent false tripping operations, it is difficult for the arc detection device to be widely used and popularized, causing serious safety hazards to most electrical devices and power lines in society.
  • the method for detecting an arc signal and identifying a crosstalk signal is single in which arc features are detected only based on waveforms of low-frequency currents, and the method is seriously disturbed by electrical load.
  • the IC technology is widely used in various devices.
  • the IC technology provides technical support for realization of various complex function algorithms. Since circuit systems based on the IC technology generally have the advantages of low power consumption, low mass production cost and strong anti-interference, the method for identifying a crosstalk signal according to the present disclosure can be realized and applied.
  • a crosstalk arc in a bypass circuit and an arc in a main circuit have the same features in essence, so that it is difficult to directly distinguish an arc from a crosstalk.
  • a new sampling circuit method is provided.
  • voltages respectively across two sampling resistors may be obtained based on a Y-shaped circuit, and features of amplitude ratio and phase difference of the two voltages are extracted by using a vector analysis and calculation tool, timely and accurately identifying an arc in a main circuit and a crosstalk signal in a bypass circuit, avoiding a false tripping operation by an arc detection device, thereby laying a foundation for application and promotion of the arc detection device.
  • a new sampling circuit structure is proposed according to the present disclosure.
  • sampling is performed on a current between a live line and a neutral line respectively, two sampling signals are outputted and transmitted to a digital signal processing unit.
  • a ratio of amplitudes of the two signals and a difference between phases of the two signals are extracted and then transmitted to a neural network in real time to perform classification decision to determine whether an arc signal comes from a main circuit or a bypass circuit.
  • FIG. 2 shows an equivalent circuit diagram of a sampling circuit and loads in the present disclosure in a case that an arc occurs in a main circuit
  • FIG. 3 shows an equivalent circuit diagram of a sampling circuit and loads in the present disclosure in a case that a crosstalk occurs in a bypass circuit.
  • a Y-type sampling circuit sampling is performed on a signal between a live line and a neutral line. According to a position at which sampling is performed, resistors R 1 and R 2 are determined as a main sampling resistor and a bypass sampling resistor.
  • FIG. 2 shows an equivalent circuit analysis in a case that an arc occurs in a main circuit under an ideal condition.
  • Resistors R 1 , R 2 and R 3 , a capacitor c and an inductor L form the Y-shaped sampling circuit according to the present disclosure.
  • An access load of the bypass circuit is equivalent to Z 1
  • an access load of the main circuit is equivalent to Z 2 .
  • An arc signal is equivalent to a high-frequency small-signal current source.
  • a reference direction of a current of each of branches is as marked in FIG. 2 .
  • expressions for vectors ⁇ dot over (U) ⁇ 1 , ⁇ dot over (U) ⁇ 2 and ⁇ dot over (U) ⁇ 3 may be derived as follows:
  • U . 1 k 4 - k 5 k 1 ⁇ ( k 3 - k 5 ) + k 2 ⁇ ( k 4 - k 3 ) ⁇ I .
  • U . 2 k 3 - k 5 k 1 ⁇ ( k 3 - k 5 ) + k 2 ⁇ ( k 4 - k 3 ) ⁇ I .
  • U . 3 k 4 - k 3 k 1 ⁇ ( k 3 - k 5 ) + k 2 ⁇ ( k 4 - k 3 ) ⁇ I .
  • Z c 1 j ⁇ ⁇ ⁇ C
  • Z 3 R 3 ⁇ j ⁇ ⁇ ⁇ L R 3 + j ⁇ ⁇ ⁇ L
  • k 1 1 Z 3
  • k 2 - 1 R 2
  • k 3 Z c + Z 1 R 1 + 1
  • k 4 - Z 1 Z 3
  • ⁇ k 5 - Z c R 2 .
  • FIG. 3 shows an equivalent analysis of a crosstalk circuit in a case that an arc occurs in a bypass circuit under an ideal condition.
  • Expressions for vectors ⁇ dot over (U) ⁇ 1 , ⁇ dot over (U) ⁇ 2 and ⁇ dot over (U) ⁇ 3 are derived as follows:
  • U . 1 g 4 - g 3 g 1 ⁇ ( g 3 - g 5 ) + g 2 ⁇ ( g 4 - g 3 ) ⁇ I .
  • U . 2 g 4 - g 5 g 1 ⁇ ( g 3 - g 5 ) + g 2 ⁇ ( g 4 - g 3 ) ⁇ I .
  • U . 3 g 5 - g 3 g 1 ⁇ ( g 3 - g 5 ) + g 2 ⁇ ( g 4 - g 3 ) ⁇ I .
  • Z c 1 j ⁇ ⁇ ⁇ C
  • Z 3 R 3 ⁇ j ⁇ ⁇ ⁇ L R 3 + j ⁇ ⁇ ⁇ L
  • g 1 1 Z 3
  • g 2 - 1 R 1
  • g 3 Z c + Z 2 R 2 + 1
  • g 4 - Z 2 Z 3
  • ⁇ g 5 - Z c R 1 .
  • FIG. 4 shows variation curves of a ratio of an amplitude of ⁇ dot over (U) ⁇ 1 and an amplitude of ⁇ dot over (U) ⁇ 2 with variations of a value of an inductor in a sampling circuit in a case that an arc occurs in a bypass circuit and variation curves of a ratio of an amplitude of ⁇ dot over (U) ⁇ 1 and an amplitude of ⁇ dot over (U) ⁇ 2 with variations of a value of an inductor in a sampling circuit in a case that an arc occurs in a main circuit.
  • the ratio of the amplitude of ⁇ dot over (U) ⁇ 1 and the amplitude of ⁇ dot over (U) ⁇ 2 is less than 1 in the case that the arc occurs in the main circuit, and the ratio of the amplitude of ⁇ dot over (U) ⁇ 1 and the amplitude of ⁇ dot over (U) ⁇ 2 is greater than 1 in the case that the arc occurs in the bypass circuit.
  • ⁇ dot over (U) ⁇ 1 , ⁇ dot over (U) ⁇ 2 and ⁇ dot over (U) ⁇ 3 represent voltages at positions at which sampling is performed in the above cases, thus the following equations may be obtained:
  • FIG. 5 shows variation curves of a difference of a phase of ⁇ dot over (U) ⁇ 1 and a phase of ⁇ dot over (U) ⁇ 2 with variations of a value of an inductor in a sampling circuit in a case that an arc occurs in a bypass circuit and variation curves of a difference of a phase of ⁇ dot over (U) ⁇ 1 and a phase of ⁇ dot over (U) ⁇ 2 with variations of a value of an inductor in a sampling circuit in a case that an arc occurs in a main circuit. Due to the impeding effect of inductive reactance (j ⁇ l) on the current, a higher frequency indicates a more obvious impeding effect.
  • inductive reactance (j ⁇ l) Due to the impeding effect of inductive reactance (j ⁇ l) on the current, a higher frequency indicates a more obvious impeding effect.
  • the difference of the phase of ⁇ dot over (U) ⁇ 1 and the phase of ⁇ dot over (U) ⁇ 2 in the case that the arc occurs in the main circuit is positive and ranges from 90° to 180°
  • the difference of the phase of ⁇ dot over (U) ⁇ 1 and the phase of ⁇ dot over (U) ⁇ 2 in the case that the arc occurs in the bypass circuit is negative and ranges from ⁇ 90° to 0°.
  • a time-sharing data processing method With a time-sharing data processing method according to the present disclosure, two signals are segmented according to time, and feature value extraction is performed on each of segments having a time period of 20 us. Effective values of the two signal sequences are extracted for indicating amplitude features of the signals in the time period, achieving a highly representative result.
  • phase features of a signal at multiple frequency points are extracted based on the conventional digital phase-locked amplification technology.
  • noise is greatly suppressed based on the principle that noise and a reference signal are not correlated with each other, so that amplitude and phase information of a weak signal is accurately extracted.
  • anti-interference ability of the algorithm is enhanced based on phase features and phase fluctuation features at multiple frequency points, so that the extracted phase features are reliable.
  • the system Based on a zero-crossing signal outputted by a zero-crossing detection circuit, the system obtains an amplitude ratio feature value and a phase difference feature value of a signal in each of channels within 20 ms.
  • FIG. 1 shows a flow chart of a crosstalk feature extraction system according to the present disclosure
  • FIG. 2 shows an equivalent circuit analysis in a case that an arc occurs in a main circuit under an ideal condition
  • FIG. 3 shows an equivalent circuit analysis in a case that an arc occurs in a bypass circuit under an ideal condition
  • FIG. 4 shows variation curves of a ratio of an amplitude of ⁇ dot over (U) ⁇ 1 and an amplitude of ⁇ dot over (U) ⁇ 2 with variations of a value of an inductor in a sampling circuit in a case that an arc occurs in a bypass circuit and variation curves of a ratio of an amplitude of ⁇ dot over (U) ⁇ 1 and an amplitude of ⁇ dot over (U) ⁇ 2 with variations of a value of an inductor in a sampling circuit in a case that an arc occurs in a main circuit;
  • FIG. 5 shows variation curves of a difference of a phase of ⁇ dot over (U) ⁇ 1 and a phase of ⁇ dot over (U) ⁇ 2 with variations of a value of an inductor in a sampling circuit in a case that an arc occurs in a bypass circuit and variation curves of a difference of a phase of ⁇ dot over (U) ⁇ 1 and a phase of ⁇ dot over (U) ⁇ 2 with variations of a value of an inductor in a sampling circuit in a case that an arc occurs in a main circuit;
  • FIG. 6 is a flow chart of calculating a ratio of amplitudes according to the present disclosure.
  • FIG. 7 shows a flow chart of calculating a difference between phases according to the present disclosure
  • FIG. 8 shows a flow chart of calculating amplitude fluctuation according to the present disclosure.
  • FIG. 9 shows a flow chart of calculating phase fluctuation according to the present disclosure.
  • FIGS. 1 to 9 a method for identifying an arc crosstalk according to the present disclosure is described in combination with FIGS. 1 to 9 .
  • FIG. 1 shows a process of identifying features of a crosstalk signal based on vector analysis calculation according to the present disclosure.
  • an adopted sampling circuit includes: a first resistor R 1 , a second resistor R 2 , a third resistor R 3 , an inductor L and a capacitor C.
  • the inductor L is connected in series between a first measurement point 1 and a second measurement point 2 in a live line
  • the third resistor R 3 is connected in parallel with the inductor L
  • the first resistor R 1 is connected in series between the first measuring point 1 and a third measuring point 3
  • the second resistor R 2 is connected in series between the second measuring point 2 and the third measuring point 3
  • the third measuring point 3 is connected to a neutral line via the capacitor C
  • a load is connected between the live line and the neutral line.
  • a voltage signal of the inductor between the first measuring point 1 and the second measuring point 2 and a voltage signal of the first resistor between the first measuring point 1 and the third measuring point 3 are collected respectively to analyze whether an arc fault occurs in the sampled line.
  • the system performs operations mainly based on processing of a hardware digital signal processing system, including the following steps 1 to 5.
  • step 1 a Y-type sampling circuit according to the present disclosure is constructed, AD sampling, with a sampling rate up to 200 MHz, is performed on signals of the resistor R 1 and the inductor L to obtain, then the digital signals y R1 (n) and y L (n) are transmitted to the hardware digital signal processing system for performing vector analysis in real time, and then an amplitude ratio feature vector, an amplitude fluctuation feature vector, a phase difference feature vector and a phase fluctuation feature vector are calculated.
  • the signals y R1 (n) and y L (n) are respectively filtered by band-pass digital filters.
  • Each of the filters may be designed as a 64-order filter.
  • Pass frequency bands include a frequency band ranging from 5 MHz to 10 MHz, a frequency band ranging from 15 MHz to 20 MHz, a frequency band ranging from 25 MHz to 30 MHz, a frequency band ranging from 35 MHz to 40 MHz, and a frequency band ranging from 45 MHz to 50 MHz.
  • h(n) represents a unit impulse response of a digital filter.
  • the filtered signal is expressed as:
  • adaptive gain adjustment may be performed based on the amplitude of the filtered signal, amplifying a weak arc signal, preventing a digital signal overflow, and thereby ensuring the reliability of extracting features of the arc crosstalk.
  • step 3 time-sharing processing is performed on the filtered data from two channels, vector analysis is performed on the signal within every 20 us to calculate an amplitude ratio feature vector and a phase difference feature vector according to the present disclosure.
  • the amplitude ratio feature vector is calculated by obtaining a ratio of effective values of amplitudes of the signals of the resistors R 1 and R 2 in each of time periods.
  • signal sequences of the resistor R 1 and the inductor L are respectively set as:
  • y R2_FIR ⁇ b 1 ⁇ a 1 , b 2 ⁇ a 2 , . . . ,b N ⁇ a N ⁇
  • Amp_R y _ R ⁇ 1 ⁇ _ ⁇ Val y _ R ⁇ 2 ⁇ _ ⁇ Val
  • an amplitude ratio feature vector of a signal on each of channels including Amp_R 1 , Amp_R 2 , Amp_R 3 , Amp_R 4 , Amp_R 5 , are respectively calculated.
  • the amplitude fluctuation difference feature vector is calculated by obtaining a ratio of absolute values of a difference between an amplitude of a signals of the resistor R 1 and an amplitude of a signals of the resistor R 2 in each of time period.
  • signal sequences of the resistor R 1 and the inductor L are respectively set as:
  • a signal sequence of the resistor R 2 may be calculated as the following expression: ⁇ ( b 1 ⁇ a 1 ), ( b 2 ⁇ a 2 ), . . . , ( b N ⁇ a N ) ⁇
  • the phase fluctuation feature vector is calculated by obtaining a difference between a phase of a signal of the resistor R and a phase of a signal of the inductor L in each of time periods.
  • signal sequences of the resistor R and the inductor L are respectively set as:
  • a differential sequence of the signal of the resistor R and a differential sequence of the signal of the inductor L are respectively calculated by using the following equations:
  • the phase difference feature vector is calculated by obtaining a difference between a phase of a signal of the resistor R and a phase of a signal of the inductor L in each of time periods.
  • signal sequences of the resistor R and the inductor L are respectively set as:
  • a frequency f 0 equal to 30 Mhz in a pass frequency band of the filter is determined as a reference frequency, and a standard complex signal sequence at this frequency point is calculated and expressed as: y e ⁇ e j ⁇ 0 1 , e j ⁇ 0 2 , . . . , e j ⁇ 0 N ⁇
  • a reference frequency f 0 is respectively selected as f 1 , f 2 , f 3 , f 4 and f 5 .
  • phase differences ⁇ 1 , ⁇ 2 , ⁇ 3 , ⁇ 4 and ⁇ 5 respectively corresponding to the channels, between a phase of a signal of a resistor R 1 and a phase of a signal of an inductor L in the time period is calculated by performing the above steps (1) to (5).
  • a hardware digital signal processing unit performs vector analysis on the two sampling signals, outputs an amplitude ratio feature value, an amplitude fluctuation feature value, a phase difference feature value and a phase fluctuation feature value in real time, and then sends all the feature values to a MCU system for statistical processing.
  • step 5 the system monitors a hardware zero-crossing detection circuit, statistics is performed on the amplitude ratio feature vector, the amplitude fluctuation feature vector, the phase difference feature vector and the phase fluctuation feature vector each time a zero-crossing signal arrives, and splices the feature values in a half wave to obtain a 10*500 feature matrix. Then, the feature matrix is inputted to a neural network for calculation to obtain an identification result.
  • vector analysis is performed on high-frequency components of an arc signal with respect to amplitude and phase, targeted processing is performed on high-frequency features of the arc signal, accurately identifying the arc crosstalk signal, achieving strong anti-interference ability in various complex power consumption environments, and thereby achieving a stable and reliable identification result.

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