US11217517B2 - Semiconductor package with a trench portion - Google Patents

Semiconductor package with a trench portion Download PDF

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Publication number
US11217517B2
US11217517B2 US16/835,915 US202016835915A US11217517B2 US 11217517 B2 US11217517 B2 US 11217517B2 US 202016835915 A US202016835915 A US 202016835915A US 11217517 B2 US11217517 B2 US 11217517B2
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pads
disposed
connection terminals
connection
semiconductor package
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US20210035895A1 (en
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Juhyeon Oh
Woojin CHOI
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Assigned to SAMSUNG ELECTRONICS CO., LTD. reassignment SAMSUNG ELECTRONICS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: Choi, Woojin, OH, JUHYEON
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    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
    • H—ELECTRICITY
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    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1041—Special adaptations for top connections of the lowermost container, e.g. redistribution layer, integral interposer
    • H—ELECTRICITY
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    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
    • H—ELECTRICITY
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    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1076—Shape of the containers
    • H01L2225/1082—Shape of the containers for improving alignment between containers, e.g. interlocking features
    • H—ELECTRICITY
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    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1076—Shape of the containers
    • H01L2225/1088—Arrangements to limit the height of the assembly
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/147—Semiconductor insulating substrates
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires
US16/835,915 2019-07-31 2020-03-31 Semiconductor package with a trench portion Active US11217517B2 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220077127A1 (en) * 2020-09-04 2022-03-10 SK Hynix Inc. Semiconductor package including stacked semiconductor chips and method for fabricating the semiconductor package

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021177515A (ja) * 2020-05-07 2021-11-11 富士通株式会社 基板ユニット

Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7185426B1 (en) 2002-05-01 2007-03-06 Amkor Technology, Inc. Method of manufacturing a semiconductor package
US20090127686A1 (en) 2007-11-21 2009-05-21 Advanced Chip Engineering Technology Inc. Stacking die package structure for semiconductor devices and method of the same
US7750455B2 (en) * 2008-08-08 2010-07-06 Stats Chippac Ltd. Triple tier package on package system
US7749808B2 (en) 2005-09-01 2010-07-06 Micron Technology, Inc. Stacked microelectronic devices and methods for manufacturing microelectronic devices
US8034660B2 (en) 2009-07-24 2011-10-11 Texas Instruments Incorporated PoP precursor with interposer for top package bond pad pitch compensation
US8050047B2 (en) 2007-07-12 2011-11-01 Stats Chippac Ltd. Integrated circuit package system with flexible substrate and recessed package
US8884419B1 (en) 2009-05-06 2014-11-11 Marvell International Ltd. Integrated circuit packaging configurations
US9070627B2 (en) 2013-09-11 2015-06-30 Broadcom Corporation Interposer package-on-package structure
US9337135B2 (en) 2014-10-08 2016-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. Pop joint through interposer
US20170117261A1 (en) 2014-08-22 2017-04-27 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor packages and methods of forming the same
US9842798B2 (en) 2012-03-23 2017-12-12 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming a PoP device with embedded vertical interconnect units
US20180053753A1 (en) 2016-08-16 2018-02-22 Freescale Semiconductor, Inc. Stackable molded packages and methods of manufacture thereof
US10049964B2 (en) 2012-03-23 2018-08-14 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units
US10083903B1 (en) 2011-06-16 2018-09-25 STATS ChipPAC Pte. Ltd. Integrated circuit packaging system with molded laser via interposer and method of manufacture thereof
US20200328187A1 (en) * 2019-04-15 2020-10-15 Samsung Electronics Co., Ltd. Semiconductor package

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09260540A (ja) * 1996-03-27 1997-10-03 Toshiba Corp 半導体用パッケージ基体の製造方法
US8492263B2 (en) * 2007-11-16 2013-07-23 Taiwan Semiconductor Manufacturing Company, Ltd. Protected solder ball joints in wafer level chip-scale packaging
KR102229202B1 (ko) * 2013-11-07 2021-03-17 삼성전자주식회사 트렌치 형태의 오프닝을 갖는 반도체 패키지 및 그 제조방법

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7185426B1 (en) 2002-05-01 2007-03-06 Amkor Technology, Inc. Method of manufacturing a semiconductor package
US7749808B2 (en) 2005-09-01 2010-07-06 Micron Technology, Inc. Stacked microelectronic devices and methods for manufacturing microelectronic devices
US8050047B2 (en) 2007-07-12 2011-11-01 Stats Chippac Ltd. Integrated circuit package system with flexible substrate and recessed package
US20090127686A1 (en) 2007-11-21 2009-05-21 Advanced Chip Engineering Technology Inc. Stacking die package structure for semiconductor devices and method of the same
US7750455B2 (en) * 2008-08-08 2010-07-06 Stats Chippac Ltd. Triple tier package on package system
US8884419B1 (en) 2009-05-06 2014-11-11 Marvell International Ltd. Integrated circuit packaging configurations
US8034660B2 (en) 2009-07-24 2011-10-11 Texas Instruments Incorporated PoP precursor with interposer for top package bond pad pitch compensation
US10083903B1 (en) 2011-06-16 2018-09-25 STATS ChipPAC Pte. Ltd. Integrated circuit packaging system with molded laser via interposer and method of manufacture thereof
US9842798B2 (en) 2012-03-23 2017-12-12 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming a PoP device with embedded vertical interconnect units
US10049964B2 (en) 2012-03-23 2018-08-14 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units
US9070627B2 (en) 2013-09-11 2015-06-30 Broadcom Corporation Interposer package-on-package structure
US20170117261A1 (en) 2014-08-22 2017-04-27 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor packages and methods of forming the same
US9337135B2 (en) 2014-10-08 2016-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. Pop joint through interposer
US20180053753A1 (en) 2016-08-16 2018-02-22 Freescale Semiconductor, Inc. Stackable molded packages and methods of manufacture thereof
US20200328187A1 (en) * 2019-04-15 2020-10-15 Samsung Electronics Co., Ltd. Semiconductor package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220077127A1 (en) * 2020-09-04 2022-03-10 SK Hynix Inc. Semiconductor package including stacked semiconductor chips and method for fabricating the semiconductor package
US11569216B2 (en) * 2020-09-04 2023-01-31 SK Hynix Inc. Semiconductor package including stacked semiconductor chips and method for fabricating the semiconductor package

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