US10043637B2 - Plasma processing apparatus and particle adhesion preventing method - Google Patents

Plasma processing apparatus and particle adhesion preventing method Download PDF

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US10043637B2
US10043637B2 US15/603,648 US201715603648A US10043637B2 US 10043637 B2 US10043637 B2 US 10043637B2 US 201715603648 A US201715603648 A US 201715603648A US 10043637 B2 US10043637 B2 US 10043637B2
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frequency power
supply
pedestal
plasma
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US20170347442A1 (en
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Yoshinori Suzuki
Akitoshi Harada
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32091—Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32174—Circuits specially adapted for controlling the RF discharge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32137—Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32155—Frequency modulation
    • H01J37/32165—Plural frequencies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32174—Circuits specially adapted for controlling the RF discharge
    • H01J37/32183—Matching circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3244—Gas supply means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3244—Gas supply means
    • H01J37/32449—Gas control, e.g. control of the gas flow
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32623—Mechanical discharge control means
    • H01J37/32642—Focus rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32697—Electrostatic control
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32697—Electrostatic control
    • H01J37/32706—Polarising the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32715—Workpiece holder
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32853—Hygiene
    • H01J37/32871—Means for trapping or directing unwanted particles

Definitions

  • the disclosures herein generally relate to a plasma processing apparatus and a particle adhesion preventing method.
  • Japanese Laid-Open Patent Application Publication No. 2013-102237 proposes a method for preventing the particles from adhering to the wafer.
  • a supply of direct-current power to an upper electrode is stopped. After a given period of time elapses, supplies of radio-frequency power for plasma generation and radio-frequency power for bias voltage generation are stopped.
  • a plasma processing apparatus includes: a process chamber configured to accommodate a substrate such that a plasma process is performed in the process chamber; a pedestal on which the substrate is disposed; an opposite electrode opposite to the pedestal; a first radio-frequency power source configured to supply a first radio-frequency power for generating plasma on one of the pedestal and the opposite electrode; a second radio-frequency power source configured to supply a second radio-frequency power for generating a bias voltage on the pedestal, the second radio-frequency power being lower in frequency than the first radio-frequency power; a direct-current power source configured to supply a direct-current voltage to the opposite electrode; and a controller configured to control the first radio-frequency power source, the second radio-frequency power source, and the direct-current power source.
  • the controller is configured to ramp down the direct-current voltage, while a plasma process is being performed or after the plasma process is completed, and before a supply of the first radio-frequency power and a supply of the second radio-frequency power are stopped. According to an embodiment of the present application, the particles are prevented from adhering to the substrate.
  • FIG. 1 illustrates one example of a cross-sectional view of a plasma processing apparatus in one embodiment
  • FIG. 2 illustrates one example of a particle adhesion preventing method and results in one embodiment
  • FIG. 3 illustrates one example of a particle adhesion preventing method and results in one embodiment
  • FIG. 4 illustrates one example of a particle adhesion preventing method and results in one embodiment
  • FIG. 5A to FIG. 5C illustrate reasons for a particle adhesion preventing method in one embodiment
  • FIG. 6 illustrates a list of the particle adhesion preventing methods in some embodiments and comparison results.
  • a plasma processing apparatus 1 in one embodiment may be a parallel-plate plasma processing apparatus of capacitive coupling type.
  • the plasma processing apparatus 1 includes a process chamber (a chamber) 10 having a substantially cylindrical shape.
  • An alumite treatment (an anodization treatment) is applied on an inner surface of the process chamber 10 .
  • an etching process is performed by plasma or a plasma process such as a film-deposition process is performed.
  • a wafer W serving as one example of a substrate is disposed on a pedestal 20 .
  • the pedestal 20 may be made of aluminium (Al), titanium (Ti), or silicon carbide (SiC), for example.
  • the pedestal 20 may also function as a lower electrode.
  • an electrostatic chuck 106 for electrostatically attracting the wafer W is arranged on the pedestal 20 .
  • the electrostatic chuck 106 has a structure in which a chuck electrode 106 a is sandwiched between insulators 106 b .
  • the chuck electrode 106 a is connected with a direct-current (DC) voltage source 112 .
  • DC direct-current
  • a focus ring 108 having an annular shape for surrounding an outer edge portion of the wafer W is disposed.
  • the focus ring 108 may be made of silicon, for example.
  • the focus ring 108 causes the plasma to converge towards a top surface of the wafer W to improve efficiency of the plasma process.
  • a support 104 is provided below the pedestal 20 .
  • This configuration allows the pedestal 20 to be supported by a bottom portion of the process chamber 10 .
  • a coolant passage 104 a is formed in the support 104 .
  • a cooling medium (hereinafter, referred to as a “coolant”), such as cooling water or brine, output from a chiller 107 is flown into a coolant inlet pipe 104 b and circulated through the coolant passage 104 a to a coolant outlet pipe 104 c .
  • the coolant that circulates in this way releases heat from the pedestal 20 and cools down the pedestal 20 .
  • a heat-transfer gas supply source 85 supplies a heat-transfer gas, such as a helium gas (He) or an argon gas (Ar), through a gas supply line 130 to a bottom surface of the wafer W disposed on the electrostatic chuck 106 .
  • a heat-transfer gas such as a helium gas (He) or an argon gas (Ar)
  • He helium gas
  • Ar argon gas
  • the pedestal 20 is connected with a power supply apparatus 30 configured to supply dual-frequency superimposed power.
  • the power supply apparatus 30 includes a first radio-frequency power supply 32 configured to supply radio-frequency power HF (first radio-frequency power) for generating plasma of a first frequency.
  • the power supply apparatus 30 also includes a second radio-frequency power supply 34 configured to supply radio-frequency power LF (second radio-frequency power) for generating a bias voltage of a second frequency that is lower than the first frequency.
  • the first radio-frequency power supply 32 is electrically coupled to the pedestal 20 through a first matching device 33 .
  • the second radio-frequency power supply 34 is electrically coupled to the pedestal 20 through a second matching device 35 .
  • the first radio-frequency power supply 32 is configured to supply, for example, 60 MHz of the radio-frequency power HF to the pedestal 20 .
  • the second radio-frequency power supply 34 is configured to supply, for example, 13.56 MHz of the radio-frequency power LF to the pedestal 20 .
  • the first radio-frequency power is supplied to the pedestal 20 , but may be supplied to a gas shower head 25 .
  • the first matching device 33 is configured to match a load impedance with an inner (or an output) impedance of the first radio-frequency power supply 32 .
  • the second matching device 35 is configured to match a load impedance with an inner (or an output) impedance of the second radio-frequency power supply 34 .
  • the first matching device 33 functions such that the inner impedance of the first radio-frequency power supply 32 and the load impedance superficially appear to be the same as each other, while the plasma is being generated in the process chamber 10 .
  • the second matching device 35 functions such that the inner impedance of the second radio-frequency power supply 34 and the load impedance superficially appear to be the same as each other, while the plasma is being generated in the process chamber 10 .
  • the gas shower head 25 is attached to enclose an opening of a ceiling portion of the process chamber 10 via a shield ring 40 that covers a peripheral portion of the gas shower head 25 .
  • the gas shower head 25 is connected with a variable direct-current power source 70 , and the variable direct-current power source 70 outputs negative DC (direct-current voltage).
  • the gas shower head 25 may be made of silicon, for example.
  • the gas shower head 25 may also function as an opposite electrode (an upper electrode) opposite to the pedestal 20 (a lower electrode).
  • the gas shower head 25 has a gas inlet 45 for introducing gases.
  • the inside of the gas shower head 25 includes a diffusion chamber 50 a branching off from the gas inlet 45 on the center side, and a diffusion chamber 50 b branching off from the gas inlet 45 on the peripheral edge side.
  • a gas output from a gas supply source 15 is supplied through the gas inlet 45 to the diffusion chambers 50 a and 50 b , diffused into the diffusion chambers 50 a and 50 b , and introduced towards the pedestal 20 from a plurality of gas supply holes 55 .
  • the bottom surface of the process chamber 10 has an outlet 60 .
  • An exhaust device 65 is connected with the outlet 60 and is configured to exhaust air in the process chamber 10 . This configuration enables the inside of the process chamber 10 to be kept at a given vacuum degree.
  • a gate valve G is provided on a side wall of the process chamber 10 . The gate valve G is configured to open and close to carry the wafer W into the process chamber 10 or to carry the wafer W out of the process chamber 10 .
  • the plasma processing apparatus 1 includes a controller 100 configured to control operations of the entire plasma processing apparatus 1 .
  • the controller 100 includes a Central Processing Unit (CPU) 105 , a Read Only Memory (ROM) 110 , and a Random Access Memory (RAM) 115 .
  • the CPU 105 performs a desired process, such as an etching process, in accordance with a recipe stored in a memory area of the RAM 115 , for example.
  • the recipe includes control information for controlling the plasma processing apparatus 1 for meeting process conditions.
  • Such control information may include a process time, a pressure (exhaust of gas), radio-frequency power and voltage, flow rates of various gases, temperatures in the process chamber (such as an upper electrode temperature, a side wall temperature of the process chamber, a wafer W temperature, and an electrostatic chuck temperature), and a temperature of the coolant output from the chiller 107 .
  • programs or recipes indicating these process conditions may be stored in a hard disk or in a semiconductor memory.
  • the recipes may be recorded in a computer-readable recording medium that is portable, such as a CD-ROM or a DVD, and such a computer-readable recording medium may be set at a given position to read out the recipe.
  • opening and closing of the gate valve G are controlled.
  • the wafer W is carried into the process chamber 10 and is placed on the pedestal 20 .
  • the DC voltage is supplied to the chuck electrode 106 a from the DC voltage source 112 , the wafer W is attracted to the electrostatic chuck 106 and is held on the electrostatic chuck 106 .
  • a process gas is supplied into the process chamber 10 from the gas supply source 15 .
  • the first radio-frequency power supply 32 and the second radio-frequency power supply 34 respectively supply the pedestal 20 with the first radio-frequency power and the second radio-frequency power.
  • the variable direct-current power source 70 supplies the gas shower head 25 with the negative DC (the DC voltage).
  • the plasma is generated above the wafer W, and the plasma process is performed for the wafer W.
  • the DC voltage source 112 supplies the chuck electrode 106 a with a DC voltage that is inverted in polarity from the DC voltage supplied for attracting the wafer W, so as to eliminate electric charge of the wafer W and to remove the wafer W from the electrostatic chuck 106 .
  • the opening and closing of the gate valve G are controlled and the wafer W is carried out of the process chamber 10 .
  • a particle adhesion preventing method 1 in one embodiment will be described with reference to FIG. 2 .
  • a supply of the DC (hereinafter, referred to as “Top DC”) output from the variable direct-current power source 70 is stopped at a time t 1 .
  • HF RF first radio-frequency power HF
  • LF RF second radio-frequency power HF
  • Pattern 1 - 1 results obtained when the supplies of the power were sequentially stopped such that “Top DC” was stopped first, and then “HF RF” and “LF RF” were stopped at the same time, are illustrated as particle results of Pattern 1 - 1 in a lower part of FIG. 2 .
  • the experimental results indicated that effectiveness of reducing the particle adhesion to the wafer W was achieved by the sequence in the particle adhesion preventing method 1 in which the supplies of the power were sequentially stopped such that the supply of “Top DC” was stopped first, and then the supplies of “HF RF” and “LF RF” were stopped at the same time. Further, the experimental results indicated that the effectiveness of reducing the particles were not very different between the cases where the delay times of “HF RF” and “LF RF” were 0.5 seconds and 1 second.
  • FIG. 3 Time charts of Pattern 1 - 2 and Pattern 2 are illustrated in an upper part of FIG. 3 .
  • Pattern 1 - 2 in the particle adhesion preventing method 2 in one embodiment, after the plasma process for the wafer W is completed, the supply of “Top DC” output from the variable direct-current power source 70 is stopped. Next, the supply of “HF RF” output from the first radio-frequency power supply 32 is stopped. Then, the supply of “LF RF” output from the second radio-frequency power supply 34 is stopped. In other words, in Pattern 1 - 2 , the supplies of the power are sequentially stopped in an order of “Top DC”, “HF RF”, and “LF RF”.
  • Pattern 2 in the particle adhesion preventing method 2 in one embodiment “Top DC” is not supplied on the wafer W during the plasma process. Hence, in Pattern 2 , after the plasma process for the wafer W is completed, the supplies of the power are sequentially stopped in an order of “HF RF” and “LF RF” or in an order of “LF RF” and “HF RF”.
  • a table in a lower part of FIG. 3 illustrates experimental results obtained when the supplies of the power were stopped in the methods of Pattern 1 - 2 and Pattern 2 , after the plasma process was completed.
  • Pattern No Delay in the leftmost column in the table indicates a case where the delay time of HF and LF are both 0.0 seconds. In other words, all the supplies of “Top DC”, “HF RF”, and “LF RF” were stopped at the same time.
  • Pattern No Delay in the leftmost column in FIG. 3 had the same results as Pattern No Delay in the table in the lower part of FIG. 2 .
  • Pattern 1 - 2 and Pattern 2 on the right side of Pattern No Delay as indicated in parentheses in each Pattern column, there was a delay between a stop timing when the supply of “HF RF” was stopped and a stop timing when the supply of “LF RF” was stopped.
  • Pattern 1 - 2 2 (LF ⁇ HF) in a thick frame on the left side, the supply of “HF LF” was stopped when 0.5 seconds elapsed after the supply of “Top DC” had been stopped, and the supply of “HF RF” was stopped when 1.0 second elapsed after the supply of “Top DC” had been stopped.
  • the experimental results indicated that the number of particles on the wafer W in Pattern 1 - 2 , 2 (HF ⁇ LF) was reduced to be fewer than the number of particles on the wafer W in Pattern 1 - 2 , 2 (LF ⁇ HF). Therefore, the experimental results indicated that in the sequence in which the supplies of power were stopped in the order of “Top DC”, “HF RF”, and “LF RF”, the particles adhering to the wafer W was effectively reduced to be fewer than the particles in the sequence in which the supplies of power were stopped in the order of “Top DC”, “LF RF”, and “HF RF”.
  • Pattern 1 - 2 , 2 (HF ⁇ LF), which are two patterns on the right side of the thick frames in the table in the lower part of FIG. 3 , illustrate experimental results of cases where the delay time of “HF RF” and the delay time of “LF RF” were changed.
  • the experimental results indicated that the number of particles was effectively reduced in the sequence in which after the supply of the “Top DC” was stopped, the supply of “HF RF” was stopped, and then the supply of “LF RF” was stopped in this order.
  • the experimental results indicated that even in a case where either a stop timing of stopping the supply of “HF RF” or a stop timing of stopping the supply of “HF LF” was changed by approximately one second, a very high level of the effectiveness in reducing the number of particles was achieved.
  • FIG. 4 Time charts of Pattern 1 - 3 and Pattern 1 - 4 are illustrated in an upper part of FIG. 4 .
  • Pattern 1 - 3 in the particle adhesion preventing Method 3 in one embodiment, after the plasma process for the wafer W is completed, “Top DC” output from the variable direct-current power source 70 is ramped down. After the supply of “Top DC” is stopped, the supply of “HF RF” output from the first radio-frequency power supply 32 is stopped, and then the supply of LF RF′′ output from the second radio-frequency power supply 34 is stopped. In other words, in Pattern 1 - 3 , the supplies of power are stopped sequentially such that after “Top DC” is ramped down and stopped, the supply of “HF RF” is stopped and then the supply of “LF RF” is stopped.
  • a method for controlling ramping down of “Top DC” may include not only the method for reducing the supplied direct-current voltage in a stepwise manner as indicated in Pattern 1 - 3 but also a method for reducing the supplied direct-current voltage continuously as indicated in Pattern 1 - 4 .
  • a table in a lower part of FIG. 4 illustrates experimental results obtained when the supplies of power were stopped in the methods of Pattern 1 - 3 and Pattern 1 - 4 , after the plasma process was completed.
  • Pattern No Delay in the leftmost column in a table in a lower part of FIG. 4 indicates a case where the delay time of HF and LF were both 0.0 seconds. In other words, all of the supplies of “Top DC”, “HF RF”, and “LF RF” were stopped at the same time.
  • Pattern No Delay in the leftmost column in FIG. 4 had the same results as Pattern No Delay in the tables in the lower parts of FIG. 2 and FIG. 3 .
  • Pattern 1 - 4 and Pattern 1 - 3 indicated on the right side of Pattern No Delay
  • the experimental results indicated that the number of particles on the wafer W was reduced to approximately one-twentieths the number of particles in Pattern No Delay.
  • the experimental results indicated that in the method for stopping the supplies of power “HF RF” and “LF RF” after ramping down “Top DC”, a very high level of the effectiveness in reducing the particles adhering to the wafer W was achieved.
  • the experimental results indicated that the number of particles adhering to the wafer W in Pattern 1 - 3 was reduced to be fewer than the number of particles in Pattern 1 - 4 . That is to say, the experimental results indicated that in the method for ramping down “Top DC”, stopping the supply of “Top DC”, stopping the supply of “HF RF”, and stopping the supply of “LF RF” sequentially in this order, the highest level of the effectiveness in reducing the particles adhering to the wafer W was achieved.
  • FIG. 5A to FIG. 5C illustrate examples of cross-sectional views of a boundary between the electrostatic chuck 106 and the focus ring 108 .
  • FIG. 5A illustrates a state in the outer edge portion of the wafer W that is modeled when the plasma process for the wafer W is completed. Between the electrostatic chuck 106 and the focus ring 108 , reaction products that have been generated during the plasma process and substances constituting the inner wall of the process chamber 10 that have been removed by plasma are adhered.
  • the focus ring 108 serves as an annular member arranged at the outer edge portion of the wafer W. Because the uppermost height of the focus ring 108 is higher than the top surface of the wafer W, the substances that become sources of the particles, such as the reaction products, are readily piled up between the electrostatic chuck 106 and the focus ring 108 at the outer edge portion of the wafer W.
  • the supply of “Top DC” is controlled to be ramped down and then stopped.
  • the supply of “Top DC” is gradually stopped, so that the surface of the wafer W is prevented from drastically changing from the negative potential to the positive potential.
  • the negatively-charged particles become less likely to be attracted towards the outer edge portion of the wafer W. Therefore, at the time when the supply of “Top DC” is stopped (after ramping-down control from a time t 1 to a time t 3 in a time chart of an upper part in FIG. 5C ), the particles adhering to the wafer W are reduced.
  • the particle adhesion preventing methods 1 to 3 in some embodiments of the present application will be summarized with reference to FIG. 6 .
  • Pattern 1 - 3 and Pattern 1 - 4 of FIG. 6 see the sequences of Pattern 1 - 3 and Pattern 1 - 4 in FIG. 4 ), in the case where the supply of “Top DC” is ramped down and is then stopped, the particles adhering to the wafer W are reduced.
  • Pattern 1 - 2 in FIG. 6 by stopping the supplies of “HF RF” and “LF RF” sequentially in the order of “HF RF” and “LF RF”, without ramping down the supply of “Top DC”, the particles adhering to the wafer W are reduced.
  • the particles are prevented from adhering to the wafer W by stopping the supplies sequentially in the order of “HF RF” and “LF RF” in a more effective manner than by stopping the supplies sequentially in the order of “LF RF” and “HF RF”.
  • the number of particles adhering to the wafer W was reduced to approximately one-twenty-fifths the number of particles in Pattern No Delay where all of the supplies of “Top DC”, “HF RF”, and “LF RF” were stopped at the same time.
  • the experimental results in the particle adhesion preventing methods 1 to 3 in some embodiments indicated that in the sequence where the supplies of power were stopped sequentially such that “Top DC” was ramped down, the supply of “HF RF” was stopped, and then the supply of “LF RF” was stopped in this order, the particles adhering to the wafer W were reduced in the most effective manner.
  • Pattern 1 - 3 the experimental results indicated that in the sequence of Pattern 1 - 4 where the supplies of power were stopped sequentially such that “Top DC” was ramped down, and then the supplies of “HF RE” and “LF RF” were stopped at the same time, the particles adhering to the wafer W were reduced.
  • the plasma processing apparatus and the particle adhesion preventing methods in some embodiments have been described.
  • the plasma processing apparatus and the particle adhesion preventing methods are not limited to the above-described embodiments.
  • Various variations and modifications may be made without departing from the scope of the present disclosure. Examples and matters that have been described in the above embodiments can be combined together as long as they are consistent.
  • the particle adhesion preventing methods for preventing the particles from adhering to the substrate are applicable to not only Capacitively Coupled Plasma (CCP) apparatuses but also other plasma processing apparatuses.
  • the other plasma processing apparatuses may include an Inductively Coupled Plasma (ICP) processing apparatus, a plasma processing apparatus utilizing a radial line slot antenna, a Helicon Wave Plasma (HWP) processing apparatus, and an Electron Cyclotron Resonance (ECR) plasma processing apparatus.
  • ICP Inductively Coupled Plasma
  • HWP Helicon Wave Plasma
  • ECR Electron Cyclotron Resonance
  • the semiconductor wafer W has been described as one example of the substrate.
  • the substrate is not limited to the semiconductor wafer W.
  • Examples of the substrate may include various types of substrates that can be used in a Liquid Crystal Display (LCD) or a Flat Panel Display (FPD), photomasks, CD substrates, and printed substrates.
  • LCD Liquid Crystal Display
  • FPD Flat Panel Display
  • photomasks CD substrates
  • printed substrates printed substrates.

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  • Physics & Mathematics (AREA)
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JP7306886B2 (ja) * 2018-07-30 2023-07-11 東京エレクトロン株式会社 制御方法及びプラズマ処理装置
WO2020026802A1 (ja) * 2018-07-30 2020-02-06 東京エレクトロン株式会社 制御方法及びプラズマ処理装置
KR20200133895A (ko) * 2019-05-20 2020-12-01 삼성전자주식회사 반도체 처리 장치
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