M352775 五、新型說明： 【新型所屬之技術領域】 尤指一種適用於一種 錯 本創作係關於一種晶片結構 位堆疊晶片結構。 【先前技術】 、請參閱圖1、圖2、及圖3,圖⑽習知晶片堆疊結構之 上視圖’圖2係習知晶片堆疊結構之側視圖，圖3係習知之 標準圖像之示意圖。如圖冰示之晶片堆疊結構，立是以— 層疊上一層，且每—層之間均向後偏移-固定距離s。如圖 2所不，其側視圖有如樓梯層層向上—般，故稱 晶片堆疊。 仰〜 於圖3中所顯示的⑷、㈨、及⑷分別是控制器其記憶 15 體所紀錄的第-辨識視框_、第二辨識視框咖、及第三 辨識視框9 3 0的標準圖像。 s如圖1所示’基板90上分別堆疊有第-晶片91、第二 晶片92、及第三晶片μ，曰於贷_ s u • ^ ^ 且於弟二晶片93上設有一攝影機 94，攝影機94會依影像辨識李％ T取糸4 (圖未不）的控制器指示分 移動於第a曰片91、第二晶片92、及第三晶片 2〇 作影像比對。 其中，基板90包括有複數個金屬接點901、第一晶片 二 1 =有複數個第-銲墊911、第二晶㈣包括有複數個第 ―、干921、及第三晶片93包括有複數個第三銲墊93i。 3 M352775 影像辨識系統於基板9〇與第一晶片91間預設有—第 辨4視框91 〇、於第一晶片91與第二晶片92間預設有一第 二辨識視框920、及第二晶片92第與第三晶片％間預設有_ 第三辨識視框930。 5 一當攝影機94移動到基板90與第一晶片91上方位置進 灯攝衫’影像辨識系統會依影像内之第一辨識視框範圍 内鑑別出第-銲墊911所在位置，並以打線機（圖未示）依序 自，板90之每一金屬接點9〇1位置及第一晶片…之每—第 鈐墊9 11位置銲接金屬線9〇2(通稱打線）。 10 #著’當攝影機94移動到第-晶片91與第二晶片92上 方之位置A進仃攝影’影像辨識系統會依影像内之第二辨 2視框920範圍⑽別出第二銲墊92ι所在位置，但於習知 中第二辨識魅9勒㈣二料921上附著有污點，因 "像辨哉系、统根據標準圖像⑻無法完成辨識，其控制 15器命攝影機94移動到鄰近前、後、左、右進行搜尋以增加 比對命中率。M352775 V. New description: [New technology field] Especially suitable for a kind of error. This is about a wafer structure bit stacked wafer structure. [Previous Technology] Referring to FIG. 1, FIG. 2, and FIG. 3, FIG. 10 is a top view of a conventional wafer stack structure. FIG. 2 is a side view of a conventional wafer stack structure, and FIG. 3 is a schematic diagram of a conventional standard image. . As shown in the ice wafer stack structure, the stack is stacked one above the other, and each layer is offset backwards by a fixed distance s. As shown in Figure 2, the side view is like a layer of stairs up, so it is called a wafer stack. (4), (9), and (4) shown in FIG. 3 are the first-identification frame _, the second identification frame café, and the third identification frame 930 recorded by the controller 15 respectively. Standard image. As shown in FIG. 1 , a first wafer 91, a second wafer 92, and a third wafer μ are stacked on the substrate 90, and a camera 94 is disposed on the second wafer 93. 94, according to the image identification, the %T of the controller 4 is moved to the a-th slice 91, the second wafer 92, and the third wafer 2 for image comparison. The substrate 90 includes a plurality of metal contacts 901, a first wafer 2 1 = a plurality of first pads 911, a second crystal (4) including a plurality of first, a dry 921, and a third wafer 93 including a plurality of A third pad 93i. The M352775 image recognition system is pre-configured between the substrate 9A and the first wafer 91, and the second identification frame 920 is preset between the first wafer 91 and the second wafer 92. A third identification frame 930 is pre-set between the second wafer 92 and the third wafer %. 5 When the camera 94 moves to the top of the substrate 90 and the first wafer 91, the image recognition system identifies the position of the first pad 911 within the first identification frame within the image, and uses the wire bonding machine. (not shown) sequentially, the metal wire 9〇2 (commonly referred to as the wire) is welded to each of the metal contacts 9〇1 of the board 90 and the first wafer. 10 #着' When the camera 94 moves to the position A above the first wafer 91 and the second wafer 92, the image recognition system will select the second solder pad 921 according to the second frame 2 of the image (10). The location, but in the second, the second identification charm 9 (4) two material 921 attached to the stain, because the image is not able to complete the identification according to the standard image (8), its control 15 life camera 94 moved to Search near the front, back, left, and right to increase the hit ratio.
20 田於習知的第_ b y 〇, ^ α β π π 弟日日片91、弟二晶片92、及第三晶片93 9:移—固定距離S堆疊’而使得第二辨識視框 辨1視/^辨識視框㈣，甚至再向上堆疊而產生的第四 =視框1五辨識視框（圖未示）其框内之影像内容完全 相冋。 影機94移動到鄰近第二晶片92上方之位置 衫機94攝入影像的範圍較其移動範圍要大， 此將第二晶片92第與三晶片93間的第三辨識視框93〇 4 M352775 耗圍之影像攝人’並使影像辨識純根據標準®像⑻、及 (C)進行影像比對；此時’影像辨識系統會將第三晶片93的 複數個第一銲墊93 1判定為目前之打線位置而忽略了第二 日日片92其複數個第二焊塾921。 5 10 如圖卜及圖2所示，原本銲接金屬線9〇3(以虛線表示） 應f由f板9G之每-金屬接點9(Π位置銲接到第二晶片92 之每-第二銲墊921位置的，但由於影像辨識系統於上述所 造成的誤判，使得銲接金屬線9〇4由基板90之每一金屬接點 901位置知接到第三晶片93之每—第三輝墊州位置上。 如此’造成打線工作不能正確完成，導致生產效率降 低，並增加不必要的損耗成本。 【新型内容】 ^ =作是關於—種錯位堆疊晶片結構，包括—基板、 =片，基板上表面包括有複數個金屬接點。 wk, S日片α著於基板上方但不_蓋住複數個金屬接 ’二弟曰曰片包括有彼此垂直相鄰接之一第一前緣、及— 弟侧，，第一晶片上表面設有複數個第一銲塾。 --銲墊第：晶一晶片上方但不遮蓋住複數個第 弟—曰曰片包括有彼此相鄰接之一第二前緣、及— —一貝1纟，第二晶片上表面設有複數個第二銲墊，中， 對於第—晶片沿-特定方向錯開有-第1 第-二向疋指沿著第一前緣之延伸方向，第二側緣與 弟侧緣相隔有第一距離。 M352775 第二銲:一二:固二::二晶片上方但不遮蓋住複數個 緣、及一第三I: 並中，第一…片上表面设有複數個第三銲墊， 5 5 ) 第二特定距離，第：側缘以相反於特定方向錯開有 弟-側、、.象與弟二側緣相隔有第二距離。 由於上述母—晶片間彼此採橫向錯位結構， 線時使用的光學辨識攝影機所拍攝的第一辨： 辨識視框、及第r:辨坼鉬去「计、a i 乐— 以料視框其視框内之影像有十分明顯的 ^異性，有利於影像辨識系統能清楚明確辨 片，可降低影像誤判的情形，使打線工作能 ： 提高生產效率。 ％凡欣以 其中，第二距離是二倍於第一距離為最佳，或第 離：要大於第一距離為較佳。第-前緣、第二前緣、及第 二前緣彼此相互平行。 弟 …卜錯位堆疊晶片結構可包括一第四晶片，固著於 =晶片上方但不遮蓋住複數個第三銲墊，第四晶片包括 〗此垂直相鄰接之一第四前緣、及一第四側緣，第四曰 ^表面設有複數個第四銲塾，其中1四晶片相對於^ 二晶=沿特定方向錯開有第三距離，第四側緣與第 相隔有第三距離。第三距離等於第一距離為最 =20 Tian Yuzhi's _ by 〇, ^ α β π π Di Ri Ri 91, Di Er Chip 92, and Third Wafer 93 9: Shift-fixed distance S stack' to make the second identification frame 1 View/^Identify the frame (4), or even stack it up to the fourth = view frame 1 5 recognize the view frame (not shown), the image content in the frame is completely opposite. When the camera 94 moves to a position above the second wafer 92, the range of the image taken by the machine 94 is larger than the range of the movement, and the third identification frame between the second wafer 92 and the third wafer 93 is 93〇4 M352775. The image capture is used to make the image recognition purely based on the standard® images (8) and (C); at this time, the image recognition system determines the plurality of first pads 93 1 of the third wafer 93 as At present, the position of the wire is ignored and the second day of the second piece 92 is ignored. 5 10 As shown in Fig. 2 and Fig. 2, the original welding metal wire 9〇3 (indicated by a broken line) should be f-f each of the metal contacts 9 of the f-plate 9G (Π-position welded to each of the second wafers 92-second The position of the pad 921, but due to the misjudgment caused by the image recognition system, the soldering wire 9〇4 is connected to each of the metal contacts 901 of the substrate 90 to the third wafer 93. In the state position. This caused the wire work to be completed correctly, resulting in reduced production efficiency and increased unnecessary cost of loss. [New content] ^ = About the misaligned stacked wafer structure, including - substrate, = sheet, substrate The upper surface includes a plurality of metal contacts. wk, the S-day piece α is placed above the substrate but does not cover a plurality of metal-connected 'second brothers' pieces including a first leading edge vertically adjacent to each other, and — On the younger side, the first wafer has a plurality of first soldering pads on the upper surface. - The solder pads are: above the crystal wafer but do not cover the plurality of first brothers - the wafers include one adjacent to each other. Two leading edges, and one beast 1 纟, the upper surface of the second wafer is provided with a plurality of The second pad, wherein the first wafer is offset in a specific direction, the first first-two-way finger is along a direction in which the first leading edge extends, and the second side edge is spaced apart from the side edge by a first distance. Second welding: one two: solid two:: above the two wafers but not covering a plurality of edges, and a third I: in the middle, the first ... the upper surface of the sheet is provided with a plurality of third pads, 5 5) second The specific distance, the first side is offset from the specific direction by a side-to-side, and the second side of the two sides is separated by a second distance. Since the above-mentioned mother-wafer adopts a lateral misalignment structure between each other, the first identification of the optical identification camera used in the line: the identification frame, and the r: the identification of the molybdenum to "meter, ai-le" The images in the frame have obvious obvious heterogeneity, which is beneficial to the image recognition system to clearly and clearly identify the film, which can reduce the situation of image misjudgment, so that the wire bonding work can: Improve the production efficiency. %凡欣, the second distance is twice Preferably, the first distance is the first distance, or the first distance is greater than the first distance. The first leading edge, the second leading edge, and the second leading edge are parallel to each other. The fourth wafer is fixed on the top of the wafer but does not cover the plurality of third pads. The fourth wafer includes a fourth leading edge and a fourth side edge, and a fourth side edge. There are a plurality of fourth soldering reams, wherein the four wafers are offset from the second direction by a third distance, and the fourth side edge is separated from the first phase by a third distance. The third distance is equal to the first distance being the most =
緣與第一前緣彼此相互平行。 乐四月|J 再者：第-晶片、第二晶片、及第三晶片是分別 下列曰g片群組：—a# a u 、 。己^體晶片、及其控制晶#。錯位堆疊 M352775 晶片結構，其可包括一封裝膠體，透過封裝膠體以包覆第 一晶片、第二晶片、及第三晶片於基板上。 【實施方式】 5 參_4 ’其係本創作第-較佳實施例錯位堆疊晶 片結構之上視圖。如圖4所示，本創作是一種錯位堆疊晶片 結構，包括一基板10、一第—晶片丨、一第二晶片2、及一 苐二晶片3。 其中，基板10其上表面包括有複數接點1〇1。第一晶片 10 1固著於基板10上方但不遮蓋住複數個金屬接點1〇1，第一 晶片1包括有彼此垂直相鄰接之第一前緣丨丨、及第—側緣工2 亦P开V成第角落’弟一晶片1上表面設有複數個第一銲墊 —曰第二晶片2固著於第一晶片丨上方但不遮蓋住複數個第 15 -#干塾13 ’第二晶片2包括有彼此垂直相鄰接之第二前緣 21、及第二側緣22亦即形成第二角 >落，第二晶片2上表面設 ♦有複數個第二銲塾23,其中，第二晶片2相對於第—晶P .二特定方向錯開有—第—距㈣，特定方向是指沿著第 • —w緣u之延伸方向，第二側緣22與第—側緣⑵目隔有第 於本例中，第 下平移第一距離d 1 錯位第一距離d 1。 二晶片2是沿第一晶片i的第—側緣丨二向 ，以使第二晶月2相對於第一晶片j橫向 7 M352775 5 15 …第三晶片3固著於第二晶片2上方但不遮蓋住複數個第 -知墊’第三晶片3包括有彼此垂直相鄰接之第三前緣 3卜及第三側緣32亦即形成第三角落，第三晶片3上表面設 有複數個第三録墊33 ,其中，第三晶片3相對於第二曰片2 沿相反於特定方向錯開有第二距離d2，第三側緣32:第二 側緣22相隔有第二距離d2。 ;本例中第_曰曰片3是沿第二晶片2的第二側緣Μ向 上平移第二距離d2,以使第三晶片3相對於第二晶片2樺向 錯位第二距離dW中，第二距離d2是為第一距離心的整 數倍。於本例中，第二距離d2是二倍於第—距離㈣最佳' 或第二距離只要大於第一距離為較佳。其令，第一前緣Η、 第二前緣21、及第三前緣31彼此相互平行。 於圖竹，光學辨識攝影機5是設置於晶片上方位置以 將晶片之影像攝人並傳送到控㈣（圖未示）以進行影像比 對工作&圖式中的第一辨識視框14是控制器所設定的影 像辨齡置’其攝像範圍涵蓋鄰近於第一角落、及鄰近於 第一角落的第一銲墊13附近之影像。 於圖式中的第二辨識視框24是控制器所設定的影像辨 齡置其攝像範圍涵蓋鄰近於第二㈣、及鄰近於第二 角的弟一輝塾2 3附近之影像。 於圖式中的第二辨識視框34是控制器所設定的影像辨 識:置其攝像範圍涵蓋鄰近於第三角落、及鄰近於第三 角洛的弟二焊塾33附近之影像。 20 M352775 由於第一晶片卜第二晶片2、及第三晶片3的相對棒向 錯位’致使第-辨識視框14、第二辨識視框24、及第：辨 識視框3 4内的影像有明顯的蕈 3顯的差異性，其利於後續的影像比 對工作。 5 _圖5,其係本創作第-、及第二較佳實施例之標 準圖像之示意圖。如圖所示，其中⑷、⑻、及⑷顯示為 ，本例之控制為其5己憶體所紀錄的第一辨識視框⑷第二辨 識視框24、及第三辨識視框34的標準圖像15,25,35。 請同時參照圖4、及圖5,當光學辨識攝影機5移動至第 10 :晶片#第-角落上方位置時，光學辨識攝影機5於攝入 第辨識視框14内的影像，控制器同時讀取記憶體内標準 圖像15亚與第—辨識視框14内的影像進行比對。 當第一辨識視框14内之影像與標準圖像15比對結果為 相同時，則控制器即可破認第—晶片丄複數個第一銲塾13 與基板職數個金屬接點1〇1間的相對位置關係，此後㈣ 機依據此相對位置進行打線工作。 “相同地’當光學辨識攝影機5移動至第二晶片2其第二 角落上方位置妗’光學辨識攝影機5於攝入第二辨識視框Μ .内的影像，控制器同時讀取記憶體内標準圖像“並與第二 2〇辨識視框24内的影像進行比對。 當第二辨識視框24内之影像與標準圖像乃比對結果為 相同纣則控制益即可確認第二晶片2複數個第二鮮塾^ 與基板10複數個金屬接點1〇1間的才目對位置關係，此後打線 機依據此相對位置進行打線工作。 9 M352775 同樣地，畲光學辨識攝影機5移動至第三晶片3其第三 角落上方位置k ’光學辨識攝影機5於攝人第三辨識視框^ 内的影像，㈣器同時讀取記憶體内標準圖像35並與第三 辨識視框34内的影像進行比對。 5 15 田第—辨識視框34内之影像與標準圖像3 $比對結果為 相同時，則控制器即可確認第三晶片3複數個第三鲜如 與基板10複數個金屬接點101間的相對位置關係，此後打線 機依據此相對位置進行打線工作。 根據上述並相較於習知，縱使有污穢物附著於第-鋒 塾13、第二銲㈣、或第三銲墊33其中之―，由於第一辨 識視框u、第二辨識視框24、及第三_視框湖的影像 有明顯的差異性，縱使光學辨識攝影機5同時攝人兩個影像 視框，亦不會發生誤比對的情形。 因此，當控制器無法根據標準圖像15,25,35比對出第 -辨識視框M、第：辨識視框24、及第三辨識視框μ其中 =的内容時，即命機台停止動作，並發出警告訊號通知 作業人員，以排除意外。 請參閱圖6,其係本創作第一較佳實施例錯位堆疊晶片 一 „ 弟日日片1是為—控制晶片、第 -晶=2、及第三晶片3分別是—記憶體晶片，但不限定於 此：其是分別選自下列晶片群組：_記憶體晶[及其控 制曰日片所組成任何的結果。 20 M352775 此外，弟一銲塾1 3、第二鲜藝楚_ 奸1&23及弟二銲塾33分別 為一鋁墊。於圖5中，透過封裝膠體1〇3以包覆第—晶片卜 第二晶片2、及第三晶片3於基板1〇上。 由於上述每-晶片間彼此採橫向錯位結構，使得打金 線時使用的光學辨識攝影機5所拍攝的第一辨識視框Μ、第 二辨識視框24、及第三辨識視框34其視框内之影像有十分 明顯的差異性’有利於影像賴系統能清楚明確辨別出:The edge and the first leading edge are parallel to each other. Le April | J Again: the first wafer, the second wafer, and the third wafer are respectively the following groups: -a# a u , . The body wafer, and its control crystal #. The misaligned stacked M352775 wafer structure can include an encapsulant that is coated on the substrate by the encapsulant to coat the first wafer, the second wafer, and the third wafer. [Embodiment] 5 Reference _4' is a top view of the dislocation stacked wafer structure of the first preferred embodiment of the present invention. As shown in FIG. 4, the present invention is a misaligned stacked wafer structure including a substrate 10, a first wafer, a second wafer 2, and a second wafer 3. The upper surface of the substrate 10 includes a plurality of contacts 1〇1. The first wafer 10 1 is fixed on the substrate 10 but does not cover a plurality of metal contacts 1〇1, and the first wafer 1 includes a first leading edge 垂直 vertically adjacent to each other, and a first side edge 2 Also, P is opened into the first corner, and the upper surface of the wafer 1 is provided with a plurality of first pads - the second wafer 2 is fixed on the first wafer 但 but does not cover a plurality of 15th - #干塾 13 ' The second wafer 2 includes a second leading edge 21 that is vertically adjacent to each other, and a second side edge 22, that is, a second corner is formed. The upper surface of the second wafer 2 is provided with a plurality of second soldering pads 23 Wherein the second wafer 2 is offset from the first crystal P. in a particular direction by a first-to-distance (four), the specific direction is the direction along the extension of the -w edge u, and the second side edge 22 and the first side The edge (2) is separated from the first distance d 1 by a first distance d 1 . The second wafer 2 is oriented along the first side edge of the first wafer i such that the second crystal moon 2 is laterally 7 M352775 5 15 with respect to the first wafer j ... the third wafer 3 is fixed above the second wafer 2 but The third wafer 3 includes a third leading edge 3 and a third side edge 32 which are vertically adjacent to each other, that is, a third corner is formed, and the upper surface of the third wafer 3 is provided with a plurality of And a third recording pad 33, wherein the third wafer 3 is offset from the second die 2 by a second distance d2 opposite to the specific direction, and the third side edge 32: the second side edge 22 is separated by a second distance d2. In this example, the first sheet 3 is translated upward along the second side edge of the second wafer 2 by a second distance d2, so that the third wafer 3 is misaligned with respect to the second wafer 2 by a second distance dW. The second distance d2 is an integer multiple of the first distance heart. In this example, the second distance d2 is twice the first-distance (four) best's or the second distance is preferably greater than the first distance. The first leading edge Η, the second leading edge 21, and the third leading edge 31 are parallel to each other. In Fig. Zhu, the optical identification camera 5 is disposed at a position above the wafer to take an image of the wafer and transmit it to a control (4) (not shown) for image comparison operation. The first identification frame 14 in the drawing is The image setting range set by the controller includes an image range adjacent to the first corner and the vicinity of the first pad 13 adjacent to the first corner. The second identification frame 24 in the figure is an image of the image set by the controller, and the image range thereof is adjacent to the second (four) and adjacent to the second corner of the image. The second identification frame 34 in the figure is the image recognition set by the controller: the imaging range covers the image adjacent to the third corner and the vicinity of the second welding pad 33 adjacent to the third corner. 20 M352775 The relative image of the first wafer, the second wafer 2, and the third wafer 3 is misaligned, such that the images in the first identification frame 14, the second identification frame 24, and the third recognition frame 34 have Obvious 蕈3 significant difference, which is conducive to the subsequent image comparison work. 5 _ Fig. 5 is a schematic diagram of a standard image of the first and second preferred embodiments of the present invention. As shown in the figure, (4), (8), and (4) are shown as the standard of the first identification frame (4) the second identification frame 24 and the third identification frame 34 recorded by the control of the present example. Image 15, 25, 35. Referring to FIG. 4 and FIG. 5 simultaneously, when the optical identification camera 5 moves to the 10th: wafer #1st-corner position, the optical identification camera 5 takes in the image in the identification frame 14, and the controller simultaneously reads The in-memory standard image 15 is compared with the image in the first recognition frame 14. When the comparison between the image in the first identification frame 14 and the standard image 15 is the same, the controller can break the first chip 1 and the number of metal contacts of the substrate. The relative positional relationship between the two, and thereafter (four) machine works according to the relative position. "Samely" when the optical identification camera 5 moves to the position above the second corner of the second wafer 2, the optical identification camera 5 takes the image in the second recognition frame, and the controller simultaneously reads the memory standard. The image is "aligned with the image in the second frame 2 of the recognition frame 24. When the comparison between the image in the second identification frame 24 and the standard image is the same, then the control benefit can confirm that the second wafer 2 has a plurality of second fresh cathodes and the substrate 10 has a plurality of metal contacts between 1 and 1. The position of the line is related to the positional relationship. After that, the wire machine works according to the relative position. 9 M352775 Similarly, the optical identification camera 5 moves to the position of the third wafer 3 above the third corner of the third wafer 3 ' optical recognition camera 5 in the third recognition frame ^, the device reads the memory standard at the same time The image 35 is compared with the image in the third recognition frame 34. 5 15 Tiandi—When the image in the identification frame 34 and the standard image 3$ are compared, the controller can confirm that the third wafer 3 has a plurality of third and a plurality of metal contacts 101 with the substrate 10 The relative positional relationship between the two, after which the wire machine works according to the relative position. According to the above, even if a stain adheres to the first edge, the second electrode (four), or the third pad 33, the first identification frame u and the second identification frame 24 are There is a clear difference between the images of the third and the frame lake. Even if the optical recognition camera 5 simultaneously captures two image frames, no mismatch will occur. Therefore, when the controller cannot compare the contents of the first-identification frame M, the first recognition frame 24, and the third identification frame μ according to the standard images 15, 25, 35, the machine stops. Action, and issue a warning signal to notify the operator to eliminate the accident. Please refer to FIG. 6 , which is a first embodiment of the present invention. The first embodiment of the present invention is a stack of wafers. The control chip, the first crystal = 2, and the third wafer 3 are memory chips, respectively. It is not limited to this: it is selected from the following wafer groups: _ memory crystal [and its control 曰 film composed of any results. 20 M352775 In addition, brother a welding 塾 1 3, the second fresh art Chu _ rape 1&23 and the second solder bumps 33 are respectively an aluminum pad. In Fig. 5, the first wafer 2 and the third wafer 3 are coated on the substrate 1 through the encapsulant 1〇3. The above-mentioned inter-wafer adopts a lateral dislocation structure between each other, so that the first identification frame Μ, the second identification view frame 24, and the third identification view frame 34 captured by the optical identification camera 5 used for the gold-strength line are in the view frame. The images have very obvious differences, which is conducive to the clear and clear identification of the image system:
同晶片，可降低影像誤判的情形，使打線工作能正破完成， 以提向生產效率。 10 請參閱圖7，其係第二較佳實施例錯位堆疊晶片結構之 上視圖。其與第一實施例的錯位堆疊晶片結構大致相同， 惟不同處是在於本例中更包括一第四晶片4，第四晶片々固 著於第三晶片3上方但不遮蓋住複數個第三銲墊3 3，第四晶 片4包括有彼此垂直相鄰接之一第四前緣4卜及一第四側= 1S 42亦即形成第四角落，第四晶片4上表面設有複數個第四銲 墊43，其中，第四晶片4相對於第三晶片3沿特定方向錯開 φ 有第三距離d3，第四側緣42便與第三側緣32相隔有第三^ 離 d3。 — _ 於本例t，第四晶片4是沿第三晶片3的第三側緣32向 20下平移第三距離d3，以使第四晶片4相對於第三晶片3橫向 錯位第三距離d3。其中，第三距離d3等於第一距離dl為最 佳’且第四前緣41與第一前緣11彼此相互平行。 M352775 於圖7中的第四影像視框44是控制器所設定的影像 識，置，其攝像範圍涵蓋鄰近於第四角落、及鄰近於第四 角^的苐四銲塾43附近之影像。 α參閱圖8 ’其係本創作第…及第二較佳實施例之標 5準圖像之示意圖，其中⑷顯示為本例之控制器其記憶體所 紀錄的第四辨識視框44的標準圖像45，其與⑷、⑻、及 的標準圖像均不同，因而有利於圖像辨識工作。其中，第 四銲墊43其為一鋁墊。 上述貝把例僅係為了方便說明而舉例而已，本創作所 10主張之權利|巳圍自應以申請專利範圍所述為準，而非僅限 於上述實施例。 【圖式簡單說明】 圖1係習知晶片堆疊結構之上視圖。 15圖2係習知晶片堆叠結構之側視圖。 圖3係習知之標準圖像之示意圖。 圖係本創作第一車父佳實施例錯位堆疊晶片結構之上視圖。 圖5係本創作第-較佳實施例之標準圖像之示意圖。 圖系本創作第—較佳實施例錯位堆疊晶片結構之側視圖。 20圖7係第二較佳實施例錯位堆疊晶片結構之上視圖。 圖8係本創作第一、及第二較佳實施例之標準圖像之示意 【主要元件符號說明】 12 M352775 弟'一晶片1 基板10 銲線102 封裝膠體103 第一側緣12 第一銲墊13 標準圖像15,25,35,45 第二前緣21 第二側緣22 第二辨識視框24 第三辨識視框3 4 第三前緣3 1 第三側緣32 第四晶片4 第四前緣41 第四銲墊43 第四辨識視框44 第一距離d 1 第二距離d2 基板90 金屬接點901 第一晶片91 第一辨識視框910 弟~晶片92 第二辨識視框920 第三晶片93 第三辨識視框930 攝影機94 位置A 固定距離sWith the same chip, the situation of image misjudgment can be reduced, and the wire bonding work can be completed to improve production efficiency. Referring to Figure 7, there is shown a top plan view of a misaligned stacked wafer structure of the second preferred embodiment. It is substantially the same as the dislocation stacked wafer structure of the first embodiment, except that in this example, a fourth wafer 4 is further included, and the fourth wafer is fixed above the third wafer 3 but does not cover a plurality of third The pad 3 3, the fourth wafer 4 includes a fourth leading edge 4 and a fourth side = 1S 42 which are vertically adjacent to each other, that is, a fourth corner is formed, and the upper surface of the fourth wafer 4 is provided with a plurality of The fourth pad 4, wherein the fourth wafer 4 is offset with respect to the third wafer 3 by a third distance d3 in a specific direction, and the fourth side edge 42 is separated from the third side edge 32 by a third distance d3. - In this example t, the fourth wafer 4 is translated downward along the third side edge 32 of the third wafer 3 by a third distance d3 to laterally displace the fourth wafer 4 relative to the third wafer 3 by a third distance d3. . Wherein, the third distance d3 is equal to the first distance d1 being the best' and the fourth leading edge 41 and the first leading edge 11 are parallel to each other. The fourth image frame 44 of the M352775 in FIG. 7 is an image set by the controller, and the imaging range thereof covers an image adjacent to the fourth corner and adjacent to the fourth corner 43 of the fourth corner. α is a schematic diagram of a standard image of FIG. 8 and the second preferred embodiment, wherein (4) shows the standard of the fourth identification frame 44 recorded by the controller of the present example. The image 45, which is different from the standard images of (4), (8), and , is advantageous for image recognition work. The fourth pad 43 is an aluminum pad. The above-mentioned examples are merely for convenience of explanation, and the rights claimed by the present invention are based on the scope of the patent application, and are not limited to the above embodiments. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a top view of a conventional wafer stack structure. Figure 2 is a side view of a conventional wafer stack structure. Figure 3 is a schematic representation of a conventional standard image. The figure is a top view of the misaligned stacked wafer structure of the first embodiment of the present invention. Figure 5 is a schematic illustration of a standard image of the first preferred embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS The present invention is a side view of a misaligned stacked wafer structure. Figure 7 is a top plan view of the second preferred embodiment of the misaligned stacked wafer structure. Figure 8 is a schematic diagram of the standard image of the first and second preferred embodiments of the present invention. [Main component symbol description] 12 M352775 弟 'a wafer 1 substrate 10 bonding wire 102 encapsulant 103 first side edge 12 first welding Pad 13 standard image 15, 25, 35, 45 second leading edge 21 second side edge 22 second identification frame 24 third identification frame 3 4 third leading edge 3 1 third side edge 32 fourth wafer 4 Fourth leading edge 41 fourth bonding pad 43 fourth identification frame 44 first distance d 1 second distance d2 substrate 90 metal contact 901 first wafer 91 first identification frame 910 brother ~ wafer 92 second identification frame 920 Third chip 93 Third identification frame 930 Camera 94 Position A Fixed distance s
金屬接點101 第一前緣11 第一辨識視框14 第—晶片2 第二銲墊23 第三晶片3 第三銲墊33 第四側緣42 光學辨識攝影機5 第三距離d3 金屬線 902,903,904 第一銲墊911 第二銲墊921 第三銲墊931 位置B 13Metal contact 101 First leading edge 11 First identification frame 14 First wafer 2 Second pad 23 Third wafer 3 Third pad 33 Fourth side edge 42 Optical identification camera 5 Third distance d3 Metal wire 902, 903, 904 One pad 911 second pad 921 third pad 931 position B 13