TWM273082U - Structure for preventing glue from spilling used in carrier board for packaging integrated circuit - Google Patents

Structure for preventing glue from spilling used in carrier board for packaging integrated circuit Download PDF

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Publication number
TWM273082U
TWM273082U TW094205141U TW94205141U TWM273082U TW M273082 U TWM273082 U TW M273082U TW 094205141 U TW094205141 U TW 094205141U TW 94205141 U TW94205141 U TW 94205141U TW M273082 U TWM273082 U TW M273082U
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TW
Taiwan
Prior art keywords
adhesive
integrated circuit
pins
item
scope
Prior art date
Application number
TW094205141U
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English (en)
Inventor
Shi-Jen Yang
Original Assignee
Lingsen Precision Ind Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lingsen Precision Ind Ltd filed Critical Lingsen Precision Ind Ltd
Priority to TW094205141U priority Critical patent/TWM273082U/zh
Priority to US11/117,511 priority patent/US20060221586A1/en
Publication of TWM273082U publication Critical patent/TWM273082U/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0369—Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Description

M273082 八、新型說明： 【新型所屬之技術領域】 特別是指一種積體電 本創作係與積體電路載板有關， 路用封裝載板之防溢膠構造。 【先前技術】
15
隨著科技的進步，消費者要求電子產品輕、薄、短、 小已成趨勢，是以積體電路之效能亦不斷提昇，因 體電路承載之載板林斷改良精進，從早期之金線架 啊)技術，而本創作係特別針對積體電 路載板所為之精進設計。 查QFN(四方扁平無外彎引腳型)之半導體封裝已行之 加亦有諸多前案核准在前’邇來有業者在载板如金屬 ¥線术各引_先半關形成鎮空空間，再於該鎮空 上填塞絕緣膠而形成-平整台面，如此使各引腳穩 板上’該平台可設一以上晶片座承載晶片外，亦可設複數 被動元件，或於載板單位面積上增設多個電子元件， 效提昇載板之空間利用率。 惟、，被動元件係利用黏著膠黏著並跨接於兩引腳間， 在跨接被動元件之過財’黏轉被壓扁往外擴散時有可 能因毛細現象互相吸引隸而造成相對二引腳之短路。 【新型内容】 本創作之主要目的在於提供一種積體電路用封裝載板 之防溢膠構造，其於跨接被動树於相對二㈣時，於黏 4 20 M273082 著膠周緣設有防護結構，有效避免二引腳短路現象。
20 緣是，為解決上述問題，本創作提供一種積體電路用 封裝載板之防溢膠構造，其由複數封裝單元以矩陣方式排 列而成，該封裝單元包含一以上的晶片座，該晶片座^設 有對應之晶片，有複數引腳位於該晶片座周緣且依預定方 式排列，該等引腳與該等晶片座之間及該等引腳相互之間 相隔預定距離，中間形成鏤空空間，並且填塞絕緣膠於該 鏤空空間’而形成-完整台面，另外，該載板在—對以上 之二引腳上分別點上黏著膠並跨接一被動元件，而本創作 =特徵在於更包含有：一防護溝槽，形成於引腳上之各黏 :膠周圍’當被動元件跨接於二引腳上時’藉由該防護“ 槽之設計，使被壓扁往外擴散之黏著膠流入該防護溝槽 中，防止黏著膠因毛細作用互相沾粘而造成相對二引腳之 路。 【實施方式】 一為了詳細說明本創作之構造及特點所在，茲舉以下之 —較佳實施例並配合圖式說明如后，其中： 第一圖係本創作第一較佳實施例之俯視圖。 第=圖係本創作第一較佳實施例之封裝單元俯視圖。 之前本創作第—較佳實施例之封裝單元局部構件 之俯=關本創作第二較佳實_之封裝單元局部構件 5 M273082 如第一圖至第三圖所示，本創作第一較佳實施例所提 供之一種積體電路用封裝載板(ίο)之防溢膠構造，由複數個 封裝單元(11)以矩陣狀排列形成，該各封裝單元(11)係呈四 方扁平狀，主要二晶片座（12伙121))、複數引腳(13)、二被 5動元件(17a)(17b)、及複數防護溝槽(18)所組成，其中： 該等晶片座（12a)(12b)上分別設有一晶片（i6a)(16b)，該 等引腳(13)，位於該等晶片座（12幻(121))外且依預定方式排 列，而該等引腳(13)與該等晶片座（I2a)(12b)之間以及該等 引腳(13)相互之間相隔預定距離，中間為鏤空空間，並且填 1〇塞絕緣膠(15)於該鏤空空間，而形成一完整平台，另外，一 種黏著膠（14)(在本實例中係為錫膏）點於二對之二引腳 (13a)(13b)(13c)(13d)上(請參考第三圖，圖中僅放大表示該 黏著膠點於一對之二引腳(13a)(13b)上），接著再將二被動元 件（17a)(17b)分別黏著跨接於二對之二引腳 is (13a)(13b)(13c)(13d)上，並且複數防護溝槽(18)以直條狀形 成於該等黏著膠(14)之兩側。 如第四圖所示本創作之第二較佳實施例，其與第一實 施例不同之處在於··該等防護溝槽(18)呈環狀環繞於該等^ 著膠(14)之周圍，為另一種防護溝槽之實施方式。 ί〇 ^藉此，在各對二引腳上點黏著膠並跨接被動元件時， 藉由該等防護溝槽之設計，可使被壓扁之該黏著膠流入該 等防護溝槽内，而不會擴散至外部。 μ 上述之實施例為提供數種實施本創作之方式，並不限 制本創作之實施方式僅限於上述所提及之方式。 义 6 M273082 綜合上列所述，本創作提供了一種積體電路用封裝栽 板之防溢膠構造，可防止被動元件上黏著膠之溢流擴散， 進一步避免黏著膠因毛細現象相互吸引沾粘而造 = 引腳之短路，為保障發明人之創 取相對一 出專利之申請。 j作精神及苦思，爰依法提 M273082 圖式簡單說明】 第一圖係本創作第一較佳實施例之俯視圖。 ^圖係本創作第—較佳實_之域單元俯視圖。 5 之前視剖面圖 第三圖係本創作第一較佳實施例之封 視剖面hi。 I句邵構件 第四圖係本創作第二較佳實施例之封裝抑一 之俯視圖。 \箏元局部構件
【主要元件符號說明】 10 (10)積體電路用封裝載板 (11)封裝單元 (12a)(12b)晶片座 (13) (13a)(13b)(13c)(13d)引腳 (14) 黏著膠/錫膏 15 (15)絕緣膠
(16a)(16b)晶片 (17a)(17b)被動元件 (18)防護溝槽 8

Claims (1)

  1. M273082 九、申請專利範園： 匕種積魏路㈣裝餘之防溢膠構造 封衣早70以矩陣方式排列而成，各該封裝單元包= 炅數個 之晶片座’該等晶片座上設有對應之晶片； $ μ *數引腳，設於該晶片座周緣，該等引腳鱼哕曰^ 5之間以及該等引腳相互之間為鏤空空間； 一〜曰曰片座 一絕緣膠，堆疊填塞於該鏤空空間； 一以上之被動元件，分別以二端跨接於二引 該引腳與該被動元件相對端接合處各點有一黏著膠；，各 其特徵在於更包含有： 0 各該黏著膠周緣設有一防護溝槽。 2. 依據申請專利範圍第丨項所述之積體電路用封 板之防溢膠構造，其中該被動元件係為電阻、電容或電)栽 等 15 黏者膠兩側 3. 依據申請專利範圍第1項所述之積體電路^封 板，其中該防護溝槽包含有二呈直線條狀之溝槽設於^栽 4·依據申請專利範圍第1項所述之積體電路之封事 板，其中該防護溝槽係呈環狀環繞於該各黏著膠。、、栽 5·依據申請專利範圍第1項所述之積體電路之封 板，其中該黏著膠係為錫膏。 '
TW094205141U 2005-04-01 2005-04-01 Structure for preventing glue from spilling used in carrier board for packaging integrated circuit TWM273082U (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW094205141U TWM273082U (en) 2005-04-01 2005-04-01 Structure for preventing glue from spilling used in carrier board for packaging integrated circuit
US11/117,511 US20060221586A1 (en) 2005-04-01 2005-04-29 Packaging substrate having adhesive-overflowing prevention structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW094205141U TWM273082U (en) 2005-04-01 2005-04-01 Structure for preventing glue from spilling used in carrier board for packaging integrated circuit

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TWM273082U true TWM273082U (en) 2005-08-11

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TW094205141U TWM273082U (en) 2005-04-01 2005-04-01 Structure for preventing glue from spilling used in carrier board for packaging integrated circuit

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TW (1) TWM273082U (zh)

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JP4845602B2 (ja) * 2005-06-20 2011-12-28 三洋電機株式会社 光ピックアップ装置
US8836100B2 (en) * 2009-12-01 2014-09-16 Cisco Technology, Inc. Slotted configuration for optimized placement of micro-components using adhesive bonding
TWI443785B (zh) * 2011-07-27 2014-07-01 矽品精密工業股份有限公司 半導體晶圓、晶片、具有該晶片之半導體封裝件及其製法
US9261652B2 (en) * 2012-01-17 2016-02-16 Cisco Technology, Inc. Optical components including bonding slots for adhesion stability
DE102012215705B4 (de) * 2012-09-05 2021-09-23 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Gehäuse für ein optisches bauelement, baugruppe, verfahren zum herstellen eines gehäuses und verfahren zum herstellen einer baugruppe
KR102214512B1 (ko) * 2014-07-04 2021-02-09 삼성전자 주식회사 인쇄회로기판 및 이를 이용한 반도체 패키지
CN106586948A (zh) * 2015-10-15 2017-04-26 中芯国际集成电路制造(上海)有限公司 一种mems器件及其制备方法、电子装置

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US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US20050068054A1 (en) * 2000-05-23 2005-03-31 Sammy Mok Standardized layout patterns and routing structures for integrated circuit wafer probe card assemblies
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