TWI845721B - Wafer appearance inspection device and method - Google Patents

Abstract

The subject of the present invention is to provide a wafer appearance inspection device and method, which can obtain the expected inspection results for the inspection area of the wafer as a whole, even if there are incomplete chips formed by crossing the inspection area and the non-inspection area on the wafer, as long as it is the inspection area of the wafer, the inspection is carried out based on the complete chip.

The wafer appearance inspection device and method of the present invention is to photograph the inspection target part of the repeated appearance pattern of the device chip formed on the wafer, and compare it with the reference image to inspect the device chip, and for the image of the incomplete chip formed by photographing the inspection area and the non-inspection area, based on the position information on the wafer where the image is photographed and the chip layout, the brightness value of the pixel corresponding to the non-inspection area in the pixels constituting the image is replaced with the brightness value of the reference image to generate an inspection image; and the generated inspection image is compared with the reference image to inspect the inspection target part.

Description

Wafer appearance inspection device and method

The present invention relates to a wafer appearance inspection device and method for inspecting a device chip formed on a wafer by comparing an inspection image of a repeated appearance pattern captured with a reference image.

After forming a plurality of semiconductor device circuits (i.e., the repeated appearance pattern of the device chip) on a semiconductor wafer, semiconductor devices are singulated into individual chip parts, which are packaged and shipped as single electronic parts or assembled into electrical products.

Furthermore, inspection is performed by comparing inspection images of repeated appearance patterns of device chips formed on a wafer before individual chip parts are singulated with reference images (e.g., Patent Document 1), or electrical inspection using a probe (e.g., Patent Document 2).

Device chips formed with repeated patterns in a vertical and horizontal matrix on a wafer include "complete chips" that are cut and commercialized, and "incomplete chips" that cannot be commercialized because part of the pattern is missing. In addition, the appearance of the complete chip is photographed and compared with the reference image to determine whether it is good or bad (so-called inspection), but on the other hand, in order to shorten the processing time, the inspection is omitted for incomplete chips (for example, Patent Document 3).

[Prior Art Literature]

[Patent Literature]

[Patent Document 1] Japanese Patent Publication No. 2007-155610

[Patent Document 2] Japanese Patent Publication No. 2-290036

[Patent Document 3] Japanese Patent Publication No. 4-276642

However, if the appearance inspection is performed on the complete wafer, but the incomplete wafer is omitted, even if the incomplete wafer has defects or foreign matter, the wafer is put into the next process.

Therefore, if there is a probe inspection afterwards, there is a risk that defects or foreign matter on the incomplete chip will come into contact with the probe, causing damage to the probe or cracking or defecting of the wafer, among other problems.

On the other hand, according to the previous appearance inspection method, when a part of the inspection image of the incomplete chip is captured and contains defects, when compared with the reference image, this part is judged as abnormal, which becomes the cause of suspected defect detection. In addition, the processing time increases due to the suspected defect detection.

Therefore, the present invention is completed in view of the above-mentioned problems, and its purpose is to provide a wafer appearance inspection device and method, which can obtain the desired inspection results for the inspection area of the wafer as a whole, and can also prevent the increase of processing time, even if there is an incomplete chip formed by crossing the inspection area and the non-inspection area on the wafer, as long as it is the inspection area of the wafer, the inspection is carried out based on the complete chip.

In order to solve the above problems, one aspect of the present invention is a wafer appearance inspection device, which photographs the inspection target part of the repeated appearance pattern of the device chip formed on the wafer, and compares it with the reference image to inspect the device chip, and has: a wafer holding part, which holds the wafer; a camera part, which photographs the image including the inspection target part; a relative moving part, which makes the wafer holding part and the camera part move relative to each other; a reference image registration part, which registers the reference image; a chip layout registration part, which registers the chip layout, and the chip layout is the inspection area of the wafer that specifies the reference posture and reference position of the wafer. and non-inspection area; and an image processing unit, which processes the image taken by the camera unit; and the image processing unit has: a dynamic mask processing unit, which replaces the brightness value of the pixels corresponding to the non-inspection area in the pixels constituting the image with the brightness value of the reference image based on the position information on the wafer where the image is taken and the chip layout, and generates an inspection image; and a comparison inspection unit, which compares the inspection image generated by the dynamic mask processing unit with the reference image, and inspects the inspection object part.

Another aspect of the present invention is a wafer appearance inspection method, which is to photograph the inspection target part of the repeated appearance pattern of the device chip formed on the wafer, and compare it with the reference image to inspect the device chip, and has: the step of pre-registering the reference image; the step of pre-registering the chip layout, the chip layout is to define the inspection area and non-inspection area of the wafer relative to the reference posture and reference position of the wafer; while the wafer and the camera mechanism are moved relative to each other, the camera is photographed. The method comprises the steps of taking an image of the inspection object part; and processing the image; and has the following steps: for an image of an incomplete chip formed by crossing the inspection area and the non-inspection area, based on the position information on the wafer where the image is taken and the chip layout, the brightness values of the pixels constituting the image corresponding to the non-inspection area are replaced with the brightness values of the reference image to generate an inspection image; and the inspection image is compared with the reference image to inspect the inspection object part.

According to this wafer appearance inspection device and method, even if the outer edge shape of an incomplete wafer is different at each shooting position, dynamic mask processing can be performed according to the shooting position to generate an inspection image, and the inspection image can be compared with the reference image to perform the desired inspection.

Even if there is an incomplete chip on the wafer that crosses the inspection area and the non-inspection area, the inspection of the inspection area of the wafer is carried out based on the inspection of the complete chip, and the expected inspection results can be obtained for the inspection area of the wafer as a whole, and the processing time can be prevented from increasing.

1: Wafer appearance inspection device

1f: Device frame

2: Wafer holding part

3: Camera Department

4: Relative moving part

5: Chip layout registration department

6: Standard image registration department

7: Image processing department

20: Loading platform

30: Lens barrel

31: Lighting Department

32: Half-reflective mirror

33a,33b:Objective lens

34: Rotator mechanism

35: Camera

36: Imaging components

41: X-axis slide

42: Y-axis slide

43: Rotating mechanism

71: Dynamic mask processing unit

72: Comparative Inspection Department

C: Device chip

C(2,2)~C(5,2): device chip

Cb: Incomplete chip

CN: Control Department

Cn: Complete chip

CP: Computer

F: Photography area (field of view)

L1: Illumination light

L2: Light incident from the wafer side (reflected light, scattered light)

Pf: Baseline image

Pk: Check image (after processing)

Ps:Image

Ri: Inspection area

Rn: Non-inspection area

T: Shooting route

Vs: Arrow

W: Wafer/workpiece

Wk: Gap

X: Defect/axis/direction

Y: dashed line/axis/direction

θ: direction

FIG1 is a schematic diagram showing the overall structure of an example of a form in which the present invention is embodied.

FIG2 is a conceptual diagram showing a shooting mode of an example of a form in which the present invention is embodied.

FIG3 is a top view showing the positional relationship of each device chip C in an example of a form that embodies the present invention.

Figure 4 (a) to (d) are image diagrams showing an example of a form in which the present invention is embodied, including an image Ps, a reference image Pf, a test image Pk, and an image of a difference between the test image Pk and the reference image Pf.

Figure 5 (a) to (d) are image diagrams showing an example of a form in which the present invention is embodied, including the brightness values of each pixel of the image Ps, the reference image Pf, the inspection image Pk, and the difference between the brightness values of the inspection image Pk and the reference image Pf.

FIG6 is a flow chart showing an example of a form in which the present invention is embodied.

The following is a description of the form used to implement the present invention with reference to the drawings. In addition, in the following description, the three axes of the orthogonal coordinate system are set as X, Y, and Z, the horizontal direction is represented as the X direction and the Y direction, and the direction perpendicular to the XY plane (i.e., the direction of gravity) is represented as the Z direction. In addition, the Z direction represents the direction opposite to gravity as up, and the direction in which gravity acts as down. In addition, the direction of rotation with the Z direction as the central axis is set as the θ direction.

FIG1 is a schematic diagram showing the overall structure of an example of a form in which the present invention is embodied. FIG1 schematically shows the various parts of the wafer appearance inspection device 1 of the present invention.

The wafer appearance inspection device 1 photographs the inspection target portion of the repeated appearance pattern of the device chip C formed on the wafer W, compares it with the reference image Pf, and inspects the device chip C.

Specifically, the wafer appearance inspection device 1 successively changes the shooting location while shooting the inspection object part, processes the shot image Ps, generates the inspection image Pk, and compares the inspection image Pk with the reference image Pf to conduct the desired inspection on the whole wafer W, such as whether the circuit pattern of the device chip C has no short circuit or broken line, or whether it has no foreign matter or defects. The wafer appearance inspection device 1 has: a wafer holding part 2, a shooting part 3, a relative moving part 4, a chip layout registration part 5, a reference image registration part 6, an image processing part 7, and a control part CN, etc.

The wafer holding part 2 holds the wafer W. Specifically, the wafer holding part 2 supports the wafer W from the lower surface while keeping it horizontal. More specifically, the wafer holding part 2 has a mounting table 20 with a horizontal upper surface. The mounting table 20 is provided with grooves and holes in the portion in contact with the wafer W, and the grooves and holes are connected to a negative pressure generating mechanism such as a vacuum pump via a switching valve. Moreover, the wafer holding part 2 can hold or release the wafer W by switching the grooves and holes to a negative pressure state or an atmosphere release state.

The imaging unit 3 captures an image Ps including the inspection target part. Here, the image Ps including the inspection target part refers to an image captured by capturing a part or all of the repeated appearance pattern of the device chip C that is the inspection target, an image captured by dividing the inspection target part of each device chip C, or an image captured by capturing a wide range (imaging area F) including the inspection target part of one or more device chips C.

Specifically, since the arrangement of the device wafer C (number or pitch, etc.) and the required inspection accuracy are different for each inspection type, the size, position, and interval of the range (i.e., the imaging area) photographed by the imaging unit 3 are registered in accordance with each inspection type.

More specifically, the imaging unit 3 includes: a barrel 30, an illumination unit 31, a semi-reflective mirror 32, a plurality of objective lenses 33a, 33b, a rotator mechanism 34, and an imaging camera 35, etc.

The lens barrel 30 fixes the illumination unit 31, the semi-reflective mirror 32, the objective lenses 33a, 33b, the rotator mechanism 34, the camera 35, etc. in a specific posture, and guides the illumination light and the observation light. The lens barrel 30 is mounted on the device frame 1f via connecting metal parts (not shown).

The lighting unit 31 emits the lighting light L1 required for shooting. Specifically, the lighting unit 31 can be exemplified by laser diodes or metal halogen lamps, xenon lamps, LED lighting, etc.

The semi-reflecting mirror 32 reflects the illumination light L1 emitted from the illumination unit 31 and irradiates the wafer W side, and allows the light (reflected light, scattered light) L2 incident from the wafer W side to pass toward the imaging camera 35 side.

The objective lenses 33a and 33b form an image of the imaging area on the workpiece W on the imaging element 36 of the imaging camera 35 at different specific observation magnifications.

The rotator mechanism 34 uses or switches one of the objective lenses 33a and 33b. Specifically, the rotator mechanism 34 rotates and stops at each specific angle based on manual or external signal control.

The camera 35 captures the imaging area F on the workpiece W and obtains the image formed on the imaging element 36. The obtained image Ps is output to the outside as an image signal and image data, and is processed by the image processing unit 7 to generate an inspection image Pk.

The relative moving part 4 makes the wafer holding part 2 and the imaging part 3 move relative to each other. Specifically, the relative moving part 4 is composed of an X-axis slide 41, a Y-axis slide 42, and a rotating mechanism 43.

The X-axis slider 41 is mounted on the device frame 1f, so that the Y-axis slider 42 moves in the X direction at an arbitrary speed and stops at an arbitrary position. Specifically, the X-axis slider is composed of a pair of rails extending in the X direction, a slider portion moving on the rails, and a slider drive portion that moves and stops the slider portion. The slider drive portion may include: a servo motor or a pulse motor and a ball screw mechanism that rotates and stops under the control of a signal from the control unit CN, or a linear motor mechanism. In addition, the X-axis slider 41 is equipped with an encoder for detecting the current position and movement amount of the slider portion. In addition, the encoder can be exemplified by a linear scale that has fine depressions and projections engraved at a specific pitch on a straight-line component called a linear scale, or a rotary encoder that detects the rotation angle of a motor that rotates a ball screw.

The Y-axis slider 42 moves the rotating mechanism 43 in the Y direction at an arbitrary speed and stops at an arbitrary position based on the control signal output from the control unit CN. Specifically, the Y-axis slider is composed of a pair of rails extending in the Y direction, a slider portion moving on the rails, and a slider drive portion that moves and stops the slider portion. The slider drive portion may include: a servo motor or a pulse motor and a ball screw mechanism that rotate and stop under the control of the signal from the control unit CN, or a linear motor mechanism. In addition, the Y-axis slider 42 is equipped with an encoder for detecting the current position and movement amount of the slider portion. In addition, the encoder can be exemplified by a linear scale that has fine depressions and projections engraved at a specific pitch on a straight-line component called a linear scale, or a rotary encoder that detects the rotation angle of a motor that rotates a ball screw, etc.

The rotating mechanism 43 makes the mounting table 20 rotate at an arbitrary speed in the θ direction and stop at an arbitrary angle. Specifically, the rotating mechanism 43 can be exemplified as a device that rotates/stops at an arbitrary angle by signal control from an external device such as a direct drive motor. The mounting table 20 of the wafer holding unit 2 is mounted on the component on the rotating side of the rotating mechanism 43.

Due to such a structure, the relative moving part 4 can keep the wafer W to be inspected and move the wafer W relative to the imaging part 3 in the XYθ direction independently or in combination at a specific speed or angle, or stop at any position or angle.

FIG. 2 is a conceptual diagram showing an example of a photographing situation of a form in which the present invention is embodied. FIG. 2 shows a situation in which the camera 35 of the photographing unit 3 is moved relative to the wafer W in the direction indicated by the arrow Vs, and the photographing location of the plurality of device chips C(2,2) to C(5,2) separately arranged on the wafer W is changed successively, while photographing the inspection target part. In addition, the image is also shown in which the camera 35 photographs the inspection target part F including the device chip C(4,2) at the current moment.

FIG3 is a top view showing the positional relationship of each device chip C in an example of a form that embodies the present invention. FIG3 shows a configuration image of a repeated appearance pattern of a device chip C formed on a wafer W of a certain inspection type, and illustrates a configuration of a complete chip Cn formed in an inspection area Ri of the wafer W, and an incomplete chip Cb formed across the inspection area Ri and the non-inspection area Rn.

The chip layout registration unit 5 registers the chip layout, which specifies the position information of the inspection area Ri and the non-inspection area Rn of the wafer relative to the reference posture and reference position of the wafer W, as well as the configuration information of the device chip C.

In addition, in the chip layout, the state where the notch Wk of the wafer W faces directly downward is set as the reference posture, and the center of the wafer W in this posture is set as the reference position in the XY direction (also called the origin), and the outer edge of the inspection area Ri (i.e., the boundary with the non-inspection area Rn) is specified to be located at a radius of several millimeters (i.e., position information), and the vertical and horizontal arrangement and pitch and offset information of the repeated appearance pattern of the device chip C (i.e., configuration information).

Specifically, in the chip layout registration unit 5, the data of the chip layout specified for each inspection type is registered.

The reference image registration unit 6 registers the reference image Pf.

In addition, the reference image Pf is a reference indicating that the repeated appearance pattern of the device chip C formed on the wafer W is in a normal state. Specifically, the reference image Pf is used to compare with the inspection image Pk, and is a reference for making the following judgments for each pixel or pixel group, that is, if the difference or variance value of the brightness value is within a preset range, it is judged as normal, and if it is outside the range, it is judged as abnormal. More specifically, the reference image Pf can be exemplified as: an image representing a pre-selected good image, or an image of a plurality of pre-selected good images and averaging them, an image generated based on a good learning method, etc.

Specifically, in the reference image registration unit 6, data of the reference image Pf is registered for each inspection type.

FIG. 4 is an image diagram showing an example of a form in which the present invention is embodied, including an image Ps, a reference image Pf, a test image Pk, and an image of a difference between the test image Pk and the reference image Pf.

FIG4(a) shows an example of an image Ps of an incomplete chip Cb. The image Ps includes a circuit pattern and a defect X to be detected.

Figure 4(b) shows an example of the image of the reference image Pf.

Figure 4(c) shows an example of the inspection image Pk.

Figure 4(d) shows an example of the difference between the inspection image Pk and the reference image Pf.

In addition, each image Ps, Pf, and Pk shows an example of being composed of pixels in a 7×7 matrix in both vertical and horizontal directions. In addition, as a defect X, a foreign object attached to the circuit pattern is shown as an example.

FIG5 is an image diagram showing an example of a form in which the present invention is embodied, including the brightness values of each pixel of the image Ps, the reference image Pf, the inspection image Pk, and the difference between the brightness values of the inspection image Pk and the reference image Pf. In addition, the positional relationship between the images of FIG4(a) to (d) and the brightness values of each pixel shown in FIG5(a) to (d) respectively corresponds.

FIG5(a) shows an example of the brightness value of each pixel of an image Ps (including the circuit pattern and the defect X of the detection object) of an incomplete chip Cb.

Figure 5(b) shows an example of the brightness value of each pixel of the reference image Pf.

Figure 5(c) shows an example of the brightness value of each pixel of the inspection image Pk.

Figure 5(d) shows an example of the difference in brightness between the inspection image Pk and the reference image Pf.

The image processing unit 7 processes the image Ps captured by the imaging unit 3. Specifically, the image processing unit 7 includes a dynamic mask processing unit 71 and a comparison inspection unit 72, etc.

The dynamic mask processing unit 71 replaces the brightness value of the pixel (the part indicated by the dotted line Y) corresponding to the non-inspection area Rn in the pixel constituting the image Ps of the incomplete chip Cb formed by the inspection area Ri and the non-inspection area Rn with the brightness value of the reference image Pf based on the position information and chip layout on the wafer W where the image Ps is captured, and generates the inspection image Pk.

Specifically, the relative position of the wafer W and the imaging unit 3 when the image Ps is captured is obtained, and the position information is compared with the chip layout to determine which pixel in the captured image Ps is located in the inspection area Ri or the non-inspection area Rn. In addition, for the pixels located in the non-inspection area Rn (the part indicated by the dotted line Y), the brightness value of the corresponding pixel of the reference image Pf is replaced and the inspection image Pk is generated. At this time, the brightness value of the pixels in the image Ps that do not cover the non-inspection area Rn (also called the inspection object pixel) is transferred to the inspection image Pk. That is, if there is a defect X in the inspection object pixel, the brightness value of the defect X captured is reflected in the inspection image Pk.

The comparison inspection unit 72 compares the inspection image Pk generated by the dynamic mask processing unit 71 with the reference image Pf, and inspects the inspection target portion. Specifically, the comparison inspection unit 72 compares the inspection image Pk of the inspection target portion including the repeated appearance pattern of the device chip C with the corresponding pixels of the reference image Pf. For each pixel and pixel group, if the difference or variance value of the brightness value is within a preset range, it is judged as normal, and if it is outside the range, it is judged as abnormal.

Therefore, the inspection image Pk is compared with the reference image Pf in the comparison inspection unit 72, and the defect X can be detected by extracting the portion where the difference in brightness value is outside the reference range.

In addition to the above, the image processing unit 7 also has the following functions as needed, namely: joining the segmented images, or extracting (also called correction) the required inspection area from the whole image including the edge, or correcting the brightness value of each pixel, or correcting the curvature of the image Ps, or performing calculation processing, etc.

The reference image registering unit 6, chip layout registering unit 5, and image processing unit 7 of the present invention are composed of a computer CP (i.e., hardware) having an image processing function, and its execution program (i.e., software). More specifically, the chip layout registering unit 5 and the reference image registering unit 6 are composed of a portion of the memory unit (register, memory, etc.) or recording medium (HDD, SSD, etc.) of the computer CP, and the image processing unit 7 is composed of the image processing unit (so-called GPU) of the computer CP.

Computer CPs, for example, have the following functions and roles:

‧Record the information of each inspection type, such as the imaging magnification and imaging position, imaging path T, imaging interval (pitch, time interval), feeding speed, etc. (the so-called inspection sequence)

‧Record the inspection conditions for each inspection type (normal range of brightness value and variance value of the inspection object, etc.)

‧Connect with user interface (keyboard, SW, monitor, etc.) to input and output various information

‧Connect to the control unit CN or external host computer to input and output signals or data

In addition, the examination steps and examination conditions of each examination type are also called prescription information and examination prescription.

The control unit CN, for example, has the following functions and roles:

‧Output a signal to hold/release wafer W to wafer holding unit 2

‧Control the rotator mechanism 34 to switch the objective lens (photographic magnification) used

‧Output light trigger to the lighting unit 31

‧ Output camera 35 to trigger the camera to shoot

‧Drive control of relative moving part 4: monitor the current position of X-axis slider 41, Y-axis slider 42, and rotating mechanism 43, and output drive signal

‧Output the current position information of the relative moving part 4 (X-axis slide 41, Y-axis slide 42, rotating mechanism 43) to the computer CP

‧Control each department based on inspection prescription

In addition, the image capture trigger is output from the control unit 9 to the image capture unit 3, which can be illustrated as follows:

‧The imaging unit 3 is made to scan and move in the X direction, and the illumination light L1 is made to emit light for a very short time (so-called stroboscopic light) every time it moves a certain distance.

‧Or, the imaging unit 3 is moved to a specific position and then stopped, and the illumination light L1 is irradiated to perform imaging (so-called step-and-repeat method).

Furthermore, the so-called imaging trigger means an image capture instruction for the camera 35 and the image processing unit 7, an instruction for the illumination light L1 to emit light, etc. Specifically, as an imaging trigger, it is set as (case 1) to flash the illumination light L1 during the time (the so-called exposure time) that the camera 35 can shoot, or (case 2) to take an image during the time of irradiating the illumination light L1. Alternatively, the imaging trigger is not limited to an instruction for the camera 35, and can be (case 3) an image capture instruction for the image processing device that obtains the image. In this way, it can also correspond to the form of the image signal or image data that is outputted successively from the camera 35.

More specifically, the control unit CN is composed of a computer or a programmable logic controller (i.e. hardware) and its execution program (i.e. software).

[Inspection process]

FIG6 is a flowchart of an example of a form in which the present invention is embodied. FIG6 shows, as a series of processes, the sequence of using the wafer appearance inspection device 1 to photograph and inspect the inspection area Ri and the non-inspection area Rn of the device chip C disposed on the wafer W step by step.

Before inspection, the chip layout of the inspection area Ri and non-inspection area Rn of the wafer W that specifies the reference posture and reference position relative to the wafer W is pre-registered (step s11), and the reference image Pf is pre-registered (step s12). In addition, the inspection prescription is set to determine the inspection mode and sequence of the wafer W (step s13).

Next, the wafer W is placed on the mounting table 20 of the wafer appearance inspection device 1 (step s21), and moved to the reading position of the reference mask (not shown) formed on the wafer W for alignment (step s22).

While the wafer W and the imaging mechanism 3 are moved relative to each other, an image Ps including the inspection object is captured (step s23), and the captured image Ps is processed as follows.

First, for the image Ps of the incomplete chip Cb formed by crossing the inspection area Ri and the non-inspection area Rn, based on the position information on the wafer W where the image Ps was captured and the chip layout, the brightness values of the pixels constituting the image Ps corresponding to the non-inspection area Rn are replaced with the brightness values of the reference image Pf, thereby generating the inspection image Pk (step s31).

Then, the inspection image Pk is compared with the reference image Pf, and the inspection object is inspected (step s32). Specifically, the corresponding pixels of the inspection image Pk and the reference image Pf are compared with each other, and a judgment is made for each pixel or pixel group. If the difference or variance value of the brightness value is within the preset range, it is judged as normal, and if it is outside the range, it is judged as abnormal. In addition, the defect X is detected by extracting the part where the difference of the brightness value is outside the reference range.

Then, for all the pre-specified inspection target parts, it is determined whether the imaging and inspection are completed (step s41). If not, the imaging and inspection are continued. On the other hand, if the imaging and inspection are completed, the wafer W is sent out of the device (step s42).

Then, determine whether there is a next wafer W (step s43). If there is a next wafer W to be inspected, repeat the above steps s21~s43. On the other hand, if there is no next wafer W, then end a series of processes.

According to the wafer appearance inspection device 1 and inspection method of the present invention, even if there is an incomplete chip Cb formed by crossing the inspection area Ri and the non-inspection area Rn on the wafer W, dynamic mask processing can be performed according to the shooting position to generate an inspection image Pk, and the inspection image Pk is compared with the reference image Pf to perform the desired inspection. At this time, even if it is an incomplete chip Cb, as long as it is the inspection area Ri of the wafer W, the inspection is based on the complete chip Cn, and the inspection area Ri of the wafer W can obtain the desired inspection result as a whole. In addition, there is no need to perform special processing on suspected defects. That is, whether it is a complete chip Cn or an incomplete chip Cb, the inspection area Ri of the wafer W can obtain the desired inspection result as a whole, and the processing time can be prevented from increasing.

[Example of changes]

In addition, in the above text, as a specific example of inspection, the structure and steps of detecting the defect X of foreign matter attached to the circuit pattern are shown. However, in the embodiment of the present invention, the inspection object is not only the attachment of foreign matter, but also determines whether there is a short circuit or a broken line, or whether there are no defects, etc., and it is sufficient to determine the shooting conditions or inspection conditions, etc.

In addition, in the above text, FIG. 6 is shown as a step sequence for realizing the present invention, and the registration and setting steps are performed in the order of chip layout registration (step s11), reference image Pf registration (step s12), and inspection prescription setting (step s13), but it can be performed in a sequence other than this. For example, the reference image Pf can be registered before the chip layout is registered, and it can also be performed before the inspection prescription setting.

In addition, the above text shows an example in which the shooting range of the camera 35 of the imaging unit 3 is set to include the imaging area F of the inspection target part of one device chip C. However, the shooting range of the camera 35 can be divided into the inspection target part of each device chip C, and can also be set to a wide range including the inspection target parts of multiple device chips C.

1: Wafer appearance inspection device

1f: Device frame

2: Wafer holding part

3: Camera Department

4: Relative moving part

5: Chip layout registration department

6: Standard image registration department

7: Image processing department

20: Loading platform

30: Lens barrel

31: Lighting Department

32: Half-reflective mirror

33a,33b:Objective lens

34: Rotator mechanism

35: Camera

36: Imaging components

41: X-axis slide

42: Y-axis slide

43: Rotating mechanism

71: Dynamic mask processing unit

72: Comparative Inspection Department

C: Device chip

CN: Control Department

CP: Computer

F: Photography area (field of view)

L1: lighting light

L2: Light incident from the wafer side (reflected light, scattered light)

Pf: Baseline image

Pk: Check image (after processing)

Ps:Image

W: Wafer/workpiece

θ: direction

Claims (2)

A wafer appearance inspection device that photographs the inspection target portion of the repeated appearance pattern of a device chip formed on a wafer and inspects the device chip by comparing it with a reference image, and is characterized by having: a wafer holding portion that holds the aforementioned wafer; an imaging portion that photographs an image including the aforementioned inspection target portion; a relative moving portion that moves the aforementioned wafer holding portion and the aforementioned imaging portion relative to each other; a chip layout registration portion that registers a chip layout that specifies the position information of the inspection area and non-inspection area of the wafer relative to the reference posture and reference position of the aforementioned wafer, as well as the configuration information of the device chip; a reference image registration portion that registers the aforementioned reference image; and an image processing unit, which processes the aforementioned image captured by the aforementioned camera unit; and the aforementioned image processing unit comprises: a dynamic mask processing unit, which replaces the brightness values of the pixels corresponding to the aforementioned non-inspection area in the pixels constituting the aforementioned image of the aforementioned inspection target portion formed by capturing the aforementioned image across the aforementioned inspection area and the aforementioned non-inspection area, based on the position information of the aforementioned image captured on the aforementioned wafer and the aforementioned chip layout, with the brightness values of the aforementioned reference image, thereby generating an inspection image; and a comparison inspection unit, which compares the aforementioned inspection image generated by the aforementioned dynamic mask processing unit with the aforementioned reference image, and inspects the aforementioned inspection target portion. A wafer appearance inspection method is to photograph the inspection target part of the repeated appearance pattern of the device chip formed on the wafer, and compare it with the reference image to inspect the device chip, which is characterized by having: The step of pre-registering the chip layout, the chip layout is to specify the inspection area and non-inspection area of the wafer relative to the reference posture and reference position of the aforementioned wafer; The step of pre-registering the aforementioned reference image; While moving the aforementioned wafer and the camera mechanism relative to each other, photographing the image containing the aforementioned inspection target part The method comprises the steps of: for the image of the incomplete chip formed by the inspection area and the non-inspection area, replacing the brightness values of the pixels corresponding to the non-inspection area in the pixels constituting the image with the brightness values of the reference image based on the position information of the image on the wafer and the chip layout, thereby generating an inspection image; and comparing the inspection image with the reference image to inspect the inspection object.