JP2000283929A - Wiring pattern inspection method, and its device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect defects with high accuracy by detecting defects in accordance with the defect detection standard based on the wiring direction set for each area for inspection divided based on the wiring direction of an excellent image to suppress the excessive detection of defects. SOLUTION: A candidate defect is detected from the differential image between an image of a work to be inspected and the image of an excellent work of the same type as the work to be inspected. A defect is detected from the candidate defect in accordance with a defect detection standard based on an area for inspection divided based on the wiring direction of the image of an excellent work and the wiring direction set for each area for inspection. This means that a candidate defect can be detected through the deviation in image from the image of the excellent work even if the work to be inspected is excellent. The characteristic of the candidate defect to be eliminated is different by each area for inspection. For example, candidate defects 1k, 1l and 1m are present in a wiring area 22 in the transverse direction while only one candidate defect 1m comprises two or more pixels in the direction other than the transverse direction. Thus, the candidate defects 1k and 1l are eliminated for the possibility of excessive detection.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for inspecting a wiring pattern, and more particularly to an inspection method and an apparatus for detecting a defect from a difference image between an image to be inspected and a good image.

[0002] In recent years, as semiconductor devices have become larger and more highly integrated, semiconductor wiring patterns and the like have been miniaturized, and accordingly, the importance of semiconductor device inspection has become more and more important. At present, in a so-called post-process after a semiconductor device process process, an appearance inspection for inspecting a defect of a wiring pattern on a semiconductor device, an adhesion of a foreign substance on a device surface, and the like is performed.

Conventionally, such an appearance inspection has been carried out by a visual inspection using a microscope by an inspector. However, the finer elements make the wiring pattern more complicated, which causes problems such as an increase in inspection time and fatigue of the inspector. Has occurred. Also, the inspection standards of individual inspectors vary, making it difficult to keep the standards constant.

[0004] Under such circumstances, attempts have been made to automate the visual inspection by a machine in order to shorten the inspection time and keep the inspection standard constant.

[0005]

2. Description of the Related Art As an apparatus for automating the appearance inspection of a semiconductor device, there are, for example, those disclosed in Japanese Patent Application Laid-Open Nos. Hei 7-190439 and Hei 8-334476. In each of these cases, an image of a semiconductor element to be inspected is captured by a camera or the like, and an image of a non-defective semiconductor element of the same type and an image of the semiconductor element to be inspected stored in a storage device in advance are located. This is an inspection technique for determining the difference image from both screens and detecting a defect of a semiconductor element to be inspected.

[0006]

However, a transparent film or metal wiring is formed on the surface of the semiconductor element, and an image obtained by imaging the element surface has noise and distortion.
In general, in an inspection method for comparing an image of a test object with a non-defective product, an alignment error occurs between the image of the test object and a non-defective image. Therefore, the conventional automatic inspection has a problem that a normal wiring pattern to be inspected is also detected as a defect.

SUMMARY OF THE INVENTION It is an object of the present invention to eliminate the above-described defect detection caused by image noise, distortion, alignment error, etc., thereby suppressing excessive detection of defects and performing highly accurate defect detection. .

[0008]

Means for Solving the Problems In order to solve the above problems, the present invention is characterized by taking the following means.

According to the first aspect of the present invention, a defect candidate is detected from a difference image between an image of an inspection object and a non-defective image of the same type as the inspection object, and a defect image of a non-defective image of the same type as the inspection object is detected. A defect is detected from the defect candidate based on a region to be inspected divided based on the wiring direction and a defect detection criterion based on the wiring direction set for each region to be inspected.

According to a second aspect of the present invention, a defect candidate is detected from a difference image between an image of an inspection object and an image of a non-defective product of the same type as the inspection object, and a defect image of a non-defective image of the same type as the inspection object is detected. Defect detection is performed from the defect candidate based on the inspection area divided based on the wiring direction and a defect detection criterion based on the wiring direction set for each boundary area between the inspection areas. Things.

[0011] The invention according to claim 3 is the invention according to claim 1 or 2.
In the invention described above, the wiring direction is detected based on an image obtained by differentiating the luminance of a non-defective image of the same type.

The invention according to claim 4 is the first or second invention.
In the invention described above, the defect detection criterion is set based on the size of a defect in a direction perpendicular or oblique to the wiring direction.

According to a fifth aspect of the present invention, a defect candidate is detected from a difference image between an image of the inspection target and an image of a non-defective product of the same type as the inspection target, and a defect image of the non-defective image of the same type as the inspection target is detected. A defect is detected from the defect candidate based on a region to be inspected divided into regions having different luminances and a defect detection criterion set for each boundary region of the region to be inspected and based on a wiring direction in the boundary region. It is characterized by the following.

According to a sixth aspect of the present invention, there is provided a camera for imaging an object to be inspected, a first storage device connected to the camera for storing an image output from the camera, and a first storage device for storing an image of a good product. A second storage device, connected to the first storage device and the second storage device, detects a defect candidate from a difference image between the image of the inspection target and the image of the non-defective product, and A control device for detecting a defect from the defect candidate, based on a region to be inspected divided based on a wiring direction of an image of a non-defective product of the same type, and a defect detection criterion based on the wiring direction set for each region to be inspected; It is characterized by having.

According to a seventh aspect of the present invention, there is provided a camera for imaging an object to be inspected, a first storage device connected to the camera for storing an image outputted from the camera, and a first storage device for storing an image of a good product. A second storage device, connected to the first storage device and the second storage device, detects a defect candidate from a difference image between the image of the inspection target and the image of the non-defective product, and Based on the inspection area divided based on the wiring direction of a non-defective image of the same type and a defect detection criterion based on the wiring direction set for each boundary area between the inspection areas, defect detection is performed from the defect candidate. And a control device for performing the control.

The invention according to claim 8 is a camera for picking up an object to be inspected, a first storage device connected to the camera for storing an image output from the camera, and a first storage device for storing an image of a good product. A second storage device, connected to the first storage device and the second storage device, detects a defect candidate from a difference image between the image of the inspection target and the image of the non-defective product, and The defect is determined based on a region to be inspected divided into regions having different luminances of images of non-defective products of the same type, and a defect detection criterion set for each boundary region of the region to be inspected and based on a wiring direction in the boundary region. And a control device for detecting defects from candidates.

Each of the above means operates as follows.

According to the first aspect of the present invention, defect detection is performed based on the wiring direction for each inspection area divided into a plurality of inspection areas based on the wiring direction of a non-defective image of the same type as the inspection object. By setting the reference, it is possible to suppress overdetection or oversight of a defect caused by an image shift between the image of the inspection target and the non-defective image.

According to the second aspect of the present invention, the inspection area is divided based on the wiring direction of the non-defective image, and for each boundary area between the divided inspection areas, a defect detection criterion is determined based on the wiring direction. Is set, excessive detection and oversight of defects can be suppressed from a macro viewpoint.

According to the third aspect of the present invention, the wiring direction of the object to be inspected can be detected from the image obtained by differentiating the luminance of the image of the object to be inspected.

According to the fourth aspect of the present invention, the defect detection reference is set based on the size of the defect in a direction perpendicular or oblique to the wiring direction, so that the image of the inspection object and the non-defective image can be compared. Defect candidates resulting from image shift can be eliminated.

According to the fifth aspect of the present invention, the inspection area is divided into areas having different luminances of the image of the inspection object, and the wiring in the boundary area is divided for each boundary area of the divided inspection areas. By setting defect detection criteria based on direction,
Excessive detection and oversight of defects can be suppressed from a microscopic viewpoint.

According to the sixth aspect of the present invention, the inspection area is divided based on the wiring direction of the image of the inspection object, and a defect detection criterion is determined for each of the divided inspection areas based on the wiring direction. By setting, excessive detection and oversight of defects can be suppressed.

According to the seventh aspect of the present invention, the inspection area is divided based on the wiring direction of the image of the inspection object, and each boundary area between the divided inspection areas is divided based on the wiring direction. By setting the defect detection criterion, it is possible to suppress excessive detection and oversight of defects from a macro viewpoint.

According to the eighth aspect of the present invention, the image to be inspected is divided into regions having different luminances, and each boundary region between the divided inspection regions is divided into regions within the boundary region. By setting the defect detection criterion based on the wiring direction, excessive detection and oversight of defects can be suppressed from a microscopic viewpoint.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, as an embodiment, an inspection method and an inspection apparatus for a wiring pattern of a semiconductor element will be described. However, the present invention is not limited to application to a semiconductor element, but can be applied to any inspection of a printed circuit board, a piezoelectric element, or the like having a wiring pattern on the surface.

(First Embodiment) In the first embodiment, a case where a semiconductor device is inspected from a macroscopic view will be described.

FIGS. 1 to 7 are views for explaining a first embodiment of the present invention.

First, a process for obtaining an image of a non-defective semiconductor device of the same type as the semiconductor device to be inspected will be described.

First, an image of a part of a semiconductor chip which has been recognized as a non-defective product is taken. This image is shown in FIG.

FIG. 1 is a diagram showing a part of an image of a non-defective semiconductor device of the same type as the object to be inspected. In the drawing, reference numeral 11 denotes a substrate image, which corresponds to a portion of the non-defective semiconductor device where no wiring pattern or the like is formed on the surface. Also,
Reference numeral 21 denotes a horizontal wiring image, which is four horizontal wiring images of a good semiconductor device. Reference numeral 31 denotes a vertical wiring image, which is four vertical wiring images of a good semiconductor device. Reference numeral 41 denotes a memory cell image, which is an image corresponding to a region where a memory cell is formed in a good semiconductor device. Here, in FIG. 1, the image of the non-defective semiconductor device is expressed in black and white, but actually, each pixel has a brightness value corresponding to the luminance.

The image of the non-defective semiconductor device is obtained not only by imaging a semiconductor chip which has been recognized as a non-defective product, but also by imaging an area of a part of the semiconductor chip having no defect and from another semiconductor chip. It can also be obtained by combining with other parts without defects. Furthermore, it can also be obtained by adding the images of a plurality of different semiconductor chips and taking an average. Although FIG. 1 shows an image of a part of the semiconductor chip, an image of the entire chip or an image of a wafer state may be used.

Next, the step of dividing the region to be inspected based on the wiring direction of the semiconductor device will be described.

First, the setting of a region including a horizontal edge component will be described.

FIG. 2 is a view showing an image obtained by differentiating the image shown in FIG. 1 in the vertical direction.

First, the differential processing in the vertical direction will be specifically described. The image shown in FIG. 1 is, for example, 1024 ×
It is assumed that the image data is composed of 1024 pixels in a two-dimensional array, and that one byte of image data corresponding to luminance is assigned to each pixel. In this case, for one column in the vertical direction of the two-dimensional array, a difference in pixel data between adjacent pixels is calculated, and this value is sequentially stored in another image memory having an area of 1024 × 1023 bytes. This is repeated for all vertical columns of the two-dimensional array. Thereby, if an image having a luminance corresponding to the image data stored in the other image memory is created,
An image obtained by differentiating the image shown in FIG. 1 in the vertical direction is completed. This is the image shown in FIG.

As a result of the above differential processing, the vertical wiring image 31 is removed from the wiring areas 21 and 31 in FIG.
Only the image corresponding to the horizontal wiring image 21 including the horizontal edge component remains. In addition, the horizontal wiring image 21 in FIG. 2, which is an image obtained by differentiating the four wiring images in the horizontal wiring image 21 in FIG. 1, corresponds to the edge portions of the four wiring images. Eight wiring images appear.
Similarly, the vertical wiring area in the memory cell image 41 in FIG. 1 is removed by the vertical differentiation process.
Only the image containing the horizontal edge component remains.

In the above-described differentiation processing, there is a method of using a filter such as Sobel or Laplacian in addition to the processing of simply differentiating the luminance.

FIG. 3 is a diagram showing a region including a horizontal edge component. FIG. 3 shows a state in which the horizontal wiring area 22 and the memory cell area 42 shown in FIG. 2 are set. As a method of setting a region having a contour as shown in FIG. 3 from the image of FIG.
After performing a binarization process on the image with a predetermined threshold value for the luminance, further performing an expansion / contraction process on each pixel, a connected region of pixels is connected to form a region having a contour as shown in FIG. Perform processing to set. Note that the binarization processing is not particularly essential.

Next, setting of a region including a vertical edge component will be described.

FIG. 4 is a diagram showing an image obtained by differentiating the image shown in FIG. 1 in the horizontal direction. The method of the differentiation process is to calculate the difference between the pixel data in the horizontal direction instead of the difference in the pixel data in the vertical direction in the vertical differentiation process. As a result of the horizontal differentiation, the vertical wiring image 31 and the memory cell region 41 including the vertical edge components are left among the wiring images 21 and 31 and the memory cell image 41 in FIG.

FIG. 5 is a diagram showing a region including a vertical edge component.

FIG. 5 shows a state where the vertical wiring region 32 and the memory cell region 42 shown in FIG. 4 are set. The process of setting a region having a contour as shown in FIG. 5 from the image of FIG. 4 is the same as that described with reference to FIG.

Next, the division of the inspection area will be described.

FIG. 6 is a diagram showing a state where the region to be inspected is divided. The image shown in FIG. 6 is a composite of the horizontal region set in FIG. 3 and the vertical region set in FIG. A horizontal wiring region 22 as a region including a horizontal edge component, a vertical wiring region 32 as a region including a vertical edge component, and a memory cell region 42 as a region including any of the horizontal and vertical edge components. The substrate region 12 is set as a region not including the edge component. In this way, the region to be inspected is divided.

In this embodiment, the direction of the differential processing is
Although the two directions are the vertical direction and the horizontal direction, the differential processing may be performed in an oblique direction according to the wiring direction on the semiconductor surface. Also,
In the above description, the region to be inspected is divided by detecting the wiring direction by differentiating the image of the semiconductor, but instead, an operator may give an instruction by looking at the image of the surface of the semiconductor device, or The inspection area may be divided by detecting the wiring direction from a design drawing, CAD data, or the like.

Next, a process for setting a defect detection reference based on the wiring direction will be described.

FIG. 7 shows each of the divided inspection areas shown in FIG. Even if the inspection target is a non-defective product, a defect candidate is detected due to an image deviation from a non-defective image. The characteristics of such a defect candidate to be excluded differ for each inspection area as follows.

That is, in the horizontal wiring region 22, a defect candidate having a long shape in the horizontal direction is likely to be detected even in a non-defective product due to a positional shift or the like. Therefore, in this area,
A defect candidate having a vertically long shape should be detected as a defect, but a defect candidate having a short vertical direction should be excluded even if it has a long shape in the horizontal direction. In the present embodiment, in the horizontal wiring region 22 including the edge component in the horizontal direction, a defect detection criterion for detecting a defect candidate other than the horizontal direction, that is, a defect candidate including two pixels in the vertical direction or the diagonal direction, as a defect. I do.

Conversely, in the vertical wiring area 32, a defect candidate having a long shape in the vertical direction is easily detected. Therefore,
In the present embodiment, in the vertical wiring region 32 including a vertical edge component, a defect detection criterion for detecting a defect candidate other than the vertical direction, that is, a defect candidate including two pixels in the horizontal direction or the diagonal direction, as a defect. I do.

In the substrate region 12, unlike the wiring region, no defect candidate to be eliminated due to a positional shift or the like is not detected, so that at least one pixel is detected as a defect because the noise at the time of the difference is small. This is used as a defect detection standard.

In the memory cell area 42, both the vertical edge component and the horizontal edge component are mixed, so that the defect candidates in both the vertical and horizontal shapes need to be defective. However, in order to eliminate a defect candidate caused by a positional shift, a defect candidate consisting of one pixel is not regarded as a defect. Therefore, a case where a defect candidate is composed of two or more pixels is used as a defect detection reference for detecting a defect.

The above defect detection criterion is an example,
It is determined by the number of pixels in the inspection area, the magnification of the lens when imaging the inspection object, the width of the wiring image, and the like, and is not limited to the defect criterion. If the wiring width in each region is extremely different from one region to another, it is also possible to adjust the image magnification with respect to the inspection target and set a defect detection reference for each region at another stage. Also, especially in areas where the standards do not need to be strict,
The reference can be relaxed only in that area. For example, if the defect generated in the substrate portion does not matter much, the reference of the substrate area may be larger in the number of pixels than the other references.

The horizontal wiring area 2 set as described above
2. The positions of the vertical wiring area 32, the memory cell area 42, and the substrate area 12, and the defect detection criteria set for each area are stored as test data in a storage device such as a hard disk device. Next, in a step of performing an actual product test, the control device reads out the test data stored in advance, and sets an inspection area and a defect detection criterion on the image of the product to be inspected based on the test data. Is done.

Next, a process of detecting a defect candidate from a difference image between an image of a product to be inspected as a product and an image of a good product will be described with reference to FIG.
This will be described with reference to FIG.

First, the image of the object to be inspected is aligned with a non-defective image, a difference image between the two images is obtained, and binarization processing is performed at a predetermined threshold value to extract defect candidates 1a to 1m. Here, the non-defective image may be the same as the above-described non-defective semiconductor device image, or may be separately obtained by a method similar to the above-described non-defective image acquisition method. In FIG. 7, defect candidates 1a to 1m are detected, and here, defect candidates 1a, 1b, 1c, 1f, 1i, 1
j and 11 consist of one pixel. In addition, defect candidates 1h, 1k
Is composed of two pixels in the horizontal direction, the defect candidates 1d and 1m are composed of two pixels in the vertical direction, and the defect candidate 1e is composed of two pixels in the oblique direction. Further, 1 g is composed of four pixels. In this embodiment, one pixel corresponds to 0.1 μm.

In the wiring area 22 in the horizontal direction, the defect candidate 1
k, 11 and 1 m exist. Of these, 2 other than the horizontal direction
Only the defect candidate 1m is composed of pixels or more. Therefore, among the defect candidates 1k, 1l, and 1m, 1k and 1l are removed from the defect candidates because of the possibility of an overdetection defect, and the defect candidate m is detected as a defect.

Similarly, defect candidates 1a, 1d, 1f, 1h, and 1j are present in the vertical wiring region 32. Among them, the one composed of two or more pixels other than the vertical direction is a defect candidate 1
h only. Therefore, the defect candidates 1a, 1d, 1f, 1
Since 1a, 1d, 1f, and 1j out of h and 1j are likely to be overdetected defects, they are removed from defect candidates, and defect candidate h is detected as a defect.

In the substrate region 12, the defect candidate 1
e and 1i are present, but since one or more pixels are detected as defects, both the defect candidates 1e and 1i are detected as defects.

In the memory cell area 42, there are defect candidates 1b, 1c and 1g. Among them, only one defect candidate 1g is composed of two or more pixels. Therefore, among the defect candidates 1b, 1c, and 1g, 1b and 1c are removed from the defect candidates because of a high possibility of the overdetection defect, and the defect candidate 1g
Are detected as defects. In this manner, the defect candidates 1e, 1g, 1h, 1i, and 1m among the defect candidates 1a to 1m are detected as defects based on the defect detection criteria set for each region. As a result, for example, a defect candidate i which may be overlooked as a defect when the defect detection criterion is uniformly set to two or more pixels in any region can be detected as a defect. Defect candidates 1a, 1b, 1c, 1d, 1f, 1j, 1k, 1l that may be excessively detected as defects when the number of pixels is more than
Of defect candidates can be removed from defect detection.

In the above description, the defect detection criterion is set for each pixel, but may be set for each sub-pixel instead. This can be realized by performing the above-described defect detection using an image regenerated by performing linear interpolation between pixels or the like. Thus, for example, when the original image is enlarged four times, the reference can be set in units of 1/4 pixel.

(Second Embodiment) In the second embodiment, a case will be described in which a semiconductor device is inspected from a macroscopic viewpoint as compared with the first embodiment. That is, each region in the first embodiment is treated as one pattern, and the contour portion of the region is inspected.

The second embodiment differs from the first embodiment in that a defect detection reference is set based on the wiring direction for each boundary region between inspection areas divided based on the wiring direction of the semiconductor device. , Inspecting its border area. The other steps are the same as in the first embodiment, and the description thereof will be omitted.

FIG. 8 is a diagram showing a state in which a region to be inspected is divided.

The image shown in FIG. 8 further includes inspection regions 23, 43, 33,
44 and 53 are set. 8, the same components as those in FIG. 6 are denoted by the same reference numerals, and the description thereof will be omitted. In FIG. 8, reference numerals 23 and 43 denote horizontal boundary areas,
Reference numeral 4 denotes a vertical boundary region, and 53 denotes an oblique boundary region. Here, the horizontal boundary region 23 is a region indicating the boundary between the horizontal wiring region 22 and the substrate region 12, the vertical boundary region 33 is a region indicating the boundary between the vertical wiring region 32 and the substrate region 12, The boundary region 43 and the vertical boundary region 44 are both a region indicating the boundary between the memory cell region 42 and the substrate region 12, and the oblique boundary region 53 is a region indicating the boundary between the horizontal wiring region 22 and the vertical wiring region 32. Are respectively shown.

In this embodiment, the wiring regions 22, 3
2. The memory cell area 42 is regarded as one wiring pattern, and each boundary area 23, 33,
Defect candidates occurring in 43, 44 and 53 are eliminated by setting a defect detection criterion based on the wiring direction in each boundary area.

First, a boundary area is set. The method of setting the boundary region of each region as shown in FIG. 8 from the image shown in FIG. 6 of the first embodiment is performed by, for example, setting the range of one pixel from the boundary of each region to the inside and outside, respectively. Set. As described in the first embodiment, the inspection target area shown in FIG. 6 can be set from the visual inspection of the operator, the design drawing of the semiconductor device, and the CAD data, in addition to the differential processing of the image of the semiconductor.

Next, the defect detection criterion set in each of the boundary areas 23, 33, 43, 44, 53 created in this way will be described.

In the horizontal boundary regions 23 and 43, a defect candidate having a long shape in the horizontal direction is easily detected even if it is a non-defective product due to a displacement or the like. Therefore, in this area,
A defect candidate having a vertically long shape should be detected as a defect, but a defect candidate having a short vertical direction should be excluded even if it has a long shape in the horizontal direction. In the present embodiment, in the horizontal boundary region 23 including a horizontal edge component, a defect detection criterion for detecting a defect other than the horizontal direction, that is, including two pixels in the vertical or diagonal direction, as a defect. .

In the vertical boundary regions 33 and 44, a defect having a long shape in the vertical direction is easily detected. Therefore,
In the present embodiment, in the vertical boundary region 33 including the vertical edge component, a defect detection criterion for detecting a defect candidate other than the vertical direction, that is, including two pixels in the horizontal or oblique direction as a defect. .

Further, in the oblique boundary region 53, a defect having a shape that is long in the oblique direction rising to the right is easily detected.
Therefore, in this embodiment, in the region 53 including the edge component in the obliquely upward direction, the defect candidate includes two pixels other than the obliquely upward direction, that is, the vertical direction, the horizontal direction, or the obliquely upward direction to the left. The case is defined as a defect detection criterion for detecting a defect.

The above defect detection criterion is an example,
It is determined by the number of pixels in the inspection area, the optical magnification when imaging the inspection object, the size of the area, and the like, and is not limited to the defect criterion described above.

(Third Embodiment) In a third embodiment, a case where a semiconductor device is inspected from a microscopic point of view will be described. That is, in the third embodiment, a region to be inspected is set for each wiring pattern such as wiring, and a defect detection reference is set for both ends of the wiring based on the wiring direction. Therefore, the other steps are the same as those of the first embodiment or the second embodiment, and the description thereof will be omitted.

First, a process for obtaining an image of a good semiconductor device will be described.

FIG. 9 is a diagram showing a part of an image of a semiconductor device of the same type as the object to be inspected. FIG. 9 is an enlarged view of a portion of the vertical wiring region 22 of FIG. However, the number of wirings is three for convenience of explanation.

FIG. 9 shows an image in which a part of a semiconductor chip which has been recognized as a non-defective product is imaged, and thereafter, a boundary portion between regions having different luminances of the image is shown. This border is
Since it corresponds to the edge portions at both ends of the three wires, 6
A book image appears. In the figure, 11 indicates a board image, and 31 indicates a vertical wiring image. The method of acquiring an image of the semiconductor device of the same type as the object to be inspected is the same as that described in the first embodiment.

Next, the step of dividing the region to be inspected will be described.

FIG. 10 is a diagram showing a state where the inspection area is divided. FIG. 10 illustrates a state where the inspection target area 33 is set in each of the vertical wiring area 32 and the area between the areas 32 illustrated in FIG. 9. In the figure, 32 indicates a vertical wiring area, and 33 indicates a vertical boundary area. The size of the vertical boundary region 33 is, for example, three pixels. In the figure, 2a to 2g indicate defect candidates. The method of detecting a defect candidate is the same as in the first embodiment.

Further, the processing for setting the area having the contour as shown in FIG. 10 from the image of FIG. 9 is the same as the processing for setting the area as shown in FIG. 3 from the image of FIG. 2 in the first embodiment. . That is, after performing the expansion / contraction processing of each pixel with respect to the image of FIG. 9, a region having a contour as shown in FIG. 10 is set by connecting the connected regions of the pixels.

Next, a description will be given of a process of setting a defect detection criterion in the divided inspection area.

First, the wiring direction in the inspection area is detected. This is determined based on the shape of the region constituting the vertical boundary region 33. For example, the vertical boundary area 33
It is conceivable that a rectangle enclosing is assumed, and the lengths and inclinations of the four sides are calculated and determined from the XY coordinates of the four points. Thereby, it can be determined that the vertical boundary region 33 has a shape that is long in the vertical direction.

As another method for detecting the wiring direction in the vertical boundary area 33, the vertical wiring image 31 shown in FIG. 9 is used as described with reference to FIGS. 2 and 4 of the first embodiment. It is also conceivable to set the vertical boundary region 33 after performing a differentiating process. In this case, since the wiring direction in the area is detected in advance, it is not necessary to determine the shape from the XY coordinates as described above. Further, as described in the first embodiment, it is also possible to set from visual inspection of an operator, a design drawing of a semiconductor device, and CAD data.

Next, a defect detection criterion in the vertical boundary area 33 is set.

[0107] Defect candidates due to an image shift occurring when a difference image is obtained are more likely to occur in the boundary area 33 than in the wiring area 32. In the present embodiment, the wiring image in the wiring region 32 is in the vertical direction, and the boundary region 33 has a shape that spreads in the vertical direction. Accordingly, a defect candidate having a long shape in the vertical direction is easily detected. . Therefore, in the present embodiment, a defect detection criterion for detecting a defect in the boundary area 33 as a defect when the defect candidate includes two pixels in a direction other than the vertical direction, that is, a horizontal direction or an oblique direction.

In the wiring region 32 and the substrate region 12, unlike the boundary region 33, a defect candidate to be eliminated due to displacement or the like is rarely detected and noise at the time of difference is small. As a defect detection criterion.

It is to be noted that the defect detection criterion is determined by the number of pixels in the inspection area, the magnification of the lens when imaging the inspection object, and the like, as in the first embodiment.

According to the defect detection criteria determined as described above,
Whether the defect candidates 2a to 2g are detected as defects,
This will be described with reference to FIG.

In the boundary area 33, the defect candidates 2c, 2e
Exists. Of these, only the defect candidate 2e is composed of two or more pixels other than the vertical direction. Accordingly, among the defect candidates 2c and 2e, 2c is removed from the defect candidates because there is a possibility of an overdetection defect, and the defect candidate 2e is detected as a defect.

In the wiring area 32, the defect candidate 2
Although there are a, 2b, 2d, 2f, and 2g, since one or more pixels are detected as defects, all the defect candidates are detected as defects.

As described above, among the defect candidates 2a to 2g, the defect candidates 2a, 2b, 2d, 2e, 2f, 2g are detected as defects based on the defect detection criteria set for each area.

It is to be noted that the defect detection criterion may be set in sub-pixel units, as in the first embodiment.

(Fourth Embodiment) In a fourth embodiment, an embodiment of a wiring pattern inspection apparatus for executing the inspection methods shown in the first, second, and third embodiments will be described. .

First, the configuration of the apparatus will be described.

FIG. 11 is a diagram showing an embodiment of a wiring pattern inspection apparatus according to the present invention. In the figure, reference numeral 60 denotes a wafer to be inspected, 61 denotes a wafer holder, which stores the wafer 60, 62 denotes an aligner, and the wafer 6
0 is a stage for adjusting the orientation flat position in a predetermined direction; 63 is an inspection stage for mounting the wafer 60 so as to be movable in the XYZ-θ directions; 64 is a wafer transfer robot; Inspection stage 6
3 is a camera which carries out the transfer between 3 and 71 is a camera, a target field pixel is a CCD having 1024 × 1024 pixels, and an image of the surface of the wafer 60 is taken. 73 is a light source, which illuminates the surface of the wafer 60, and 74 is a half mirror, which reflects light from the light source 73 so as to irradiate the wafer 60, and which reflects light from the surface of the wafer 60. , An object lens; 81, a video grabber; 81, a device for adjusting the number of pixels of an image output from the camera 71; 82, an image memory; A first storage device 83 for temporarily storing the output surface image of the wafer 60; a hard disk device 83; a second storage device 83 for storing non-defective images and test data; A control device, the inspection stage 6
3, for controlling the wafer transfer robot 64, the image memory 82, and the hard disk device 83, respectively.

Next, the operation of the inspection apparatus configured as described above will be described.

First, the wafer 60 stored in the wafer holder 61 is transferred by the wafer transfer robot 64 controlled by the control device 84 to the aligner 62 for adjusting the position and the center position of the wafer orientation flat. Aligner 62
After the position adjustment, the wafer 60 is transferred to the inspection stage 63 by the wafer transfer robot 64. When the transfer is notified from the transfer robot 64 to the control device 84, the control device 84 controls the inspection stage 63 to perform alignment between the optical system and the wafer 60, and further,
The imaging chip formed at 0 is moved to the position of the optical system.

Next, inspection of the wafer 60 is performed.

First, the light beam emitted from the light source 73 is illuminated on the surface of the wafer 60 by the half mirror 74. The light reflected on the wafer surface is reflected by the objective lens 75 and the half mirror 7.
4. An image is formed by the camera 71 through the imaging lens 72. Here, as the objective lens 75, for example, an objective lens having a different magnification is separately prepared as the objective lens 76, and when an image having a different resolution is required, the objective lens 75 is replaced with the objective lens 76 by an electric revolver or the like. Alternatively, the magnification of the objective lens may be changed. Thereby, it is possible to inspect an object having a wide range from a wiring pattern having a submicron wiring width to an electrode having a width of several tens of microns.

Next, the image of the wafer surface imaged and captured by the camera 71 is stored in the image memory 82 through the video grabber 81. When the image memory 82 notifies the control means 84 that the image is stored, the control device 84 reads a non-defective image stored in the hard disk device 83 in advance, and reads the surface of the wafer 60 stored in the image memory 82. The registration with the image and the acquisition of the difference image are performed, and the defect candidate is detected.

When the detection of the defect candidate is completed, the control means 8
4 reads test data stored in the hard disk device 83 in advance, that is, inspection area division information and defect detection reference information, and then reads as described in the first embodiment, the second embodiment, or the third embodiment. In the meantime, a defect is detected from the defect candidate,
Perform a defect determination.

Thereafter, the control device 84 controls the inspection stage 63 to move the wafer 60 mounted on the inspection stage 63 in the XY directions for imaging the next semiconductor chip or the next area in the semiconductor chip. And the wafer 6
When all the semiconductor chips on the wafer 0 have been inspected, the control device 84 returns the wafer 60 to the wafer holder 61 by the wafer transfer robot 64. The above operation is performed for all the wafers in the wafer holder 61.

[0102]

As described above, according to the present invention,
By setting a defect detection criterion for each region based on the wiring direction, excessive detection of defects can be suppressed, and highly accurate defect detection can be performed.

[Brief description of the drawings]

FIG. 1 is a diagram showing an image of a part of a non-defective semiconductor device of the same type as a semiconductor device to be inspected.

FIG. 2 is a diagram showing an image obtained by differentiating the image shown in FIG. 1 in the vertical direction.

FIG. 3 is a diagram illustrating a region including a horizontal edge component.

FIG. 4 is a diagram showing an image obtained by differentiating the image shown in FIG. 1 in the horizontal direction.

FIG. 5 is a diagram illustrating a region including a vertical edge component.

FIG. 6 is a diagram showing a state where a region to be inspected is divided.

FIG. 7 is a diagram showing a relationship between a difference image and a region to be inspected.

FIG. 8 is a diagram showing a state where a region to be inspected is divided.

FIG. 9 is a diagram showing an image of a part of a semiconductor device of the same type as the semiconductor device to be inspected.

FIG. 10 is a diagram showing a state where a region to be inspected is divided.

FIG. 11 is a view showing one embodiment of a wiring pattern inspection apparatus of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Substrate image 12 Substrate area 21 Horizontal wiring image 22 Horizontal wiring area 31 Vertical wiring image 32 Vertical wiring area 41 Memory cell image 42 Memory cell area 23, 43 Horizontal boundary area 33, 44 Vertical boundary area 53 Oblique Direction boundary area 60 Wafer 61 Wafer holder 62 Aligner 63 Inspection stage 64 Wafer transfer robot 71 Camera 72 Imaging lens 73 Light source 74 Half mirror 75, 76 Objective lens 81 Video grabber 82 Image memory 83 Hard disk drive 84 Controller

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Fumiyuki Takahashi 4-1-1, Kamidadanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Mitaka Oshima 4 Kamikadanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture 1-1-1 Fujitsu Limited (72) Inventor Hiroyuki Tsukahara 4-1-1 1-1 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa F-term within Fujitsu Limited 2F065 AA12 AA49 AA56 BB02 BB28 CC01 CC19 DD03 FF42 HH02 HH13 JJ03 LL12 PP11 QQ04 QQ13 QQ24 QQ39 2G051 AA51 AA65 AB02 CA03 CA04 EA08 EA11 EA14 EA25 EB02 EB09 ED04 ED14 ED15 4M106 AA02 CA40 DB04 DB21 DB30 DJ13 DJ21

Claims (8)

[Claims] 1. A defect candidate is detected from a difference image between an image of an inspection object and an image of a non-defective product of the same type as the inspection object, and divided based on a wiring direction of a non-defective image of the same type as the inspection object. And detecting a defect from the defect candidate based on the inspected region and a defect detection criterion based on the wiring direction set for each inspected region. 2. A defect candidate is detected from a difference image between an image of an inspection target and an image of a non-defective product of the same type as the inspection target, and divided based on a wiring direction of a non-defective image of the same type as the inspection target. A method for inspecting a defect from a defect candidate based on the inspected area and a defect detection criterion based on the wiring direction set for each boundary area between the inspected areas. 3. The wiring pattern inspection method according to claim 1, wherein the wiring direction is detected based on an image obtained by differentiating the luminance of the non-defective image of the same type. 4. The wiring pattern inspection method according to claim 1, wherein the defect detection criterion is set based on the size of a defect in a direction perpendicular or oblique to the wiring direction. 5. A defect candidate is detected from a difference image between an image of the inspection target and a non-defective image of the same type as the inspection target. A wiring, wherein a defect is detected from a defect candidate based on a divided inspection area and a defect detection criterion set for each boundary area of the inspection area based on a wiring direction in the boundary area. Pattern inspection method. 6. A camera for capturing an image of an object to be inspected, a first storage device connected to the camera and storing an image output from the camera, a second storage device for storing an image of a good product, Connected to the first storage device and the second storage device,
Detecting a defect candidate from a difference image between the image of the inspection target and the image of the non-defective product, and inspecting the inspection target region divided based on a wiring direction of a non-defective image of the same type as the inspection target; A control device for detecting a defect from the defect candidate based on a defect detection criterion based on the wiring direction set for each of the wiring patterns. 7. A camera for imaging an object to be inspected, a first storage device connected to the camera and storing an image output from the camera, a second storage device for storing an image of a good product, Connected to the first storage device and the second storage device,
Detecting a defect candidate from a difference image between the image of the inspection target and the image of the non-defective product, and inspecting the inspection target region divided based on a wiring direction of a non-defective image of the same type as the inspection target; And a control device for detecting a defect from the defect candidate based on a defect detection criterion based on the wiring direction set for each boundary area between the wiring patterns. 8. A camera for imaging an object to be inspected, a first storage device connected to the camera and storing an image output from the camera, a second storage device for storing an image of a good product, Connected to the first storage device and the second storage device,
A defect candidate is detected from a difference image between the image of the inspection target and the image of the non-defective product, and a region to be inspected divided into regions having different luminances of non-defective images of the same type as the inspection object; A wiring pattern inspection device, comprising: a control device that detects a defect from a defect candidate based on a defect detection criterion based on a wiring direction in the boundary region set for each boundary region of the region.