TWI819768B - 金氧半導體元件及其製法 - Google Patents

金氧半導體元件及其製法 Download PDF

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TWI819768B
TWI819768B TW111132813A TW111132813A TWI819768B TW I819768 B TWI819768 B TW I819768B TW 111132813 A TW111132813 A TW 111132813A TW 111132813 A TW111132813 A TW 111132813A TW I819768 B TWI819768 B TW I819768B
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layer
region
gate
metal oxide
oxide semiconductor
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TW202349627A (zh
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何中雄
張志宏
李季學
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強茂股份有限公司
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Abstract

本發明為一種金氧半導體元件(MOS)及其製法，該金氧半導體元件包含有一半導體基板，其區隔為一閘極區域、一源極區域及一汲極區域。其中，該半導體基板的同一表面上在該閘極區域、該源極區域及該汲極區域中，係以低阻抗的金屬材料形成一連接層，在該連接層上可直接設置複數導電件(如錫球)，令金氧半導體元件可透過分布在同一表面的導電件銲接在電路板；又在該汲極區域中，係佈滿有複數個開孔，各開孔內部填充該連接層並延伸至半導體基板內部；藉由前述結構，該金氧半導體元件具有低導通阻R DS(ON)之優點。

Description

金氧半導體元件及其製法
本發明關於一種金氧半導體元件(MOS)及其製法，特別是指一種水平式結構的金氧半導體元件。
現有金氧半導體元件(MOS)晶片的結構多是屬於垂直式設計，如圖10所示，為金氧半導體元件晶片結構示意圖，以晶片的接點佈局來看，在該金氧半導體元件晶片的正面形成有一閘極區域G的接點及一源極區域S的接點，而晶片的背面以一金屬層構成汲極區域D。因為汲極區域D是相對位在該閘極區域G與該源極區域S的垂直下方，因此將該金氧半導體元件晶片稱之為垂直式設計。
請參考圖11所示，為上述金氧半導體元件晶片的側視結構示意圖，其中，圖面左側區域為閘極區域G，右側區域為源極區域S，在該閘極區域G及該源極區域S內的單位晶胞(unit cell)的具體結構省略未繪，一金屬層500形成在該閘極區域G與該源極區域S的表面，透過該金屬層500電性連接。
請參考圖12所示，該金氧半導體元件晶片通常必須經過封裝作業，才能電性連接在電路板上，例如將該金氧半導體元件晶片的背面(即汲極區域D)設置在一導線架510上，再透過打線步驟將閘極區域G表面的金屬層500、源極區域S表面的金屬層500分別透過金屬線路520電性連接至該導線架510的不同接腳，圖12中該閘極區域G的金屬層500亦是透過獨立的金屬線路連接另獨立 的接腳，惟圖中省略未畫。最後再以絕緣材料530包覆該晶片而構成一完整的金氧半導體元件封裝。
傳統的金氧半導體元件晶片是採垂直式設計，因此晶片必須再進行封裝才能焊接於電路板上，在晶片底部以金屬構成的汲極區域D必需電性接觸在一基板上(例如導線架510)，再將位在晶片頂面的金屬層500透過金屬導線把閘極區域G、源極區域S分別電性連接至對應的接腳，最後再進行絕緣材料530作業。因而金氧半導體元件封裝件的製作需要採用較多的製程步驟。
另一方面，以金屬層500作為閘極區域G及源極區域S上導電金屬，該金氧半導體元件的導通阻抗RDS(ON)難以再進一步降低，有待進一步改善。
本發明係提出一種「金氧半導體元件及其製法」，令閘極、源極、汲極接點均位在相同表面，且具有低導通阻抗RDS(ON)之元件特性。
本發明之金氧半導體元件，包含有：一半導體基板，係具有一閘極區域、一源極區域及一汲極區域，其中，該閘極區域、該源極區域及該汲極區域在該半導體基板的同一表面形成有以金屬材料製成的一連接層，該閘極區域、該源極區域及該汲極區域上的該連接層係絕緣分隔；其中，在該汲極區域中係形成有延伸至半導體基板內部的複數個開孔，各該開孔內部填充該連接層；該閘極區域、該源極區域及該汲極區域上的該連接層係各自直接電性連接導電件，該金氧半導體元件透過該些導電件對外電性連接。
本發明之金氧半導元件製法，包含有： 提供一半導體基板，該半導體基板定義有一閘極區域、一源極區域及一汲極區域；形成一磊晶層於該半導體基板上；形成複數閘極導電層於該閘極區域及該源極區域的磊晶層中；形成複數個單元晶胞結構在該源極區域的磊晶層中，每一單元晶胞結構包含該閘極導電層以及在其兩側的一第一佈植區域，相鄰單元晶胞結構之間具有一第二佈植區域；在該汲極區域中形成貫穿該磊晶層的一凹槽；覆蓋一第一保護層於該閘極區域、該源極區域及該汲極區域，其中該第一保護層填充該汲極區域中的該凹槽；形成一連接層於該第一保護層上，其中：該閘極區域之連接層係貫穿該第一保護層而連接該閘極導電層；該源極區域之連接層係貫穿該第一保護層而連接該第一佈植區域及第二佈植區域；該源極區域之連接層係貫穿該第一保護層而接觸該半導體基板；形成一第二保護層於該閘極區域、該源極區域及該汲極區域，其中，該閘極區域、該源極區域及該汲極區域上的該連接層係以該第二保護層絕緣分隔；分別在該閘極區域、該源極區域及該汲極區域的該連接層直接電性連接導電件。
本發明可透過晶圓級晶片尺寸封裝(WLCSP)技術製作而成，將閘極區域、源極區域及汲極區域製作成為水平式分佈，使金氧半導體元件在同一表面設置導電件對外電性連接，因此，不需要採用傳統的導線架，也不用經歷打線、模封等作業。
100:基板
102:磊晶層
104:氧化保護層
105:溝槽
106:閘極絕緣層
107:閘極導電層
201:井區
202:第一佈植區域
203:內介電層
204:第二佈植區域
301:凹槽
302:第一保護層
303:開孔
304:種子層
305:連接層
306:第二保護層
307:接點開孔
308:導電件
401:第一遮罩層
402:第二遮罩層
403:第三遮罩層
404:第四遮罩層
500:金屬層
510:導線架
520:金屬線路
530:絕緣材料
540:焊錫
G:閘極區域
D:汲極區域
S:源極區域
P:電路板
圖1：本發明金氧半導體元件的閘極、源極、汲極接點佈局立體示意圖。
圖2：本發明金氧半導體元件的閘極、源極、汲極接點佈局平面示意圖。
圖3A~3G：本發明金氧半導體元件的閘極階段製作步驟示意圖。
圖4A~4F：本發明金氧半導體元件的源極階段製作步驟示意圖。
圖5A~5K：本發明金氧半導體元件的汲極階段製作步驟示意圖。
圖6：本發明在汲極區域形成開孔的平面示意圖。
圖7：本發明金氧半導體元件的立體外觀示意圖。
圖8：本發明金氧半導體元件銲接至電路板示意圖。
圖9：現有金氧半導體元件銲接至電路板示意圖。
圖10：現有金氧半導體元件其閘極、源極、汲極的接點位置示意圖。
圖11：為圖10金氧半導體元件的剖面位置圖。
圖12：為圖10金氧半導體元件封裝後的示意圖。
本發明為一種金氧半導體元件(Metal oxide semiconductor,MOS)，可以是P型金氧半導體元件(PMOS)或N型金氧半導體元件(NMOS)，在以下說明中，以功率金氧半場效電晶體元件(Power MOSFET)為例說明。
請參考圖1、圖2所示，本發明金氧半導體元件具有一閘極區域G、一源極區域S及一汲極區域D，該些區域係作為金氧半導體元件對外電性連接的接點區域。不同於傳統的垂直式佈局，本發明將該汲極區域D製作在源極區域S的側邊，在本實施例中，相對位置為汲極區域D位於該源極區域S的一側，而閘極區域G位在源極區域S的相對另一側的角落，使該閘極區域G、源極 區域S、汲極區域D共同構成一水平式佈局。以各區域的面積大小來看，三者的面積大小關係為源極區域S>汲極區域D>閘極區域G。
以下透過製程說明在該閘極區域G、該源極區域S及該汲極區域D內部的單元晶胞(cell unit)結構，以製程階段而言，大致可區分為閘極區域製作/源極區域製作/汲極區域製作，該些流程不限制為依序進行，在一實施例中，將閘極區域G與源極區域S中的數個製作步驟同時進行。本案圖式中在各個區域係以1至2個單元晶胞的結構作為示例說明，該金氧半導體元件實際上包含有多個單元晶胞。
閘極區域製作階段：
請參考圖3A，提供一半導體基板100，該基板100定義有一閘極區域G、一源極區域S及一汲極區域D。該基板100的材料可選自矽、砷化鎵、矽鍺、矽碳或其它在半導體領域中已知的半導體材料形成。在本實施例中，該基板100上生長有一磊晶層102，於該磊晶層102上覆蓋有一氧化保護層104。在一實施例中，該基板100及磊晶層102是第一導電類型，例如N型摻雜。
請參考圖3B~3D，在閘極區域G及源極區域S中，係選擇性地蝕刻該基板100以形成溝槽105。如圖3B所示，在該氧化保護層104上形成圖案化的一第一遮罩層401，該第一遮罩層401定義出閘極圖案，未被該第一遮罩層401覆蓋的區域係預計形成閘極的位置，該第一遮罩層401可以是一光阻層。
如圖3C所示，對未覆蓋第一遮罩層401的區域進行蝕刻而形成溝槽105，該溝槽105延伸進入到該磊晶層102內部但未貫穿磊晶層102。蝕刻方式取決於該第一遮罩層401之材料，可採用濕式蝕刻、電漿蝕刻等。
如圖3D所示，於蝕刻完成後，去除基板100上的第一遮罩層401及氧化保護層104。在閘極區域G及源極區域S中，該磊晶層102上已形成複數個溝槽105。
如圖3E所示，在該磊晶層102的溝槽105內部係形成一閘極絕緣層106，該閘極絕緣層106覆蓋於溝槽105的底面及側邊，但未完全填滿溝槽105；其中，該閘極絕緣層106可以是透過旋塗、熱處理製程或沉積製程所形成的介電材料。
如圖3F所示，在該閘極絕緣層106上係沉積一閘極導電層107,該閘極導電層107的厚度可填充各個溝槽105，其中，該閘極導電層107的材料可選用多晶矽。
如圖3G所示，回蝕刻該閘極導電層107，使其僅充於各個溝槽105內部而露出該磊晶層102。填充於各個溝槽內的該閘極導電層107即作為各個單元晶胞的閘極導電層。
源極區域製作階段：
溝槽105內部填充完成該閘極導電層107後，則在源極區域S製作出源極結構，在圖4A~4F中僅表示該源極區域S的製作流程，省略閘極區域G與汲極區域D的結構表示。首先參考圖4A所示，在該磊晶層102進行離子植入或摻雜以形成一井區(well)201，所使用之離子植入或摻雜的材料具有第二導電類型，例如P型摻雜，使其有別於磊晶層102的第一導電類型。在一實施例中，離子植入或摻雜的材料可採用硼。
如圖4B所示，在該磊晶層102上形成圖案化的一第二遮罩層402，該第二遮罩層402用於定義出源極圖案，未被該第二遮罩層402覆蓋的區域係預計形成源極的位置，其中，在溝槽105上方及其兩側係未被該第二遮罩層402覆蓋。該第二遮罩層402可以是一光阻層。
如圖4C所示，利用該第二遮罩層402作為佈植作業的遮蔽層，在該井區201中進行離子植入或摻雜以形成作為源極的一第一佈植區域202，所使用之離子植入或摻雜的材料具有第一導電類型，例如N型摻雜，第一佈植區 域202係緊鄰該溝槽105的兩側。於離子植入完成後，實施退火(anneal)作業以穩定該第一佈植區域202中的佈植材料。
如圖4D所示，於退火完成後，移除該第二遮罩層402，並且在該磊晶層102上形成一內介電層203(interlayer dielectric)，該內介電層203為絕緣材料。圖案化的一第三遮罩層403再設置於該內介電層203上，該第三遮罩層403係露出相鄰溝槽105之間的井區105以及其兩側的部分第一佈植區域202。
如圖4E所示，以該第三遮罩層403作為蝕刻遮罩，對該內介電層203進行蝕刻，去除露出於第三遮罩層403的內介電層203。
如圖4F所示，當完成該內介電層203的蝕刻作業後，移除該第三遮罩層403，並對該井區201進行重離子植入或重摻雜以形成一第二佈植區域204，所使用之離子植入或摻雜的材料具有第二導電類型，例如P型摻雜。各第二佈植區域204係位在相鄰的第一佈植區域202之間。於離子植入完成後，實施退火(anneal)步驟以穩定該第二佈植區域204中的佈植材料。
汲極區域製作階段
請參考圖5A，首先在基板100的汲極區域D形成一凹槽301，該凹槽301的深度向下延伸至基板100，因此在凹槽301位置的磊晶層102係完全去除。該凹槽301可以透過如乾式蝕刻、濕式蝕刻、雷射、刀具切削等方式形成，並未特別限制。
如圖5B所示，形成一第一保護層302在該基板100上，該第一保護層302全面覆蓋該閘極區域G、源極區域S及汲極區域D，其中，該第一保護層302的厚度足以填充該凹槽301並且覆蓋在閘極區域G與源極區域S的該內介電層203。在一實施例中，該第一保護層302的材料可以是聚醯亞胺(PI)。
如圖5C及圖6所示，在汲極區域D中，於該第一保護層302中形成複數個開孔303，在本實施例中，該汲極區域D係全面形成該複數開孔303。 該些開孔303貫穿該第一保護層302並延伸至基板100，每個開孔303的形狀及排列方式不限，例如各開孔303可為方孔、圓孔等，該些開孔303的排列方式可以為規則矩陣排列或是交錯排列，圖6僅示意地表現出在汲極區域D中具有交錯排列的複數個圓形開孔303。除了在汲極區域G形成開孔303之外，同時在該閘極區域G及源極區域S中，在對應各第二佈植區域204的位置亦形成貫穿該第一保護層302的開孔303。製作出開孔303的方式可包含但不限於雷射、蝕刻。
如圖5D所示，形成一種子層304於該第一保護層302的表面以及各個開孔303的底部及側壁，其中，該種子層304為導電材料(例如鈦/銅)，可透過濺鍍製作而成。
如圖5E所示，在該種子層304上形成一第四遮罩層404，該第四遮罩層404的圖案與該閘極區域G、源極區域S及該汲極區域D的分佈位置一置，用於區隔該閘極區域G、源極區域S及該汲極區域D，該第四遮罩層404可為一光阻層。
如圖5F所示，在該閘極區域G、源極區域S及該汲極區域D的種子層304上覆蓋一連接層305，該連接層305的材料相較於鋁具有相對較低的阻抗，例如連接層305為銅層或銅合金層。其中，該連接層305係填滿各個區域中的開孔303並且與種子層304電性接觸，在不同區域之間的連接層305以該第四遮罩層404隔開。
請參考圖5G~5H所示，在完成該連接層305的製作之後，係移除該第四遮罩層404，露出原本被該第四遮罩層404覆蓋的種子層304。可以看出該閘極區域G、源極區域S及該汲極區域D之間的連接層305相隔分開。在移除該第四遮罩層404後，進一步去除露出的種子層304，例如藉由蝕刻而移除以鈦/銅構成的種子層304，令閘極區域G、源極區域S及該汲極區域D不會藉由該種子層304而直接彼此電性相連。
如圖5I~5J，在該連接層305的表面製作一第二保護層306，該第二保護層306完整覆蓋該閘極區域G、源極區域S及該汲極區域D。在該第二保護層306上形成有數個接點開孔307，各個接點開孔307貫穿第二保護層306並且延伸至連接層305，其中，該接點開孔307的位置、數量係取決於金氧半導體元件所需的焊墊位置、焊墊數量而決定；在本實施例中，在閘極區域G設有1個接點開孔307，在源極區域S設有3個接點開孔307，在汲極區域D設有2個接點開孔307。
如圖5K及圖7所示，各個接點開孔307設置一導電件308，該導電件308電性連接該連接層305。在本實施例中，各導電件308為錫球，但是在其它實施例中，該導電件308也可以是平面焊墊。在該閘極區域G中，該導電件308透過該連接層305電連接至該閘極導電層107；在該源極區域S中，該導電件308透過該連接層305電連接至源極的第二佈植區域204；在該汲極區域D中，該導電件308電連接該連接層305，且該連接層305延伸至基板100。
在實際應用時，本發明將閘極區域G、源極區域S及汲極區域D製作成為水平式分佈，使金氧半導體元件在同一表面上即可形成對外電性連接的接點，因此可透過晶圓級晶片尺寸封裝(WLCSP)技術製作而成，不需要採用傳統的導線架，也不用經歷打線、模封等作業，利用圖8所示之導電件308(如錫球)便可直接焊接在印刷電路板上；相較於傳統的MOS元件，本發明金氧半導體元件的體積可以更加縮小。
本發明藉由在汲極區域D形成延伸至基板100內部的多個開孔303(via)，並在該多個開孔303內部填充導電材料而形成汲極，故金氧半導體元件晶片在源極一汲極之間的內部阻抗RDS可以降低。
除此之外，本發明在一較佳實施例中，該金氧半導體元件的上金屬層(top metal，即該連接層305)是以低阻抗的含銅金屬構成，而不是傳統的 金屬層；汲極區域D及源極區域S的導電件308均透過具有低阻抗特性的連接層305連接至金氧半導體元件的內部線路，當該金氧半導體元件接收驅動電壓而導通時，其汲極區域D及源極區域S之間的導通阻抗(RDS(ON))能夠降低；該金氧半導體元件與外部印刷電路板之間的信號傳輸路徑亦是相對為低阻抗。
請參考圖8，顯示本發明中已將汲極(D)與源極(S)、閘極(G)製作在同一側，不必依賴封裝(assembly)將所有電極轉到同一側，因此能大幅縮小產品尺寸，圖8當中的虛線示意汲極(D)與源極(S)之間的信號傳輸路徑相對於圖9可以進一步減少，而且在該傳輸路徑當中的導電媒介亦能簡化，本發明可以利用晶片上的導電件308直接連接至電路板P上的接點，因而能夠降低整體RDS(ON)。
反觀圖9所示的現有金氧半導體元件封裝元件，經過封裝後的整體尺寸勢必會比晶片更大，導致晶片與電路板P之間的傳導路徑(如虛線所示)加長，而且在該傳輸路徑當中的導電媒介可能經過多層(如銲錫540、金屬線路520等)，因此整體的導通電阻RDS(ON)將會較高。
雖然本發明已利用上述較佳實施例揭示，然其並非用以限定本發明，任何熟習此技藝者在不脫離本發明之精神和範圍之內，相對上述實施例進行各種更動與修改仍屬本發明所保護之技術範疇，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100:基板
102:磊晶層
106:閘極絕緣層
107:閘極導電層
201:井區
202:第一佈植區域
203:內介電層
204:第二佈植區域
302:第一保護層
304:種子層
305:連接層
306:第二保護層
307:接點開孔
308:導電件
G:閘極區域
D:汲極區域
S:源極區域

Claims (8)

  1. 一種金氧半導體元件，包含有：一半導體基板，係具有一閘極區域、一源極區域及一汲極區域，其中，該閘極區域、該源極區域及該汲極區域在該半導體基板的同一表面形成有以金屬材料製成的一連接層，其中，該半導體基板上具有一磊晶層，在該汲極區域中係形成貫穿該磊晶層的一凹槽，於該凹槽中填充一第一保護層；其中，在該汲極區域中係佈滿有延伸至半導體基板內部的複數個開孔，各該開孔貫穿該第一保護層並延伸至該半導體基板，各該開孔內部填充該連接層；該閘極區域、該源極區域及該汲極區域上的該連接層彼此之間係以一第二保護層絕緣分隔；且該閘極區域、該源極區域及該汲極區域上的該連接層分別各自直接電性連接對應的導電件，該金氧半導體元件透過該些導電件對外電性連接。
  2. 如請求項1所述之金氧半導體元件，其中，該連接層係為銅層或銅合金層。
  3. 如請求項2所述之金氧半導體元件，該第一保護層延伸覆蓋該汲極區域及源極區域的該磊晶層；在該閘極區域中，係於該磊晶層中形成有複數個閘極導電層，各該閘極導電層電性連接該連接層；在該源極區域中，係於該磊晶層中形成有複數個單元晶胞結構，每一單元晶胞結構包含一閘極導電層以及在其兩側的一第一佈植區域，相鄰單元晶胞結構之間具有一第二佈植區域，該源極區域中的該連接層係電性接觸該第一佈植區域及該第二佈植區域。
  4. 如請求項1所述之金氧半導體元件，其中，該些導電件各分別是一錫球或一平面焊墊。
  5. 一種金氧半導體元件的製法，包含：提供一半導體基板，該半導體基板定義有一閘極區域、一源極區域及一汲極區域；形成一磊晶層於該半導體基板上；形成複數閘極導電層於該閘極區域及該源極區域的磊晶層中；形成複數個單元晶胞結構在該源極區域的磊晶層中，每一單元晶胞結構包含該閘極導電層以及在其兩側的一第一佈植區域，相鄰單元晶胞結構之間具有一第二佈植區域；在該汲極區域中形成貫穿該磊晶層的一凹槽；覆蓋一第一保護層於該閘極區域、該源極區域及該汲極區域，其中該第一保護層填充該汲極區域中的該凹槽；形成一連接層於該第一保護層上，其中：該閘極區域之連接層係貫穿該第一保護層而連接該閘極導電層；該源極區域之連接層係貫穿該第一保護層而連接該第一佈植區域及第二佈植區域；該源極區域之連接層係貫穿該第一保護層而接觸該半導體基板；形成一第二保護層於該閘極區域、該源極區域及該汲極區域，其中，該閘極區域、該源極區域及該汲極區域上的該連接層係以該第二保護層絕緣分隔；分別在該閘極區域、該源極區域及該汲極區域的該連接層直接電性連接導電件。
  6. 如請求項5所述之金氧半導體元件的製法，其中： 在覆蓋該第一保護層之後，係進一步包含：形成複數個開孔，各開孔係貫穿該第一保護層；在形成該連接層之步驟中，該連接層係填充該複數個開孔。
  7. 如請求項6所述之金氧半導體元件的製法，其中，在該汲極區域中係佈滿該複數個開孔。
  8. 如請求項6所述之金氧半導體元件的製法，其中，該連接層係為銅層或銅合金層。
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