TWI812124B - Electronic module and carrier structure thereof and manufacturing method thereof - Google Patents
Electronic module and carrier structure thereof and manufacturing method thereof Download PDFInfo
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- TWI812124B TWI812124B TW111111694A TW111111694A TWI812124B TW I812124 B TWI812124 B TW I812124B TW 111111694 A TW111111694 A TW 111111694A TW 111111694 A TW111111694 A TW 111111694A TW I812124 B TWI812124 B TW I812124B
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- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 239000004020 conductor Substances 0.000 claims abstract description 100
- 238000000034 method Methods 0.000 claims abstract description 28
- 230000008569 process Effects 0.000 claims abstract description 23
- 239000011521 glass Substances 0.000 claims description 20
- 239000010949 copper Substances 0.000 claims description 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 11
- 229910052802 copper Inorganic materials 0.000 claims description 11
- 239000010931 gold Substances 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 4
- 229910045601 alloy Inorganic materials 0.000 claims description 4
- 239000000956 alloy Substances 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 description 17
- 239000002184 metal Substances 0.000 description 17
- 238000007747 plating Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000012050 conventional carrier Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
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Abstract
Description
本發明係有關一種電子模組,尤指一種關於發光二極體之電子模組及其承載結構與製法。 The present invention relates to an electronic module, and in particular to an electronic module related to a light-emitting diode and its carrying structure and manufacturing method.
近年來,由於發光二極體(LED)具備使用壽命長、耗電量低、無須暖燈時間、反應時間快速等性能,所以相關應用的產品與日俱增。 In recent years, due to the properties of light-emitting diodes (LEDs) such as long service life, low power consumption, no need for warm-up time, and fast response time, the number of related products has increased day by day.
如圖1A所示,現有LED顯示面板係由多個LED模組1a拼接而成一顯示面板1。
As shown in Figure 1A, the existing LED display panel is composed of multiple LED modules 1a spliced together to form a
圖1B係習知LED模組1a及其承載件1b之示意圖。如圖1B所示,該承載件1b係包含一玻璃板10,其具有相對之一正面10a與一反面10b,以及相鄰該正面10a與該反面10b之側面10c,且於該玻璃板10之正面10a上設有第一金屬層11a,而於該玻璃板10之反面10b上設有第二金屬層11b。進一步,於該玻璃板10之側面10c上透過圖案化鍍附製程,以令銅線路12附著形成於該側面10c上並延伸至該正面10a與反面
10b上,並接觸該第一金屬層11a與第二金屬層11b,使該銅線路12電性導通該第一金屬層11a與第二金屬層11b。
FIG. 1B is a schematic diagram of a conventional LED module 1a and its supporting
於後續封裝應用中,可將複數LED晶片14設於該承載件1b之玻璃板10之正面10a上,使該玻璃板10之正面10a佈滿該些LED晶片14,以形成LED模組1a,再將多個LED模組1a拼接成該顯示面板1,其中,該承載件1b之佈線區域係由該玻璃板10之正面10a之邊緣經由側面10c繞到該玻璃板10之反面10b,以於該玻璃板10之反面10b藉由該第二金屬層11b連接如軟板(Flexible Printed Circuit,簡稱FPC)、積體電路晶片(IC)或其它線路等電子元件。
In subsequent packaging applications, a plurality of
惟,習知承載件1b係於該玻璃板10之側面10c上進行圖案化鍍附製程,因而會產生以下問題:
However, the
第一、由於佈線製程需分三次金屬鍍膜,如圖1C所示,以形成第一金屬層11a、第二金屬層11b及銅線路12,致使成膜不連續,導致各金屬層之交接處A之面積過大(如圖1C及圖1D所示,該交接處A之面積等於各該金屬層之接點110之面積),而產生較大的接觸阻抗。
First, since the wiring process requires three metal plating processes, as shown in Figure 1C, to form the
第二、於製作該玻璃板10之側面10c之銅線路12時,需將該玻璃板10直立(如圖1D所示之側面10c朝上而正面10a與反面10b朝左右方向之置放方式),故於黃光曝光製程中,難以均勻塗佈光阻或根本無法塗佈光阻,導致無法進行黃光曝光製程,因而無法製作出該銅線路12所需之細線路規格。
Second, when making the
第三,由於需將該玻璃板10直立以製作該玻璃板10之側面10c之銅線路12,故於黃光曝光製程中,無法精準對位及調整曝光高度。
Third, since the
因此,如何克服上述習知技術的種種問題,實已成目前亟欲解決的課題。 Therefore, how to overcome the various problems of the above-mentioned conventional technologies has become an urgent issue to be solved.
鑑於上述習知技術之種種缺失,本發明係提供一種承載結構,係包括:板體,係具有相對之第一表面與第二表面及相鄰該第一表面與第二表面之側面;第一導體,係設於該板體之第一表面上;第二導體,係設於該板體之第二表面上;以及至少一導線,係以其一端部連接該第一導體並跨過該側面而以其另一端部連接該第二導體,使該導線電性導通該第一導體與第二導體,且令該導線與該板體之側面相分離。 In view of the various shortcomings of the above-mentioned conventional technologies, the present invention provides a load-bearing structure, which includes: a plate body with opposite first and second surfaces and side surfaces adjacent to the first and second surfaces; A conductor is provided on the first surface of the plate; a second conductor is provided on the second surface of the plate; and at least one conductor is connected with one end of the first conductor and spans the side The other end is connected to the second conductor, so that the conductor is electrically connected to the first conductor and the second conductor, and the conductor is separated from the side surface of the plate.
本發明復提供一種承載結構之製法,係包括:提供一板體,其具有相對之第一表面與第二表面及相鄰該第一表面與第二表面之側面,且於該板體之第一表面上具有第一導體,而於該板體之第二表面上具有第二導體;以及進行打線製程,以令至少一導線以其一端部連接該第一導體並跨過該側面而以其另一端部連接該第二導體,使該導線電性導通該第一導體與第二導體,且令該導線與該板體之側面相分離。 The present invention further provides a method for manufacturing a load-bearing structure, which includes: providing a plate body with first and second opposite surfaces and side surfaces adjacent to the first and second surfaces, and on the third side of the plate body There is a first conductor on one surface, and a second conductor on the second surface of the board; and a wiring process is performed so that at least one conductor connects one end of the conductor to the first conductor and crosses the side. The other end is connected to the second conductor, so that the conductor is electrically connected to the first conductor and the second conductor, and the conductor is separated from the side surface of the plate body.
如前述之承載結構及其製法中,該板體係為玻璃板。 As in the aforementioned load-bearing structure and its manufacturing method, the plate system is a glass plate.
如前述之承載結構及其製法中,該板體之側面係具有對應該導線之凹部。 As in the aforementioned load-bearing structure and its manufacturing method, the side surface of the plate body has a recess corresponding to the conductor.
如前述之承載結構及其製法中,該導線係為採用金、銀、銅、鋁、或其上述材質之合金等導電材質之線材。 As in the aforementioned load-bearing structure and its manufacturing method, the conductor is a wire made of conductive materials such as gold, silver, copper, aluminum, or alloys of the above materials.
本發明亦提供一種電子模組,係包括:如前述之承載結構;以及電子元件,係設於該板體之第一表面上並電性連接該第一導體。 The present invention also provides an electronic module, which includes: the above-mentioned load-bearing structure; and electronic components, which are disposed on the first surface of the board and electrically connected to the first conductor.
前述之電子模組中,該電子元件係為發光晶片。 In the aforementioned electronic module, the electronic component is a light-emitting chip.
由上可知,本發明之電子模組及其承載結構與製法中,主要藉由打線製程取代習知圖案化鍍附製程,以避免發生黃光曝光製程所產生之問題,且以該導線之端部接觸結合該第一導體與第二導體,能縮減該導線與各導體之交接處之面積,因而能有效降低接觸阻抗。 It can be seen from the above that in the electronic module and its load-bearing structure and manufacturing method of the present invention, the conventional patterned plating process is mainly replaced by a wire bonding process to avoid the problems caused by the yellow light exposure process, and the ends of the wires are The partial contact combination of the first conductor and the second conductor can reduce the area of the intersection between the conductor and each conductor, thereby effectively reducing the contact resistance.
1:顯示面板 1:Display panel
1a:LED模組 1a:LED module
1b:承載件 1b: Bearing part
10:玻璃板 10:Glass plate
10a:正面 10a: Front
10b:反面 10b: reverse
10c,20c:側面 10c,20c: side
11a:第一金屬層 11a: First metal layer
11b:第二金屬層 11b: Second metal layer
110,210:接點 110,210: Contact
12:銅線路 12:Copper line
14:LED晶片 14:LED chip
2:承載結構 2: Load-bearing structure
20:板體 20:Plate body
20a:第一表面 20a: First surface
20b:第二表面 20b: Second surface
21a:第一導體 21a: First conductor
21b:第二導體 21b: Second conductor
22:導線 22:Wire
22a,22b:端部 22a,22b: end
22c:線段 22c: line segment
300:凹部 300: concave part
4:電子模組 4: Electronic module
40:電子元件 40: Electronic components
A,B:交接處 A, B: handover point
圖1A係為習知顯示面板之上視平面示意圖。 FIG. 1A is a schematic top plan view of a conventional display panel.
圖1B係為圖1A之LED模組之局部側面剖視示意圖。 FIG. 1B is a partial side cross-sectional view of the LED module of FIG. 1A .
圖1C係為圖1B之局部放大剖視示意圖。 Figure 1C is a partially enlarged cross-sectional schematic view of Figure 1B.
圖1D係為圖1C之立體外觀示意圖。 Figure 1D is a schematic diagram of the three-dimensional appearance of Figure 1C.
圖2A至圖2B係為本發明之承載結構之製法的局部剖面示意圖。 2A to 2B are partial cross-sectional schematic diagrams of the manufacturing method of the load-bearing structure of the present invention.
圖3A係為圖2B之立體外觀示意圖。 Figure 3A is a schematic three-dimensional appearance diagram of Figure 2B.
圖3B係為圖3A之另一實施例之立體外觀示意圖。 FIG. 3B is a schematic three-dimensional view of another embodiment of FIG. 3A .
圖4係為本發明之電子模組之剖面示意圖。 Figure 4 is a schematic cross-sectional view of the electronic module of the present invention.
以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。 The following describes the implementation of the present invention through specific embodiments. Those familiar with the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.
須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結 構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如「上」、「第一」、「第二」及「一」等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。 It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to coordinate with the content disclosed in the specification for the understanding and reading of those familiar with the art, and are not used to limit the implementation of the present invention. restrictive conditions, so it has no technical substantive significance, and any conclusion Modifications of the structure, changes in proportions, or adjustments in size should still fall within the scope of the technical content disclosed in the present invention, as long as they do not affect the effects that the present invention can produce and the purposes that can be achieved. At the same time, terms such as "above", "first", "second" and "a" cited in this specification are only for convenience of description and are not used to limit the scope of the present invention. Changes or adjustments in their relative relationships, provided there is no substantial change in the technical content, shall also be deemed to be within the scope of the present invention.
圖2A至圖2B係為本發明之承載結構2之製法的局部剖面示意圖。
2A to 2B are partial cross-sectional schematic diagrams of the manufacturing method of the load-
如圖2A所示,先提供一板體20,其具有相對之第一表面20a與第二表面20b及相鄰該第一表面20a與第二表面20b之側面20c,且於該板體20之第一表面20a上設有第一導體21a,而於該板體20之第二表面20b上設有第二導體21b。
As shown in Figure 2A, a
如圖2B所示,接著,進行打線製程,以令至少一導線22以其一端部22a連接該第一導體21a並跨過該側面20c而以其另一端部22b連接該第二導體21b,使該導線22電性導通該第一導體21a與第二導體21b。
As shown in FIG. 2B , a wiring process is then performed to connect at least one
於本實施例中,所述之板體20係為玻璃板,且於單一側面20c上係跨過複數相互分開之導線22,如圖3A所示。進一步,可於該板體20之側面20c上依需求先形成對應該導線22之凹部300,如圖3B所示之連通該第一表面20a與第二表面20b之直線溝槽狀,再藉由打線方式將該導線22容置於該凹部300中,以避免同一側面20c上之各該導線22相互接觸而發生短路之問題。
In this embodiment, the
再者,該導線22係採用金(Au)、銀(Ag)、銅(Cu)、鋁(Al)、或其上述材質之合金等導電材質作為線體材質,並以打線方式形成,故該
導線22於該側面20c處之線段22c大致懸空而未接觸該板體20之側面20c,如圖2B及圖3A所示,更未接觸該凹部300之壁面,如圖3B所示。例如,於打線製程中,該導線係利用熱、壓力、超音波、熱音波或上述混合方式等方式將該導線22之端部22a,22b與第一導體21a及第二導體21b接合。
Furthermore, the
又,該第一導體21a係為圖案化金屬導電層,其具有複數接點210,如圖3A所示,以固接該導線22之端部22a。應可理解地,該第二導體21b亦可為圖案化金屬導電層,其亦具有複數接點210可固接該導線22之端部22b。
In addition, the
另外,於後續應用中,如圖4所示,可將至少一電子元件40設於該板體20之第一表面20a上並電性連接該第一導體21a,以形成電子模組4。例如,該電子元件40係為如發光二極體(light-emitting diode,簡稱LED)之發光晶片。
In addition, in subsequent applications, as shown in FIG. 4 , at least one
因此,本發明之製法係藉由打線製程取代習知圖案化鍍附製程,以避免發生黃光曝光製程所產生之問題,且以該導線22之端部22a,22b接觸結合該第一導體21a與第二導體21b,能縮減該導線22與各導體之交接處B之面積(如圖2B或圖3A所示,該交接處B之面積遠小於該接點210之面積),因而能有效降低接觸阻抗。
Therefore, the manufacturing method of the present invention uses a wire bonding process to replace the conventional patterned plating process to avoid the problems caused by the yellow light exposure process, and the
再者,可依需求調整該打線製程之線體參數,以利於製作出該導線22所需之細線路規格。
Furthermore, the wire body parameters of the wire bonding process can be adjusted according to needs to facilitate the production of the required thin circuit specifications of the
又,藉由該凹部300之設計,以於打線過程中,可供該導線22對位,使各該導線22可依預定位置作配置而不會偏移,故各該導線22之間能有效分開而不會相互接觸,因而能有效避免各該導線22之間發生短路之問題。
In addition, through the design of the
本發明復提供一種電子模組4,其包括:一承載結構2以及至少一電子元件40,其中,該承載結構2係包含有一板體20、第一導體21a、第二導體21b以及至少一導線22。
The invention further provides an
所述之板體20係為玻璃板,其具有相對之第一表面20a與第二表面20b及相鄰該第一表面20a與第二表面20b之側面20c。
The
於一實施例中,該板體20之側面20c係具有對應該導線22之凹部300。
In one embodiment, the
所述之第一導體21a係設於該板體20之第一表面20a上。
The
所述之第二導體21b係設於該板體20之第二表面20b上。
The
所述之導線22係為金屬線,係以其一端部22a連接該第一導體21a並跨過該側面21c而以其另一端部22b連接該第二導體21b,使該導線22電性導通該第一導體21a與第二導體21b,其中,該導線22與該板體20之側面20c相分離。
The
所述之電子元件40係為發光晶片,其設於該板體20之第一表面20a上並電性連接該第一導體21a。
The
綜上所述,本發明之電子模組及其承載結構與製法,係藉由打線製程取代習知圖案化鍍附製程,以避免發生黃光曝光製程所產生之問題,且以該導線之端部接觸結合該第一導體與第二導體,能縮減該導線與各導體之交接處之面積,因而能有效降低接觸阻抗。 To sum up, the electronic module and its load-bearing structure and manufacturing method of the present invention use a wire bonding process to replace the conventional patterned plating process to avoid the problems caused by the yellow light exposure process, and the ends of the wires are The partial contact combination of the first conductor and the second conductor can reduce the area of the intersection between the conductor and each conductor, thereby effectively reducing the contact resistance.
上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修改。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。 The above embodiments are used to illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can make modifications to the above embodiments without departing from the spirit and scope of the invention. Therefore, the scope of rights protection of the present invention should be as listed in the patent application scope described below.
2:承載結構 2: Load-bearing structure
20:板體 20:Plate body
20a:第一表面 20a: First surface
20b:第二表面 20b: Second surface
20c:側面 20c: side
21a:第一導體 21a: First conductor
21b:第二導體 21b: Second conductor
210:接點 210:Contact
22:導線 22:Wire
22a,22b:端部 22a,22b: end
22c:線段 22c: line segment
B:交接處 B: handover
Claims (10)
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TW202339164A TW202339164A (en) | 2023-10-01 |
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US20120205694A1 (en) * | 2011-02-11 | 2012-08-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a light emitting diode emitter substrate with highly reflective metal bonding |
TW201314969A (en) * | 2011-09-23 | 2013-04-01 | Advanced Optoelectronic Tech | LED apparatus and method for manufacturing the same |
TW201320385A (en) * | 2003-10-22 | 2013-05-16 | Cree Inc | Power surface mount light emitting die package |
TW201448163A (en) * | 2013-06-06 | 2014-12-16 | 矽品精密工業股份有限公司 | Semiconductor package and method of manufacture |
TW201511197A (en) * | 2013-08-08 | 2015-03-16 | Invensas Corp | Microelectronic package with integrated bearing surfaces |
TW201733164A (en) * | 2016-03-14 | 2017-09-16 | 光寶光電(常州)有限公司 | LED package structure |
US20180301663A1 (en) * | 2017-04-12 | 2018-10-18 | Unistars Corporation | Optoelectronic package |
TW202207504A (en) * | 2020-08-14 | 2022-02-16 | 友達光電股份有限公司 | Display device and manufacturing method thereof |
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TW201320385A (en) * | 2003-10-22 | 2013-05-16 | Cree Inc | Power surface mount light emitting die package |
US20120205694A1 (en) * | 2011-02-11 | 2012-08-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a light emitting diode emitter substrate with highly reflective metal bonding |
TW201314969A (en) * | 2011-09-23 | 2013-04-01 | Advanced Optoelectronic Tech | LED apparatus and method for manufacturing the same |
TW201448163A (en) * | 2013-06-06 | 2014-12-16 | 矽品精密工業股份有限公司 | Semiconductor package and method of manufacture |
TW201511197A (en) * | 2013-08-08 | 2015-03-16 | Invensas Corp | Microelectronic package with integrated bearing surfaces |
TW201733164A (en) * | 2016-03-14 | 2017-09-16 | 光寶光電(常州)有限公司 | LED package structure |
US20180301663A1 (en) * | 2017-04-12 | 2018-10-18 | Unistars Corporation | Optoelectronic package |
TW202207504A (en) * | 2020-08-14 | 2022-02-16 | 友達光電股份有限公司 | Display device and manufacturing method thereof |
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TW202339164A (en) | 2023-10-01 |
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