TWI798970B - 選擇性電漿強化原子層沉積 - Google Patents

選擇性電漿強化原子層沉積 Download PDF

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TWI798970B
TWI798970B TW110144786A TW110144786A TWI798970B TW I798970 B TWI798970 B TW I798970B TW 110144786 A TW110144786 A TW 110144786A TW 110144786 A TW110144786 A TW 110144786A TW I798970 B TWI798970 B TW I798970B
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silicon
bis
substrate
dielectric material
plasma enhanced
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TW110144786A
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TW202229640A (zh
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羅納多馬丁 皮爾斯坦
新建 雷
羅伯特戈登 瑞吉威
吳愛萍
李翊嘉
蘇密特 阿加渥爾
羅希納拉亞南卡瓦斯利 拉梅許
徐萬興
萊恩詹姆士 卡斯歐達
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美商慧盛材料美國責任有限公司
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Abstract

本發明揭示一種選擇性電漿強化原子層沉積(ALD)方法。該方法可包含將包含介電材料的基材及金屬裝載到反應器中。該基材可與非電漿系氧化劑起反應,從而於該金屬上形成氧化金屬表面。該基材可被加熱並且暴露於鈍化劑中,該鈍化劑吸附於該氧化金屬上比於該介電材料上更多。此暴露可於該氧化金屬表面上形成鈍化層,並且該基材可被暴露於矽前驅物中,該矽前驅物吸附於該介電材料上比於該鈍化層上更多,從而於該介電材料上形成化學吸附含矽層。該基材可被暴露於電漿系氧化劑中,其同時將該鈍化層部分氧化,並且將該化學吸附含矽層氧化以於該介電材料上形成介電膜。

Description

選擇性電漿強化原子層沉積
相關申請案之相互申請
本專利案請求於2020年12月1日申請的美國專利案序號第63/120,086號及於2021年4月30日申請的美國專利案序號第63/182,581號的優先權。
本發明大體上關於選擇性原子層沉積(ALD),並且更特別地關於選擇性電漿強化ALD。
美國專利第9,816,180號揭示相對於不同的第二表面選擇性地沉積於基材表面上的方法。例示性沉積方法可包括相對於同一基材的不同的第二表面,例如H-封端的表面,於第一表面例如SiO 2表面上選擇性地沉積一材料例如包含鎳、氮化鎳、鈷、鐵及/或氧化鈦的材料。多種方法可包括在沉積之前處理該基材的表面以提供H-封端。
美國專利申請公開案第US 2018/0342388號揭示選擇性地沉積有機及混合有機/無機層的方法。更特別的是,本發明的具體實例關於改質羥基封端的表面以選擇性沉積分子層有機膜及混合有機/無機膜的方法。本發明的其他具體實例關於用於分子層沉積製程的環狀化合物。
美國專利申請公開案第US 2017/0037513號揭示相對於基材的第二介電表面於該基材的第一金屬或金屬表面上選擇性地沉積材料的方法,或相對於第二氧化矽表面於基材的第一金屬氧化物表面上選擇性地沉積金屬氧化物的方法。選擇性沉積的材料可為,舉例來說,金屬、金屬氧化物、金屬氮化物、金屬矽化物、金屬碳化物及/或介電材料。在一些具體實例中,包含第一金屬或金屬表面及第二介電表面的基材交替並順序地與第一氣相金屬鹵化物反應物及第二反應物接觸。在一些具體實例中,包含第一金屬氧化物表面及第二氧化矽表面的基材交替並順序地與第一氣相金屬氟化物或氯化物反應物及水接觸。
美國專利第10,460,930號揭示相對於含金屬表面例如銅於介電表面上選擇性地沉積氧化矽的方法及設備。方法涉及使具有介電質和銅表面的基材暴露於銅阻擋試劑(copper-blocking reagent)例如烷基硫醇以選擇性地吸附於該銅表面,使該基材暴露於含矽前驅物以沉積氧化矽,使該基材暴露於弱氧化劑氣體並且點燃電漿以將該吸附的含矽前驅物轉化為氧化矽,並且使該基材暴露於還原劑以減少任何經氧化的銅暴露於弱氧化劑氣體。
美國專利申請公開案第US 2018/0211833號揭示具有配備機器人和具有大於等於約0.1重量%水蒸氣的環境的中央轉運站、連接到該轉運站一側的預清潔艙及連接到該轉運站一側的批次處理室之處理平台。該處理平台係配置為預清潔基材以從第一表面去除天然氧化物,使用烷基矽烷形成阻擋層及選擇性地沉積膜。其中也描述使用處理平台及處理多數晶圓的方法。
世界知識產權組織申請公開案WO 2019/023001號揭示於氫氧化物封端的表面上相對於氫封端表面選擇性地沉積膜的方法。使該氫封端表面暴露於氮化劑(nitriding agent)以形成暴露於阻擋分子(blocking molecule)的胺封端表面以於該表面上形成阻擋層。於是可於該氫氧化物封端的表面上選擇性地沉積一膜。
美國專利申請公開案第US 2018/0233349號揭示用於相對於氮化矽表面於氧化矽表面上選擇性地沉積氧化矽的方法及設備。方法涉及使用氨及/或氮電漿預處理基材表面,並且在電漿強化原子層沉積反應中使用胺基矽烷矽前驅物及氧化劑的交替脈衝於氧化矽表面上選擇性地沉積氧化矽而不於暴露的氮化矽表面上沉積氧化矽。
美國專利第10,043,656號揭示用於對氧化矽或氮化矽材料具有選擇性的矽或金屬表面上選擇性地沉積含矽介電質或含金屬介電材料的方法及設備。方法涉及使該基材暴露於與該氧化矽或氮化矽材料具有反應性的醯氯,其中不欲沉積形成阻擋於該氧化矽或氮化矽材料上沉積的酮結構。在沉積所欲的含矽介電材料或含金屬介電材料之前進行對醯氯的暴露。
美國專利申請公開案第US 2018/0323055號揭示一種藉由循環沉積製程於包含第一金屬表面及第二介電表面的基材上選擇性地形成氮化矽膜的方法。該方法可包含使該基材與包含鹵化矽源的第一反應物接觸並且使該基材與包含氮源的第二反應物接觸,其中該第一金屬表面的培養期(incubation period)小於該第二介電表面的培養期。其也揭示包含選擇性氮化矽膜的半導體裝置結構。
美國專利申請公開案第US 2020/0090924號揭示藉由使基材暴露於有機金屬前驅物然後暴露於氧化劑而相對於介電層於金屬層上沉積金屬氧化物膜的方法。
Loepp, G.等人(1999). "Adsorption of Heptanethiol on Cu (110)" Langmuir 15 (11): 3767-3772揭示庚硫醇[CH 3(CH 2) 6SH]於Cu(110)上的吸附動力學及超高真空氣相沉積製備的單層膜的有序性已經藉由熱解吸光譜、XPS、LEED及掃描穿隧顯微鏡(scanning tunneling microscopy)進行了研究。
本領域需要提供一種藉由電漿強化原子層沉積半導體製程相對於金屬表面選擇性地於介電表面頂部上沉積矽介電材料,例如氧化矽、碳摻雜氧化矽及碳摻雜氧氮化矽,的方法。
根據本發明的第一態樣,揭示選擇性電漿強化原子層沉積(ALD)製程。在本文揭示的發明的第一態樣中,基材上的金屬表面可能未被氧化,因此需要氧化步驟以更好地使該金屬能夠與鈍化劑(passivation agent)相互作用。因此,本方法可包括(a) 將該包含介電材料的基材及該金屬裝載到反應器中。該基材可以(b) 與非電漿系氧化劑(non-plasma based oxidant)起反應,從而於該金屬上形成氧化金屬表面。該基材可以(c) 加熱至小於或等於150℃的溫度,然後(d) 暴露於鈍化劑中,該鈍化劑優先吸附於該氧化金屬表面上比於該介電材料上更多,從而於該氧化金屬表面上形成鈍化層。接下來,該基材可以(e) 暴露於矽前驅物中,該矽前驅物優先吸附於該介電材料上比於該鈍化層上更多,從而於該介電材料上形成化學吸附的含矽層。最後,該基材可以接著(f) 暴露於該非電漿系氧化劑中,並且此暴露同時(1) 將該鈍化層部分氧化,從而於該氧化金屬表面上形成部分氧化的鈍化層,及(2) 將該化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。
根據本發明的第二態樣,揭示另一選擇性電漿強化原子層沉積(ALD)製程。該第二方法可包括(g) 將該包含介電材料的基材及具有天然金屬氧化物表面的金屬裝載到反應器中。該基材可以(h) 加熱至小於或等於150℃的溫度,然後(i) 暴露於鈍化劑中,該鈍化劑優先吸附於該天然金屬氧化物表面上比於該介電材料上更多,從而於該天然金屬氧化物表面上形成鈍化層。接下來,該基材可以(j) 暴露於矽前驅物中,該矽前驅物優先吸附於該介電材料上比於該天然金屬氧化物表面上的鈍化層上更多,從而於該介電材料上形成化學吸附的含矽層。然後,該基材(k)可以暴露於電漿系氧化劑,其同時(1) 將該天然金屬氧化物表面上的鈍化層部分氧化,從而於該天然金屬氧化物表面上形成部分氧化的鈍化層,及(2) 將該介電材料上化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。
現在將參照本文揭示的圖式及表格來描述本發明的各個態樣,若適用,除非另外指明,否則類似的參考標號表示類似的元件。如上所述,本領域需要在半導體製程中利用電漿強化製程相對於金屬表面於介電質表面頂部上選擇性地沉積矽介電材料,例如氧化矽、碳摻雜氧化矽及碳摻雜氧氮化矽。因此,申請人研究了實現上述目的的手段。
因此,本文在本發明的第一態樣中揭示一種新穎的、非顯而易見的選擇性電漿強化原子層沉積(ALD)製程,該製程於ALD反應器中相對於金屬於介電材料頂部上選擇性地沉積矽介電材料。在本文揭示的發明的第一態樣中,基材上的金屬表面可能未被氧化,因此需要氧化步驟以更好地使該金屬能夠與鈍化劑相互作用。因此,該方法可包括(a) 將該包含介電材料的基材及該金屬裝載到反應器中。該基材可以(b) 與非電漿系氧化劑反應,從而於該金屬上形成氧化金屬表面。該基材可以(c) 加熱至小於或等於150℃的溫度,然後(d) 暴露於鈍化劑中,該鈍化劑優先吸附於該氧化金屬表面上比於該介電材料上更多,從而於該氧化金屬表面上形成鈍化層。接下來,該基材可以(e) 暴露於矽前驅物中,該矽前驅物優先吸附於該介電材料上比於該鈍化層上更多,從而於該介電材料上形成化學吸附的含矽層。最後,該基材可以接著(f) 暴露於電漿系氧化劑中,並且此暴露同時(1) 將該鈍化層部分氧化,從而於該氧化金屬表面上形成部分氧化的鈍化層,及(2) 將該化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。
該基材可為單晶矽晶圓、碳化矽晶圓、氧化鋁(藍寶石)晶圓、玻璃片、金屬箔、有機聚合物膜,或可為聚合物、玻璃、矽或金屬三維物件。在此方法的較佳具體實例中,該介電材料可選自由氧化矽、碳摻雜氧化矽、氧氮化矽、碳摻雜氧氮化物、氮化矽及金屬氧化物例如氧化鋯、氧化鉿、矽摻雜氧化鋯、矽摻雜氧化鉿或任何其他高k材料所組成的群組。較佳具體實例中的金屬可選自由鈷、鋁、銅、鉭、釕、鉬、鎢、鉑、銥、鎳、鈦、銀、金或其組合所組成的群組。
此外,在本方法的較佳具體實例中,該非電漿系氧化劑可選自由過氧化氫(氣態)、氧氣及臭氧所組成的群組。更特別地,無論如何,在較佳具體實例的步驟(b)中,該基材與非電漿系氧化劑起反應,從而於該金屬上形成氧化金屬表面的步驟發生於小於或等於500℃的溫度。在更佳具體實例的步驟(b)中,使該基材與非電漿系氧化劑起反應,從而於該金屬上形成氧化金屬表面的步驟發生於小於或等於150℃的溫度下。在其他具體實例的步驟(b)中,使該基材與非電漿系氧化劑起反應,從而於該金屬步驟上形成氧化金屬表面的步驟發生於小於或等於以下的溫度:145℃;140℃;135℃;130℃;125℃;120℃;115℃;110℃;105℃;100℃;95℃;90℃;85℃;80℃;75℃;70℃;65℃;60℃;55℃;或50℃。
如上所述,在步驟(c)中,該基材可獨立加熱至小於或等於150℃。在此方法的其他具體實例中,步驟(c)中的基材可以加熱到小於或等於以下的溫度:145℃;140℃;135℃;130℃;125℃;120℃;115℃;110℃;105℃;100℃;95℃;90℃;85℃;80℃;75℃;70℃;65℃;60℃;55℃;或50℃。
繼續接著,在此方法的較佳具體實例之一替代方案中,該鈍化劑係選自由以下所組成的群組:甲硫醇、乙硫醇、丙硫醇、丁硫醇、戊硫醇、己硫醇、庚硫醇、辛硫醇、壬硫醇、癸硫醇、十一烷硫醇、十二烷硫醇、十三烷硫醇、十四烷硫醇、十五烷硫醇、十六烷硫醇、十七烷硫醇、十八烷硫醇、十九烷硫醇、四氫-2H-吡喃-4-硫醇、2-丙烯-1-硫醇、四氫-2H-吡喃-4-硫醇、苯硫酚、4-甲基-1-硫酚、3-甲基-1-苯硫酚、2-甲基-1-苯硫酚及對二甲苯-α-硫醇。在此方法的另一替代方案中,該鈍化劑係選自由二硫化二第二丁烷及二硫化二庚烷所組成的群組。在此方法的較佳具體實例的另一替代方案中,該鈍化劑可選自由以下所組成的群組:1H,1H,2H,2H-全氟癸硫醇、2,2,2-三氟乙硫醇、4-甲基-6-三氟甲基-嘧啶-2-硫醇、4-三氟甲基苯甲基硫醇、4-(三氟甲氧基)苯甲基硫醇、4-氟苯甲基硫醇、3,5-雙(三氟甲基)苯硫醇、2-(三氟甲基)苯硫醇、4-三氟甲基-2,3,5,6-四氟苯硫酚、3,5-二氟苯甲基硫醇、4-三氟甲基-2,3,5,6-四氟苯硫酚及對三氟甲基苯硫醇。
在較佳的具體實例中,該鈍化層可包含吸附於該氧化金屬表面的鈍化劑的單層。更明確地說,該鈍化劑的單層可化學吸附於該氧化金屬表面。在較佳具體實例的另一態樣中,該鈍化層可另外包含物理吸附於被化學吸附到該氧化金屬表面的鈍化劑單層的第二層鈍化劑。
在本發明此態樣的較佳具體實例中,該矽前驅物可為選自由以下所組成的群組之有機胺基單矽烷:二異丙基胺基矽烷、二第二丁基胺基矽烷、雙(二乙基胺基)矽烷、雙(二甲基胺基)矽烷、雙(乙基甲基胺基)矽烷、雙(第三丁基胺基)矽烷、二異丙基胺基甲基矽烷、二第二丁基胺基甲基矽烷、二甲基胺基二甲基矽烷、二甲基胺基三甲基矽烷、雙(二甲基胺基)甲基矽烷、肆(二甲基胺基)矽烷、叁(二甲基胺基)矽烷、二乙基胺基二甲基矽烷、二甲基胺基二甲基矽烷、二異丙基胺基二甲基矽烷、六氫吡啶基二甲基矽烷、2,6-二甲基六氫吡啶基二甲基矽烷、二第二丁基胺基二甲基矽烷、異丙基第二丁基胺基二甲基矽烷、第三丁基胺基二甲基矽烷、異丙基胺基二甲基矽烷、第三戊基胺基二甲基胺基矽烷、二甲基胺基甲基矽烷、二異丙基胺基甲基矽烷、異丙基第二丁基胺基甲基矽烷、2,6-二甲基六氫吡啶基甲基矽烷、二第二丁基胺基甲基矽烷、雙(二甲基胺基)甲基矽烷、雙(二乙基胺基)甲基矽烷、雙(二異丙基胺基)甲基矽烷、雙(異丙基第二丁基胺基)甲基矽烷、雙(2,6-二甲基六氫吡啶基)甲基矽烷、雙(異丙基胺基)甲基矽烷、雙(第三丁基胺基)甲基矽烷、雙(第二丁基胺基)甲基矽烷、雙(第三戊基胺基)甲基矽烷、雙(環己基胺基)甲基矽烷、雙(異丙基胺基)二甲基矽烷、雙(異丁基胺基)二甲基矽烷、雙(第二丁基胺基)二甲基矽烷、雙(第三丁基胺基)二甲基矽烷、雙(第三戊基胺基)二甲基矽烷、雙(環己基胺基)二甲基矽烷及其組合。
或者,在本發明此態樣的較佳具體實例中,該矽前驅物可為選自由二異丙基胺基乙矽烷及二第二丁基胺基乙矽烷所組成的群組之有機胺基乙矽烷。再者,在該方法的此較佳具體實例的另一替代方案中,該矽前驅物可為選自由二異丙基胺基三矽烷基胺、二乙基胺基三矽烷基胺、異丙基胺基三矽烷基胺及環己基甲基胺基三矽烷基胺所組成的群組之有機胺基三矽烷基胺。
在本文揭示的方法的較佳具體實例之另一替代方案中,該矽前驅物可為選自由以下所組成的群組之有機胺基環矽氧烷:2-二甲胺基-2,4,4,6,6-五甲基環三矽氧烷、2-二乙胺基-2,4,4,6,6-五甲基環三矽氧烷、2-乙基甲基胺基-2,4,4,6,6-五甲基環三矽氧烷、2-異丙胺基-2,4,4,6,6-五甲基環三矽氧烷、2-二甲胺基-2,4,4,6,6,8,8-七甲基環四矽氧烷、2-二乙基胺基-2,4,4,6,6,8,8-七甲基環四矽氧烷、2-乙基甲基胺基-2,4,4,6,6,8 ,8-七甲基環四矽氧烷、2-異丙胺基-2,4,4,6,6,8,8-七甲基環四矽氧烷、2-二甲胺基-2,4,6-三甲基環三矽氧烷、2-二乙胺基-2,4,6-三甲基環三矽氧烷、2-乙基甲胺基-2,4,6-三甲基環三矽氧烷、2-異丙胺基-2,4,6-三甲基環三矽氧烷、2-二甲胺基-2,4,6,8-四甲基環四矽氧烷、2-二乙胺基-2,4,6,8-四甲基環四矽氧烷、2-乙基甲基胺基-2,4,6,8-四甲基環四矽氧烷矽氧烷及2-異丙基胺基-2,4,6,8-四甲基環四矽氧烷、2-吡咯烷基-2,4,6,8-四甲基環四矽氧烷及2-環己基甲基胺基-2,4,6,8-四甲基環四矽氧烷。
該步驟(f)中利用的電漿系氧化劑可為任何電漿,其同時(1) 將該鈍化層部分氧化,從而於該氧化金屬表面上形成部分氧化的鈍化層,及(2) 將該化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。然而,更明確地說,該電漿系氧化劑可選自由氧電漿、一氧化二氮電漿及二氧化碳電漿所組成的群組。
此外,在該方法的較佳具體實例中,該含矽介電膜可具有一定的厚度,並且所需的厚度可為預定值。舉例來說,為了滿足性能要求,該膜厚度可能必須:大於等於5奈米;大於等於10奈米;大於等於15奈米;大於等於20奈米;大於等於25奈米;大於等於30奈米;大於等於35奈米;大於等於40奈米;大於等於45奈米;或大於等於50奈米。因此,本方法之一具體實例可包括重複步驟(d)到(f),直到形成於該介電材料上的含矽介電膜的厚度達到預定值為止。在該製程的此部分的替代方案中,在暴露於該矽前驅物之間可不需要將該基材暴露於該鈍化劑,該矽前驅物優先吸附於該介電材料上比於該鈍化層上更多。因此,在該含矽介電膜具有一定厚度的一些情況下,此方法的較佳具體實例僅包括重複步驟(e)到(f),而不是步驟(d)到(f),直到形成於該介電材料上的介電膜厚度達到預定值為止。
因此,步驟(d)到(f)中的各暴露可產生已知厚度的介電膜。舉例來說,步驟(d)到(f)的各循環可假設產生約10奈米厚的含矽介電膜。再者,膜性質測試可能已經確定此膜需要約40奈米的厚度以產生所尋求的膜性質,並且需要將步驟(d)到(f)重複四循環才能產生約40奈米厚的膜。因此,在此方法的較佳具體實例的另一替代方案中,可將步驟(d)到(f)重複預定循環數,如上所述,以獲得規定的厚度。在一種情況下,預定循環數可為1。或者,該預定循環數可為:2; 3;4;5;6;7;8;9;10;11;12;13;14;15;16;17;18;19;20;21;22;23;24;25;或更多,舉例來說。在該製程的此部分的替代方案中,在暴露於該矽前驅物之間可能不需要使該基材暴露於該鈍化劑,該矽前驅物優先吸附於該介電材料上比於該鈍化層上更多。因此,在該含矽介電膜具有一定厚度的一些情況下,此方法的較佳具體實例僅包括重複步驟(e)到(f),而不包括步驟(d)到(f),經過預定循環數。
在對本文揭示的此方法的較佳具體實例之另一限制中,該反應器可於步驟之間加以吹掃。舉例來說,在一具體實例中,可於步驟(d)與(e)之間吹掃該反應器。在另一情況下,可於步驟(e)與(f)之間吹掃該反應器。在另一具體實例中,可於步驟(d)與(e)之間及於步驟(e)與(f)之間吹掃該反應器。上述任何步驟之間的反應器吹掃可選自由用惰性氣體沖洗該反應器及使該反應器暴露於真空源所組成的群組。可利用的示範惰性氣體包括,但不限於,氦、氬及氮。 根據本文揭示的發明的第一態樣製造的介電材料的選擇性電漿強化沉積
工作實施例1 - O 3作為該非電漿系氧化劑、庚硫醇(HTT)作為該鈍化劑、二第二丁基胺基矽烷(DSBAS)或2-二甲胺基-2,4,6,8-四甲基環四矽氧烷作為該矽前驅物及氧作為該電漿系氧化劑。
其表面上電鍍銅的矽晶圓基材將藉由化學機械平坦化方法進行平坦化並且放置於真空艙中。接下來,該基材將會被暴露於O 3以產生氧化金屬表面。接著將該基材加熱至150°C,並且藉由於0.38托耳(50 Pa) 的壓力下引入庚硫醇蒸氣130秒,然後用氬氣吹掃60秒以去除未反應的硫醇來沉積鈍化劑的保護膜。該基材接著於0.35托耳(47 Pa)下用二第二丁基胺基矽烷蒸氣於150°C下處理57秒,緊接著用氬氣吹掃60秒。接下來,該基材將暴露於氧電漿,同時將該溫度保持於150 °C,緊接著用氬氣吹掃30秒。該製程可重複多次。
如上所述,在本文揭示的發明的第一態樣中,該基材上的金屬表面可能未被氧化,因此需要氧化步驟以更好地使該金屬與該鈍化劑相互作用。在其他情況下,該基材上的金屬表面可能被充分氧化以使其更好地與該鈍化劑相互作用。舉例來說,該金屬表面可為天然氧化物。因此,在本發明的第二態樣中,揭示了另一新穎且非顯而易見的選擇性電漿強化原子層沉積(ALD)製程於ALD 反應器中相對於金屬將矽介電材料選擇性地沉積於介電材料的頂部上。
更明確地說,此第二方法可包括(g) 將該包含介電材料的基材及具有天然金屬氧化物表面的金屬裝載到反應器中。該基材可以(h) 加熱至小於或等於150℃的溫度,然後(i) 暴露於鈍化劑中,該鈍化劑優先吸附於該天然金屬氧化物表面上比於該介電材料上更多,從而於該天然金屬氧化物表面上形成鈍化層。接下來,該基材可以(j) 暴露於矽前驅物中,該矽前驅物優先吸附於該介電材料上比於該天然金屬氧化物表面上的鈍化層上更多,從而於該介電材料上形成化學吸附的含矽層。然後,該基材可以(k) 暴露於電漿系氧化劑,其同時(1) 將該天然金屬氧化物表面上的鈍化層部分氧化,從而於該天然金屬氧化物表面上形成部分氧化的鈍化層,及(2) 將該介電材料上的化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。
該基材可為單晶矽晶圓、碳化矽晶圓、氧化鋁(藍寶石)晶圓、玻璃片、金屬箔、有機聚合物膜,或可為聚合物、玻璃、矽或金屬三維物件。在該第二方法的較佳具體實例中,該介電材料可選自由氧化矽、碳摻雜氧化矽、氧氮化矽、碳摻雜氧氮化物、氮化矽及金屬氧化物例如氧化鋯、氧化鉿、矽摻雜氧化鋯、矽摻雜氧化鉿或任何其他高k材料所組成的群組。較佳具體實例中的金屬可選自由鈷、鋁、銅、鉭、釕、鉬、鎢、鉑、銥、鎳、鈦、銀、金或其組合所組成的群組。
本發明的第二態樣中使用的非電漿系氧化劑可選自由過氧化氫(氣態)、氧氣及臭氧所組成的群組。在又更佳的具體實例的步驟(b)中,使該基材與非電漿系氧化劑起反應從而於該金屬形成氧化金屬表面的步驟發生於小於或等於150℃的溫度下。
如上所述,在步驟(h)中,該基材可以被加熱至小於或等於150℃。在本文揭示的第二方法之其他具體實例中,該步驟(h)中的基材可以加熱到小於或等於以下溫度:145℃;140℃;135℃;130℃;125℃;120℃;115℃;110℃;105℃;100℃;95℃;90℃;85℃;80℃;75℃;70℃;65℃;60℃;55℃;或50℃。
該步驟(k)中利用的電漿系氧化劑可為任何電漿,其同時(1) 將該鈍化層部分氧化,從而於該氧化金屬表面上形成部分氧化的鈍化層,及(2) 將該化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。然而,更明確地說,該電漿系氧化劑可選自由氧電漿、一氧化二氮電漿及二氧化碳電漿所組成的群組。
繼續接著,在此方法的較佳具體實例之一替代方案中,該鈍化劑係選自由以下所組成的群組:甲硫醇、乙硫醇、丙硫醇、丁硫醇、戊硫醇、己硫醇、庚硫醇、辛硫醇、壬硫醇、癸硫醇、十一烷硫醇、十二烷硫醇、十三烷硫醇、十四烷硫醇、十五烷硫醇、十六烷硫醇、十七烷硫醇、十八烷硫醇、十九烷硫醇、四氫-2H-吡喃-4-硫醇、2-丙烯-1-硫醇、四氫-2H-吡喃-4-硫醇、苯硫酚、4-甲基-1-硫酚、3-甲基-1-苯硫酚、2-甲基-1-苯硫酚及對二甲苯-α-硫醇。在此方法的另一替代方案中,該鈍化劑係選自由二硫化二第二丁烷及二硫化二庚烷所組成的群組。在此方法的較佳具體實例的另一替代方案中,該鈍化劑可選自由以下所組成的群組:1H,1H,2H,2H-全氟癸硫醇、2,2,2-三氟乙硫醇、4-甲基-6-三氟甲基-嘧啶-2-硫醇、4-三氟甲基苯甲基硫醇、4-(三氟甲氧基)苯甲基硫醇、4-氟苯甲基硫醇、3,5-雙(三氟甲基)苯硫醇、2-(三氟甲基)苯硫醇、4-三氟甲基-2,3,5,6-四氟苯硫酚、3,5-二氟苯甲基硫醇、4-三氟甲基-2,3,5,6-四氟苯硫酚及對三氟甲基苯硫醇。
在本文揭示的第二方法的較佳具體實例中,該鈍化層可包含吸附於該天然金屬氧化物金屬表面的鈍化劑的單層。更明確地說,該鈍化劑的單層可化學吸附於該金屬氧化物表面。在較佳具體實例的另一態樣中,該鈍化層可另外包含物理吸附於被化學吸附到該天然金屬氧化物的鈍化劑單層的第二層鈍化劑。
在本發明此態樣的較佳具體實例中,該矽前驅物可為選自由以下所組成的群組之有機胺基單矽烷:二異丙基胺基矽烷、二第二丁基胺基矽烷、雙(二乙基胺基)矽烷、雙(二甲基胺基)矽烷、雙(乙基甲基胺基)矽烷、雙(第三丁基胺基)矽烷、二異丙基胺基甲基矽烷、二第二丁基胺基甲基矽烷、二甲基胺基二甲基矽烷、二甲基胺基三甲基矽烷、雙(二甲基胺基)甲基矽烷、肆(二甲基胺基)矽烷、叁(二甲基胺基)矽烷、二乙基胺基二甲基矽烷、二甲基胺基二甲基矽烷、二異丙基胺基二甲基矽烷、六氫吡啶基二甲基矽烷、2,6-二甲基六氫吡啶基二甲基矽烷、二第二丁基胺基二甲基矽烷、異丙基第二丁基胺基二甲基矽烷、第三丁基胺基二甲基矽烷、異丙基胺基二甲基矽烷、第三戊基胺基二甲基胺基矽烷、二甲基胺基甲基矽烷、二異丙基胺基甲基矽烷、異丙基第二丁基胺基甲基矽烷、2,6-二甲基六氫吡啶基甲基矽烷、二第二丁基胺基甲基矽烷、雙(二甲基胺基)甲基矽烷、雙(二乙基胺基)甲基矽烷、雙(二異丙基胺基)甲基矽烷、雙(異丙基第二丁基胺基)甲基矽烷、雙(2,6-二甲基六氫吡啶基)甲基矽烷、雙(異丙基胺基)甲基矽烷、雙(第三丁基胺基)甲基矽烷、雙(第二丁基胺基)甲基矽烷、雙(第三戊基胺基)甲基矽烷、雙(環己基胺基)甲基矽烷、雙(異丙基胺基)二甲基矽烷、雙(異丁基胺基)二甲基矽烷、雙(第二丁基胺基)二甲基矽烷、雙(第三丁基胺基)二甲基矽烷、雙(第三戊基胺基)二甲基矽烷、雙(環己基胺基)二甲基矽烷及其組合。
或者,在本發明的第二態樣的較佳具體實例中,該矽前驅物可為選自由二異丙基胺基乙矽烷及二第二丁基胺基乙矽烷所組成的群組之有機胺基乙矽烷。再者,在該第二方法的此具體實例的另一替代方案中,該矽前驅物可為選自由二異丙基胺基三矽烷基胺、二乙基胺基三矽烷基胺、異丙基胺基三矽烷基胺及環己基甲基胺基三矽烷基胺所組成的群組之有機胺基三矽烷基胺。
在本文揭示的第二方法之另一替代方案中,該矽前驅物可為選自由以下所組成的群組之有機胺基環矽氧烷:2-二甲胺基-2,4,4,6,6-五甲基環三矽氧烷、2-二乙胺基-2,4,4,6,6-五甲基環三矽氧烷、2-乙基甲基胺基-2,4,4,6,6-五甲基環三矽氧烷、2-異丙胺基-2,4,4,6,6-五甲基環三矽氧烷、2-二甲胺基-2,4,4,6,6,8,8-七甲基環四矽氧烷、2-二乙基胺基-2,4,4,6,6,8,8-七甲基環四矽氧烷、2-乙基甲基胺基-2,4,4,6,6,8 ,8-七甲基環四矽氧烷、2-異丙胺基-2,4,4,6,6,8,8-七甲基環四矽氧烷、2-二甲胺基-2,4,6-三甲基環三矽氧烷、2-二乙胺基-2,4,6-三甲基環三矽氧烷、2-乙基甲胺基-2,4,6-三甲基環三矽氧烷、2-異丙胺基-2,4,6-三甲基環三矽氧烷、2-二甲胺基-2,4,6,8-四甲基環四矽氧烷、2-二乙胺基-2,4,6,8-四甲基環四矽氧烷、2-乙基甲基胺基-2,4,6,8-四甲基環四矽氧烷矽氧烷及2-異丙基胺基-2,4,6,8-四甲基環四矽氧烷、2-吡咯烷基-2,4,6,8-四甲基環四矽氧烷及2-環己基甲基胺基-2,4,6,8-四甲基環四矽氧烷。
此外,在該第二方法的較佳具體實例中,該含矽介電膜可具有一定的厚度,並且所需的厚度可為預定值。舉例來說,為了滿足性能要求,該膜厚度可能必須:大於等於5奈米;大於等於10奈米;大於等於15奈米;大於等於20奈米;大於等於25奈米;大於等於30奈米;大於等於35奈米;大於等於40奈米;大於等於45奈米;或大於等於50奈米。因此,此第二方法之一具體實例可包括重複步驟(i)到(k),直到形成於該介電材料上的含矽介電膜的厚度達到預定值為止。為了促進本文揭示的第二方法的此部分, 該製程可另外包括以下步驟:(l) 使該基材與該非電漿系氧化劑起反應從而於該金屬上形成氧化金屬表面;(m) 使該基材暴露於鈍化劑中,該鈍化劑優先吸附於該氧化金屬表面上比於該介電材料上更多,從而於該氧化金屬表面上形成鈍化層;(n) 使該基材暴露於矽前驅物中,該矽前驅物優先吸附於該介電材料上比於該鈍化層上更多,從而於該介電材料上形成化學吸附的含矽層;並且使該基材暴露於該電漿系氧化劑中,其同時(1) 將該氧化金屬表面上的鈍化層部分氧化,從而於該氧化金屬表面上形成部分氧化的鈍化層,及(2) 將該介電材料上的化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。
或者,步驟(i)到(k)中的各暴露可產生已知厚度的介電膜。舉例來說,步驟(i)到(k)的各循環可假設產生約10奈米厚的含矽介電膜。再者,膜性質測試可能已經確定此膜需要約40奈米的厚度以產生所尋求的膜性質,並且需要將步驟(i)到(k)重複四循環才能產生約40奈米厚的膜。因此,在此第二方法的替代方案中,可將步驟(i)到(k)重複預定循環數,如上所述,以獲得規定的厚度。在一種情況下,預定循環數可為1。或者,該預定循環數可為:2;3;4;5;6;7;8;9;10;11;12;13;14;15;16;17;18;19;20;21;22;23;24;25;或更多,舉例來說。為了促進本文揭示的第二方法的此部分,該製程可另外包括以下步驟:(l) 使該基材與該非電漿系氧化劑起反應從而於該金屬上形成氧化金屬表面;(m) 使該基材暴露於鈍化劑中,該鈍化劑優先吸附於該氧化金屬表面上比於該介電材料上更多,從而於該氧化金屬表面上形成鈍化層;(n) 使該基材暴露於矽前驅物中,該矽前驅物優先吸附於該介電材料上比於該鈍化層上更多,從而於該介電材料上形成化學吸附的含矽層;並且使該基材暴露於該電漿系氧化劑中,其同時(1) 將該氧化金屬表面上的鈍化層部分氧化,從而於該氧化金屬表面上形成部分氧化的鈍化層,及(2) 將該介電材料上的化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。
此外,在該第二方法的另一替代方案中,該含矽介電膜可具有一定的厚度,並且所需的厚度可為預定值。舉例來說,如前所述,為了滿足性能要求,該膜厚度可能必須:大於等於5奈米;大於等於10奈米;大於等於15奈米;大於等於20奈米;大於等於25奈米;大於等於30奈米;大於等於35奈米;大於等於40奈米;大於等於45奈米;或大於等於50奈米。因此,此第二方法之一具體實例可包括重複步驟(j)到(k),直到形成於該介電材料上的含矽介電膜的厚度達到預定值為止。為了促進本文揭示的第二方法的此部分, 該製程可另外包括以下步驟:(l) 使該基材與該非電漿系氧化劑起反應從而於該金屬上形成氧化金屬表面;(m) 使該基材暴露於鈍化劑中,該鈍化劑優先吸附於該氧化金屬表面上比於該介電材料上更多,從而於該氧化金屬表面上形成鈍化層;(n) 使該基材暴露於矽前驅物中,該矽前驅物優先吸附於該介電材料上比於該鈍化層上更多,從而於該介電材料上形成化學吸附的含矽層;並且使該基材暴露於該電漿系氧化劑中,其同時(1) 將該氧化金屬表面上的鈍化層部分氧化,從而於該氧化金屬表面上形成部分氧化的鈍化層,及(2) 將該介電材料上的化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。
再者,或者,步驟(j)到(k)中的各暴露可產生已知厚度的介電膜。舉例來說,步驟(j)到(k)的各循環可假設產生約10奈米厚的含矽介電膜。再者,膜性質測試可能已經確定此膜需要約40奈米的厚度以產生所尋求的膜性質,並且需要將步驟(j)到(k)重複四循環才能產生約40奈米厚的膜。因此,在此第二方法的替代方案中,可將步驟(j)到(k)重複預定循環數,如上所述,以獲得規定的厚度。在一種情況下,預定循環數可為1。或者,該預定循環數可為:2;3;4;5;6;7;8;9;10;11;12;13;14;15;16;17;18;19;20;21;22;23;24;25;或更多,舉例來說。為了促進本文揭示的第二方法的此部分,該製程可另外包括以下步驟:(l) 使該基材與該非電漿系氧化劑起反應從而於該金屬上形成氧化金屬表面;(m) 使該基材暴露於鈍化劑中,該鈍化劑優先吸附於該氧化金屬表面上比於該介電材料上更多,從而於該氧化金屬表面上形成鈍化層;(n) 使該基材暴露於矽前驅物中,該矽前驅物優先吸附於該介電材料上比於該鈍化層上更多,從而於該介電材料上形成化學吸附的含矽層;並且使該基材暴露於該電漿系氧化劑中,其同時(1) 將該氧化金屬表面上的鈍化層部分氧化,從而於該氧化金屬表面上形成部分氧化的鈍化層,及(2) 將該介電材料上的化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。
在對本文揭示的第二方法的較佳具體實例之另一限制中,該反應器可於步驟之間加以吹掃。舉例來說,在一具體實例中,可於步驟(i)與(j)之間吹掃該反應器。在另一情況下,可於步驟(j)與(k)之間吹掃該反應器。在另一具體實例中,可於步驟(i)與(j)之間及於步驟(j)與(k)之間吹掃該反應器。上述任何步驟之間的反應器吹掃可選自由用惰性氣體沖洗該反應器及使該反應器暴露於真空源所組成的群組。可利用的一些惰性氣體包括,但不限於,氦、氬及氮。 根據本文揭示的發明的第二態樣製造的介電材料的選擇性電漿強化沉積
工作實施例2 - A-B-C型ALD製程,以HTT作為該阻擋分子,O 2電漿作為該氧源,並且DSBAS或2-二甲胺基-2,4,6,8-四甲基環四矽氧烷作為該矽前驅物。
將藉由CMP進行平坦化的表面上電鍍銅或具有天然氧化物表面之矽晶圓基材放置於被抽空至5 x 10 -6托耳的基準壓力之真空艙中。將該基材加熱至100 °C並且於0.38托耳(50 Pa)的 HTT壓力下經由蒸氣相將HTT保護層選擇性地附著於CMP Cu基材上130 秒,緊接著用Ar吹掃60秒以去除該未反應的硫醇。使HTT官能化Cu基材暴露於0.035托耳(5 Pa)的DSBAS蒸氣中57秒或暴露於0.050托耳(7 Pa)的2-二甲胺基-2,4,6,8-四甲基環四矽氧烷蒸氣中20 秒,緊接著60 秒Ar吹掃以去除任何未反應的Si前驅物。接著使該基材暴露於遠程70/30 sccm O 2/Ar電漿,在150°C下處理1秒,以完成SiO 2ALD製程的一次循環。以A-B-C型ALD (A = HTT,B = DSBAS或2-二甲胺基-2,4,6,8-四甲基環四矽氧烷,C = 遠距O 2電漿)製程重複步驟1至3,對於DSBAS至多10次,對於2-二甲胺基-2,4,6,8-四甲基環四矽氧烷至多17次。對於重上塗層的循環(redose cycle),PFDT的暴露時間從500秒減少到60秒。根據反射吸收紅外線光譜術(RAIRS)及XPS 的結果,並未觀察到SiO 2沉積於該Cu表面上的證據。用AFM描述表面形態的特徵並未透露該Cu表面損壞或變粗糙的證據。藉由非原位可變角度光譜橢偏儀(VASE)測量時,類似的A-B-C型ALD製程於Si晶圓表面的天然氧化物上沉積了5 nm的SiO 2
工作實施例3 - A-B-C型ALD製程,以PFDT作為該阻擋分子,O 2電漿作為該氧源,並且DSBAS或2-二甲胺基-2,4,6,8-四甲基環四矽氧烷作為該矽前驅物。
將藉由CMP進行平坦化的表面上電鍍銅或具有天然氧化物表面之矽晶圓基材放置於被抽空至5 x 10 -6托耳的基準壓力之真空艙中。將該基材加熱至100 °C並且於0.38托耳(50 Pa)的 HTT壓力下經由該蒸氣相將PFDT保護層選擇性地附著於該CMP Cu基材上130 秒,緊接著用Ar吹掃60秒以去除該未反應的硫醇。使HTT官能化Cu基材暴露於0.035托耳(5 Pa)的DSBAS蒸氣中57秒或暴露於0.050托耳(7 Pa)的2-二甲胺基-2,4,6,8-四甲基環四矽氧烷蒸氣中20 秒,緊接著60 秒Ar吹掃以去除任何未反應的Si前驅物。接著使該基材暴露於遠程70/30 sccm O 2/Ar電漿,在150°C下處理1秒,以完成SiO 2ALD製程的一次循環。以A-B-C型ALD (A = PFDT,B = DSBAS或2-二甲胺基-2,4,6,8-四甲基環四矽氧烷,C = 遠距O 2電漿)製程重複步驟1至3至多35次。對於重上塗層的循環,PFDT的暴露時間從500秒減少到60秒。根據反射吸收紅外線光譜術(RAIRS)及XPS 的結果,並未觀察到SiO 2沉積於該Cu表面上的證據。藉由比較生長和非生長表面的Si 2p區域的高解析度XPS掃描來確定生長選擇性,如圖5所示。用AFM描述表面形態的特徵並未透露該Cu表面損壞或變粗糙的證據。藉由非原位可變角度光譜橢偏儀(VASE)測量時,類似的A-B-C型ALD製程於Si晶圓表面的天然氧化物上針對DSBAS沉積了5 nm的SiO 2,並且針對2-二甲胺基-2,4,6,8-四甲基環四矽氧烷沉積了10 nm的SiO 2
以上描述僅是代表性的,因此可在不悖離本發明的範圍的情況下對本文所述的具體實例進行修飾。因此,這些修飾皆落入本發明的範疇以內並且意在落入後附申請專利範圍之內。
圖1顯示A-B-C型ALD製程在第 1、20及30次循環期間的紅外線吸光度變化,其中A = HTT,B = DSBAS,C = 於100 °C下的遠距氧電漿,如工作實施例2所述。選擇性在這30次循環期間皆得以保持。
圖2顯示A-B-C型ALD製程在第1、8及17次循環期間的紅外線吸光度變化,其中A = HTT,B = 2-二甲胺基-2,4,6,8-四甲基環四矽氧烷,C = 於100 °C下的遠距氧電漿,如工作實施例2所述。選擇性在這17次循環期間皆得以保持。
圖3顯示A-B-C型ALD製程在第1、20及35次循環期間的紅外線吸光度變化,其中A = PFDT,B = DSBAS,C = 於100 °C下的遠距氧電漿,如工作實施例3所述。選擇性在這35次循環期間皆得以保持。
圖4顯示於100 °C下A-B-C (有抑制劑)及B-C (無抑制劑)型ALD製程 的Si 2p區域的X射線光電子光譜術(XPS)測量及高解析度光譜,如工作實施例3所述,其中A = PFDT,B = DSBAS,C = 於100 °C下的遠距氧電漿。該PFDT抑制劑阻擋了含矽和氧的介電質長在該銅表面上35次循環。
圖5(a)經過化學機械拋光(CMP)之後初始Cu表面的原子力顯微鏡(AFM)影像,均方根粗糙度為0.4 nm;及圖5(b)經過 A-B-C型ALD製程之後均方根粗糙度為1.1 nm的Cu的AFM影像,其中A = PFDT,B = DSBAS,C = 於100 °C下的遠程氧電漿,如工作實施例3所述,以及藉由熱解吸和BHP 851清潔來去除後處理製程中的抑製劑。
圖6顯示A-B-C型ALD製程在第1、20及35次循環期間的紅外線吸光度變化,其中A = PFDT,B = 2-二甲胺基-2,4,6,8-四甲基環四矽氧烷,C = 於100 °C下的遠距氧電漿,如工作實施例3所述。選擇性在這34次循環期間皆得以保持。

Claims (22)

  1. 一種選擇性電漿強化原子層沉積(ALD)方法,其包含:(a)將包含介電材料的基材及該金屬裝載到反應器中;(b)使該基材與非電漿系氧化劑起反應,從而於該金屬上形成氧化金屬表面;(c)將該基材加熱至高於或等於50℃且小於或等於150℃的溫度;(d)使該基材暴露於鈍化劑中,相較於該介電材料該鈍化劑更優先多吸附於該氧化金屬表面上,從而於該氧化金屬表面上形成鈍化層;(e)使該基材暴露於矽前驅物中,相較於該氧化金屬表面上的鈍化層該矽前驅物更優先多吸附於該介電材料上,從而於該介電材料上形成化學吸附的含矽層;及(f)使該基材暴露於電漿系氧化劑中,其同時地(1)將該鈍化層部分氧化,從而於該氧化金屬表面上形成部分氧化的鈍化層,及(2)將該介電材料上的化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。
  2. 如請求項1之選擇性電漿強化ALD方法,其中該介電材料係選自由氧化矽、碳摻雜氧化矽、氧氮化矽、碳摻雜氧氮化物、氮化矽及金屬氧化物所組成的群組,或任何其他高k材料。
  3. 如請求項2之選擇性電漿強化ALD方法,其中該金屬氧化物為氧化鋯、氧化鉿、矽摻雜氧化鋯、或矽摻雜氧化鉿。
  4. 如請求項1之選擇性電漿強化ALD方法,其中該金屬係選自由鈷、鋁、銅、鉭、釕、鉬、鎢、鉑、銥、鎳、鈦、銀、金或其組合所組成的群組。
  5. 如請求項1之選擇性電漿強化ALD方法,其中該非電漿系氧化劑係選自由過氧化氫、氧氣及臭氧所組成的群組。
  6. 如請求項1之選擇性電漿強化ALD方法,其中在步驟(b)中,使該基材與非電漿系氧化劑起反應,從而於該金屬上形成氧化金屬表面的步驟發生於小於或等於500℃的溫度。
  7. 如請求項6之選擇性電漿強化ALD方法,其中在步驟(b)中,使該基材與非電漿系氧化劑起反應,從而於該金屬上形成氧化金屬表面的步驟發生於小於或等於150℃的溫度下。
  8. 如請求項1之選擇性電漿強化ALD方法,其中該鈍化劑係選自由以下所組成的群組:甲硫醇、乙硫醇、丙硫醇、丁硫醇、戊硫醇、己硫醇、庚硫醇、辛硫醇、壬硫醇、癸硫醇、十一烷硫醇、十二烷硫醇、十三烷硫醇、十四烷硫醇、十五烷硫醇、十六烷硫醇、十七烷硫醇、十八烷硫醇、十九烷硫醇、四氫-2H-吡喃-4-硫醇、2-丙烯-1-硫醇、四氫-2H-吡喃-4-硫醇、苯硫酚、4-甲基-1-硫酚、3-甲基-1-苯硫酚、2-甲基-1-苯硫酚及對二甲苯-α-硫醇。
  9. 如請求項1之選擇性電漿強化ALD方法,其中該鈍化劑係選自由二硫化二第二丁烷及二硫化二庚烷所組成的群組。
  10. 如請求項1之選擇性電漿強化ALD方法,其中該鈍化劑係選自由以下所組成的群組:1H,1H,2H,2H-全氟癸硫醇、2,2,2-三氟乙硫醇、4-甲基-6-三氟甲基-嘧啶-2-硫醇、4-三氟甲基苯甲基硫醇、4-(三氟甲氧基)苯甲基硫醇、4-氟苯甲基硫醇、3,5-雙(三氟甲基)苯硫醇、2-(三氟甲基)苯硫醇、4-三氟甲基-2,3,5,6-四氟苯硫酚、3,5-二氟苯甲基硫醇、4-三氟甲基-2,3,5,6-四氟苯硫酚及對三氟甲基苯硫醇。
  11. 如請求項1之選擇性電漿強化ALD方法,其中該鈍化層包含化學吸附於該氧化金屬表面的鈍化劑的單層。
  12. 一種選擇性電漿強化原子層沉積(ALD)方法,其包含:(g)將包含介電材料的基材及具有天然金屬氧化物表面的金屬裝載到反應器中;(h)將該基材加熱至高於或等於50℃且小於或等於150℃的溫度;(i)使該基材暴露於鈍化劑,相較於該介電材料該鈍化劑更優先多吸附於該天然金屬氧化物表面上,從而於該天然金屬氧化物表面上形成鈍化層;(j)使該基材暴露於矽前驅物,相較於該天然金屬氧化物表面上的鈍化層該矽前驅物更優先吸多附於該介電材料上,從而於該介電材料上形成化學吸附的含矽層;及(k)使該基材暴露於電漿系氧化劑,其同時(1)將該天然金屬氧化物表面上的鈍化層部分氧化,從而於該天然金屬氧化物表面上形成部分氧化的鈍化層,及(2)將該介電材料上化學吸附的含矽層氧化,從而於該介電材料上形成含矽介電膜。
  13. 如請求項12之選擇性電漿強化ALD方法,其中該介電材料係選自由氧化矽、碳摻雜氧化矽、氧氮化矽、碳摻雜氧氮化物、氮化矽及金屬氧化物所組成的群組,或任何其他高k材料。
  14. 如請求項13之選擇性電漿強化ALD方法,其中該金屬氧化物為氧化鋯、氧化鉿、矽摻雜氧化鋯、或矽摻雜氧化鉿。
  15. 如請求項12之選擇性電漿強化ALD方法,其中該金屬係選自由鈷、鋁、銅、鉭、釕、鉬、鎢、鉑、銥、鎳、鈦、銀、金或其組合所組成的群組。
  16. 如請求項12之選擇性電漿強化ALD方法,其中該電漿系氧化劑係選自由氧電漿、一氧化二氮電漿及二氧化碳電漿所組成的群組。
  17. 如請求項12之選擇性電漿強化ALD方法,其中該鈍化劑係選自由以下所組成的群組:甲硫醇、乙硫醇、丙硫醇、丁硫醇、戊硫醇、己硫醇、庚硫醇、辛硫醇、壬硫醇、癸硫醇、十一烷硫醇、十二烷硫醇、十三烷硫醇、十四烷硫醇、十五烷硫醇、十六烷硫醇、十七烷硫醇、十八烷硫醇、十九烷硫醇、四氫-2H-吡喃-4-硫醇、2-丙烯-1-硫醇、四氫-2H-吡喃-4-硫醇、苯硫酚、4-甲基-1-硫酚、3-甲基-1-苯硫酚、2-甲基-1-苯硫酚及對二甲苯-α-硫醇。
  18. 如請求項12之選擇性電漿強化ALD方法,其中該鈍化劑係選自由二硫化二第二丁烷及二硫化二庚烷所組成的群組。
  19. 如請求項12之選擇性電漿強化ALD方法,其中該鈍化劑係選自由以下所組成的群組:1H,1H,2H,2H-全氟癸硫醇、2,2,2-三氟乙硫醇、4-甲基-6-三氟甲基-嘧啶-2-硫醇、4-三氟甲基苯甲基硫醇、4-(三氟甲氧基)苯甲基硫醇、4-氟苯甲基硫醇、3,5-雙(三氟甲基)苯硫醇、2-(三氟甲基)苯硫醇、4-三氟甲基-2,3,5,6-四氟苯硫酚、3,5-二氟苯甲基硫醇、4-三氟甲基-2,3,5,6-四氟苯硫酚及對三氟甲基苯硫醇。
  20. 如請求項12之選擇性電漿強化ALD方法,其中該鈍化層包含化學吸附於該天然金屬氧化物表面的鈍化劑的單層。
  21. 如請求項20之選擇性電漿強化ALD方法,其中該鈍化層另外包含物理吸附於被化學吸附到該天然金屬氧化物表面的鈍化劑單層的第二層鈍化劑。
  22. 如請求項12之選擇性電漿強化ALD方法,其中該矽前驅物係選自由以下所組成的群組之有機胺基單矽烷:二異丙基胺基矽烷、二第二丁基胺基矽烷、雙(二乙基胺基)矽烷、雙(二甲基胺基)矽烷、雙(乙基甲基胺基)矽烷、雙(第三丁基胺基)矽烷、二異丙基胺基甲基矽烷、二第二丁基胺基甲基矽烷、二甲基胺基二甲基矽烷、二甲基胺基三甲基矽烷、雙(二甲基胺基)甲基矽烷、肆(二甲基胺基)矽烷、叁(二甲基胺基)矽烷、二乙基胺基二甲基矽烷、二甲基胺基二甲基矽烷、二異丙基胺基二甲基矽烷、六氫吡啶基二甲基矽烷、2,6-二甲基六氫吡啶基二甲基矽烷、二第二丁基胺基二甲基矽烷、異丙基第二丁基胺基二甲基矽烷、第三丁基胺基二甲基矽烷、異丙基胺基二甲基矽烷、第三戊基胺基二甲基胺基矽烷、二甲基胺基甲基矽烷、二異丙基胺基甲基矽烷、異丙基第二丁基胺基甲基矽烷、2,6-二甲基六氫吡啶基甲基矽烷、二第二丁基胺基甲基矽烷、雙(二甲基胺基)甲基矽烷、雙(二乙基胺基)甲基矽烷、雙(二異丙基胺基)甲基矽烷、雙(異丙基第二丁基胺基)甲基矽烷、雙(2,6-二甲基六氫吡啶基)甲基矽烷、雙(異丙基胺基)甲基矽烷、雙(第三丁基胺基)甲基矽烷、雙(第二丁基胺基)甲基矽烷、雙(第三戊基胺基)甲基矽烷、雙(環己基胺基)甲基矽烷、雙(異丙基胺基)二甲基矽烷、雙(異丁基胺基)二甲基矽烷、雙(第二丁基胺基)二甲基矽烷、雙(第三丁基胺基)二甲基矽烷、雙(第三戊基胺基)二甲基矽烷、雙(環己基胺基)二甲基矽烷及其組合。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190017170A1 (en) * 2017-07-14 2019-01-17 Asm Ip Holding B.V. Passivation against vapor deposition
WO2020046746A1 (en) * 2018-08-27 2020-03-05 Versum Materials Us, Llc Selective deposition on silicon containing surfaces
TW202010860A (zh) * 2016-03-03 2020-03-16 美商應用材料股份有限公司 利用間歇性空氣-水曝露之改良自組裝單層阻隔
CN111373507A (zh) * 2017-11-22 2020-07-03 朗姆研究公司 SiO2在铜存在下在电介质表面上的选择性生长
TW202026461A (zh) * 2018-10-02 2020-07-16 荷蘭商Asm Ip 控股公司 選擇性沉積的方法以及用於選擇性沉積的組合工具和系統

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5626540A (en) * 1979-08-13 1981-03-14 Tokyo Daigaku Selective oxidation of silicon in oxygen plasma
US6391803B1 (en) * 2001-06-20 2002-05-21 Samsung Electronics Co., Ltd. Method of forming silicon containing thin films by atomic layer deposition utilizing trisdimethylaminosilane
KR20170125876A (ko) * 2015-02-26 2017-11-15 어플라이드 머티어리얼스, 인코포레이티드 자기-조립 단분자층들을 사용하는 선택적인 유전체 증착을 위한 방법들
US10043684B1 (en) * 2017-02-06 2018-08-07 Applied Materials, Inc. Self-limiting atomic thermal etching systems and methods
CN115233183A (zh) * 2017-05-16 2022-10-25 Asm Ip 控股有限公司 电介质上氧化物的选择性peald

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW202010860A (zh) * 2016-03-03 2020-03-16 美商應用材料股份有限公司 利用間歇性空氣-水曝露之改良自組裝單層阻隔
US20190017170A1 (en) * 2017-07-14 2019-01-17 Asm Ip Holding B.V. Passivation against vapor deposition
CN111373507A (zh) * 2017-11-22 2020-07-03 朗姆研究公司 SiO2在铜存在下在电介质表面上的选择性生长
WO2020046746A1 (en) * 2018-08-27 2020-03-05 Versum Materials Us, Llc Selective deposition on silicon containing surfaces
TW202026461A (zh) * 2018-10-02 2020-07-16 荷蘭商Asm Ip 控股公司 選擇性沉積的方法以及用於選擇性沉積的組合工具和系統

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