TWI769781B - Manufacturing method of circuit board - Google Patents
Manufacturing method of circuit board Download PDFInfo
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- TWI769781B TWI769781B TW110113107A TW110113107A TWI769781B TW I769781 B TWI769781 B TW I769781B TW 110113107 A TW110113107 A TW 110113107A TW 110113107 A TW110113107 A TW 110113107A TW I769781 B TWI769781 B TW I769781B
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Description
本申請涉及一種電路板的製造方法。The present application relates to a method of manufacturing a circuit board.
傳統的電路板貫孔電鍍工藝需先對電路板進行鑽孔、然後金屬化孔的周壁,最後進行電鍍填孔以形成銅柱。然而,為提高電鍍填孔的效率,需要在高電流密度下進行電鍍,導致電鍍填孔過程容易出現狗骨頭(dog-bone)效應,當持續增加電鍍時間時,孔內會產生均鍍力降低及孔環逐漸縮小的情形,容易產生空泡或毛刺,影響後續銅柱的導熱或導電性能。The traditional through-hole electroplating process for circuit boards requires first drilling the circuit board, then metallizing the peripheral walls of the holes, and finally performing electroplating to fill the holes to form copper pillars. However, in order to improve the efficiency of electroplating hole filling, electroplating needs to be carried out at a high current density, which leads to the dog-bone effect in the process of electroplating hole filling. When the plating time is continuously increased, the throwing force in the hole will decrease. And the situation that the hole ring is gradually reduced, it is easy to generate cavities or burrs, which affect the thermal conductivity or electrical conductivity of the subsequent copper pillars.
有鑑於此,本申請提供一種電路板製造方法,以減少導通柱中空泡或者毛刺的產生。In view of this, the present application provides a method for manufacturing a circuit board to reduce the generation of voids or burrs in the conduction column.
一種電路板的製造方法,包括步驟:提供電路基板,所述電路基板包括外側導電層及至少一內側導電層,所述外側導電層設置於所述內側導電層的相對兩側。於所述電路基板設置第一開孔,所述第一開孔貫穿所述外側導電層及所述內側導電層。於所述第一開孔內設置導電片,所述導電片與所述內側導電層電性導通,所述導電片與所述外側導電層電性隔絕。以及於具有所述導電片的所述第一開孔內進行電鍍,且將所述導電片與電鍍陰極電連接,從而在所述第一開孔內以形成導通柱,獲得所述電路板。A method for manufacturing a circuit board, comprising the steps of: providing a circuit substrate, the circuit substrate comprising an outer conductive layer and at least one inner conductive layer, the outer conductive layers are disposed on opposite sides of the inner conductive layer. A first opening is provided on the circuit substrate, and the first opening penetrates the outer conductive layer and the inner conductive layer. A conductive sheet is arranged in the first opening, the conductive sheet is electrically connected to the inner conductive layer, and the conductive sheet is electrically isolated from the outer conductive layer. and performing electroplating in the first opening with the conductive sheet, and electrically connecting the conductive sheet with the electroplating cathode, so as to form a conductive column in the first opening to obtain the circuit board.
進一步地,步驟“於所述第一開孔內設置導電片”包括:於所述第一開孔內電鍍以形成第一金屬層,所述第一金屬層包括第一端部、第二端部及連接於所述第一端部及所述第二端部之間的導電片,所述第一端部及所述第二端部電性連接所述外側導電層。以及移除所述第一端部及所述第二端部以斷開所述導電片與所述外側導電層的電性連接。Further, the step of "arranging a conductive sheet in the first opening" includes: electroplating in the first opening to form a first metal layer, and the first metal layer includes a first end and a second end A portion and a conductive sheet connected between the first end portion and the second end portion, the first end portion and the second end portion are electrically connected to the outer conductive layer. and removing the first end portion and the second end portion to disconnect the electrical connection between the conductive sheet and the outer conductive layer.
進一步地,所述電路基板還包括多個絕緣層,所述絕緣層設置於所述外側導電層與內側導電層之間,或者所述絕緣層設置於相鄰兩個所述內側導電層之間。Further, the circuit substrate further includes a plurality of insulating layers, the insulating layers are arranged between the outer conductive layer and the inner conductive layer, or the insulating layer is arranged between two adjacent inner conductive layers .
進一步地,所述第一端部及所述第二端部沿所述電路基板的厚度方向延伸,且所述第一端部或所述第二端部對應所述外側導電層及至少一所述絕緣層。Further, the first end portion and the second end portion extend along the thickness direction of the circuit substrate, and the first end portion or the second end portion corresponds to the outer conductive layer and at least one the insulating layer.
進一步地,還包括步驟:於所述電路基板設置第二開孔,所述第二開孔貫穿所述外側導電層及所述內側導電層。於所述第二開孔內電鍍以形成第二金屬層,所述第二金屬層電性導通所述外側導電層及所述內側導電層。Further, the method further includes the step of: disposing a second opening on the circuit substrate, and the second opening penetrates the outer conductive layer and the inner conductive layer. Electroplating is performed in the second opening to form a second metal layer, and the second metal layer is electrically connected to the outer conductive layer and the inner conductive layer.
進一步地,步驟“於具有所述導電片的所述第一開孔內進行電鍍”包括:Further, the step "electroplating in the first opening with the conductive sheet" includes:
於所述外側導電層設置幹膜層,所述幹膜層覆設置有開口,所述第一開孔於所述開口的底部露出,所述幹膜層覆蓋所述第二開孔。將所述電路基板浸入電鍍液中,並將所述第二金屬層電性連接所述電鍍陰極以進行電鍍,以及移除所述幹膜層。A dry film layer is disposed on the outer conductive layer, an opening is covered on the dry film layer, the first opening is exposed at the bottom of the opening, and the dry film layer covers the second opening. The circuit substrate is immersed in an electroplating solution, the second metal layer is electrically connected to the electroplating cathode for electroplating, and the dry film layer is removed.
進一步地,還包括:移除所述導通柱伸出所述外側導電層的外側面的部分。Further, the method further includes: removing the portion of the conductive post extending from the outer side surface of the outer conductive layer.
進一步地,還包括步驟:於所述外側導電層上電鍍形成覆蓋層,所述覆蓋層覆蓋所述導通柱。Further, the method further includes the step of: forming a cover layer by electroplating on the outer conductive layer, and the cover layer covers the conduction column.
進一步地,所述第一開孔的內徑為0.1~0.8毫米。Further, the inner diameter of the first opening is 0.1-0.8 mm.
進一步地,所述電路基板的厚度為1~5毫米。Further, the thickness of the circuit substrate is 1-5 mm.
本申請提供的製造方法藉由設置電性連接電鍍陰極的導電片,使得電鍍沉積由導電片處開始,繼而填滿第一開孔,有利於維持孔內均鍍力並減少第一開孔的孔環逐漸縮小的情形發生,從而減少空泡或者毛刺的產生。In the manufacturing method provided by the present application, by arranging a conductive sheet electrically connected to the electroplating cathode, the electroplating deposition starts from the conductive sheet, and then fills the first opening, which is beneficial to maintain the uniform plating force in the hole and reduce the loss of the first opening. The hole ring is gradually reduced, thereby reducing the generation of cavitation or burr.
下面將結合本申請實施例中的附圖,對本申請實施例中的技術方案進行清楚、完整地描述,顯然,所描述的實施例僅僅是本申請一部分實施例,而不是全部的實施例。The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.
需要說明的是,當元件被稱為“固定於”另一個元件,它可以直接在另一個元件上或者也可以存在居中的元件。當一個元件被認為是“連接”另一個元件,它可以是直接連接到另一個元件或者可能同時存在居中元件。當一個元件被認為是“設置於”另一個元件,它可以是直接設置在另一個元件上或者可能同時存在居中元件。It should be noted that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. When an element is referred to as being "disposed on" another element, it can be directly disposed on the other element or intervening elements may also be present.
請參見圖1至圖6,本發明提供一種電路板100的製造方法,以在電路基板10中形成導通柱50,該導通柱50用於電性導通電路基板10中的各導電層或增強電路基板10的導熱性能。Referring to FIGS. 1 to 6 , the present invention provides a method for manufacturing a
所述製造方法包括步驟:The manufacturing method includes the steps:
S1:請參見圖1,提供電路基板10,所述電路基板10包括外側導電層11及至少一內側導電層12,所述外側導電層11設置於所述內側導電層12的相對的兩側,所述外側導電層11與所述內側導電層12之間、相鄰兩個所述內側導電層12之間都設置有絕緣層13。所述電路基板10的厚度為1~5毫米。S1: Referring to FIG. 1, a circuit substrate 10 is provided, the circuit substrate 10 includes an outer
在本實施例中,所述內側導電層12上形成有內側導電線路121,所述內側導電線路121用於電性連接電子元件(例如,積體電路等)以實現相應的功能。In this embodiment, inner
S2:請參見圖2及圖4,於所述電路基板10設置第一開孔14,所述第一開孔14貫穿所述外側導電層11、所述內側導電層12及所述絕緣層13,然後在所述第一開孔14的內側壁設置導電片15,所述導電片15與所述內側導電層12電性導通,所述導電片15與所述外側導電層11電性隔絕。在本實施例中,所述第一開孔14的內徑為0.1~0.8毫米,優選地,所述第一開孔14的內徑為0.5毫米。S2: Please refer to FIG. 2 and FIG. 4 , the circuit substrate 10 is provided with a
在本實施例中,步驟S2包括:In this embodiment, step S2 includes:
S21:請參見圖3,於所述電路基板10設置第一開孔14,並於所述第一開孔14內電鍍以形成第一金屬層141。所述第一金屬層141包括第一端部142、第二端部143及連接於所述第一端部142及所述第二端部143之間的所述導電片15。所述第一端部142沿所述電路基板10的厚度方向延伸,且所述第一端部142至少對應一所述外側導電層11、位於所述外側導電層11下方的一所述絕緣層13,所述第二端部143沿所述電路基板10的厚度方向延伸,且所述第二端部143至少對應一所述外側導電層11、位於所述外側導電層11下方的一所述絕緣層13。S21 : Referring to FIG. 3 , a
S22:請參見圖4,移除所述第一端部142及所述第二端部143以斷開所述導電片15與所述外側導電層11的電性連接。在本實施例中,所述移除包括採用機械鑽削的方式銑削掉所述第一端部142及所述第二端部143。S22 : Referring to FIG. 4 , remove the
在本實施例中,步驟S2中,所述導電片15大致呈圓環狀,且所述導電片15沿直徑方向的相對兩外側連接所述內側導電層12。In this embodiment, in step S2 , the
在本實施例中,步驟S2還包括:In the present embodiment, step S2 also comprises:
S23:請參見圖2,於所述電路基板10設置第二開孔16,所述第二開孔16貫穿所述外側導電層11、所述內側導電層12及所述絕緣層13;S23: Referring to FIG. 2, a
S24:請參見圖3,於所述第二開孔16內電鍍以形成第二金屬層161,所述第二金屬層161電性導通所述外側導電層11及所述內側導電層12。S24 : Referring to FIG. 3 , electroplating is performed in the
S3:請參見圖5及圖6,於所述導電片15上進行電鍍以形成導通柱50,所述導通柱50填充所述第一開孔14,獲得所述電路板100。S3: Referring to FIG. 5 and FIG. 6 , electroplating is performed on the
在本實施例中,步驟S3包括:In this embodiment, step S3 includes:
S31:於所述外側導電層11設置幹膜層111,所述幹膜層111設置有開口112,所述第一開孔14於所述開口112的底部露出,所述幹膜層111覆蓋所述第二開孔16;S31: a
S32:將所述電路基板10浸入電鍍液(圖未示)中,以及將電鍍陰極(圖未示)電性連接所述開口112附近的所述外側導電層11,從而在所述第二開孔16電鍍,得到導通柱50。由於所述外側導電層11電性連接所述第二金屬層161,所述第二金屬層161電性連接所述內側導電層12,所述內側導電層12電性連接所述導電片15,即,所述導電片15電性連接所述電鍍陰極。因此,電鍍過程中,電鍍材料首先於導電片15處開始沉積(即如圖5所示,導電片15由片狀轉變為弧形),繼而填滿所述第一開孔14。S32: Immerse the circuit substrate 10 in an electroplating solution (not shown), and electrically connect the electroplating cathode (not shown) to the outer
S33: 移除幹膜層111。可以理解,當移除幹膜層111後,由於電鍍過程中導通柱50還填充幹膜層111的開口112,因此導通柱50的端面伸出所述外側導電層11的外側面。S33: The
在本實施例中,所述電路板100的製造方法還包括:In this embodiment, the manufacturing method of the
S4:磨平所述導通柱50,所述導通柱50的端面與所述外側導電層11的外側面平齊。S4 : smoothing the
S5:於所述外側導電層11上電鍍形成覆蓋層(圖未示),所述覆蓋層覆蓋所述導通柱50。S5: Electroplating on the outer
相較於習知技術,本發明提供的電路板的製造方法具有以下優點:Compared with the prior art, the manufacturing method of the circuit board provided by the present invention has the following advantages:
(一)藉由設置電性連接電鍍陰極的導電片,使得電鍍沉積由導電片處開始,繼而填滿第一開孔,有利於維持孔內均鍍力並減少第一開孔的孔環逐漸縮小的情形,從而減少空泡或者毛刺的產生。(1) By setting the conductive sheet electrically connected to the electroplating cathode, the electroplating deposition starts from the conductive sheet, and then fills the first opening, which is conducive to maintaining the uniform plating force in the hole and reducing the gradual increase of the hole ring of the first opening. Reduce the situation of shrinkage, thereby reducing the generation of cavitation or burr.
(二)導電片具有較大的外表面(可以理解,比較導電片及與導電片相對的第二金屬層,導電片還具有可暴露於電鍍液中的兩個端面),有利於使用高電流密度電鍍工藝,提高電鍍效率。(2) The conductive sheet has a larger outer surface (it can be understood that comparing the conductive sheet and the second metal layer opposite to the conductive sheet, the conductive sheet also has two end faces that can be exposed to the electroplating solution), which is conducive to the use of high current Density electroplating process to improve electroplating efficiency.
(三)本方法適用於批量化生產,例如,可以同時電鍍形成至少五個導通柱,操作簡單,效率高。(3) The method is suitable for mass production, for example, at least five conduction columns can be formed by electroplating at the same time, the operation is simple, and the efficiency is high.
以上說明僅僅是對本申請一種優化的具體實施方式,但在實際的應用過程中不能僅僅局限於這種實施方式。對本領域的普通技術人員來說,根據本申請的技術構思做出的其他變形和改變,都應該屬於本申請專利範圍。The above description is only an optimized specific implementation manner of the present application, but it cannot be limited only to this implementation manner in the actual application process. For those of ordinary skill in the art, other modifications and changes made according to the technical concept of the present application should all belong to the scope of the patent of the present application.
100:電路板 10:電路基板 11:外側導電層 111:幹膜層 112:開口 12:內側導電層 13:絕緣層 14:第一開孔 141:第一金屬層 142:第一端部 143:第二端部 15:導電片 16:第二開孔 161:第二金屬層 50:導通柱100: circuit board 10: circuit substrate 11: Outer conductive layer 111: dry film layer 112: Opening 12: inner conductive layer 13: Insulation layer 14: The first opening 141: first metal layer 142: First End 143: Second End 15: Conductive sheet 16: The second opening 161: Second metal layer 50: Conduction column
圖1是本申請實施例提供的電路基板的示意圖。FIG. 1 is a schematic diagram of a circuit substrate provided by an embodiment of the present application.
圖2是圖1所示基板設置第一開孔後的示意圖。FIG. 2 is a schematic diagram of the substrate shown in FIG. 1 after the first opening is provided.
圖3是圖2所示第一開孔內設置第一金屬層的示意圖。FIG. 3 is a schematic diagram of disposing a first metal layer in the first opening shown in FIG. 2 .
圖4是移除部分所述圖3中第一金屬層以留下導電片後的示意圖。FIG. 4 is a schematic view after removing part of the first metal layer of FIG. 3 to leave a conductive sheet.
圖5是於圖4所示的導電片上電鍍的示意圖。FIG. 5 is a schematic diagram of electroplating on the conductive sheet shown in FIG. 4 .
圖6為本申請實施例提供的電路板的示意圖。FIG. 6 is a schematic diagram of a circuit board provided by an embodiment of the present application.
11:外側導電層 11: Outer conductive layer
12:內側導電層 12: inner conductive layer
13:絕緣層 13: Insulation layer
16:第二開孔 16: The second opening
161:第二金屬層 161: Second metal layer
50:導通柱 50: Conduction column
100:電路板 100: circuit board
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TW200605738A (en) * | 2004-07-27 | 2006-02-01 | Unimicron Technology Corp | Process of conductive column and circuit board with conductive column |
CN203504881U (en) * | 2013-09-17 | 2014-03-26 | 先丰通讯股份有限公司 | Circuit board |
TW201720252A (en) * | 2015-11-30 | 2017-06-01 | 健鼎科技股份有限公司 | Printed circuit board package structure and manufacturing method thereof |
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