TWI528880B - Method for forming conductive through via at glass substrate - Google Patents
Method for forming conductive through via at glass substrate Download PDFInfo
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- TWI528880B TWI528880B TW101123016A TW101123016A TWI528880B TW I528880 B TWI528880 B TW I528880B TW 101123016 A TW101123016 A TW 101123016A TW 101123016 A TW101123016 A TW 101123016A TW I528880 B TWI528880 B TW I528880B
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Description
本發明是有關於一種形成導電通孔的方法,且特別是有關於一種在玻璃基板形成導電通孔的方法。 The present invention relates to a method of forming a conductive via, and more particularly to a method of forming a conductive via in a glass substrate.
由於消費者對電子產品的要求除了功能強大外,更要求要輕、薄、短、小,因此市面上的電子產品的積集度(integration)越來越高,功能越來越強。為了使電子產品內晶片的封裝結構的體積減小,用以裝設晶片的基板的層數也由單層而變為多層。而為使多層基板間的線路可以在基板厚度方向上彼此連接,可在各基板中採用鍍通孔(plating through hole,PTH)技術。 In addition to the powerful requirements of consumers, the requirements for electronic products are lighter, thinner, shorter, and smaller. Therefore, the integration of electronic products on the market is getting higher and higher, and the functions are getting stronger and stronger. In order to reduce the volume of the package structure of the wafer in the electronic product, the number of layers of the substrate on which the wafer is mounted is also changed from a single layer to a plurality of layers. In order to connect the lines between the multilayer substrates to each other in the thickness direction of the substrate, a plating through hole (PTH) technique may be employed in each of the substrates.
鍍通孔,指的是在一個基板上先鑽數個貫穿基板的通孔,然後再利用電鍍的方式來將導電材料鍍於通孔中。完成電鍍步驟後的基板,可利用通孔中的導電材料與其他層的線路做電性連接。 Plated through holes refer to the penetration of a plurality of through holes through a substrate on a substrate, and then electroplating is used to plate the conductive material into the through holes. After the plating step is completed, the conductive material in the through holes can be electrically connected to the lines of other layers.
由於玻璃具有低成本以及技術成熟等優點,因此是常用的基板材質。習知技術中,在玻璃基板使用鍍通孔技術時,形成通孔後,會直接在通孔中鍍上導電材料。然而,導電材料與玻璃基板之間具有附著力不佳的問題,會造成所形成的導電通孔的良率不佳而使得依賴導電通孔進行的訊號傳遞的可靠度不佳。 Because of its low cost and mature technology, glass is a commonly used substrate material. In the prior art, when a through-hole technique is used for a glass substrate, a conductive material is directly plated in the via hole after the via hole is formed. However, the problem of poor adhesion between the conductive material and the glass substrate may result in poor yield of the formed conductive vias and poor reliability of signal transmission depending on the conductive vias.
本發明提供一種在玻璃基板形成導電通孔的方法,解決導電通孔的良率不佳的問題。 The present invention provides a method of forming a conductive via in a glass substrate, and solves the problem of poor yield of the conductive via.
本發明提出一種在玻璃基板形成導電通孔的方法,包括下列步驟。首先,形成至少一第一通孔在一玻璃基板。再來,填入一絕緣材料在前述的第一通孔中。之後,形成第二通孔在第一通孔中的絕緣材料。其中,第二通孔被形成為中段部分的通道孔徑小於兩端通道的孔徑。接著,填入一導電材料在第二通孔中。 The present invention provides a method of forming a conductive via in a glass substrate, comprising the following steps. First, at least one first via hole is formed in a glass substrate. Then, an insulating material is filled in the aforementioned first through hole. Thereafter, an insulating material of the second via hole in the first via hole is formed. Wherein, the second through hole is formed such that the channel aperture of the middle portion is smaller than the aperture of the channel at both ends. Next, a conductive material is filled in the second through hole.
在本發明之一實施例中,第二通孔的上半段與下半段分別呈圓錐狀。 In an embodiment of the invention, the upper half and the lower half of the second through hole are respectively conical.
在本發明之一實施例中,第一通孔是使用雷射形成。 In an embodiment of the invention, the first through hole is formed using a laser.
在本發明之一實施例中,絕緣材料的填入方法是將一絕緣材料膜壓合至玻璃基板。 In an embodiment of the invention, the insulating material is filled by pressing a film of insulating material to the glass substrate.
在本發明之一實施例中,形成第二通孔時,是先形成第二通孔的上半段,接著再形成第二通孔的下半段。 In an embodiment of the invention, when the second through hole is formed, the upper half of the second through hole is formed first, and then the lower half of the second through hole is formed.
在本發明之一實施例中,第二通孔是使用雷射、進行濕式蝕刻或進行乾式蝕刻形成。 In one embodiment of the invention, the second via is formed using a laser, wet etching, or dry etching.
在本發明之一實施例中,填入導電材料的方法包括:在第二通孔的孔壁上形成一電鍍種子層,以及使用電鍍種子層將導電材料電鍍至電鍍種子層上。 In one embodiment of the invention, a method of filling a conductive material includes forming a plating seed layer on a hole wall of a second via hole, and plating a conductive material onto the plating seed layer using a plating seed layer.
在本發明之一實施例中,第一通孔的表面直徑範圍依照玻璃基板的厚度變化而有所不同,當玻璃基板厚度在180微米至300微米時,第一通孔的表面直徑範圍介於35 微米至55微米。當玻璃基板100厚度介於30微米至180微米時,第一通孔的表面直徑範圍介於15微米至35微米。當玻璃基板100厚度小於30微米時,第一通孔的表面直徑範圍在5微米至15微米。 In an embodiment of the present invention, the surface diameter range of the first through hole varies according to the thickness of the glass substrate. When the thickness of the glass substrate is from 180 micrometers to 300 micrometers, the surface diameter of the first through hole ranges from 35 Micron to 55 microns. When the thickness of the glass substrate 100 is between 30 micrometers and 180 micrometers, the surface diameter of the first via hole ranges from 15 micrometers to 35 micrometers. When the thickness of the glass substrate 100 is less than 30 μm, the surface diameter of the first through holes ranges from 5 μm to 15 μm.
在本發明之一實施例中,絕緣材料的厚度範圍依照玻璃基板的厚度變化而有所不同。當玻璃基板的厚度介於30微米至180微米時,絕緣材料的厚度介於15微米至35微米。當玻璃基板的厚度小於30微米時,絕緣材料的厚度介於1微米至15微米。 In an embodiment of the invention, the thickness range of the insulating material varies depending on the thickness of the glass substrate. When the thickness of the glass substrate is between 30 micrometers and 180 micrometers, the thickness of the insulating material is between 15 micrometers and 35 micrometers. When the thickness of the glass substrate is less than 30 μm, the thickness of the insulating material is between 1 μm and 15 μm.
在本發明之一實施例中,第二通孔的表面直徑範圍依照第一通孔表面直徑範圍變化而有所不同。當第一通孔的表面直徑介於15微米至35微米時,第二通孔的表面直徑介於10微米至30微米。當第一通孔的表面直徑介於5微米至15微米時,第二通孔的表面直徑介於3微米至10微米。 In an embodiment of the invention, the surface diameter range of the second through hole varies depending on the range of the diameter of the first through hole surface. When the surface diameter of the first through hole is between 15 μm and 35 μm, the surface diameter of the second through hole is between 10 μm and 30 μm. When the surface diameter of the first through hole is between 5 micrometers and 15 micrometers, the surface diameter of the second through hole is between 3 micrometers and 10 micrometers.
基於上述,本發明提供一種在玻璃基板形成導電通孔的方法,利用絕緣材料與導電材料之間的良好附著性,提高依賴導電通孔進行的訊號傳遞之可靠度。 Based on the above, the present invention provides a method of forming a conductive via in a glass substrate, which utilizes good adhesion between the insulating material and the conductive material to improve the reliability of signal transmission depending on the conductive via.
為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 The above described features and advantages of the present invention will be more apparent from the following description.
圖1A至圖1F為本發明一實施例之在玻璃基板形成導電通孔的方法的流程圖。請先參考圖1A,首先,提供一玻 璃基板100。接著,如圖1B所繪示,在玻璃基板100形成至少一第一通孔100a,而本實施例以多個第一通孔100a為例。形成第一通孔100a的方式可以採用雷射鑽孔。以雷射鑽孔製作出的第一通孔100a具有較高的精度,但本發明並不限定形成第一通孔100a的方法,設計者可視實際應用時的需求採用機械鑽孔製程或其他類似形成通孔的方法。 1A to 1F are flowcharts showing a method of forming a conductive via hole in a glass substrate according to an embodiment of the invention. Please refer to Figure 1A first, first, provide a glass Glass substrate 100. Next, as shown in FIG. 1B, at least one first through hole 100a is formed in the glass substrate 100, and the present embodiment takes a plurality of first through holes 100a as an example. The manner in which the first through holes 100a are formed may be laser drilling. The first through hole 100a made by laser drilling has high precision, but the present invention does not limit the method of forming the first through hole 100a, and the designer can use a mechanical drilling process or the like depending on the actual application requirements. A method of forming a via hole.
第一通孔100a的表面直徑範圍依照玻璃基板100的厚度變化而有所不同,當玻璃基板100厚度在180~300 um,該第一通孔100a的表面直徑範圍在35~55 um間。當玻璃基板100厚度在30~180 um,該第一通孔100a的表面直徑範圍在15~35 um間。當玻璃基板100厚度小於30 um,該第一通孔100a的表面直徑範圍在5~15 um間。 The surface diameter range of the first through hole 100a varies depending on the thickness of the glass substrate 100. When the thickness of the glass substrate 100 is 180 to 300 um, the surface diameter of the first through hole 100a ranges from 35 to 55 um. When the thickness of the glass substrate 100 is 30 to 180 um, the surface diameter of the first through hole 100a ranges from 15 to 35 um. When the thickness of the glass substrate 100 is less than 30 um, the surface diameter of the first through hole 100a ranges from 5 to 15 um.
再來,請參考圖1C,填入一絕緣材料120於前述的第一通孔100a中。將絕緣材料120填入第一通孔100a的方法可採用壓合的方式,例如將一種以絕緣材料120製作而成的絕緣材料膜,直接壓合至玻璃基板100,以使絕緣材料120填入第一通孔100a內。該絕緣材料120的厚度120a的範圍依照玻璃基板100的厚度變化而有所不同,玻璃基板100厚度在30~180 um,該絕緣材料120的厚度120a的範圍在15~30 um間。玻璃基板厚度小於30 um,該絕緣材料120的厚度120a的範圍在1~15 um間。 Referring to FIG. 1C, an insulating material 120 is filled in the first through hole 100a. The method of filling the insulating material 120 into the first through hole 100a may be performed by pressing, for example, an insulating material film made of the insulating material 120 is directly pressed to the glass substrate 100 to fill the insulating material 120. Inside the first through hole 100a. The range of the thickness 120a of the insulating material 120 varies depending on the thickness of the glass substrate 100. The thickness of the glass substrate 100 is 30 to 180 um, and the thickness 120a of the insulating material 120 is in the range of 15 to 30 um. The thickness of the glass substrate is less than 30 um, and the thickness 120a of the insulating material 120 is in the range of 1 to 15 um.
之後,形成第二通孔121於第一通孔100a中的絕緣材料120。第二通孔121例如是分為兩個部分分別形成的。請先參考圖1D,先在第一通孔100a中的絕緣材料120形 成第二通孔121的上半段121a。接著如圖1E所繪示,形成第二通孔121的下半段121b。當然,形成第二通孔121的上半段121a的步驟跟形成第二通孔121的下半段121b的步驟也有可能同時進行。上半段121a與下半段121b相互連通以構成第二通孔121。其中,第二通孔121被形成為中段部分的通道孔徑1211小於兩端的通道孔徑1222。舉例而言,第二通孔121的上半段121a與下半段121b分別呈圓錐狀。 Thereafter, the insulating material 120 of the second via hole 121 in the first via hole 100a is formed. The second through hole 121 is formed, for example, in two parts. Referring first to FIG. 1D, the insulating material 120 is first formed in the first through hole 100a. The upper half 121a of the second through hole 121 is formed. Next, as shown in FIG. 1E, the lower half 121b of the second through hole 121 is formed. Of course, the step of forming the upper half 121a of the second through hole 121 and the step of forming the lower half 121b of the second through hole 121 may also be performed simultaneously. The upper half 121a and the lower half 121b communicate with each other to constitute the second through hole 121. The second through hole 121 is formed such that the channel aperture 1211 of the middle portion is smaller than the channel aperture 1222 at both ends. For example, the upper half 121a and the lower half 121b of the second through hole 121 have a conical shape, respectively.
第二通孔121的表面直徑範圍依照該第一通孔100a表面直徑範圍變化而有所不同,該第一通孔100a表面直徑範圍在15~35 um間,該第二通孔121的表面直徑範圍在10~30 um間。該第一通孔100a表面直徑範圍在5~15 um間,該第二通孔121的表面直徑範圍在3~10 um間。該第二通孔121的上下圓錐狀通道的軸心的偏移容許度約為3 um。形成第二通孔121的方法可以是雷射鑽孔,也可以是進行濕式蝕刻、進行乾式蝕刻或其他方法。 The surface diameter of the second through hole 121 varies according to the range of the surface diameter of the first through hole 100a. The surface diameter of the first through hole 100a ranges from 15 to 35 um, and the surface diameter of the second through hole 121 The range is between 10~30 um. The first through hole 100a has a surface diameter ranging from 5 to 15 um, and the second through hole 121 has a surface diameter ranging from 3 to 10 um. The axis of the upper and lower conical passages of the second through hole 121 has an offset tolerance of about 3 um. The method of forming the second through holes 121 may be laser drilling, or may be performed by wet etching, dry etching, or the like.
請參考圖1F,填入一導電材料160在第二通孔121中。在此步驟中,先在第二通孔121的孔壁上形成一電鍍種子層140,電鍍種子層140的材料例如是銅、鎳、鋅或其他導電材料。形成電鍍種子層140之後,再使用此電鍍種子層140將導電材料160電鍍至電鍍種子層140上。本實施例中,導電材料160是填滿第二通孔121,但本發明不限定於此。導電材料160可以是銅或其他具導電性的類似材料,例如銀、鎳、錫或鋁。 Referring to FIG. 1F, a conductive material 160 is filled in the second via hole 121. In this step, a plating seed layer 140 is formed on the wall of the second through hole 121, and the material of the plating seed layer 140 is, for example, copper, nickel, zinc or other conductive material. After forming the electroplated seed layer 140, the electroplated seed layer 140 is used to electroplate the conductive material 160 onto the electroplated seed layer 140. In the present embodiment, the conductive material 160 fills the second through hole 121, but the present invention is not limited thereto. Conductive material 160 can be copper or other similar material that is electrically conductive, such as silver, nickel, tin, or aluminum.
在本實施例中,是先在玻璃基板100的第一通孔100a中形成一絕緣材料120,再於絕緣材料120中形成第二通孔121,並將導電材料160形成於絕緣材料120的第二通孔121。由於導電材料160與絕緣材料120之間具有良好的附著力,且絕緣材料120與玻璃基板100之間也具有良好的附著力,因此可提升導電材料160附著於玻璃基板100上的牢固程度,並提高依賴導電通孔進行的訊號傳遞之可靠度。 In this embodiment, an insulating material 120 is formed in the first via hole 100a of the glass substrate 100, a second via hole 121 is formed in the insulating material 120, and the conductive material 160 is formed on the insulating material 120. Two through holes 121. Since the conductive material 160 and the insulating material 120 have good adhesion, and the insulating material 120 and the glass substrate 100 also have good adhesion, the adhesion of the conductive material 160 to the glass substrate 100 can be improved, and Improve the reliability of signal transmission relying on conductive vias.
此外,第二通孔121被形成為中段部分的通道孔徑1211小於兩端的通道孔徑1222。因此,在以電鍍方式將導電材料160形成在第二通孔121的孔壁上時,可以在第二通孔121的兩端被導電材料160阻塞之前,先將第二通孔121的中段部分填滿導電材料160,具有減少孔隙產生的優點。本實施例的玻璃基板100與其導電通孔結構可構成一中介板(interposer)。此中介板可置於印刷電路板與晶片之間,提供印刷電路板與晶片之間高密度的訊號輸入或輸出。 Further, the second through hole 121 is formed such that the channel aperture 1211 of the middle portion is smaller than the channel aperture 1222 at both ends. Therefore, when the conductive material 160 is formed on the hole wall of the second through hole 121 by electroplating, the middle portion of the second through hole 121 may be first before the both ends of the second through hole 121 are blocked by the conductive material 160. Filling the conductive material 160 has the advantage of reducing void generation. The glass substrate 100 of the present embodiment and its conductive via structure may constitute an interposer. The interposer can be placed between the printed circuit board and the wafer to provide a high density of signal input or output between the printed circuit board and the wafer.
綜上所述,本發明提供一種在玻璃基板形成導電通孔的方法,利用絕緣材料與導電材料之間以及絕緣材料與玻璃基板之間具有良好的附著性,將導電材料附著於玻璃基板的第一通孔內的絕緣材料的第二通孔,並藉此提升依賴導電通孔進行的訊號傳遞之可靠度。此外,第二通孔的中段部分的通道孔徑小於兩端通道的孔徑,可避免導電材料電鍍在第二通孔時產生孔隙。 In summary, the present invention provides a method for forming a conductive via hole in a glass substrate, which has good adhesion between the insulating material and the conductive material and between the insulating material and the glass substrate, and the conductive material is attached to the glass substrate. a second through hole of the insulating material in the through hole, and thereby improving the reliability of signal transmission by the conductive via. In addition, the channel aperture of the middle portion of the second through hole is smaller than the aperture of the channel at both ends, and the occurrence of voids when the conductive material is plated in the second through hole can be avoided.
雖然本發明已以實施例揭露如上,然其並非用以限定 本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the invention has been disclosed above by way of example, it is not intended to be limiting The scope of the present invention is defined by the scope of the appended claims, and the scope of the invention is defined by the scope of the appended claims. Prevail.
100‧‧‧玻璃基板 100‧‧‧ glass substrate
100a‧‧‧第一通孔 100a‧‧‧first through hole
120‧‧‧絕緣材料 120‧‧‧Insulation materials
120a‧‧‧厚度 120a‧‧‧thickness
121‧‧‧第二通孔 121‧‧‧Second through hole
1211、1222‧‧‧通道孔徑 1211, 1222‧‧‧ channel aperture
121a‧‧‧上半段 The first half of 121a‧‧
121b‧‧‧下半段 The second half of 121b‧‧
140‧‧‧電鍍種子層 140‧‧‧Electroplating seed layer
160‧‧‧導電材料 160‧‧‧Electrical materials
圖1A至圖1F為本發明一實施例之在玻璃基板形成導電通孔的方法的流程圖。 1A to 1F are flowcharts showing a method of forming a conductive via hole in a glass substrate according to an embodiment of the invention.
100‧‧‧玻璃基板 100‧‧‧ glass substrate
100a‧‧‧第一通孔 100a‧‧‧first through hole
120‧‧‧絕緣材料 120‧‧‧Insulation materials
121‧‧‧第二通孔 121‧‧‧Second through hole
121a‧‧‧上半段 The first half of 121a‧‧
121b‧‧‧下半段 The second half of 121b‧‧
140‧‧‧電鍍種子層 140‧‧‧Electroplating seed layer
160‧‧‧導電材料 160‧‧‧Electrical materials
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TWI557819B (en) * | 2014-12-04 | 2016-11-11 | 欣興電子股份有限公司 | Interposer and manufacturing method thereof |
WO2017150620A1 (en) * | 2016-03-01 | 2017-09-08 | 東京応化工業株式会社 | Cleaning solution and cleaning method for a semiconductor substrate or device |
TWI744896B (en) * | 2020-05-12 | 2021-11-01 | 台灣愛司帝科技股份有限公司 | Conductive glass substrate, manufacturing system thereof and manufacturing method thereof |
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2012
- 2012-06-27 TW TW101123016A patent/TWI528880B/en active
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Publication number | Publication date |
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TW201401958A (en) | 2014-01-01 |
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