JP2004047836A - Printed board and its manufacturing method - Google Patents

Printed board and its manufacturing method Download PDF

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Publication number
JP2004047836A
JP2004047836A JP2002204913A JP2002204913A JP2004047836A JP 2004047836 A JP2004047836 A JP 2004047836A JP 2002204913 A JP2002204913 A JP 2002204913A JP 2002204913 A JP2002204913 A JP 2002204913A JP 2004047836 A JP2004047836 A JP 2004047836A
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Prior art keywords
hole
plating
copper
copper foil
copper plating
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Japanese (ja)
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Norio Matsumoto
松本 規雄
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Mitsui Chemicals Inc
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Mitsui Chemicals Inc
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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed wiring board wherein highly dense wiring can be formed by preventing the formation of a void in the internal plating of a non-through hole formed by a laser or the like, and preventing an increase in conductor thickness accompanying with the elimination of the void. <P>SOLUTION: The printed wiring board is provided with a conductor circuit formed on the surface of an insulation layer and a non-through via formed at one side of both surfaces. The non-through via is filled with copper plating, and the conductor circuit excluding the copper plating in a via hole is made of copper foil. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、プリント配線板に関し、さらに詳しくは、非貫通ビアをもつプリント配線板に関する。
【0002】
【従来の技術】
プリント配線板は電子部品の端子を電気的に接続するパッドと、複数のパッドを電気的に導通させる導体配線と、これらのパッドと導体配線を電気的に絶縁して保持する絶縁板とからなる。また、絶縁板の異なる面に配置された2つの導体配線を電気的に接続するために、電気的接続を取る箇所の絶縁板に穴をあけ、内壁に銅メッキなどの導体を固着させる。この部分をスルーホールと呼ぶ。
【0003】
プリント配線板の製造方法を図3を用いて次に説明する。まず、絶縁板51の両面に銅箔52を貼り付けた銅張り積層板50を用意する(図3(a))。この銅張り積層板のスルーホールを形成する箇所にドリルで貫通穴53をあける(図3(b))。次に、貫通穴の内壁に銅メッキを施し、スルーホールを形成した基板を得る。銅メッキ工程では、まず、基板表面全体およびスルーホール内壁に触媒54を付与する(図3(c))。この基板を無電解銅メッキ液に浸漬し、基板全体に1μm程度の無電解銅メッキ55を析出させる(図3(d))。さらに、電解銅メッキ液に浸漬し、銅箔の一部に電解を印加することにより、10〜20μm程度の電解銅メッキ56を析出させる(図3(e))。このとき、銅箔の上にも銅メッキが析出するため、鏡面の導体厚は銅箔厚と銅メッキ厚の和となる。
【0004】
次に、基板の両面に感光性ドライフィルムを密着する。配線パターンを描画したマスクフィルムをドライフィルムの上に重ねて露光し、基板を現像することにより、エッチングレジストを形成する。この基板をエッチング液に浸漬し、不要な導体を除去したのち、エッチングレジストを剥離して、導体配線を得る。このとき、貫通穴の周囲には穴と同心の導体が残るようにする。この導体をランドと呼ぶ。
【0005】
導体配線のうち、外部との接続部であるパッドを除いて、樹脂による保護被膜を形成したり、パッド表面に金メッキを施したりし、さらに、ルーターなどで外形を所望の寸法に整えることにより、プリント配線板を得る。
【0006】
実際のプリント配線板の製造工程では、貫通穴加工でのドリルの位置ズレやマスクフィルムの伸縮などに起因して、中心がずれる。中心ズレが大きい場合、ランド端部が貫通穴の内壁よりも内側になり、エッチング液が穴の中に入り込むため、内壁の銅メッキがエッチング除去され、導通がとれなくなる不良が発生することがある。そこで、ドリルの位置精度やマスクフィルムの合わせ精度を考慮して、ランドの直径は穴径よりも100μm以上大きく設計する。また、ドリルの寿命や加工性を考慮し、ドリルの最小径は150μm程度が最小である。そのため、ランド径は250μm以上となる。
【0007】
最近、電子機器の小型化・高性能化に伴い、プリント配線板の導体配線は高密度化が進んでいる。上記の通り、スルーホールのランド径が250μmの場合、スルーホール間のスペース50μmを考慮すると、スルーホールの繰り返しピッチの最小値は300μmとなる。また、導体厚は銅箔厚と銅メッキ厚の和のため、銅メッキの不均一性に起因して導体厚が不均一となる。そのため、エッチング精度を高くできない。これらのピッチ限界及びエッチング精度向上の低迷は高密度化の妨げとなっている。
【0008】
そこで、レーザー穴あけ加工による狭ピッチ化が検討されている。レーザー加工では穴径を絶縁板の厚さ程度にできるため、薄い基板を使用すれば、小径が可能となる。また、レーザーの位置ズレはドリルよりも小さい。例えば、100μmの絶縁板を使用すれば、穴径は100μm、ランド径は150μm、ビアピッチは200μmが可能となる。
【0009】
レーザー加工での製造工程を説明する。まず、絶縁板の両面に銅箔を貼り付けた銅張り積層板に対して、片面の銅箔のビアを形成する部分をエッチングにより除去する。
【0010】
もう一方の面の銅箔は、レーザーが基板を貫通して基板を支えるステージにあたり、反射光による不要なレーザー放射が行われないようにするため、ビア部の除去はしない。次に、絶縁材をレーザーにより除去する。光線強度などの加工条件は、絶縁板の厚さや素材により異なる。次に、穴の底部に残存する樹脂や銅箔裏面の防錆処理膜を除去するため、アルカリ処理を行い、続いてスルーホールの場合と同様に銅メッキを行う。残存樹脂などの除去工法として、プラズマ処理を行う場合もある。また、一般には、炭酸ガスレーザーが用いられることが多いが、YAGレーザーを用いると、残存樹脂などの不導体が付着しにくいので、残存樹脂の除去を行わない場合もある。
【0011】
【発明が解決しようとする課題】
レーザーによる穴は非貫通であるため、銅メッキにおいて穴の内部ではメッキ液の循環が停滞し、穴の内部にメッキが析出しにくい。逆に、メッキ液の循環が良好な穴の入り口付近はメッキが析出しやすいため、穴の入口がふさがり、内部に空洞ができてしまう。内部の空洞にはメッキ液が残り、洗浄工程で除去しにくい。また、メッキ液は腐食性のイオンを含むため、長期間の使用において、断線やマイグレーションによるショートなどの危険がある。
【0012】
また、穴の内部に十分にメッキを析出させようとすると、銅箔表面に析出する銅メッキ厚が厚くなり、ひいては、メッキ厚の不均一性が増大する。そのため、エッチング性が悪化し、微細配線の形成が困難になる。
【0013】
すなわち、本発明は、レーザーなどにより形成された非貫通穴内部のメッキの空洞を防止し、また空洞をなくそうとして導体厚が厚くなることを防止して高密度な配線が形成されたプリント配線板を得ることを目的とする。
【0014】
【課題を解決するための手段】
本発明は、絶縁層の表面に形成された導体回路と両表面のうちの片方の面からのみ穴を形成されている非貫通ビアを備えたプリント配線板において、前記非貫通ビアは銅メッキで充填されており、ビア穴の銅メッキを除いた導体回路は銅箔のみで構成されているプリント配線板である。
【0015】
また本発明は、絶縁板の両面に銅箔を貼り付けた銅張り積層板に対して、レーザー加工により一方の銅箔底面に至る非貫通穴をあけ、非貫通穴の周辺を除きメッキレジストで被覆して銅メッキ液に浸漬したのち、穴のない側の銅箔に通電することにより、非貫通穴を銅メッキで充填することを特徴とするプリント配線板の製造方法である。
【0016】
さらに本発明は、コア基板の両面に絶縁層と銅箔を積層したビルドアップ構造の基板に対して、レーザー加工により表面から下層の銅箔表面に至る非貫通穴をあけ、非貫通穴の周辺を除きメッキレジストで被覆し銅メッキ液に浸漬したのち、コア基板の電解線を通して通電することにより、非貫通穴を銅メッキで充填することを特徴とするビルドアップ構造のプリント配線板の製造方法である。
【0017】
ビア内の銅メッキを行う際に、穴底部の樹脂および銅箔裏面の防錆処理膜を除去したのち、穴を除いてメッキレジストで被覆し、底部に相当する銅箔のみに電解を印加することにより、ビアの底面からメッキを成長させるためビア入口がふさがらず、ボイドが発生しない。メッキがビアの入口に到達すると上面銅箔と電気的に接続され、メッキの密着性が確保される。この時点でメッキを終了すれば、メッキ表面と銅箔の表面はほぼ同一面になる。このように、銅箔の表面に銅メッキは析出しないので、銅メッキの不均一性に起因する微細配線の形成困難は解消される。
【0018】
また、スルーホールのランド直径下限値250μmよりも小さいランド直径とするためには、レーザー加工の位置精度±25μmを考慮し、ビア穴径は200μmが最大値となる。ビア穴径は、絶縁材の厚さ以上とする場合、絶縁材の厚さは、200μm以下が好ましい。また、絶縁性を維持するためには、絶縁材の厚さは30μm以上が好ましい。
【0019】
また、上記の説明は、両面板の場合であるが、ビルドアップ構造のプリント配線板のビアとしても使用できる。その場合、ビアの底面にあたる導体配線は、電解銅メッキを行えるように、電解線で短絡しておく必要がある。
【0020】
【発明の実施の形態】
(実施例)
変性ポリイミド系樹脂をガラスクロスに含浸した絶縁板1(三井化学社製 BN300S、厚さ0.1mm)と、銅箔2(古河電工社製、厚さ18μm)とで構成される銅張り積層板を準備した(図1(a))。この基板の両面に感光性ドライフィルム(旭化成社製 AQ2593)をラミネートし、マスクフィルムを密着させ、露光・現像することにより、エッチングレジストを形成した。この基板を塩化鉄系エッチング液に浸漬し、片面の銅箔のみ、ビアに相当する部分3の銅箔を直径150μmで円形に除去した(図1(b))。また、同様に、電解メッキのために電解を印加するための電解リードを取り付ける位置の銅箔を片面のみ除去した。その後、エッチングレジストを剥離した。
【0021】
次に、炭酸ガスレーザーにより、銅箔を除去した部分の絶縁材を除去し、照射面と反対面の銅箔に至る直径100μmの非貫通穴4を得た(図1(c))。その後、アルカリ性のデスミア処理を行い、ビア穴底部に残存した樹脂および銅箔裏面の防錆処理膜を除去した。再度、感光性ドライフィルム(旭化成社製 AQ2592)を両面にラミネートし、前述と同様の方法で、マスクフィルムを用いて、露光・現像することにより、メッキレジスト5を得た(図1(d))。
【0022】
次に、穴の空いていない面の銅箔にのみ、電解リードを接続し、電解メッキ液に浸漬したのち電解を印加した。図1(e)に示すように穴底部の銅箔裏面から銅メッキが徐々に析出し、穴の内部を銅メッキ6で充填した。銅メッキが穴の入口に達すると、銅箔と接触するため、銅箔にも電解が印加され、銅箔と銅メッキの密着性が確保される。また、銅メッキが穴の入口の銅箔に達すると、メッキ面積が増加するため、一旦、メッキ電流が増加し、その後、メッキ面積が減少するのでメッキ電流は減少する。メッキ電流がピークとなった時点から銅箔の厚さと等しいメッキ厚となる時間だけメッキを継続することにより、メッキ表面と銅箔表面はほぼ同一面となった。銅メッキ終了後メッキレジストを剥離し、図1(f)のようにビアの形成された基板を得た。
【0023】
このあと、エッチングにより導体配線を形成するが、ここでは省略し、つぎの項目を評価した。
【0024】
ビア内部のボイドの有無は、ビア断面を顕微鏡観察(20倍)することにより、判定した。1,000個のビアを調査したところ、ボイドは認められなかった。
【0025】
次に、表面導体厚の均一性を測定した。基板を5×5に区切り、25箇所でキャビダームによりメッキ厚を測定した。4枚の基板(計100箇所)を測定した結果、メッキ厚の標準偏差は0.1μmであった。
(比較例)
実施例と同様の方法で、レーザー加工により非貫通穴をあけた基板を得た。ただし、銅箔厚は12μmとした。この基板に対して、アルカリ性のデスミア処理を行ったのち、触媒付与、無電解銅メッキを経て、ビア内壁のメッキ厚が10μm以上となるよう、あらかじめメッキ時間を決めておき、電解メッキを行った。その後、ビア内部のボイドおよび導体厚を測定した。その結果、ボイドは221箇所あり、導体厚の標準偏差は2.3μmであった。
【0026】
【表1】

Figure 2004047836
【0027】
ビルドアップ基板への適用を図2を用いて説明する。複数の絶縁板11と銅箔を積層したビルドアップ基板を準備した(図2(a))。この基板の両面に感光性ドライフィルムをラミネートし、マスクフィルムを密着させ、露光・現像することにより、エッチングレジストを形成した。この基板を塩化鉄系エッチング液に浸漬し、片面の銅箔のみ、ビアに相当する部分13の銅箔を直径150μmで円形に除去した(図2(b))。また、同様に、電解メッキのために電解を印加するための電解リードを取り付ける位置の銅箔を片面のみ除去した。その後、エッチングレジストを剥離した。
【0028】
次に、炭酸ガスレーザーにより、銅箔を除去した部分の絶縁材を除去し、照射面と反対面の銅箔に至る直径100μmの非貫通穴14を得た(図2(c))。その後、アルカリ性のデスミア処理を行い、ビア穴底部に残存した樹脂および銅箔表面の粗化処理膜を除去した。再度、感光性ドライフィルムを両面にラミネートし、前述と同様の方法で、マスクフィルムを用いて、露光・現像することにより、メッキレジスト15を得た(図2(d))。
【0029】
次に、穴の空いていない面の銅箔にのみ、電解リードを接続し、電解メッキ液に浸漬したのち電解を印加した。穴底部の銅箔裏面から銅メッキが徐々に析出し、穴の内部を電解銅メッキ16で充填した。銅メッキ終了後メッキレジストを剥離し、図2(e)のようにビアの形成されたビルドアップ基板を得た。
【0030】
【発明の効果】
本発明によれば、非貫通穴をボイドのない銅メッキで充填することができる。また、導体は銅箔の厚さ均一性が維持されるためエッチング性が安定し、微細配線の歩留まりが向上し高密度化が図れる。
【図面の簡単な説明】
【図1】本発明の1実施例の製造プロセスを説明する図。
【図2】本発明の別の製造プロセスを説明する図。
【図3】従来の製造プロセスを説明する図。
【符号の説明】
1、11、51 ・・絶縁板       2、12、52・・銅箔
4,14・・非貫通孔     5,15・・ メッキレジスト
6,16・・電解銅メッキ
53・・貫通孔       54・・触媒[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a printed wiring board, and more particularly, to a printed wiring board having a non-through via.
[0002]
[Prior art]
The printed wiring board is composed of pads for electrically connecting terminals of the electronic component, conductor wiring for electrically connecting the plurality of pads, and an insulating plate for electrically insulating and holding these pads and the conductor wiring. . Further, in order to electrically connect two conductor wirings arranged on different surfaces of the insulating plate, holes are made in the insulating plate where electrical connection is to be made, and a conductor such as copper plating is fixed to the inner wall. This part is called a through hole.
[0003]
Next, a method for manufacturing a printed wiring board will be described with reference to FIG. First, a copper-clad laminate 50 in which copper foils 52 are adhered to both surfaces of an insulating plate 51 is prepared (FIG. 3A). A through-hole 53 is drilled in the copper-clad laminate at a place where a through-hole is to be formed (FIG. 3B). Next, copper plating is applied to the inner wall of the through hole to obtain a substrate in which the through hole is formed. In the copper plating step, first, a catalyst 54 is applied to the entire substrate surface and the inner wall of the through hole (FIG. 3C). This substrate is immersed in an electroless copper plating solution to deposit about 1 μm of electroless copper plating 55 on the entire substrate (FIG. 3D). Furthermore, by immersing in an electrolytic copper plating solution and applying electrolysis to a part of the copper foil, electrolytic copper plating 56 of about 10 to 20 μm is deposited (FIG. 3E). At this time, since copper plating is also deposited on the copper foil, the conductor thickness of the mirror surface is the sum of the copper foil thickness and the copper plating thickness.
[0004]
Next, a photosensitive dry film is adhered to both surfaces of the substrate. An etching resist is formed by overlaying and exposing a mask film on which a wiring pattern is drawn on a dry film and developing the substrate. The substrate is immersed in an etching solution to remove unnecessary conductors, and then the etching resist is peeled off to obtain conductor wiring. At this time, a conductor concentric with the hole is left around the through hole. This conductor is called a land.
[0005]
Of the conductor wiring, except for the pad that is the connection part with the outside, by forming a protective coating of resin, applying gold plating on the pad surface, and further adjusting the outer shape to the desired size with a router etc. Obtain a printed wiring board.
[0006]
In the actual manufacturing process of the printed wiring board, the center is shifted due to a positional shift of the drill in the processing of the through hole, expansion and contraction of the mask film, and the like. When the center deviation is large, the land end is located inside the inner wall of the through hole, and the etching solution enters the hole, so that the copper plating on the inner wall is removed by etching, which may cause a defect that conduction cannot be obtained. . Therefore, the land diameter is designed to be 100 μm or more larger than the hole diameter in consideration of the positional accuracy of the drill and the alignment accuracy of the mask film. Further, in consideration of the life and workability of the drill, the minimum diameter of the drill is at least about 150 μm. Therefore, the land diameter becomes 250 μm or more.
[0007]
2. Description of the Related Art In recent years, as electronic devices have become smaller and more sophisticated, the density of conductor wiring on printed wiring boards has been increasing. As described above, when the land diameter of the through hole is 250 μm, the minimum value of the repetition pitch of the through hole is 300 μm in consideration of the space between the through holes of 50 μm. Further, since the conductor thickness is the sum of the copper foil thickness and the copper plating thickness, the conductor thickness becomes non-uniform due to the non-uniformity of the copper plating. Therefore, the etching accuracy cannot be increased. These pitch limits and the sluggishness of the improvement in etching accuracy hinder high density.
[0008]
Therefore, narrowing the pitch by laser drilling is being studied. In laser processing, the diameter of the hole can be reduced to about the thickness of the insulating plate. Therefore, if a thin substrate is used, the diameter can be reduced. Also, the displacement of the laser is smaller than that of the drill. For example, if a 100 μm insulating plate is used, the hole diameter can be 100 μm, the land diameter can be 150 μm, and the via pitch can be 200 μm.
[0009]
The manufacturing process in laser processing will be described. First, with respect to a copper-clad laminate in which copper foil is attached to both sides of an insulating plate, a portion of one side of the copper foil where a via is formed is removed by etching.
[0010]
The copper foil on the other side does not remove the via portion to prevent unnecessary laser radiation by reflected light from being performed on a stage where the laser penetrates the substrate and supports the substrate. Next, the insulating material is removed by a laser. Processing conditions such as light intensity vary depending on the thickness and material of the insulating plate. Next, in order to remove the resin remaining on the bottom of the hole and the rust-proofing film on the back surface of the copper foil, an alkali treatment is performed, and then copper plating is performed as in the case of the through hole. Plasma treatment may be performed as a method of removing residual resin and the like. In general, a carbon dioxide gas laser is often used. However, when a YAG laser is used, a non-conductor such as a residual resin does not easily adhere to the laser, so that the residual resin may not be removed in some cases.
[0011]
[Problems to be solved by the invention]
Since the hole formed by the laser is non-penetrating, the circulation of the plating solution is stagnated inside the hole in the copper plating, and the plating hardly precipitates inside the hole. Conversely, plating is likely to be deposited near the entrance of the hole where the plating solution is well circulated, so that the entrance of the hole is blocked and a cavity is formed inside. The plating solution remains in the internal cavity and is difficult to remove in the cleaning process. Further, since the plating solution contains corrosive ions, there is a danger of disconnection or short-circuit due to migration in long-term use.
[0012]
Further, if the plating is sufficiently deposited in the inside of the hole, the thickness of the copper plating deposited on the surface of the copper foil is increased, and the unevenness of the plating thickness is increased. Therefore, the etching property deteriorates, and it becomes difficult to form fine wiring.
[0013]
That is, the present invention prevents printed cavities inside a non-through hole formed by a laser or the like, and also prevents printed conductors from becoming thicker to eliminate cavities, thereby forming high-density wiring. The purpose is to obtain a board.
[0014]
[Means for Solving the Problems]
The present invention provides a printed circuit board having a conductive circuit formed on the surface of an insulating layer and a non-through via having a hole formed only from one of the two surfaces, wherein the non-through via is plated with copper. The conductor circuit which is filled and excluding the copper plating of the via hole is a printed wiring board composed of only copper foil.
[0015]
Also, the present invention provides a copper-clad laminate in which copper foil is adhered to both sides of an insulating plate, and forms a non-through hole reaching one copper foil bottom surface by laser processing, and uses a plating resist except for the periphery of the non-through hole. A method for producing a printed wiring board, characterized in that after coating and dipping in a copper plating solution, non-through holes are filled with copper plating by applying a current to the copper foil on the side without holes.
[0016]
Furthermore, the present invention provides a substrate having a build-up structure in which an insulating layer and a copper foil are laminated on both sides of a core substrate. A method of manufacturing a printed wiring board having a build-up structure, characterized in that a non-through hole is filled with copper plating by covering with a plating resist, immersing in a copper plating solution, and then passing current through an electrolytic wire of a core substrate. It is.
[0017]
When performing copper plating in the via, after removing the resin at the bottom of the hole and the rust-preventive film on the back of the copper foil, remove the hole and cover with a plating resist, and apply electrolysis only to the copper foil corresponding to the bottom. As a result, since the plating is grown from the bottom surface of the via, the via entrance is not blocked and no void is generated. When the plating reaches the entrance of the via, it is electrically connected to the upper surface copper foil, and the adhesion of the plating is ensured. If plating is completed at this point, the plating surface and the surface of the copper foil become substantially the same. As described above, since the copper plating does not deposit on the surface of the copper foil, the difficulty in forming the fine wiring due to the non-uniformity of the copper plating is solved.
[0018]
In addition, in order to make the land diameter smaller than the land diameter lower limit value 250 μm of the through hole, the maximum value of the via hole diameter is 200 μm in consideration of the positional accuracy of laser processing ± 25 μm. When the via hole diameter is equal to or larger than the thickness of the insulating material, the thickness of the insulating material is preferably equal to or less than 200 μm. Further, in order to maintain insulation, the thickness of the insulating material is preferably 30 μm or more.
[0019]
Although the above description is for a double-sided board, it can also be used as a via for a printed wiring board having a build-up structure. In this case, the conductor wiring corresponding to the bottom of the via needs to be short-circuited with an electrolytic wire so that electrolytic copper plating can be performed.
[0020]
BEST MODE FOR CARRYING OUT THE INVENTION
(Example)
A copper-clad laminate composed of an insulating plate 1 (BN300S, manufactured by Mitsui Chemicals, 0.1 mm thick) in which a modified polyimide resin is impregnated in a glass cloth, and a copper foil 2 (18 μm, manufactured by Furukawa Electric) Was prepared (FIG. 1A). An etching resist was formed by laminating a photosensitive dry film (AQ2593 manufactured by Asahi Kasei Corporation) on both sides of the substrate, bringing a mask film into close contact, exposing and developing. This substrate was immersed in an iron chloride-based etching solution, and only the copper foil on one side was removed in a circular shape with a diameter of 150 μm in the portion 3 corresponding to the via (FIG. 1B). Similarly, only one side of the copper foil at a position where an electrolytic lead for applying electrolysis for electrolytic plating was to be attached was removed. Thereafter, the etching resist was stripped.
[0021]
Next, the insulating material was removed from the portion from which the copper foil was removed by a carbon dioxide laser to obtain a non-through hole 4 having a diameter of 100 μm reaching the copper foil on the surface opposite to the irradiation surface (FIG. 1C). Thereafter, an alkaline desmear treatment was performed to remove the resin remaining on the bottom of the via hole and the rust-preventive film on the back surface of the copper foil. Again, a photosensitive dry film (AQ2592 manufactured by Asahi Kasei Corporation) was laminated on both sides, and exposed and developed using a mask film in the same manner as described above to obtain a plating resist 5 (FIG. 1D). ).
[0022]
Next, an electrolytic lead was connected only to the copper foil having no holes, and after being immersed in an electrolytic plating solution, electrolysis was applied. As shown in FIG. 1 (e), copper plating gradually deposited from the copper foil back surface at the bottom of the hole, and the inside of the hole was filled with copper plating 6. When the copper plating reaches the entrance of the hole, it comes into contact with the copper foil, so that electrolysis is also applied to the copper foil, and the adhesion between the copper foil and the copper plating is ensured. Further, when the copper plating reaches the copper foil at the entrance of the hole, the plating area increases, so that the plating current temporarily increases, and thereafter, the plating area decreases, so that the plating current decreases. By continuing plating for a period of time at which the plating current reached a peak and having a plating thickness equal to the thickness of the copper foil, the plating surface and the copper foil surface became substantially the same. After the completion of the copper plating, the plating resist was peeled off to obtain a substrate having vias as shown in FIG.
[0023]
Thereafter, the conductor wiring is formed by etching, but omitted here, and the following items were evaluated.
[0024]
The presence or absence of voids in the via was determined by observing the cross section of the via with a microscope (20 times). Inspection of 1,000 vias revealed no voids.
[0025]
Next, the uniformity of the surface conductor thickness was measured. The substrate was divided into 5 × 5, and the plating thickness was measured at 25 locations by Caviderm. As a result of measuring four substrates (100 places in total), the standard deviation of the plating thickness was 0.1 μm.
(Comparative example)
In the same manner as in the example, a substrate having a non-through hole formed by laser processing was obtained. However, the thickness of the copper foil was 12 μm. The substrate was subjected to an alkaline desmear treatment, then subjected to a catalyst and subjected to electroless copper plating, and a plating time was determined in advance so that the plating thickness of the inner wall of the via became 10 μm or more, and electrolytic plating was performed. . Thereafter, the void inside the via and the conductor thickness were measured. As a result, there were 221 voids and the standard deviation of the conductor thickness was 2.3 μm.
[0026]
[Table 1]
Figure 2004047836
[0027]
Application to a build-up substrate will be described with reference to FIG. A build-up board in which a plurality of insulating plates 11 and a copper foil were laminated was prepared (FIG. 2A). An etching resist was formed by laminating a photosensitive dry film on both sides of the substrate, bringing a mask film into close contact, exposing and developing. This substrate was immersed in an iron chloride-based etching solution, and only the copper foil on one side was removed in a circular shape with a diameter of 150 μm at the portion 13 corresponding to the via (FIG. 2B). Similarly, only one side of the copper foil at a position where an electrolytic lead for applying electrolysis for electrolytic plating was to be attached was removed. Thereafter, the etching resist was stripped.
[0028]
Next, the insulating material was removed from the portion where the copper foil was removed by a carbon dioxide gas laser to obtain a non-through hole 14 having a diameter of 100 μm reaching the copper foil on the surface opposite to the irradiation surface (FIG. 2C). Thereafter, an alkaline desmear treatment was performed to remove the resin remaining at the bottom of the via hole and the roughened film on the copper foil surface. Again, a photosensitive dry film was laminated on both sides, and exposed and developed using a mask film in the same manner as described above to obtain a plating resist 15 (FIG. 2 (d)).
[0029]
Next, an electrolytic lead was connected only to the copper foil having no holes, and after being immersed in an electrolytic plating solution, electrolysis was applied. Copper plating gradually precipitated from the copper foil back surface at the bottom of the hole, and the inside of the hole was filled with electrolytic copper plating 16. After the completion of the copper plating, the plating resist was peeled off to obtain a build-up substrate in which vias were formed as shown in FIG.
[0030]
【The invention's effect】
According to the present invention, non-through holes can be filled with void-free copper plating. In addition, since the conductor maintains the copper foil thickness uniformity, the etching property is stable, the yield of fine wiring is improved, and the density can be increased.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a manufacturing process according to one embodiment of the present invention.
FIG. 2 is a diagram illustrating another manufacturing process of the present invention.
FIG. 3 is a diagram illustrating a conventional manufacturing process.
[Explanation of symbols]
1, 11, 51 ··· Insulating plate 2, 12, 52 ··· Copper foil 4,14 ··· Non-through hole 5,15 ··· Plating resist 6,16 ··· Electrolytic copper plating 53 ··· Through hole 54 ··· Catalyst

Claims (6)

絶縁層の表面に形成された導体回路と両表面のうちの片方の面からのみ穴を形成されている非貫通ビアを備えたプリント配線板において、前記非貫通ビアは銅メッキで充填されており、ビア穴の銅メッキを除いた導体回路は銅箔のみで構成されていることを特徴とするプリント配線板。In a printed circuit board having a conductive circuit formed on the surface of the insulating layer and a non-through via formed with a hole only from one of the two surfaces, the non-through via is filled with copper plating. A printed wiring board characterized in that the conductor circuit excluding the copper plating of the via hole is made of only copper foil. 前記絶縁層の厚さが30μm以上200μm以下で両面に導体回路が形成されていることを特徴とする請求項1に記載のプリント配線板。2. The printed wiring board according to claim 1, wherein the insulating layer has a thickness of 30 μm or more and 200 μm or less, and a conductor circuit is formed on both surfaces. ビルドアップ層に非貫通ビアが形成され、前記非貫通ビアは銅メッキで充填されており、貫通面の導体回路はビア穴の銅メッキを除いて銅箔のみで構成されることを特徴とするビルドアップ構造のプリント配線板。A non-penetrating via is formed in the build-up layer, the non-penetrating via is filled with copper plating, and the conductor circuit on the penetrating surface is made of only copper foil except for copper plating of the via hole. Printed wiring board with build-up structure. ビルドアップ絶縁層の厚さが30μm以上200μm以下であることを特徴とする請求項3に記載のビルドアップ構造のプリント配線板。4. The printed wiring board having a build-up structure according to claim 3, wherein the thickness of the build-up insulating layer is 30 μm or more and 200 μm or less. 絶縁板の両面に銅箔を貼り付けた銅張り積層板に対して、レーザー加工により一方の銅箔底面に至る非貫通穴をあけ、非貫通穴の周辺を除きメッキレジストで被覆して銅メッキ液に浸漬したのち、穴のない側の銅箔に通電することにより、非貫通穴を銅メッキで充填することを特徴とするプリント配線板の製造方法。For copper-clad laminates with copper foil stuck on both sides of the insulating plate, drill a non-through hole to the bottom of one of the copper foils by laser processing, cover with a plating resist except for the periphery of the non-through hole, and perform copper plating A method for producing a printed wiring board, characterized by filling a non-through hole with copper plating by immersing in a liquid and then supplying current to a copper foil having no holes. コア基板の両面に絶縁層と銅箔を積層したビルドアップ構造の基板に対して、レーザー加工により表面から下層の銅箔表面に至る非貫通穴をあけ、非貫通穴の周辺を除きメッキレジストで被覆し銅メッキ液に浸漬したのち、コア基板の電解線を通して通電することにより、非貫通穴を銅メッキで充填することを特徴とするビルドアップ構造のプリント配線板の製造方法。A non-through hole from the surface to the lower copper foil surface is drilled by laser processing on the build-up structure substrate where the insulating layer and copper foil are laminated on both sides of the core substrate, and plating resist is used except for the periphery of the non-through hole. A method for manufacturing a printed wiring board having a build-up structure, characterized in that after coating and immersion in a copper plating solution, non-through holes are filled with copper plating by passing current through electrolytic wires of a core substrate.
JP2002204913A 2002-07-12 2002-07-12 Printed board and its manufacturing method Pending JP2004047836A (en)

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Cited By (10)

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JP2006114787A (en) * 2004-10-15 2006-04-27 Sumitomo Bakelite Co Ltd Manufacturing method of circuit board
JP2006140216A (en) * 2004-11-10 2006-06-01 Sharp Corp Double-sided circuit board and its manufacturing method
JP2006165094A (en) * 2004-12-03 2006-06-22 Hitachi Chem Co Ltd Insulating adhesive sheet for printed wiring board and method of manufacturing printed wiring board
JP2007134364A (en) * 2005-11-08 2007-05-31 Hitachi Cable Ltd Method for manufacturing multilayer wiring board, multilayer wiring board, and electronic device using it
CN102544310A (en) * 2010-12-30 2012-07-04 株式会社元素电子 Mounting substrate and manufacturing method thereof
WO2014091869A1 (en) * 2012-12-11 2014-06-19 日本特殊陶業株式会社 Wiring substrate and production method therefor
JP2014116500A (en) * 2012-12-11 2014-06-26 Ngk Spark Plug Co Ltd Method for manufacturing wiring board
JP2018120968A (en) * 2017-01-25 2018-08-02 太陽誘電株式会社 Printed wiring board, module using printed wiring board and camera module using printed wiring board
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JP2006114787A (en) * 2004-10-15 2006-04-27 Sumitomo Bakelite Co Ltd Manufacturing method of circuit board
JP2006140216A (en) * 2004-11-10 2006-06-01 Sharp Corp Double-sided circuit board and its manufacturing method
JP4480548B2 (en) * 2004-11-10 2010-06-16 シャープ株式会社 Double-sided circuit board and manufacturing method thereof
JP2006165094A (en) * 2004-12-03 2006-06-22 Hitachi Chem Co Ltd Insulating adhesive sheet for printed wiring board and method of manufacturing printed wiring board
JP2007134364A (en) * 2005-11-08 2007-05-31 Hitachi Cable Ltd Method for manufacturing multilayer wiring board, multilayer wiring board, and electronic device using it
JP2012142459A (en) * 2010-12-30 2012-07-26 Element Denshi:Kk Mounting substrate and manufacturing method of the same
CN102544310A (en) * 2010-12-30 2012-07-04 株式会社元素电子 Mounting substrate and manufacturing method thereof
CN102544310B (en) * 2010-12-30 2015-03-18 株式会社元素电子 Mounting substrate and manufacturing method thereof
WO2014091869A1 (en) * 2012-12-11 2014-06-19 日本特殊陶業株式会社 Wiring substrate and production method therefor
JP2014116500A (en) * 2012-12-11 2014-06-26 Ngk Spark Plug Co Ltd Method for manufacturing wiring board
CN104854966A (en) * 2012-12-11 2015-08-19 日本特殊陶业株式会社 Wiring substrate and production method therefor
JP2018120968A (en) * 2017-01-25 2018-08-02 太陽誘電株式会社 Printed wiring board, module using printed wiring board and camera module using printed wiring board
JP2020145393A (en) * 2019-03-09 2020-09-10 山下マテリアル株式会社 Manufacturing method of flexible printed wiring board
CN111146092A (en) * 2020-01-16 2020-05-12 深圳市志金电子有限公司 Packaging substrate manufacturing process
CN111146092B (en) * 2020-01-16 2023-02-03 深圳市志金电子有限公司 Packaging substrate manufacturing process

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