JP2012142459A - Mounting substrate and manufacturing method of the same - Google Patents

Mounting substrate and manufacturing method of the same Download PDF

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JP2012142459A
JP2012142459A JP2010294622A JP2010294622A JP2012142459A JP 2012142459 A JP2012142459 A JP 2012142459A JP 2010294622 A JP2010294622 A JP 2010294622A JP 2010294622 A JP2010294622 A JP 2010294622A JP 2012142459 A JP2012142459 A JP 2012142459A
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conductive foil
hole
element fixing
electrode
plating layer
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JP5443334B2 (en
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Goro Narita
悟郎 成田
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Element Denshi Kk
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Element Denshi Kk
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Priority to JP2010294622A priority Critical patent/JP5443334B2/en
Priority to TW100122165A priority patent/TW201230937A/en
Priority to KR1020110087036A priority patent/KR101265008B1/en
Priority to CN201110254070.6A priority patent/CN102544310B/en
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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
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    • H01L2224/73265—Layer and wire connectors
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    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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Abstract

PROBLEM TO BE SOLVED: To provide an inexpensive mounting structure which uses a printed substrate while a metal substrate made of aluminum or the like and a lead frame made of copper or the like, which have high heat radiation, are generally used for mounting heating elements.SOLUTION: Multiple through holes for element fastening electrodes 21 are provided at an insulated substrate 10 so as to be arranged in a matrix state, and an element fastening electrode part 20 formed by an electrolytic plating layer 22 grown to a surface of first conductive foil 11 is provided in each through hole for the element fastening electrode 21. A heating element 31 is fastened on each element fastening electrode part 20 to realize a mounting substrate having high heat radiation.

Description

本発明は、ビアホール底面に露出する薄い導電箔に電解メッキでビアホールを埋設する多数個の素子固着電極部を設けた実装基板およびその製造方法に関する。   The present invention relates to a mounting substrate provided with a large number of element fixing electrode portions for embedding via holes in a thin conductive foil exposed on the bottom surface of the via holes by electrolytic plating, and a method for manufacturing the same.

照明用光源として発光ダイオード（ＬＥＤ）を利用する照明装置が市場に供給をされてきた。発光ダイオードも改良により、１Ｗ以上の白色の高効率パワーＬＥＤも発売されている。この高効率パワーＬＥＤを実装する方法としては放熱性の高いアルミニウムなどの金属基板や銅などのリードフレームが一般的であり、高効率パワーＬＥＤが発熱で劣化しないように放熱性を高めた実装構造が要求される。   Lighting devices that use light emitting diodes (LEDs) as illumination light sources have been supplied to the market. By improving the light emitting diodes, white high-efficiency power LEDs of 1 W or more are also on the market. As a method of mounting this high-efficiency power LED, a metal substrate such as aluminum with high heat dissipation and a lead frame such as copper are generally used. Is required.

また、上述の高効率パワーＬＥＤに限らず一般的な半導体素子などでも放熱性を高めた実装構造が要求される。   Further, not only the above-described high-efficiency power LED but also a general semiconductor element is required to have a mounting structure with improved heat dissipation.

特許文献１には、図１（本願の図８に対応）および図２に示すように、銅、アルミニウムなどの金属基板１−１と、基板１−１上に積層された１Ｗ／ｍｋ以上の熱伝導性を有する絶縁層１−２と、絶縁層１−２上に導電パターンを有する積層された導電層１−３を有するモジュール基板１−４と、モジュール基板１−４の導電層１−３上に取り付けられた複数の発光ダイオード素子１−５と、発光ダイオード素子１−５の光照射側に配置された蛍光体を有する照明用ＬＥＤモジュールが示されている。すなわち、放熱性の高い金属基板１−１上に複数の発光ダイオード素子１−５を実装することで放熱性を実現している。   In Patent Document 1, as shown in FIG. 1 (corresponding to FIG. 8 of the present application) and FIG. 2, a metal substrate 1-1 such as copper or aluminum, and 1 W / mk or more laminated on the substrate 1-1. A module substrate 1-4 having an insulating layer 1-2 having thermal conductivity, a conductive layer 1-3 laminated with a conductive pattern on the insulating layer 1-2, and a conductive layer 1- of the module substrate 1-4. 3 shows a lighting LED module having a plurality of light-emitting diode elements 1-5 mounted on 3 and a phosphor arranged on the light irradiation side of the light-emitting diode elements 1-5. That is, heat dissipation is realized by mounting a plurality of light emitting diode elements 1-5 on the metal substrate 1-1 having high heat dissipation.

特許文献２には、図１（本願の図９に対応）に示すように、リードフレーム２−２上に発光ダイオード素子２−５を組み込んでいる。このリードフレーム２−２は金属材料で構成され、リードフレーム２−２を介して効率よく放熱できる（００３４参照）との記載がされている。すなわち、放熱性の良い金属のリードフレーム２−２を用いることで発光ダイオード素子２−５の発熱を効率よく放熱している。   In Patent Document 2, as shown in FIG. 1 (corresponding to FIG. 9 of the present application), a light emitting diode element 2-5 is incorporated on a lead frame 2-2. It is described that this lead frame 2-2 is made of a metal material and can efficiently dissipate heat through the lead frame 2-2 (see 0034). That is, the heat of the light emitting diode element 2-5 is efficiently radiated by using the metal lead frame 2-2 having good heat dissipation.

上述した金属基板あるいはリードフレームを用いる実装構造では夫々専用の金属基板あるいはリードフレームが必要となる。従って、プリント基板の改良によって発熱性を高めた実装構造も以下のように模索されている。   In the mounting structure using the above-described metal substrate or lead frame, a dedicated metal substrate or lead frame is required. Therefore, a mounting structure in which heat generation is improved by improving the printed circuit board is also sought as follows.

特許文献３には、図２（本願の図１０に対応）に示すように、表面実装デバイス３−１１の下面のプリント基板３−１４に複数のサーマルビア３−１５を形成し、表面実装デバイス３−１１の発熱をパドル３−１３に熱伝導され、更にプリント基板３−１４のサーマルビア３−１５を介して放熱器３−１７へ熱伝導する実装構造が示されている（段落０００８，０００９参照）。   In Patent Document 3, as shown in FIG. 2 (corresponding to FIG. 10 of the present application), a plurality of thermal vias 3-15 are formed on a printed circuit board 3-14 on the lower surface of the surface mount device 3-11, thereby providing a surface mount device. A mounting structure in which the heat generated in 3-11 is thermally conducted to the paddle 3-13 and further conducted to the radiator 3-17 via the thermal via 3-15 of the printed board 3-14 is shown (paragraph 0008, 0009).

また、このサーマルビア３−１５はスルーホールであり、通常のスルーホールメッキで形成されために極めて断面積も小さく、大面積のものを得られず複数個のサーマルビア３−１５を密集して放熱性を高める構造である。   The thermal via 3-15 is a through-hole, and is formed by normal through-hole plating. Therefore, the cross-sectional area is extremely small, and a large area cannot be obtained. This structure increases heat dissipation.

特許文献４には、図１（本願の図１１に対応）および図２に示すように、ヒートシンク４−２０上に発熱素子４−３０を固定し、プリント基板４−１０のヒートシンク４−２０の搭載領域に複数のサーマルビア４−１９を設け、発熱素子４−３０からの発熱をヒートシンク４−２０に伝え、更にサーマルビア４−１９を介して外部に放熱する実装構造が示されている(段落００１７〜００３０参照)。   In Patent Document 4, as shown in FIG. 1 (corresponding to FIG. 11 of the present application) and FIG. 2, a heating element 4-30 is fixed on a heat sink 4-20, and a heat sink 4-20 of a printed board 4-10 is fixed. A mounting structure is shown in which a plurality of thermal vias 4-19 are provided in the mounting area, heat generated from the heating element 4-30 is transmitted to the heat sink 4-20, and heat is radiated to the outside via the thermal vias 4-19. (See paragraphs 0017-0030).

また、このサーマルビア４−１９はプリント基板にドリル加工等により貫通孔をあけ、その内壁面に銅メッキを施すいわゆるスルーホールメッキで形成されている(段落００３０参照)。   The thermal via 4-19 is formed by so-called through-hole plating in which a through hole is formed in a printed board by drilling or the like, and the inner wall surface is plated with copper (see paragraph 0030).

特開２０１０−２５１４４１号公報JP 2010-251441 A 特開２００９−３０２１５９号公報JP 2009-302159 A 特開２００７−２０８１２３号公報JP 2007-208123 A 特開２００３−２７３２９７号公報JP 2003-273297 A

上述した発光装置は、照明用のほかに液晶テレビのバックライト、自動車用の照明など用途が拡大をしている。用途によってはプリント基板を用いた安価な実装構造が求められる場合もある。   In addition to lighting, the light-emitting device described above has been expanded in applications such as backlights for liquid crystal televisions and lighting for automobiles. Depending on the application, an inexpensive mounting structure using a printed circuit board may be required.

しかし、特許文献１の金属基板を用いる場合は、各モジュールの金属基板ごとに実装するために、製造コストの低減は難しい。また、金属基板自体も高価で材料費も低減は難しい。   However, when using the metal substrate of Patent Document 1, it is difficult to reduce the manufacturing cost because it is mounted for each metal substrate of each module. Also, the metal substrate itself is expensive and it is difficult to reduce the material cost.

また、特許文献２のリードフレームを用いる場合は、予めリードフレームを用意する必要があり、前述した金属基板よりは材料費は低減できるが、リードフレームはプリント基板に半田付けして実装する必要があり、実装面に大きな制約がある。また、放熱性でもリードフレームは良好な放熱が行えるが、プリント基板は絶縁体なので放熱は良好とは言えずトータルで見れば放熱性は金属基板より遥かに劣ると言える。   In addition, when using the lead frame of Patent Document 2, it is necessary to prepare the lead frame in advance, and the material cost can be reduced as compared with the metal substrate described above, but the lead frame needs to be soldered and mounted on the printed board. There are significant restrictions on the mounting surface. In addition, the lead frame can perform good heat dissipation even in terms of heat dissipation, but since the printed circuit board is an insulator, it cannot be said that the heat dissipation is good and it can be said that the heat dissipation is far inferior to that of the metal substrate.

更に、特許文献３、４に示されたサーマルビアを複数個も受けたプリント基板を用いる場合は、スルーホールメッキでサーマルビアが形成されるため上記した全体が金属で構成される金属基板やリードフレームに比較すればその放熱性は格段に小さい。また、放熱性を上げるためにプリント基板上にヒートシンクを介して発熱素子を固着するので、予めヒートシンクに発熱素子を固着する工程とこのヒートシンクをプリント基板に載置する工程が必要になり、プリント基板を用いる製法上の簡便性はなくなり、むしろ金属基板やリードフレームを用いる製法より複雑化する問題が生じてきた。   Furthermore, in the case of using a printed circuit board that has received a plurality of thermal vias disclosed in Patent Documents 3 and 4, since the thermal via is formed by through-hole plating, the above-described metal substrate or lead composed entirely of metal. Compared with the frame, its heat dissipation is much smaller. Further, since the heat generating element is fixed on the printed circuit board via a heat sink in order to improve heat dissipation, a process of fixing the heat generating element to the heat sink and a process of placing the heat sink on the printed circuit board are necessary. However, there has been a problem that the method is more complicated than a method using a metal substrate or a lead frame.

本発明は上記した問題点に鑑みて為されたものであり、本発明の目的はプリント基板を用いてそれ自体を放熱性の良い実装基板として実現し、一括して多数の発熱素子を製造することを可能とする実装基板およびそれを用いた発熱素子の実装方法を提供することにある。   The present invention has been made in view of the above-described problems, and an object of the present invention is to realize a mounting substrate with good heat dissipation by using a printed circuit board, and to manufacture a large number of heating elements at once. It is an object of the present invention to provide a mounting substrate and a method for mounting a heating element using the mounting substrate.

本発明の実装基板は、絶縁基板の両主面に設けた第１の導電箔および第２の導電箔と、行列状に多数個配列された前記絶縁基板を貫通し前記第２の導電箔の裏面をその底部に露出する素子固着電極用貫通孔と、前記各素子固着電極用貫通孔を充填し、前記素子固着電極用貫通孔の底部の前記第２の導電箔の裏面から前記第１の導電箔表面まで成長した電解メッキ層で形成された素子固着電極部と、前記第１の導電箔で所望のパターンに形成された第１電極部と、前記第２の導電箔で所望のパターンに形成された第２電極部と、前記第１電極部と第２の電極部とを接続するスルーホールメッキ層とを具備することを特徴とする。   The mounting substrate of the present invention includes a first conductive foil and a second conductive foil provided on both main surfaces of the insulating substrate, and a plurality of the insulating substrates arranged in a matrix and passing through the insulating substrate. The element fixing electrode through-hole exposing the back surface at the bottom thereof and the element fixing electrode through-hole are filled, and the first conductive foil at the bottom of the element fixing electrode through-hole is formed from the back surface of the second conductive foil. An element fixing electrode portion formed of an electrolytic plating layer grown to the surface of the conductive foil, a first electrode portion formed in a desired pattern with the first conductive foil, and a desired pattern with the second conductive foil It is characterized by comprising a formed second electrode part and a through-hole plating layer connecting the first electrode part and the second electrode part.

また、本発明の実装基板の製造方法は、両主面には第１の導電箔および第２の導電箔が貼着された絶縁基板を準備する工程と、素子固着電極部を形成する領域の前記第１の導電箔を選択的に除去し、前記絶縁基板を露出する工程と、前記絶縁基板を選択的にドライエッチングして素子固着電極用貫通孔を形成し、前記第２の導電箔の裏面を検出してドライエッチングを停止し、前記素子固着電極用貫通孔の底面に前記第２の導電箔の裏側を露出した素子固着電極用貫通孔を形成する工程と、前記第１および前記第２の導電箔の表面をフィルムで被覆する工程と、前記第２の導電箔に通電して電解メッキにより前記素子固着電極用貫通孔に底部側に露出する前記第２の導電箔の裏面から上方向のみに銅メッキ層を形成し、前記銅メッキ層で前記素子固着電極用貫通孔を充填する工程と、前記銅メッキ層の表面を平坦に研削し、平坦化する工程と、前記第１の導電箔、前記第２の導電箔、および前記絶縁基板を貫通するスルーホール孔を形成する工程と、スルーホールメッキにより前記第１の導電箔および前記第２の導電箔を接続するスルーホールメッキ層を形成する工程と、前記第１および第２の導電箔を所望のパターンにエッチングして第１電極部と第２電極部を形成する工程とを具備することを特徴とする。   The mounting substrate manufacturing method of the present invention includes a step of preparing an insulating substrate having a first conductive foil and a second conductive foil attached to both main surfaces, and a region for forming an element fixing electrode portion. Selectively removing the first conductive foil to expose the insulating substrate; and selectively etching the insulating substrate to form through holes for element fixing electrodes; Detecting a back surface to stop dry etching, and forming a through hole for an element fixing electrode in which the back side of the second conductive foil is exposed at a bottom surface of the through hole for the element fixing electrode; A step of covering the surface of the second conductive foil with a film, and energizing the second conductive foil, and from above the back surface of the second conductive foil exposed to the bottom side of the element fixing electrode through hole by electrolytic plating A copper plating layer is formed only in the direction, and the copper plating layer A step of filling the through holes for the child fixed electrodes, a step of flattening and flattening the surface of the copper plating layer, and passing through the first conductive foil, the second conductive foil, and the insulating substrate Forming a through-hole hole, forming a through-hole plating layer for connecting the first conductive foil and the second conductive foil by through-hole plating, and the first and second conductive foils. And etching to a desired pattern to form a first electrode portion and a second electrode portion.

更に、本発明の実装基板の製造方法は、一主面に第１の導電箔が貼着された絶縁基板を準備する工程と、素子固着電極部を形成する領域の前記絶縁基板にルーター加工により貫通する素子固着電極用貫通孔を形成する工程と、前記絶縁基板の反対主面に第２の導電箔を貼着し、前記素子固着電極用貫通孔の底面に前記第２の導電箔の裏面側を露出させる工程と、前記第１および前記第２の導電箔の表面をフィルムで被覆する工程と、前記第２の導電箔に通電して電解メッキにより前記素子固着電極用貫通孔に底部側に露出する前記第２の導電箔の裏面から上方向のみに銅メッキ層を形成し、前記銅メッキ層で前記素子固着電極用貫通孔を充填する工程と、前記銅メッキ層の表面を平坦に研削し、平坦化する工程と、前記第１の導電箔、前記第２の導電箔、および前記絶縁基板を貫通するスルーホール孔を形成する工程と、スルーホールメッキにより前記第１の導電箔および前記第２の導電箔を接続するスルーホールメッキ層を形成する工程と、前記第１および第２の導電箔を所望のパターンにエッチングして第１電極部と第２電極部を形成する工程とを具備することを特徴とする。   Furthermore, the manufacturing method of the mounting substrate according to the present invention includes a step of preparing an insulating substrate having a first conductive foil attached to one main surface, and a router process on the insulating substrate in a region where an element fixing electrode portion is formed. A step of forming a through hole for the element fixing electrode penetrating, a second conductive foil is adhered to the opposite main surface of the insulating substrate, and the back surface of the second conductive foil is formed on the bottom surface of the through hole for the element fixing electrode A step of exposing a side, a step of covering the surfaces of the first and second conductive foils with a film, and energizing the second conductive foil to form a through hole for the element fixing electrode by electrolytic plating. Forming a copper plating layer only upward from the back surface of the second conductive foil exposed to the surface, filling the element fixing electrode through hole with the copper plating layer, and flattening the surface of the copper plating layer Grinding and flattening, the first conductive foil, the first Forming a through-hole hole penetrating the conductive substrate and the insulating substrate; forming a through-hole plating layer connecting the first conductive foil and the second conductive foil by through-hole plating; Etching the first and second conductive foils into a desired pattern to form a first electrode portion and a second electrode portion.

本発明の実装基板によれば、以下の効果が得られる。   According to the mounting substrate of the present invention, the following effects can be obtained.

第１に、実装基板は、行列状に多数個配列された絶縁基板を貫通し第２の導電箔の裏面をその底部に露出する素子固着電極用貫通孔を埋設する電解メッキ層からなる素子固着電極部を設けることで、発熱素子からの発熱を素子固着電極部にすぐに伝達され、極めて放熱性の高いプリント基板を実現する。   First, the mounting substrate is an element fixing composed of an electrolytic plating layer that embeds a through hole for an element fixing electrode that penetrates through a plurality of insulating substrates arranged in a matrix and exposes the back surface of the second conductive foil at the bottom thereof. By providing the electrode part, the heat generated from the heating element is immediately transmitted to the element fixing electrode part, and a printed circuit board with extremely high heat dissipation is realized.

第２に、素子固着電極部は純銅の塊であり、従来の金属基板、フレームあるいはヒートシンクと同じ熱伝導性を得られる。このため従来のプリント基板でよく用いられた銅ペーストのサーマルビアでは熱伝導率はせいぜい１０Ｗ/ｍｋであったのが、銅の熱伝導率４００Ｗ/ｍｋまで引き上げられ、約４０倍の放熱性の向上ができる。   Second, the element fixing electrode portion is a lump of pure copper, and can obtain the same thermal conductivity as a conventional metal substrate, frame or heat sink. For this reason, the thermal conductivity of copper paste thermal vias often used in conventional printed circuit boards was 10 W / mk at most, but the copper thermal conductivity was increased to 400 W / mk, and the heat dissipation was about 40 times higher. You can improve.

また、従来のスルーホールを銅メッキ層で形成した場合でも熱伝導率は４８Ｗ/ｍｋであり、約８倍の放熱性の向上ができる。   Further, even when the conventional through hole is formed of a copper plating layer, the thermal conductivity is 48 W / mk, and the heat dissipation can be improved by about 8 times.

第３に、実装基板の各セル２２に素子固着電極部の銅メッキ層が埋め込まれた形状で配置されるので、純銅のヒートシンクがプリント基板に埋め込まれたのと等価の構造となり、プリント基板の持つ大量製造の利便性と高放熱性の特性を併せ持つ。また、素子固着電極部は各セルの中央部に位置するので、ダイシングラインに囲まれており、ダイシングされない構造である。   Third, since each cell 22 of the mounting substrate is arranged in a shape in which the copper plating layer of the element fixing electrode portion is embedded, it becomes an equivalent structure in which a pure copper heat sink is embedded in the printed circuit board. Combines the convenience of mass production with high heat dissipation characteristics. In addition, since the element fixing electrode portion is located at the center of each cell, it is surrounded by dicing lines and is not diced.

第４に、実装基板では、素子固着電極部の大きさは放熱特性により設計され、形状も厚さも任意に選択できる。高い放熱性を得たいときはセル自体を大きくしたり、絶縁基板の厚みを厚くして素子固着電極部の体積を大きくすると良い。   Fourth, in the mounting substrate, the size of the element fixing electrode portion is designed by heat dissipation characteristics, and the shape and thickness can be arbitrarily selected. In order to obtain high heat dissipation, it is preferable to increase the volume of the element fixing electrode part by increasing the cell itself or by increasing the thickness of the insulating substrate.

第５に、実装基板に行列状にセルを多数個隣接して配列するので、多数個のセルを集積でき、生産効率とコストを大幅に向上することができる。また、この実装基板では、素子固着電極部を銅メッキ層で埋め込まれた形状にするので、製造工程で無駄に捨てる原材料がほとんどなく、環境に優しい生産が実現できる。   Fifth, since a large number of cells are arranged adjacent to each other in a matrix on the mounting substrate, a large number of cells can be integrated, and production efficiency and cost can be greatly improved. Further, in this mounting substrate, since the element fixing electrode portion is formed in a shape embedded with a copper plating layer, there is almost no raw material discarded in the manufacturing process, and environmentally friendly production can be realized.

本発明の実装基板の製造方法によれば、以下の効果が得られる。   According to the mounting substrate manufacturing method of the present invention, the following effects can be obtained.

第１に、素子固着電極用貫通孔の底面に第２の導電箔の裏側を露出した素子固着電極用貫通孔を形成する工程と、第２の導電箔に通電して電解メッキにより素子固着電極用貫通孔に底部側に露出する第２の導電箔の裏面から上方向のみに銅メッキ層を形成し、銅メッキ層で素子固着電極用貫通孔を充填する工程とにより、純銅の素子固着電極部を実装基板に埋め込んで形成できる。これにより従来のプリント基板ではサーマルビアあるいはスルーホールでしか放熱性を向上できなかったものが、純銅のヒートシンクがプリント基板に多数個埋め込まれたのと等価の構造の実装基板を製造できるようになった。   First, a step of forming a through hole for an element fixing electrode in which the back side of the second conductive foil is exposed on the bottom surface of the through hole for the element fixing electrode, and an element fixing electrode through electroplating by energizing the second conductive foil Forming a copper plating layer only upward from the back surface of the second conductive foil exposed on the bottom side of the through hole for use, and filling the element fixing electrode through hole with the copper plating layer; The portion can be formed by embedding it in a mounting substrate. This makes it possible to manufacture a mounting board with a structure equivalent to a large number of pure copper heat sinks embedded in a printed board, although heat radiation can only be improved with thermal vias or through holes in conventional printed boards. It was.

第２に、第１の導電箔の素子固着電極部が形成される予定の領域とその周辺部を除いてフィルムで覆い、第２の導電箔はその表面をフィルムで覆い、第２の導電箔のみをマイナス電極して電解メッキを行うので、素子固着電極用貫通孔の底面に露出した第２の導電箔の裏面のみが電解メッキの電極として働き、ここにのみ銅メッキ層が析出され、時間とともに成長して素子固着電極用貫通孔を埋設する。これにより銅メッキ層は素子固着電極用貫通孔の底面に露出した第２の導電箔の裏面から成長するので、ボイドを発生することなく密度の高い純銅の塊を形成し、良好なヒートシンクを形成する。しかも、素子固着電極用貫通孔の形状はどのような形状を選択してもそれを確実に埋設する素子固着電極部が形成できる。絶縁基板の厚みも選択が可能であり、その場合でも銅の電解メッキの時間を選ぶことで、銅メッキ層で素子固着電極用貫通孔を埋設するように成長させることができる。   Second, the first conductive foil is covered with a film except for the region where the element fixing electrode portion is to be formed and its peripheral portion, the second conductive foil is covered with a film, and the second conductive foil is covered with the film. Since only the negative electrode is used for electrolytic plating, only the back surface of the second conductive foil exposed at the bottom surface of the element fixing electrode through-hole functions as an electrode for electrolytic plating, and a copper plating layer is deposited only on this surface. It grows with it and embeds a through hole for an element fixing electrode. As a result, the copper plating layer grows from the back surface of the second conductive foil exposed at the bottom surface of the through hole for the element fixing electrode, so that a high-density pure copper lump is formed without generating voids and a good heat sink is formed. To do. In addition, an element fixing electrode portion can be formed in which the through hole for the element fixing electrode is surely embedded regardless of the shape selected. The thickness of the insulating substrate can also be selected. Even in such a case, by selecting the time of copper electroplating, it is possible to grow so as to embed the element fixing electrode through hole in the copper plating layer.

すなわち、素子固着電極部の銅メッキ層はどのような形状でも厚みでも対応ができる。   In other words, the copper plating layer of the element fixing electrode portion can correspond to any shape and thickness.

第３に、第１の導電箔上のフィルムおよび素子固着電極用貫通孔より突出した銅メッキ層は機械的に研削してその表面を平坦にするので、発熱素子を固着することが可能となる。   Third, since the copper plating layer protruding from the film on the first conductive foil and the element fixing electrode through hole is mechanically ground to flatten the surface, the heating element can be fixed. .

また、スルーホールメッキ層で素子固着電極部の蓋メッキも兼ねるので、工程の簡略化もできる。   Further, since the through-hole plating layer also serves as lid plating for the element fixing electrode portion, the process can be simplified.

第４に、各セルを行列状に多数個隣接して配置することで、発熱素子を組み込んだ半導体装置を大量に製造することが可能であり、素子固着電極部は各セルの中央部に配置することでダイシング時にダイシングされることもない。   Fourthly, a large number of semiconductor devices incorporating heating elements can be manufactured by arranging a large number of cells adjacent to each other in a matrix, and the element fixing electrode portion is disposed at the center of each cell. By doing so, it is not diced at the time of dicing.

本発明の発光装置の（Ａ）上面図、（Ｂ）断面図である。It is (A) top view and (B) sectional drawing of the light-emitting device of this invention. 本発明に用いる実装基板の（Ａ）上面図、（Ｂ）上面図である。It is (A) top view and (B) top view of the mounting board | substrate used for this invention. 本発明に用いる実装基板の（Ａ）表面一部拡大図、（Ｂ）裏面一部拡大図である。2A is a partially enlarged view of the front surface of the mounting substrate used in the present invention, and FIG. 本発明の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of this invention. 本発明の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of this invention. 本発明の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of this invention. 本発明の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of this invention. 従来の発光装置を説明する断面図である。It is sectional drawing explaining the conventional light-emitting device. 従来の発光装置を説明する断面図である。It is sectional drawing explaining the conventional light-emitting device. 従来の発光装置を説明する断面図である。It is sectional drawing explaining the conventional light-emitting device. 従来の発光装置を説明する断面図である。It is sectional drawing explaining the conventional light-emitting device.

図１から図７を参照し、本発明の実施形態を説明する。   An embodiment of the present invention will be described with reference to FIGS.

まず、図１に本発明の実装基板を用いた発光装置を示す。図１（Ａ）はその上面図であり、図１（Ｂ）は図１（Ａ）のａ−ａ線断面図である。   First, FIG. 1 shows a light-emitting device using the mounting substrate of the present invention. FIG. 1A is a top view thereof, and FIG. 1B is a cross-sectional view taken along the line aa in FIG.

本実施形態の実装基板を用いた発熱素子は、絶縁基板１０と、第１の導電箔１１と、第２の導電箔１２と、第１電極部１３と、第２電極部１４と、素子固着電極部２０と、発熱素子３１とから構成される。   A heating element using the mounting substrate of the present embodiment includes an insulating substrate 10, a first conductive foil 11, a second conductive foil 12, a first electrode portion 13, a second electrode portion 14, and an element fixing. The electrode unit 20 and the heating element 31 are configured.

絶縁基板１０は、第１および第２の導電箔１１、１２の支持基板として働き、ＦＲ４(エポキシド織ガラス布)、ＢＴ（ビスマレイミドトリアジン）樹脂からなる基板、ガラスエポキシ基板、ガラスポリイミド基板などである。本実施形態では一例としてＢＴ樹脂からなる基板を用いる。絶縁基板１０の厚みｔ１は例えば５０〜６００μｍ程度である。   The insulating substrate 10 serves as a support substrate for the first and second conductive foils 11 and 12, and is a substrate made of FR4 (epoxide woven glass cloth), BT (bismaleimide triazine) resin, a glass epoxy substrate, a glass polyimide substrate, or the like. is there. In this embodiment, a substrate made of BT resin is used as an example. The thickness t1 of the insulating substrate 10 is, for example, about 50 to 600 μm.

第１の導電箔１１および第２の導電箔１２は、絶縁基板１０の両面に接着剤で圧着して貼り付けられる。第１の導電箔１１および第２の導電箔１２としては、エッチング可能な金属であればよい。本実施形態では、銅から成る金属箔を採用した。これらは後述の第１電極部１３および第２電極部１４と共に配線の一部を構成する。   The first conductive foil 11 and the second conductive foil 12 are attached to both surfaces of the insulating substrate 10 by pressure bonding with an adhesive. The first conductive foil 11 and the second conductive foil 12 may be any metal that can be etched. In the present embodiment, a metal foil made of copper is employed. These constitute a part of wiring together with a first electrode portion 13 and a second electrode portion 14 described later.

つまり、これらの膜厚は、配線として必要な厚さが選択される。配線の厚さは、実装される回路素子の電流容量などによって任意に決定することができる。第１の導電箔１１と第２の導電箔１２の膜厚は同等であり、例えば９μｍ〜３５μｍである。   That is, the thickness required for the wiring is selected for these film thicknesses. The thickness of the wiring can be arbitrarily determined depending on the current capacity of the circuit element to be mounted. The film thickness of the 1st conductive foil 11 and the 2nd conductive foil 12 is equivalent, for example, is 9 micrometers-35 micrometers.

第１電極部１３および第２電極部１４は、第１および第２の導電箔１１、１２とその表面の電解メッキ層とで形成される。第１電極部１３と第２電極部１４もまた配線の一部を構成するため、その膜厚は配線として必要な厚さが任意に選択される。   The 1st electrode part 13 and the 2nd electrode part 14 are formed with the 1st and 2nd conductive foils 11 and 12, and the electrolytic plating layer of the surface. Since the first electrode portion 13 and the second electrode portion 14 also constitute a part of the wiring, the thickness required for the wiring is arbitrarily selected.

素子固着電極部２０は、絶縁基板１０のほぼ中央付近で、絶縁基板１０を貫通して素子固着電極用貫通孔２１を形成し、素子固着電極用貫通孔２１の底部に露出された第２の導電箔の絶縁基板１０との接着面側から銅の電解メッキで固着電極用貫通孔方向のみに成長させて銅メッキ層２２で埋設した後、その表面を平らに研削し、更に第１電極部１３と連結して形成する。   The element fixing electrode portion 20 penetrates the insulating substrate 10 to form an element fixing electrode through hole 21 near the center of the insulating substrate 10, and is exposed to the bottom of the element fixing electrode through hole 21. After the conductive foil is grown only in the direction of the through hole for the fixed electrode by electrolytic plating of copper from the adhesion surface side with the insulating substrate 10 and embedded in the copper plating layer 22, the surface is ground flat, and further the first electrode portion 13 is formed.

本発明の特徴は、素子固着電極用貫通孔２１の底部に露出された第２の導電箔１２の絶縁基板１０との接着面側(すなわち、裏面側)からのみ銅の電解メッキを長時間行うことで
銅メッキ層２２を素子固着電極用貫通孔２１を埋設するように成長させている点にある。これは従来のスルーホールメッキでは両面の導電箔から銅メッキ層を析出させていたのとは根本的に異なり、大面積の素子固着電極用貫通孔２１であっても確実に素子固着電極用貫通孔２１を埋設するまで電解銅メッキを続けることができる。 The feature of the present invention is that the electrolytic plating of copper is performed for a long time only from the adhesion surface side (that is, the back surface side) of the second conductive foil 12 exposed to the bottom of the through hole 21 for the element fixing electrode. Thus, the copper plating layer 22 is grown so as to embed the element fixing electrode through hole 21. This is fundamentally different from the case where the copper plating layer is deposited from the conductive foils on both sides in the conventional through-hole plating, and even if the through-hole 21 for the element fixing electrode has a large area, the through-hole for the element fixing electrode is ensured. Electrolytic copper plating can be continued until the hole 21 is buried.

本実施形態では一例として、レーザを用いたドライエッチング加工により素子固着電極用貫通孔２１を形成する。尚、ＮＣ工作機（ＮＣルーター）を用いたルーター加工により素子固着電極用貫通孔２１を形成することも可能である。素子固着電極用貫通孔２１は、正方形、円、楕円、あるいは多角形等の形に形成される。ドライエッチング加工の場合には小径の素子固着電極用貫通孔を形成するのに適し、ルーター加工の場合には大きい径の素子固着電極用貫通孔を形成するのに適している。   In this embodiment, as an example, the element fixing electrode through hole 21 is formed by dry etching using a laser. The element fixing electrode through-hole 21 can be formed by router processing using an NC machine tool (NC router). The element fixing electrode through-hole 21 is formed in a shape such as a square, a circle, an ellipse, or a polygon. The dry etching process is suitable for forming a small-diameter element fixing electrode through-hole, and the router process is suitable for forming a large-diameter element fixing electrode through-hole.

素子固着電極部２０の大きさは載置する発熱素子３１よりは大きい正方形、円、楕円、あるいは多角形等の任意の形に形成される。詳しくは、ドライエッチング加工ではレーザの描画により任意の形が可能であり、ルーター加工では予め決められたルーターの形状に形成される。   The element fixing electrode portion 20 is formed in an arbitrary shape such as a square, a circle, an ellipse, or a polygon which is larger than the heating element 31 to be placed. Specifically, in the dry etching process, an arbitrary shape is possible by drawing with a laser, and in the router process, a predetermined router shape is formed.

一例として素子固着電極部２０の形状は、上面および下面開口の直径は２．２〜２．３ｍｍであり、高さは２．０ｍｍの長方形状である。   As an example, the element fixing electrode portion 20 has a rectangular shape in which the diameters of the upper and lower surface openings are 2.2 to 2.3 mm and the height is 2.0 mm.

発熱素子３１としては三族窒化物系化合物半導体（例えば、ガリウムナイトライド）の高効率パワー発熱素子であり、素子の一主面に第１電極３２、反対主面に第２電極３３が設けられる。発熱素子３１の形状は、底面が０．１５ｍｍ四方であり、高さは６０μｍ〜１００μｍである。ここでは一例として高さが１００μｍの発熱素子３１を用いた。発熱素子３１は、素子固着電極部２０上に第２電極３３を対向して配置され、素子固着電極部２０の表面に接着剤３４によって固着される。   The heating element 31 is a high-efficiency power heating element of a group III nitride compound semiconductor (for example, gallium nitride). The first electrode 32 is provided on one main surface of the element, and the second electrode 33 is provided on the opposite main surface. . The heating element 31 has a bottom surface of 0.15 mm square and a height of 60 μm to 100 μm. Here, as an example, the heating element 31 having a height of 100 μm was used. The heating element 31 is disposed on the element fixing electrode portion 20 so as to face the second electrode 33, and is fixed to the surface of the element fixing electrode portion 20 with an adhesive 34.

接着剤３４は、例えば貴金属を含む導電ペーストである。尚、金（Ａｕ）メッキを施し、Ａｕ共晶により固着してもよい。   The adhesive 34 is a conductive paste containing a noble metal, for example. Note that gold (Au) plating may be applied and fixed by Au eutectic.

発熱素子３１の各電極は金属細線３０のワイヤボンディングにより所定の第１電極部１３と接続される。第１電極部１３はスルーホール孔のスルーホールメッキ層を介して所定の第２電極部１４と接続される。   Each electrode of the heating element 31 is connected to a predetermined first electrode portion 13 by wire bonding of a thin metal wire 30. The first electrode portion 13 is connected to a predetermined second electrode portion 14 through a through-hole plating layer of a through-hole hole.

透明樹脂３５は全体を覆い、発熱素子３１および金属細線３０の保護と同時に発熱素子３１のレンズとして働く。   The transparent resin 35 covers the whole and acts as a lens of the heating element 31 at the same time as protecting the heating element 31 and the fine metal wire 30.

本実施形態の発光装置５０を実装する際には、裏面に露出する第２電極部１４を半田などにより実装用のマザー基板に表面実装される。   When mounting the light emitting device 50 of the present embodiment, the second electrode portion 14 exposed on the back surface is surface-mounted on a mounting mother substrate by soldering or the like.

次に、図２〜図３を用いて実装基板のパターンについて説明する。図２（Ａ）はその表面の上面図であり、図２（Ｂ）はその裏面の上面図である。図３（Ａ）はその表面の一部拡大図であり、図３（Ｂ）はその裏面の一部拡大図である。   Next, the pattern of the mounting substrate will be described with reference to FIGS. FIG. 2A is a top view of the front surface, and FIG. 2B is a top view of the back surface. 3A is a partially enlarged view of the front surface, and FIG. 3B is a partially enlarged view of the back surface.

図２（Ａ）（Ｂ）に示す実装基板は具体的に７０ｍｍ×７０ｍｍの大きさに切断されている。周辺は額縁状の枠部２が設けられ、枠部２の中に行列状に各セル２２が隣接して配列される。図２では、１１行１０列に５ｍｍ×５ｍｍのセル２２が配列され、全体で１１０個のセル２２が設けられる。各セル２２間の境界はダイシングラインとなる。   The mounting substrate shown in FIGS. 2A and 2B is specifically cut into a size of 70 mm × 70 mm. A frame-shaped frame portion 2 is provided around the periphery, and the cells 22 are arranged adjacent to each other in a matrix shape in the frame portion 2. In FIG. 2, cells 22 of 5 mm × 5 mm are arranged in 11 rows and 10 columns, and 110 cells 22 are provided as a whole. The boundary between each cell 22 becomes a dicing line.

各セル２２の略中央付近に素子固着電極部２０の銅メッキ層が絶縁基板１０に埋め込まれた形状（図中黒塗り部分）で配置され、本例では１辺が２ｍｍ〜３ｍｍの範囲の長方形状にしてある。素子固着電極部２０の大きさは放熱特性により設計され、形状も厚さも任意に選択できる。高い放熱性を得たいときはセル２２自体を大きくしたり、絶縁基板１０の厚みを厚くすれば良い。   In the vicinity of the approximate center of each cell 22, the copper plating layer of the element fixing electrode portion 20 is arranged in a shape (black portion in the figure) embedded in the insulating substrate 10, and in this example, one side is a rectangle with a range of 2 mm to 3 mm. It is in the shape. The size of the element fixing electrode portion 20 is designed according to heat dissipation characteristics, and the shape and thickness can be arbitrarily selected. In order to obtain high heat dissipation, the cell 22 itself may be enlarged or the insulating substrate 10 may be thickened.

枠部２の４辺には複数個の位置合わせ孔５が設けられ、右上には切欠き部６を設けて裏表と上下方向の認識に利用する。また、枠部２には各セル２２の境界に対応するマーク７が設けられ、対向する辺のマーク７がダイシングラインを規定し、ダイシング時の位置合わせに用いる。これらは製造工程における各セル２２との位置合わせに用いられ極めて精度の高い発熱素子装置の製造を実現する。   A plurality of alignment holes 5 are provided on the four sides of the frame portion 2, and a notch portion 6 is provided on the upper right side for use in recognizing the front and back sides. The frame 2 is provided with a mark 7 corresponding to the boundary of each cell 22, and the mark 7 on the opposite side defines a dicing line and is used for alignment during dicing. These are used for alignment with each cell 22 in the manufacturing process and realize the manufacture of a heating element device with extremely high accuracy.

次に、図３（Ａ）に実装基板１の表面一部拡大図を示し、図３（Ｂ）に実装基板１の裏面一部拡大図を示す。各セル２２の大きさは５ｍｍ×５ｍｍと極めて微小である。   Next, FIG. 3A shows a partially enlarged view of the front surface of the mounting substrate 1, and FIG. 3B shows a partially enlarged view of the back surface of the mounting substrate 1. Each cell 22 has a very small size of 5 mm × 5 mm.

各セル２２において、第１電極部１３は絶縁基板１０の表面に設けられ、４つの島にパターンニングされる。その一つは素子固着電極部２０と連結され、他の３つは分離されている。第２電極部１４は絶縁基板１０の裏面に設けられ、５つの島にパターンニングされる。中央の細長い島は素子固着電極部２０と連結され、その両側に２個づつ島を配置している。   In each cell 22, the first electrode portion 13 is provided on the surface of the insulating substrate 10 and is patterned into four islands. One of them is connected to the element fixing electrode part 20, and the other three are separated. The second electrode portion 14 is provided on the back surface of the insulating substrate 10 and is patterned into five islands. The central elongated island is connected to the element fixing electrode portion 20, and two islands are arranged on both sides thereof.

各セル２２の両側には２個づつ設けたスルーホール孔１５ａ、１５ｂ、１６ａ、１６ｂを形成し、各スルーホール孔に形成されるスルーホールメッキ層で第１電極部１３と第２電極部１４の対応する島を電気的に接続している。スルーホール孔１５ａ、１５ｂ、１６ａ、１６ｂはダイシングライン上に重ねて設けられ、ダイシング時に半分が切り取られるが、残りの半分が各セル２２の側面に露出して残され、サイドスルーホール構造となる。   Two through-hole holes 15a, 15b, 16a and 16b are formed on both sides of each cell 22, and the first electrode portion 13 and the second electrode portion 14 are formed by through-hole plating layers formed in the respective through-hole holes. The corresponding islands are electrically connected. The through-hole holes 15a, 15b, 16a, and 16b are provided on the dicing line, and half are cut off during dicing, but the remaining half is left exposed on the side surface of each cell 22 to form a side through-hole structure. .

各島のパターニングは載置する発熱素子の持つ電極の数に対応して行われる。第１電極部１３の島はその表面に発熱素子の固着や金属細線のボンディングを行えるようにボンディング可能な金属メッキ層２３ａを設けており、第２電極部１４の島には表面実装が可能なように半田付け可能な金属層２４ａ、２４ｂ、２４ｅ（図１（Ｂ）、図５（Ｊ）参照）を設けている。   The patterning of each island is performed according to the number of electrodes of the heating element to be placed. The island of the first electrode portion 13 is provided with a metal plating layer 23a that can be bonded so that the heat generating element can be fixed and the thin metal wire can be bonded to the island, and the island of the second electrode portion 14 can be surface-mounted. In this manner, solderable metal layers 24a, 24b, and 24e (see FIGS. 1B and 5J) are provided.

本発明の実装基板の特徴は本例の場合、７０ｍｍ×７０ｍｍの大きさの絶縁基板に１１０個のヒートシンクとして働く素子固着電極部２０を埋め込むことで、放熱性の高いプリント基板が実現できた点にある。これによりプリント基板の持つ組み立ての簡便性と放熱性を併せ持つ実装基板が実現できた。   In the case of this example, the mounting board of the present invention is characterized in that a printed board with high heat dissipation can be realized by embedding 110 element fixing electrode portions 20 serving as heat sinks in an insulating board having a size of 70 mm × 70 mm. It is in. As a result, a mounting board having both ease of assembly and heat dissipation of the printed board was realized.

続いて、図４〜図７を参照して本発明の実装基板の製造方法および発熱素子の実装方法について説明する。   Next, a method for manufacturing a mounting board and a method for mounting a heating element according to the present invention will be described with reference to FIGS.

〔実施例１〕
以下に本実施の形態の一例として、レーザを用いたドライエッチングにより実装基板を製造する方法を説明する。 [Example 1]
As an example of this embodiment, a method for manufacturing a mounting substrate by dry etching using a laser will be described below.

第１工程（図４（Ａ））では、両主面に第１の導電箔１１および第２の導電箔１２が貼着された絶縁基板１０を準備する。   In the first step (FIG. 4A), an insulating substrate 10 having a first conductive foil 11 and a second conductive foil 12 attached to both main surfaces is prepared.

一の主面に銅の第１の導電箔１１を貼着し、他の主面に第１の導電箔１１と同等の厚みの第２の導電箔１２を貼着した絶縁基板１０を準備する。   An insulating substrate 10 is prepared in which a first conductive foil 11 made of copper is attached to one main surface, and a second conductive foil 12 having the same thickness as the first conductive foil 11 is attached to the other main surface. .

絶縁基板１０としては、例えばＦＲ４またはＢＴ樹脂からなる基板、ガラスエポキシ基板またはガラスポリイミド基板、場合によってはフッ素基板、ガラスＰＰＯ基板またはセラミック基板など、フレキシブルシート、フィルムなどでもよい。本実施形態では、一例として厚さｔ１が１００μｍ程度のＢＴ樹脂基板を採用した。絶縁基板１は６０〜６００μｍで選ばれ、素子固着電極部が放熱に必要とされる厚さと同じに厚さとなる。   The insulating substrate 10 may be a flexible sheet, a film, or the like, for example, a substrate made of FR4 or BT resin, a glass epoxy substrate or a glass polyimide substrate, and in some cases, a fluorine substrate, a glass PPO substrate, or a ceramic substrate. In the present embodiment, a BT resin substrate having a thickness t1 of about 100 μm is employed as an example. The insulating substrate 1 is selected from 60 to 600 μm, and the element fixing electrode portion has the same thickness as that required for heat dissipation.

第１の導電箔１１および第２の導電箔１２としては、銅から成る金属箔を採用した。第１の導電箔１１、第２の導電箔１２の膜厚は同等であり、９μｍ〜３５μｍ（例えば１８μｍ）程度である。   As the 1st conductive foil 11 and the 2nd conductive foil 12, the metal foil which consists of copper was employ | adopted. The film thicknesses of the first conductive foil 11 and the second conductive foil 12 are equivalent and are about 9 μm to 35 μm (for example, 18 μm).

第２工程（図４（Ｂ））では、予定の素子固着電極用貫通孔２１を形成する領域の第１の導電箔１１を選択的に除去し、絶縁基板１０を露出する。   In the second step (FIG. 4B), the first conductive foil 11 in the region where the planned element fixing electrode through hole 21 is to be formed is selectively removed, and the insulating substrate 10 is exposed.

後述するが本実施形態では一例として、レーザを用いたドライエッチング（レーザビア加工）により素子固着電極用貫通孔を形成する。その際レーザが照射される領域に導電箔（Ｃｕ）が存在すると、Ｃｕに対してレーザが反射されるのでマスクとして働く。   As will be described later, in this embodiment, as an example, the element fixing electrode through hole is formed by dry etching (laser via processing) using a laser. At this time, if a conductive foil (Cu) is present in the region irradiated with the laser, the laser is reflected against Cu, so that it works as a mask.

そこで、本工程において、所望のパターンが形成されたレジストＰＲなどをマスクとして、素子固着電極用貫通孔２１が形成される予定の領域の第１の導電箔１１をエッチングにより選択的に除去し、当該領域の絶縁基板１０が露出した開口部ＯＰを形成する。   Therefore, in this step, the first conductive foil 11 in the region where the element fixing electrode through hole 21 is to be formed is selectively removed by etching using the resist PR or the like on which a desired pattern is formed as a mask, An opening OP in which the insulating substrate 10 in the region is exposed is formed.

第３工程（図４（Ｃ））では、絶縁基板１０を選択的にドライエッチングして素子固着電極用貫通孔２１を形成し、第２の導電箔１２の裏面を検出してドライエッチングを停止し、素子固着電極用貫通孔２１の底面に第２の導電箔１２の裏面側を露出する。   In the third step (FIG. 4C), the insulating substrate 10 is selectively dry-etched to form the element fixing electrode through-hole 21, and the back surface of the second conductive foil 12 is detected to stop the dry etching. Then, the back surface side of the second conductive foil 12 is exposed on the bottom surface of the through hole 21 for element fixing electrode.

開口部ＯＰから露出した絶縁基板１０をドライエッチングする。ここでは、ドライエッチングとしてレーザを用いたエッチング（レーザビア加工法）を採用する。レーザは、例えばＹＡＧレーザ、ＣＯ２レーザなどであり、ＢＴ樹脂の絶縁基板１０がエッチング可能で、第２の導電箔１２であるＣｕが溶融しない程度の条件でレーザ照射する。 The insulating substrate 10 exposed from the opening OP is dry etched. Here, etching using a laser (laser via processing method) is employed as dry etching. The laser is, for example, a YAG laser, a CO 2 laser, or the like, and the laser irradiation is performed under such conditions that the insulating substrate 10 made of BT resin can be etched and Cu that is the second conductive foil 12 is not melted.

レーザビア加工法としては、第１の導電箔１１を除去した開口部ＯＰの直径に対して同等のレーザ加工を行うコンフォーマル加工法や、開口部ＯＰの直径より小さくレーザ加工を行うラージウィンドウ加工法などがある。   As a laser via processing method, a conformal processing method for performing laser processing equivalent to the diameter of the opening OP from which the first conductive foil 11 is removed, or a large window processing method for performing laser processing smaller than the diameter of the opening OP. and so on.

開口部ＯＰから露出した絶縁基板１０にレーザを照射する。絶縁基板１０が除去され、第２の導電箔１２の裏面（絶縁基板１０と当接する側）の露出を検出して、エッチング（レーザ照射）を停止する。これにより絶縁基板１０を完全に貫通するビアホール形状の素子固着電極用貫通孔２１が形成され、第２の導電箔１２の裏面の一部が露出する。この露出した第２の導電箔１２は第５工程で電解めっきする際にマイナス電極となる。   The insulating substrate 10 exposed from the opening OP is irradiated with laser. The insulating substrate 10 is removed, the exposure of the back surface of the second conductive foil 12 (the side in contact with the insulating substrate 10) is detected, and etching (laser irradiation) is stopped. As a result, a through hole 21 for element fixing electrode having a via hole shape that completely penetrates the insulating substrate 10 is formed, and a part of the back surface of the second conductive foil 12 is exposed. The exposed second conductive foil 12 becomes a negative electrode when electrolytic plating is performed in the fifth step.

本実施形態では、第２の導電箔１２により終点検出が可能となるので、正確且つ容易に、素子固着電極用貫通孔２１と、その素子固着電極用貫通孔２１の底部のマイナス電極を形成することができる。また、第２の導電箔１２による終点検出を可能とするために、絶縁基板１０が加工可能で、第２の導電箔１２（Ｃｕ）が溶融しない程度のレーザ照射条件を適宜選択する。   In this embodiment, since the end point can be detected by the second conductive foil 12, the element fixing electrode through hole 21 and the negative electrode at the bottom of the element fixing electrode through hole 21 are formed accurately and easily. be able to. Further, in order to enable end point detection by the second conductive foil 12, a laser irradiation condition that allows the insulating substrate 10 to be processed and does not melt the second conductive foil 12 (Cu) is appropriately selected.

尚、レーザビア加工法で形成された素子固着電極用貫通孔２１は、その側壁が平坦な垂直面２１ａとなる。素子固着電極用貫通孔２１の大きさは素子固着電極部２０上に載置される発熱素子３１よりは大きい正方形、円、楕円、あるいは多角形等の形に形成される。一例として、素子固着電極用貫通孔２１の形状は、上面および底面開口の径は２．２〜２．３ｍｍであり、高さは２．０ｍｍの長方形状である。素子固着電極用貫通孔２１の形状はレーザの描画により任意の形状に選択ができ、発熱素子３１よりは大きい正方形、長方形、円、楕円、あるいは多角形等の任意の形に選べる。   The element fixing electrode through hole 21 formed by the laser via processing method is a vertical surface 21a having a flat side wall. The through-hole 21 for the element fixing electrode is formed in a shape such as a square, a circle, an ellipse, or a polygon larger than that of the heating element 31 placed on the element fixing electrode portion 20. As an example, the shape of the through hole 21 for element fixing electrode is a rectangular shape with the diameters of the top and bottom openings being 2.2 to 2.3 mm and the height being 2.0 mm. The shape of the element fixing electrode through-hole 21 can be selected to be an arbitrary shape by drawing with a laser, and can be selected to be an arbitrary shape such as a square, rectangle, circle, ellipse, or polygon larger than the heating element 31.

第４工程（図４（Ｄ））では、第１および第２の導電箔１１、１２の表面をフィルム４０、４１で被覆する。   In the fourth step (FIG. 4D), the surfaces of the first and second conductive foils 11 and 12 are covered with films 40 and 41.

フィルム４０、４１としては、例えばドライフィルムを用いる。本実施形態では、一例としてリストン社 ＦＲＡ０６３シリーズを採用した。   As the films 40 and 41, for example, dry films are used. In this embodiment, the Liston FRA063 series is adopted as an example.

ホトレジストをフィルム状にしたフィルム４０、４１を第１および第２の導電箔１１、１２の表面に貼り付ける。この際、第１の導電箔１１は、素子固着電極部２０が形成される予定の領域とその周辺部を除いてフィルム４０で被覆される。なお、図示はしないが、第１の導電箔１１の表面に貼付されるフィルム４０は、素子固着電極部２０が形成される予定の領域を完全に覆って貼付することもできる。この場合には、後述の第５工程のメッキ液が素子固着電極用貫通孔２１内に入る大きさの開口部を設けてフィルム４０で被覆される。   Films 40 and 41 in which a photoresist is formed into a film are affixed to the surfaces of the first and second conductive foils 11 and 12. At this time, the first conductive foil 11 is covered with the film 40 except for a region where the element fixing electrode portion 20 is to be formed and its peripheral portion. Although not shown, the film 40 attached to the surface of the first conductive foil 11 can also be attached so as to completely cover the region where the element fixing electrode portion 20 is to be formed. In this case, the plating solution in the fifth step, which will be described later, is provided with an opening having a size that can enter the through hole 21 for the element fixing electrode and is covered with the film 40.

第５工程（図４（Ｅ））では、銅の電解メッキにより素子固着電極用貫通孔２１の底面に露出した第２の導電箔１２の裏面に銅メッキ層２２を形成し、素子固着電極用貫通孔２１を埋設する。   In the fifth step (FIG. 4E), a copper plating layer 22 is formed on the back surface of the second conductive foil 12 exposed on the bottom surface of the through hole 21 for element fixing electrode by electrolytic plating of copper, and used for the element fixing electrode. The through hole 21 is embedded.

本工程は、本発明の特徴とする工程であり、第１の導電箔１１の素子固着電極部２０が形成される予定の領域とその周辺部を除いてフィルム４０で覆い、第２の導電箔１２はその表面をフィルム４１で覆い、第２の導電箔１２のみをマイナス電極して電解メッキを行うことに特徴がある。これにより、素子固着電極用貫通孔２１の底面に露出した第２の導電箔１２の裏面のみが電解メッキの電極として働き、ここにのみ銅メッキ層２２が析出され、時間とともに成長して素子固着電極用貫通孔２１を埋設する。   This step is a step that is a feature of the present invention. The second conductive foil is covered with the film 40 except for the region where the element fixing electrode portion 20 of the first conductive foil 11 is to be formed and its peripheral portion. 12 is characterized in that the surface is covered with a film 41 and only the second conductive foil 12 is subjected to electroplating with a negative electrode. As a result, only the back surface of the second conductive foil 12 exposed at the bottom surface of the through hole 21 for element fixing electrode serves as an electrode for electrolytic plating, and the copper plating layer 22 is deposited only here, and grows with time to fix the element. The electrode through-hole 21 is embedded.

これは通常のスルーホールメッキでは両面の導電箔をマイナス電極として働かせ銅の電解メッキを行っているのと著しく異なっている。詳しくは、パラジウムなどの溶液に基板を浸漬した後に銅の無電解メッキをしてから電解メッキを行い、両面の導電箔から銅メッキ層の成長を行うので、貫通孔の入口側から銅メッキ層が成長するので、貫通孔を銅メッキ層で埋設することは難しい。   This is very different from ordinary through-hole plating in which copper electroplating is performed by using the conductive foils on both sides as negative electrodes. Specifically, after immersing the substrate in a solution such as palladium, electroless plating of copper is performed, and then the copper plating layer is grown from the conductive foil on both sides. Therefore, it is difficult to bury the through hole with a copper plating layer.

本工程では、電解メッキは、第２の導電箔１２のみをマイナス電極に接続して行い、素子固着電極用貫通孔２１の底部側に露出する第２の導電箔１２の裏面から上方向のみに銅メッキ層２２を徐々に成長させる。本実施形態では、電解メッキの条件の一例として、電解銅メッキ液で、電流密度を４０Ａとすると、時間当たり２５〜３０μｍの銅メッキ層２２を析出できる。銅メッキ層２２は素子固着電極用貫通孔２１を充填するために、素子固着電極用貫通孔２１を覆うフィルム４０からキノコ状に飛び出るまで電解メッキを継続して行い、フィルム４０の表面より飛び出た形状で終了する。   In this step, the electrolytic plating is performed by connecting only the second conductive foil 12 to the negative electrode, and only upward from the back surface of the second conductive foil 12 exposed on the bottom side of the element fixing electrode through hole 21. The copper plating layer 22 is gradually grown. In the present embodiment, as an example of the conditions for electrolytic plating, when the current density is 40 A with an electrolytic copper plating solution, a copper plating layer 22 of 25 to 30 μm per hour can be deposited. The copper plating layer 22 continued to be electroplated until it popped out in a mushroom shape from the film 40 covering the element fixing electrode through-hole 21 in order to fill the element fixing electrode through-hole 21 and jumped out of the surface of the film 40. Finish with shape.

本工程では、第２の導電箔１２の裏面から上方向のみに銅メッキ層２２を徐々に成長させるため、従来のスルーホールメッキのようにボイドが発生することもなくなる。   In this step, since the copper plating layer 22 is gradually grown upward only from the back surface of the second conductive foil 12, no voids are generated as in conventional through-hole plating.

従って、銅メッキ層２２は、素子固着電極用貫通孔２１を充填する形になり、上面および底面で第１および第２の導電箔１１、１２と一体化した純銅の塊になり、ヒートシンクとしての働きを可能にする。   Accordingly, the copper plating layer 22 fills the element fixing electrode through-hole 21 and becomes a lump of pure copper integrated with the first and second conductive foils 11 and 12 on the top and bottom surfaces, and serves as a heat sink. Make work possible.

第６工程（図５（Ｆ））では、第１の導電箔１１上のフィルム４０および素子固着電極用貫通孔２１より突出した銅メッキ層２２を機械的に研削し、その表面を平坦にする。   In the sixth step (FIG. 5F), the copper plating layer 22 protruding from the film 40 on the first conductive foil 11 and the element fixing electrode through hole 21 is mechanically ground to flatten the surface. .

セラミック刃のグラインダーを用いて機械的に研削し、キノコ状に突出した銅メッキ層２２と第１の導電箔１１上のフィルム４０との高さを略平坦にする。この際、銅メッキ層２２の表面が略平坦になればよく、第１の導電箔１１の表面と同等の高さになるまで研削する必要はない。   The height of the copper plating layer 22 protruding like a mushroom and the film 40 on the first conductive foil 11 is made approximately flat by mechanical grinding using a grinder of a ceramic blade. At this time, it is only necessary that the surface of the copper plating layer 22 be substantially flat, and it is not necessary to grind until the height becomes equal to the surface of the first conductive foil 11.

この研削後には機械的研削により生じた表面の歪を除去するためと表面をより平坦化するために薄めのエッチング液で軽くエッチングを行う。この処理をフラッシュエッチングとも呼んでいる。   After this grinding, light etching is performed with a thin etching solution in order to remove surface distortion caused by mechanical grinding and to make the surface more flat. This process is also called flash etching.

この工程では、１００μｍ以上の厚さの銅メッキ層２２であっても、その表面の５μｍ以下の凹凸に平坦化できるので、その上に発熱素子を固着できる純銅の素子固着電極部２０を実現できる。   In this step, even if the copper plating layer 22 has a thickness of 100 μm or more, since it can be flattened to the unevenness of 5 μm or less on the surface thereof, a pure copper element fixing electrode portion 20 on which a heating element can be fixed can be realized. .

第７工程（図５（Ｇ））では、第１および第２の導電箔１１、１２の表面のフィルム４０、４１を除去する。   In the seventh step (FIG. 5G), the films 40 and 41 on the surfaces of the first and second conductive foils 11 and 12 are removed.

苛性ソーダ溶液を用いて、表面フィルム４０、４１の溶解除去を行い、第１および第２の導電箔１１、１２の表面を露出する。   Using the caustic soda solution, the surface films 40 and 41 are dissolved and removed, and the surfaces of the first and second conductive foils 11 and 12 are exposed.

第８工程（図５（Ｈ））では、第１の導電箔１１、第２の導電箔１２、および絶縁基板１０を貫通するスルーホール孔１５、１６を形成する。   In the eighth step (FIG. 5H), through-hole holes 15 and 16 penetrating the first conductive foil 11, the second conductive foil 12, and the insulating substrate 10 are formed.

本工程では、絶縁基板１０の端部に予定のスルーホール孔１５、１６が形成される。スルーホール孔１５、１６はルーター加工により０．２ｍｍ程度の径に形成される。   In this step, planned through-hole holes 15 and 16 are formed at the end of the insulating substrate 10. The through-hole holes 15 and 16 are formed to have a diameter of about 0.2 mm by router processing.

第９工程（図５（Ｉ））では、スルーホールメッキにより第１の導電箔１１および第２の導電箔１２、スルーホール孔１５、１６の内壁にスルーホールメッキ層を形成する。   In the ninth step (FIG. 5I), a through-hole plating layer is formed on the inner walls of the first conductive foil 11, the second conductive foil 12, and the through-hole holes 15 and 16 by through-hole plating.

絶縁基板１０の全体をパラジウム溶液に浸漬して、第１の導電箔１１および第２の導電箔１２表面と、スルーホール孔１５、１６内にＣｕの無電解メッキを施し、更にＣｕの電解メッキを施して、約２０μｍの膜厚のスルーホールメッキ層を形成する。   The entire insulating substrate 10 is immersed in a palladium solution, and the electroless plating of Cu is performed on the surfaces of the first conductive foil 11 and the second conductive foil 12 and the through-hole holes 15 and 16, and further the electrolytic plating of Cu To form a through-hole plating layer having a thickness of about 20 μm.

スルーホールメッキ層は、スルーホール孔１５、１６の側壁に露出した絶縁基板１０表面を覆う。またスルーホールメッキ層は、第１の導電箔１１表面および第２の導電箔１２表面に形成され、これらと一体化して絶縁基板１０の端部において第１の導電箔１１および第２の導電箔１２を接続する。   The through-hole plating layer covers the surface of the insulating substrate 10 exposed on the side walls of the through-hole holes 15 and 16. The through-hole plating layer is formed on the surface of the first conductive foil 11 and the surface of the second conductive foil 12, and is integrated with these through the first conductive foil 11 and the second conductive foil at the end of the insulating substrate 10. 12 is connected.

スルーホールメッキ層は、前述の第６工程で機械的に研削された素子固着電極用貫通孔２１の銅メッキ層２２の微細な凹凸を被覆して第１の導電箔１１表面を平坦にする蓋メッキ層としての役割もある。   The through-hole plating layer is a lid that covers the fine irregularities of the copper plating layer 22 of the through-hole 21 for the element fixing electrode mechanically ground in the sixth step and flattens the surface of the first conductive foil 11. There is also a role as a plating layer.

第１０工程（図５（Ｊ））では、第１電極部１３、素子固着電極部２０及び第２電極部１４に選択的に導電性金属層２３を電解メッキにより付着する。導電性金属層２３は、ボンディング可能で硬度の高い多層金属層である。ここでは例えば、ニッケル（Ｎｉ）−金（Ａｕ）層またはＮｉ−Ａｇ層である。また、パラジウム（Ｐｄ）などを用いたＮｉ−Ｐｄ層やＡｇ−Ｐｄ層であってもよい。Ｎｉ層は硬度が高い金属層であり、Ａｕ層またはＡｇ層は金属細線２８とのボンディングを可能とする。   In the tenth step (FIG. 5J), the conductive metal layer 23 is selectively attached to the first electrode portion 13, the element fixing electrode portion 20, and the second electrode portion 14 by electrolytic plating. The conductive metal layer 23 is a multilayer metal layer that can be bonded and has high hardness. Here, for example, a nickel (Ni) -gold (Au) layer or a Ni-Ag layer. Further, a Ni—Pd layer or an Ag—Pd layer using palladium (Pd) or the like may be used. The Ni layer is a metal layer having a high hardness, and the Au layer or the Ag layer can be bonded to the metal thin wire 28.

ここでは、発熱素子を固着する素子固着電極部２０の中央部と、第１電極部１３のボンディングを行う領域と、第２電極部１４で表面実装を行う領域を露出してレジスト層（図示せず）で覆い、電解メッキが行われる。ニッケル層は約５μｍ、金、銀あるいはパラジウム層は約０．２μｍに形成される。金、銀あるいはパラジウム層はボンディングを可能にするとともに発光素子のリフレクタとしての働きも有している。   Here, a resist layer (not shown) is exposed by exposing the central portion of the element fixing electrode portion 20 for fixing the heat generating element, the region for bonding the first electrode portion 13, and the region for surface mounting by the second electrode portion 14. ) And electrolytic plating is performed. The nickel layer is formed with a thickness of about 5 μm, and the gold, silver or palladium layer is formed with a thickness of about 0.2 μm. The gold, silver, or palladium layer enables bonding and has a function as a reflector of the light emitting element.

なお、本工程でスルーホール孔１５、１６はメッキ液の侵入を防ぐために石膏などの絶縁物で埋めると良い。   In this process, the through-hole holes 15 and 16 are preferably filled with an insulating material such as gypsum to prevent the plating solution from entering.

第１１工程（図６（Ｋ））では、第１および第２の導電箔１１、１２を所望のパターンにエッチングして第１電極部１３と第２電極部１４を形成する。   In the eleventh step (FIG. 6K), the first and second conductive foils 11 and 12 are etched into a desired pattern to form the first electrode portion 13 and the second electrode portion 14.

本工程では、第１電極部１３および第２電極部１４をレジスト層（図示せず）で被覆し、レジスト層をマスクとして第１の導電箔１１および第２の導電箔１２のエッチングを行う。これにより分離溝２７、２８が形成され、第１電極部１３および第２電極部１４がパターンニングされる。   In this step, the first electrode portion 13 and the second electrode portion 14 are covered with a resist layer (not shown), and the first conductive foil 11 and the second conductive foil 12 are etched using the resist layer as a mask. Thereby, separation grooves 27 and 28 are formed, and the first electrode portion 13 and the second electrode portion 14 are patterned.

このエッチングでは塩化第２鉄溶液を用いる。続いて、レジスト層の剥離除去を行う。   In this etching, a ferric chloride solution is used. Subsequently, the resist layer is peeled and removed.

これにより、発熱素子３１を固着する素子固着電極部２０と第１電極部１３および第２電極部１４で形成される取り出し電極１３ａおよび裏面実装電極１４ｂとが形成され、各発熱素子３１が載置されるセルのパターンが行列状に多数個形成される。各セルのパターンの形状についてはすでに図２（Ａ）を参照して説明しているので、ここでは省略する。   As a result, the element fixing electrode part 20 for fixing the heat generating element 31 and the extraction electrode 13a and the back surface mounting electrode 14b formed by the first electrode part 13 and the second electrode part 14 are formed, and each heating element 31 is placed. A large number of cell patterns are formed in a matrix. The shape of each cell pattern has already been described with reference to FIG.

以上で本発明の実装基板が完成される。以下はその実装基板を用いた発光素子などを発熱素子として組み込む製造方法を説明している。   Thus, the mounting board of the present invention is completed. The following describes a manufacturing method in which a light emitting element or the like using the mounting substrate is incorporated as a heating element.

第１２工程（図６（Ｌ））では、素子固着電極部２０上に発熱素子３１を固着する。   In the twelfth step (FIG. 6L), the heating element 31 is fixed on the element fixing electrode portion 20.

発熱素子３１の下面の第２電極３３を導電接着剤３４で素子固着電極部２０上に固着する。発熱素子３１の固着にはチップマウンターを用いる。発熱素子３１が実際に固着されるのは、素子固着電極部２０上に積層された導電性金属層２３（２３ｂ）である。   The second electrode 33 on the lower surface of the heating element 31 is fixed on the element fixing electrode portion 20 with the conductive adhesive 34. A chip mounter is used for fixing the heating element 31. The heating element 31 is actually fixed to the conductive metal layer 23 (23b) laminated on the element fixing electrode portion 20.

発熱素子３１としては高効率のＬＥＤのほかに、トランジスタ、パワーＭＯＳ半導体素子、ＩＧＢＴ、パワー集積回路等も含まれる。   The heating element 31 includes a transistor, a power MOS semiconductor element, an IGBT, a power integrated circuit, and the like in addition to a highly efficient LED.

導電接着剤３４は、例えば銀（Ａｇ）などの導電性ペーストを用いる。また、発熱素子３１は、素子固着電極部２０上に金（Ａｕ）メッキを施し、Ａｕ共晶により固着してもよく、その場合は別途Ａｕメッキを行う。   As the conductive adhesive 34, for example, a conductive paste such as silver (Ag) is used. Further, the heating element 31 may be gold (Au) plated on the element fixing electrode portion 20 and fixed by Au eutectic, and in that case, Au plating is separately performed.

第１３工程（図６（Ｍ））では、発熱素子の上面の第１電極３２と取り出し電極１３ａとを金属細線３０で接続する。   In the thirteenth step (FIG. 6M), the first electrode 32 on the upper surface of the heating element and the extraction electrode 13a are connected by the thin metal wire 30.

金の金属細線３０を用いてボンダーで電極の位置をパターン認識しながら超音波熱圧着により、発熱素子３１の第１電極３２と、取り出し電極１３ａ上を被覆する導電性金属層２３ａとを接続する。   The first electrode 32 of the heating element 31 is connected to the conductive metal layer 23a covering the extraction electrode 13a by ultrasonic thermocompression bonding while recognizing the position of the electrode with a bonder using a gold fine metal wire 30. .

第１４工程（図６（Ｎ））では、発熱素子３１及び金属細線３０を透明樹脂で被覆する。   In the fourteenth step (FIG. 6N), the heat generating element 31 and the fine metal wire 30 are covered with a transparent resin.

発熱素子３１および金属細線３０を透明樹脂３５で被覆する。透明樹脂は、発熱素子３１および金属細線３０を外気より保護し、また光を散乱させるレンズとしても働く。   The heating element 31 and the fine metal wire 30 are covered with a transparent resin 35. The transparent resin protects the heating element 31 and the fine metal wire 30 from the outside air, and also functions as a lens that scatters light.

第１５工程（図６（Ｎ））では、実装を完了した各セルを矢印で示したダイシングラインでダイシングして個別の発光装置に分離する。   In the fifteenth step (FIG. 6N), each cell that has been mounted is diced along a dicing line indicated by an arrow, and separated into individual light emitting devices.

図２に示すように、絶縁基板１０には多数個のセルが行列状に配列される。また、図３示すように各セル間のダイシングライン上にはスルーホール孔１５a、１５ｂ、１６a、１６bが重ねて設けてある。そして、絶縁基板１０に行列状に配列された多数個のセルをプダイシングにより個別の完成した発光装置５０に分離する。このときにスルーホール孔１５a、１５ｂ、１６a、１６bもダイシングされ、夫々のセルにサイドスルーホールの形状で残る。   As shown in FIG. 2, a large number of cells are arranged in a matrix on the insulating substrate 10. Further, as shown in FIG. 3, through-hole holes 15a, 15b, 16a, 16b are provided on the dicing line between the cells. Then, a large number of cells arranged in a matrix on the insulating substrate 10 are separated into individual completed light emitting devices 50 by pudicing. At this time, the through-hole holes 15a, 15b, 16a and 16b are also diced and remain in the shape of side through-holes in the respective cells.

具体的には、実装基板１の周辺にある位置合わせ孔５でダイシング時の位置決めをし、対向するマーク７でダイシングラインを特定してダイシングを行う。この結果、実装基板１に行列状に多数個埋め込まれたヒートシンクとなる素子固着電極部２０に発熱素子３１を大量に実装できる。   Specifically, positioning is performed at the time of dicing with the alignment holes 5 around the mounting substrate 1, and dicing is performed by specifying dicing lines with the opposed marks 7. As a result, a large number of heat generating elements 31 can be mounted on the element fixing electrode portion 20 serving as a heat sink embedded in a matrix in the mounting substrate 1.

本発明の実装基板に実装された発熱素子を組み込んだ半導体装置はダイシングで個別の半導体装置に分離され、筐体などを構成するステンレスや鉄の金属板やセラミック基板の上に貼り付けられた高放熱性のプリント基板やフィルム基板のマザー基板に表面実装されて組み込まれる。これにより、本発明の半導体装置では発熱素子３１からの熱が一旦素子固着電極部２０に伝達され、その熱が素子固着電極部２０から拡散して、マザー基板を介して機器の筐体などで作られる大型の放熱板に伝えられて熱を外部に逃がす。   A semiconductor device incorporating a heating element mounted on a mounting substrate of the present invention is separated into individual semiconductor devices by dicing, and is attached to a stainless steel or iron metal plate or a ceramic substrate constituting a housing or the like. It is mounted on the surface of a mother board such as a heat-radiating printed board or a film board. As a result, in the semiconductor device of the present invention, heat from the heating element 31 is once transmitted to the element fixing electrode portion 20, and the heat diffuses from the element fixing electrode portion 20 and is transmitted through the mother substrate and the like of the device casing. It is transmitted to the large heat sink that is made and releases heat to the outside.

〔実施例２〕
以下に本実施の形態の他の一例として、ＮＣ工作機（ＮＣルーター）を用いた切削加工で実装基板を製造する方法を説明する。なお、工程の一部は前述の実施例１の工程と重複するため、ここでは異なる工程のみを詳細に説明していく。 [Example 2]
As another example of the present embodiment, a method for manufacturing a mounting board by cutting using an NC machine tool (NC router) will be described below. In addition, since a part of process overlaps with the process of the above-mentioned Example 1, only a different process is demonstrated in detail here.

第１工程（図７（Ａ））では、一の主面には第１の導電箔が貼着された絶縁基板を準備する。   In the first step (FIG. 7A), an insulating substrate having a first conductive foil attached to one main surface is prepared.

一の主面に銅などの第１の導電箔１１を貼着した絶縁基板１０を準備する。   An insulating substrate 10 in which a first conductive foil 11 such as copper is bonded to one main surface is prepared.

本実施形態では、絶縁基板１０の一例として厚さｔ１が６０μｍ程度のＢＴ樹脂基板を採用した。第１の導電箔１１はエッチングが可能な金属であればよく、本実施形態では銅から成る金属箔を採用し、その膜厚は９μｍ〜３５μｍ（例えば１３μｍ）程度である。   In this embodiment, a BT resin substrate having a thickness t1 of about 60 μm is employed as an example of the insulating substrate 10. The first conductive foil 11 may be any metal that can be etched. In the present embodiment, a metal foil made of copper is used, and the film thickness is about 9 μm to 35 μm (for example, 13 μm).

第２工程（図７（Ｂ））では、第１の導電箔１１および絶縁基板１０を選択的に切削して素子固着電極用貫通孔２１を形成する。   In the second step (FIG. 7B), the first conductive foil 11 and the insulating substrate 10 are selectively cut to form the through hole 21 for the element fixing electrode.

素子固着電極用貫通孔２１が形成される予定の領域を選択的に切削する。ここでは、ＮＣ工作機（ＮＣルーター）を用いてリーマーにより切削加工する。リーマーに限らず、エンドミルやドリルによる切削でもよい。   A region where the element fixing electrode through hole 21 is to be formed is selectively cut. Here, cutting is performed by a reamer using an NC machine tool (NC router). Not limited to reamers, cutting with an end mill or a drill may be used.

本実施形態では、ルーターにより正確且つ容易に、素子固着電極用貫通孔２１を機械的に形成することができる。また、素子固着電極用貫通孔２１は、その側壁２１ａが垂直面となる。素子固着電極用貫通孔２１の幅は素子固着電極部２０に固着される発熱素子３１よりは大きい正方形、円、楕円、あるいは多角形等の形に形成される。一例として、素子固着電極用貫通孔２１の形状は、上面および下面開口の径は２．２〜２．３ｍｍであり、高さは２．０ｍｍの長方形状である。   In the present embodiment, the element fixing electrode through hole 21 can be mechanically formed accurately and easily by the router. Further, the side wall 21a of the element fixing electrode through hole 21 is a vertical surface. The width of the through hole 21 for element fixing electrode is formed in a shape such as a square, a circle, an ellipse, or a polygon larger than that of the heating element 31 fixed to the element fixing electrode portion 20. As an example, the shape of the through hole 21 for element fixing electrode is a rectangular shape in which the diameters of the upper and lower surface openings are 2.2 to 2.3 mm and the height is 2.0 mm.

第３工程（図７（Ｃ））では、第２の導電箔１２をボンディングシート１８で貼着する。   In the third step (FIG. 7C), the second conductive foil 12 is attached with the bonding sheet 18.

本工程では、第２の導電箔１２を絶縁基板１０の第１の導電箔１１を設けた反対主面にボンディングシート１８で貼着する。この結果、素子固着電極用貫通孔２１の底面に第２の導電箔１２の裏面の一部が露出するビアホールを形成できる。この露出した第２の導電箔１２は第５工程で電解メッキする際にマイナス電極に接続する。なお、素子固着電極用貫通孔２１の底面にあるボンディングシート１８はレーザエッチングで除去する。   In this step, the second conductive foil 12 is bonded to the opposite main surface of the insulating substrate 10 on which the first conductive foil 11 is provided with the bonding sheet 18. As a result, a via hole in which a part of the back surface of the second conductive foil 12 is exposed can be formed on the bottom surface of the element fixing electrode through hole 21. The exposed second conductive foil 12 is connected to the negative electrode when electrolytic plating is performed in the fifth step. The bonding sheet 18 on the bottom surface of the element fixing electrode through hole 21 is removed by laser etching.

第４工程（図７（Ｄ））では、第１および第２の導電箔１１、１２の表面をフィルム４０、４１で被覆する。   In the fourth step (FIG. 7D), the surfaces of the first and second conductive foils 11 and 12 are covered with films 40 and 41.

本実施形態では、一例としてリストン社 ＦＲＡ０６３シリーズを採用した。   In this embodiment, the Liston FRA063 series is adopted as an example.

ホトレジストをフィルム状にしたフィルム４０、４１を第１および第２の導電箔１１、１２の表面に貼り付ける際、第１の導電箔１１には素子固着電極部２０が形成される予定の領域とその周辺部を除いてフィルム４０で被覆する。なお、図示はしないが、素子載置部２０が形成される予定の領域上に重ねてフィルム４０を貼付することもできる。この場合には、後述の第５工程のメッキ液が素子固着電極用貫通孔２１内に入る大きさの開口部を除いてフィルム４０で被覆される。   When the films 40 and 41 in the form of a photoresist are attached to the surfaces of the first and second conductive foils 11 and 12, the first conductive foil 11 has a region where the element fixing electrode portion 20 is to be formed. The film 40 is covered except for its peripheral part. Although not shown in the figure, the film 40 can be stuck on the region where the element mounting portion 20 is to be formed. In this case, the plating solution in the fifth step, which will be described later, is covered with the film 40 except for an opening having a size that enters the through hole 21 for the element fixing electrode.

第５工程以降は実施例１と同じであるので説明を省略する。ただし、ボンディング１８は省略されている。   Since the fifth and subsequent steps are the same as those in the first embodiment, description thereof is omitted. However, the bonding 18 is omitted.

１ 実装基板
２ 枠部
５ 位置合わせ孔
７ マーク
１０ 絶縁基板
１１ 第１の導電箔
１２ 第２の導電箔
１３ 第１電極部
１４ 第２電極部
２０ 素子載置部
２１ 素子載置用貫通孔
２２ メッキ層
２３、２３ａ、２４ａ、２４ｂ、２４ｅ 導電性金属層
２７、２８ 分離溝
３０ 金属細線
３１ 発熱素子
３２ 第１電極
３３ 第２電極
３４ 接着剤
３５ 透明樹脂
４０、４１ フィルム
５０ 発光装置 DESCRIPTION OF SYMBOLS 1 Mounting substrate 2 Frame part 5 Alignment hole 7 Mark 10 Insulating substrate 11 1st conductive foil 12 2nd conductive foil 13 1st electrode part 14 2nd electrode part 20 Element mounting part 21 Through hole 22 for element mounting Plating layer 23, 23a, 24a, 24b, 24e Conductive metal layer 27, 28 Separation groove 30 Metal wire 31 Heating element 32 First electrode 33 Second electrode 34 Adhesive 35 Transparent resin 40, 41 Film 50 Light emitting device

本発明の実装基板は、絶縁基板の両主面に設けた第１の導電箔および第２の導電箔と、行列状に多数個配列された前記絶縁基板を貫通し前記第２の導電箔の裏面をその底部に露出する素子固着電極用貫通孔と、前記各素子固着電極用貫通孔を充填し、前記素子固着電極用貫通孔の底部の前記第２の導電箔の裏面から前記第１の導電箔表面まで成長した電解メッキ層で形成された素子固着電極部と、前記第１の導電箔で所望のパターンに形成された第１電極部と、前記第２の導電箔で所望のパターンに形成された第２電極部とを具備することを特徴とする。
The mounting substrate of the present invention includes a first conductive foil and a second conductive foil provided on both main surfaces of the insulating substrate, and a plurality of the insulating substrates arranged in a matrix and passing through the insulating substrate. The element fixing electrode through-hole exposing the back surface at the bottom thereof and the element fixing electrode through-hole are filled, and the first conductive foil at the bottom of the element fixing electrode through-hole is formed from the back surface of the second conductive foil. An element fixing electrode portion formed of an electrolytic plating layer grown to the surface of the conductive foil, a first electrode portion formed in a desired pattern with the first conductive foil, and a desired pattern with the second conductive foil characterized by comprising a second electrode portion formed.

また、本発明の実装基板の製造方法は、両主面には第１の導電箔および第２の導電箔が貼着された絶縁基板を準備する工程と、素子固着電極部を形成する領域の前記第１の導電箔を選択的に除去し、前記絶縁基板を露出する工程と、前記絶縁基板を選択的にドライエッチングして素子固着電極用貫通孔を形成し、前記第２の導電箔の裏面を検出してドライエッチングを停止し、前記素子固着電極用貫通孔の底面に前記第２の導電箔の裏側を露出した素子固着電極用貫通孔を形成する工程と、前記第１および前記第２の導電箔の表面をフィルムで被覆する工程と、電解メッキにより前記素子固着電極用貫通孔に底部側に露出する前記第２の導電箔の裏面から上方向のみに銅メッキ層を形成し、前記銅メッキ層で前記素子固着電極用貫通孔を充填する工程と、前記銅メッキ層の表面を平坦に研削し、平坦化する工程と、前記第１および第２の導電箔を所望のパターンにエッチングして第１電極部と第２電極部を形成する工程とを具備することを特徴とする。
The mounting substrate manufacturing method of the present invention includes a step of preparing an insulating substrate having a first conductive foil and a second conductive foil attached to both main surfaces, and a region for forming an element fixing electrode portion. Selectively removing the first conductive foil to expose the insulating substrate; and selectively etching the insulating substrate to form through holes for element fixing electrodes; Detecting a back surface to stop dry etching, and forming a through hole for an element fixing electrode in which the back side of the second conductive foil is exposed at a bottom surface of the through hole for the element fixing electrode; a step of coating the surface of the second conductive foil with a film, by electrolytic plating to form a copper plated layer only in the upward direction from the rear surface of the second conductive foil exposed on the bottom side of the element anchoring electrode through hole And filling the through hole for the element fixing electrode with the copper plating layer That a step, the flat grinding surface of the copper plating layer, planarizing, before Symbol the first and second conductive foil and the first electrode portion is etched into a desired pattern and the second electrode portion And a forming step.

更に、本発明の実装基板の製造方法は、一主面に第１の導電箔が貼着された絶縁基板を準備する工程と、素子固着電極部を形成する領域の前記絶縁基板にルーター加工により貫通する素子固着電極用貫通孔を形成する工程と、前記絶縁基板の反対主面に第２の導電箔を貼着し、前記素子固着電極用貫通孔の底面に前記第２の導電箔の裏面側を露出させる工程と、前記第１および前記第２の導電箔の表面をフィルムで被覆する工程と、電解メッキにより前記素子固着電極用貫通孔に底部側に露出する前記第２の導電箔の裏面から上方向のみに銅メッキ層を形成し、前記銅メッキ層で前記素子固着電極用貫通孔を充填する工程と、前記銅メッキ層の表面を平坦に研削し、平坦化する工程と、前記第１および第２の導電箔を所望のパターンにエッチングして第１電極部と第２電極部を形成する工程とを具備することを特徴とする。
Furthermore, the manufacturing method of the mounting substrate according to the present invention includes a step of preparing an insulating substrate having a first conductive foil attached to one main surface, and a router process on the insulating substrate in a region where an element fixing electrode portion is formed. A step of forming a through hole for the element fixing electrode penetrating, a second conductive foil is adhered to the opposite main surface of the insulating substrate, and the back surface of the second conductive foil is formed on the bottom surface of the through hole for the element fixing electrode exposing a side, said first and said the step of the surface of the second conductive foil is coated with a film, said second conductive foil to the electrolytic plating is exposed on the bottom side of the element anchoring electrode through hole Forming a copper plating layer only in the upward direction from the back surface, filling the element fixing electrode through hole with the copper plating layer, grinding the surface of the copper plating layer flatly, and flattening , etch front Symbol first and second conductive foil into a desired pattern Characterized by comprising the step of forming the first electrode portion and the second electrode portion grayed.

Claims (10)

絶縁基板の両主面に設けた第１の導電箔および第２の導電箔と、
行列状に多数個配列された前記絶縁基板を貫通し前記第２の導電箔の裏面をその底部に露出する素子固着電極用貫通孔と、
前記各素子固着電極用貫通孔を充填し、前記素子固着電極用貫通孔の底部の前記第２の導電箔の裏面から前記第１の導電箔表面まで成長した電解メッキ層で形成された素子固着電極部と、
前記第１の導電箔で所望のパターンに形成された第１電極部と、
前記第２の導電箔で所望のパターンに形成された第２電極部と、
前記第１電極部と第２の電極部とを接続するスルーホールメッキ層とを具備することを特徴とする実装基板。 A first conductive foil and a second conductive foil provided on both main surfaces of the insulating substrate;
A through hole for an element fixing electrode penetrating the insulating substrate arranged in a matrix and exposing the back surface of the second conductive foil at the bottom;
Element fixing formed by an electrolytic plating layer filling each element fixing electrode through hole and growing from the back surface of the second conductive foil to the surface of the first conductive foil at the bottom of the through hole for element fixing electrode An electrode part;
A first electrode portion formed in a desired pattern with the first conductive foil;
A second electrode portion formed in a desired pattern with the second conductive foil;
A mounting board comprising a through-hole plating layer for connecting the first electrode part and the second electrode part. 前記素子固着電極部はその上に載置される発熱素子よりも大きく形成されることを特徴とする請求項１に記載の実装基板。   The mounting substrate according to claim 1, wherein the element fixing electrode portion is formed larger than a heating element mounted thereon. 前記素子固着電極部の体積はその上に載置される発熱素子の発熱により前記絶縁基板の厚みを選択して変えることを特徴とする請求項１に記載の実装基板。   The mounting substrate according to claim 1, wherein the volume of the element fixing electrode portion is changed by selecting a thickness of the insulating substrate by heat generation of a heating element mounted thereon. 前記各素子固着電極部、前記各第１電極部および前記各第２電極部はダイシングラインで囲まれていることを特徴とする請求項１に記載の実装基板。   2. The mounting substrate according to claim 1, wherein each of the element fixing electrode portions, each of the first electrode portions, and each of the second electrode portions is surrounded by a dicing line. 両主面には第１の導電箔および第２の導電箔が貼着された絶縁基板を準備する工程と、
素子固着電極部を形成する領域の前記第１の導電箔を選択的に除去し、前記絶縁基板を露出する工程と、
前記絶縁基板を選択的にドライエッチングして素子固着電極用貫通孔を形成し、前記第２の導電箔の裏面を検出してドライエッチングを停止し、前記素子固着電極用貫通孔の底面に前記第２の導電箔の裏側を露出した素子固着電極用貫通孔を形成する工程と、
前記第１および前記第２の導電箔の表面をフィルムで被覆する工程と、
前記第２の導電箔に通電して電解メッキにより前記素子固着電極用貫通孔に底部側に露出する前記第２の導電箔の裏面から上方向のみに銅メッキ層を形成し、前記銅メッキ層で前記素子固着電極用貫通孔を充填する工程と、
前記銅メッキ層の表面を平坦に研削し、平坦化する工程と、
前記第１の導電箔、前記第２の導電箔、および前記絶縁基板を貫通するスルーホール孔を形成する工程と、
スルーホールメッキにより前記第１の導電箔および前記第２の導電箔を接続するスルーホールメッキ層を形成する工程と、
前記第１および第２の導電箔を所望のパターンにエッチングして第１電極部と第２電極部を形成する工程とを具備することを特徴とする実装基板の製造方法。 A step of preparing an insulating substrate having a first conductive foil and a second conductive foil adhered to both main surfaces;
Selectively removing the first conductive foil in a region where an element fixing electrode portion is to be formed, and exposing the insulating substrate;
The insulating substrate is selectively dry etched to form a through hole for an element fixing electrode, the back surface of the second conductive foil is detected to stop dry etching, and the bottom surface of the through hole for the element fixing electrode is Forming a through hole for an element fixing electrode in which the back side of the second conductive foil is exposed;
Coating the surfaces of the first and second conductive foils with a film;
Forming a copper plating layer only upward from the back surface of the second conductive foil exposed to the bottom side of the through hole for the element fixing electrode by electroplating by energizing the second conductive foil; Filling the element fixing electrode through-hole with:
Grinding and flattening the surface of the copper plating layer; and
Forming a through-hole hole penetrating the first conductive foil, the second conductive foil, and the insulating substrate;
Forming a through-hole plating layer for connecting the first conductive foil and the second conductive foil by through-hole plating;
Etching the first and second conductive foils into a desired pattern to form a first electrode part and a second electrode part. 前記銅メッキ層で前記素子固着電極用貫通孔を充填する工程において、前記銅メッキ層は前記第１の導電箔に貼着した前記フィルム表面より突出させることを特徴とする請求項５に記載の実装基板の製造方法。   6. The step of filling the element fixing electrode through hole with the copper plating layer, wherein the copper plating layer is protruded from the surface of the film attached to the first conductive foil. Manufacturing method of mounting substrate. 前記銅メッキ層の表面を平坦に研削し、平坦化する工程において、前記銅メッキ層を研削後にフラッシュエッチングすることを特徴とする請求項５に記載の実装基板の製造方法。   6. The method of manufacturing a mounting board according to claim 5, wherein in the step of flattening and flattening the surface of the copper plating layer, the copper plating layer is flash-etched after grinding. 一主面に第１の導電箔が貼着された絶縁基板を準備する工程と、
素子固着電極を形成する領域の前記絶縁基板にルーター加工により貫通する素子固着電極用貫通孔を形成する工程と、
前記絶縁基板の反対主面に第２の導電箔を貼着し、前記素子固着電極用貫通孔の底面に前記第２の導電箔の裏面側を露出させる工程と、
前記第１および前記第２の導電箔の表面をフィルムで被覆する工程と、
前記第２の導電箔に通電して電解メッキにより前記素子固着電極用貫通孔に底部側に露出する前記第２の導電箔の裏面から上方向のみに銅メッキ層を形成し、前記銅メッキ層で前記素子固着電極用貫通孔を充填する工程と、
前記銅メッキ層の表面を平坦に研削し、平坦化する工程と、
前記第１の導電箔、前記第２の導電箔、および前記絶縁基板を貫通するスルーホール孔を形成する工程と、
スルーホールメッキにより前記第１の導電箔および前記第２の導電箔を接続するスルーホールメッキ層を形成する工程と、
前記第１および第２の導電箔を所望のパターンにエッチングして第１電極部と第２電極部を形成する工程とを具備することを特徴とする実装基板の製造方法。 Preparing an insulating substrate having a first conductive foil attached to one main surface;
Forming a through hole for an element fixing electrode penetrating through the insulating substrate in a region where an element fixing electrode is formed by router processing;
Adhering a second conductive foil to the opposite main surface of the insulating substrate, exposing the back side of the second conductive foil to the bottom surface of the through hole for the element fixing electrode;
Coating the surfaces of the first and second conductive foils with a film;
Forming a copper plating layer only upward from the back surface of the second conductive foil exposed to the bottom side of the through hole for the element fixing electrode by electroplating by energizing the second conductive foil; Filling the element fixing electrode through-hole with:
Grinding and flattening the surface of the copper plating layer; and
Forming a through-hole hole penetrating the first conductive foil, the second conductive foil, and the insulating substrate;
Forming a through-hole plating layer for connecting the first conductive foil and the second conductive foil by through-hole plating;
Etching the first and second conductive foils into a desired pattern to form a first electrode part and a second electrode part. 前記銅メッキ層で前記素子固着電極用貫通孔を充填する工程において、前記銅メッキ層は前記第１の導電箔に貼着した前記フィルム表面より突出させることを特徴とする請求項８に記載の実装基板の製造方法。   9. The method according to claim 8, wherein in the step of filling the element fixing electrode through-hole with the copper plating layer, the copper plating layer is protruded from the surface of the film adhered to the first conductive foil. Manufacturing method of mounting substrate. 前記銅メッキ層の表面を平坦に研削し、平坦化する工程において、前記銅メッキ層を研削後にフラッシュエッチングすることを特徴とする請求項８に記載の実装基板の製造方法。   9. The method of manufacturing a mounting board according to claim 8, wherein in the step of flattening and flattening the surface of the copper plating layer, the copper plating layer is flash etched after grinding.
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