JP4596846B2 - Circuit device manufacturing method - Google Patents

Circuit device manufacturing method Download PDF

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Publication number
JP4596846B2
JP4596846B2 JP2004222115A JP2004222115A JP4596846B2 JP 4596846 B2 JP4596846 B2 JP 4596846B2 JP 2004222115 A JP2004222115 A JP 2004222115A JP 2004222115 A JP2004222115 A JP 2004222115A JP 4596846 B2 JP4596846 B2 JP 4596846B2
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conductive
circuit device
convex portion
hole
forming
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JP2004222115A
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JP2006041376A (en
Inventor
優助 五十嵐
元一 根津
隆也 草部
貞道 高草木
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三洋電機株式会社
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
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    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09736Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01Tools for processing; Objects used during processing
    • H05K2203/0147Carriers and holders
    • H05K2203/0152Temporary metallic carrier, e.g. for transferring material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0369Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1476Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4658Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern characterized by laminating a prefabricated metal foil pattern, e.g. by transfer

Abstract

To provide a method of manufacturing a highly reliable circuit device realizing a smaller, thinner and lighter configuration. In the method of manufacturing a circuit device according to the invention, a resin sealed body is separated from a supporting substrate, after the resin sealed body containing a circuit device is formed on a top surface of the supporting substrate. Therefore, manufacture of a circuit device having no substrate becomes possible and it realizes a thinner and lighter circuit device with improved heat dissipation. Moreover, since sealing with a sealing resin can be performed on the supporting substrate, warps, caused by the differences in thermal expansion coefficients between the sealing resin and conductive patterns and between the sealing resin and circuit components, can be prevented. Hence, it becomes possible to prevent flaking of conductive patterns from the substrate and a poor contact between the conductive patterns and a metal thin wire, and consequently to manufacture a highly reliable circuit device.

Description

  The present invention relates to a method of manufacturing a circuit device, and more particularly to a method of manufacturing a circuit device that realizes a thin circuit device.

  Along with the downsizing and high functionality of electronic devices, miniaturization and high density are also required in circuit devices used therein. An example of a conventional method for manufacturing a circuit device will be described with reference to FIG. 9 (see Patent Document 1).

  First, referring to FIG. 9A, a contact hole 103 is formed with a laser or the like in a substrate 101 made of an insulating material such as a resin. Then, the plating film 102 is formed on both surfaces of the substrate 101 including the inside of the contact hole 103.

  Next, referring to FIG. 9B, the plating film 102 is etched to form the first conductive pattern 102A on the front surface of the substrate 101 and the second conductive pattern 102B on the back surface.

Referring to FIG. 9C, the semiconductor element 104 is placed on the first conductive pattern 102A, and the first conductive pattern 102A and the semiconductor element 104 are electrically connected through the thin metal wire 105. And it seals with the sealing resin 107 so that the semiconductor element 104, the metal fine wire 105, and the 1st conductive pattern 102A may be covered. Finally, the second conductive pattern 102B is covered with a solder resist 109, and external electrodes 108 are formed at predetermined locations. In this way, the circuit device 100 is manufactured.
JP 2002-26198 A

  However, in the circuit device manufacturing method described above, a glass epoxy substrate is used as the substrate 101, and is used to support the wiring in the manufacturing process. For this reason, there has been a problem of an increase in manufacturing cost and limitations of miniaturization, thinning, and weight reduction of the circuit device due to the thickness of the substrate 101. Furthermore, it has been pointed out that heat dissipation is deteriorated by using a glass epoxy substrate.

  Further, when the sealing resin 107 is cured, warpage is generated due to differences in thermal expansion coefficients between the substrate 101 and the sealing resin 107 and between the semiconductor element 104 and the sealing resin 107. As a result, there is a problem that the conductive pattern 102 is peeled off from the substrate 101, or the connection between the first conductive pattern 102B and the thin metal wire 105 is defective.

  Further, when a glass epoxy substrate is used as the substrate 101, it is indispensable to form the contact hole 103 for electrically connecting the electrodes on both sides, and there is a problem that the manufacturing process becomes long.

  Furthermore, when forming a conductive pattern through which a large current flows, the electric capacity is secured by increasing the area of the conductive pattern. Therefore, it is difficult to reduce the size of the circuit device.

  The present invention has been made in view of the above problems. A main object of the present invention is to provide a method of manufacturing a highly reliable circuit device that realizes a reduction in size, thickness and weight of the circuit device.

  The method of manufacturing a circuit device according to the present invention includes a step of forming a wiring layer including a first conductive pattern and a second conductive pattern formed thicker than the first conductive pattern on a surface of a support substrate, A step of electrically connecting the wiring layer and the circuit element; a step of sealing the upper surface of the support substrate with a sealing resin so as to cover the circuit element; and a back surface of the wiring layer and the sealing resin. Separating the substrate from the support substrate. Therefore, since a circuit device without a substrate can be manufactured, it is possible to reduce the manufacturing cost, reduce the thickness and weight of the circuit device, and improve the heat dissipation. Furthermore, since conductive patterns having different thicknesses can be formed in the same circuit device, it is possible to reduce the size of the circuit device by forming each conductive pattern corresponding to the required amount of current.

  The method for manufacturing a circuit device according to the present invention includes a step of forming a first wiring layer having a protrusion projecting in a thickness direction on a surface of a support substrate, and a conductive property to the first wiring layer through an insulating layer. A step of laminating a film, a step of forming a connecting portion for conducting the convex portion and the conductive film, a step of forming a second wiring layer by patterning the conductive film, and the second A step of electrically connecting the wiring layer and the circuit element, a step of sealing the upper surface of the support substrate with a sealing resin so as to cover the circuit element, the first wiring layer, the insulating layer, and the Separating the back surface of the sealing resin from the support substrate. Therefore, in addition to the effects described above, the high density of the circuit device has been realized by enabling multilayer wiring.

  According to the method for manufacturing a circuit device of the present invention, a circuit device without a substrate can be manufactured. Therefore, the circuit device can be made thinner, lighter, and improved in heat dissipation.

  Further, according to the method for manufacturing a circuit device of the present invention, since sealing with a sealing resin can be performed on the support substrate, the difference in thermal expansion coefficient between the sealing resin and the conductive foil and between the sealing resin and the circuit element Warpage can be prevented. Therefore, peeling of the conductive pattern and poor connection between the conductive pattern and the fine metal wire can be suppressed, so that a highly reliable circuit device can be manufactured.

  Furthermore, according to the method for manufacturing a circuit device of the present invention, it is possible to omit the formation of contact holes, which is necessary for a glass epoxy substrate, so that the manufacturing process can be greatly shortened.

  Furthermore, according to the method for manufacturing a circuit device of the present invention, since the conductive pattern through which a large current flows can be formed thick, the circuit device can be miniaturized.

  Furthermore, according to the method for manufacturing a circuit device of the present invention, the through hole can be provided in the insulating layer formed thin by embedding the convex portion. Therefore, it is possible to easily form a through hole in the insulating layer. Furthermore, since the through hole can be formed shallow, it is possible to easily form a plating film in the through hole. Furthermore, even when a multilayer wiring layer is laminated through an insulating layer mixed with a filler, it is possible to form a connection portion that penetrates the insulating layer and makes the wiring layers conductive.

<First Embodiment>
With reference to FIG. 1 and FIG. 2, the manufacturing method of the circuit device of 1st Embodiment is demonstrated.
First, referring to FIG. 1A, a conductive foil 13 is attached on a support substrate 11 via an adhesive 12. The conductive foil 13 is selected in consideration of the adhesion of the brazing material, bonding properties, and plating properties. As a specific material, a conductive foil using Cu as a main raw material, a conductive foil using Al as a main raw material, a conductive foil made of an alloy such as Fe-Ni, or the like is employed. Other conductive materials are also possible, and conductive materials that can be etched are particularly preferable. The thickness of the conductive foil 13 is about 10 μm to 300 μm. However, it is also possible to employ a conductive foil of 10 μm or less or 300 μm or more.

  As the adhesive 12, a thermoplastic resin, a UV sheet (a material whose adhesiveness decreases when irradiated with ultraviolet rays), or the like is employed. The adhesive 12 may be any material that can be dissolved in a solvent, made liquid by heating, or reduced in adhesiveness by ultraviolet irradiation.

  The support substrate 11 is made of a metal such as Cu or Al, or a material such as a resin, and has a strength or thickness that can support the conductive foil 13 flatly. When a UV sheet is used for the adhesive 12, it is preferable to use a transparent substrate such as glass or plastic.

  Referring to FIG. 1B, a resist 14 is patterned on the upper surface of conductive foil 13. Then, wet etching is performed using the resist 14 as an etching mask, and the main surface where the resist 14 is not formed is etched. By this etching, two types of protrusions 18 and a thin conductive foil are formed. After the etching is completed, the resist 14 is removed.

  Referring to FIG. 1C, conductive patterns 20A and 20B are formed by etching conductive foil 13. First, the resist 14 is patterned so as to cover the upper surface of the conductive pattern formation scheduled region. At this time, the resist 14 is patterned so as to cover a region wider than the thick convex portion 18. This is because in order to pattern the conductive foil 13 by a single etching, it is sufficient to etch a thin portion. For example, if mask misalignment is taken into account, the conductive foil 13 can be completely separated by patterning so that a slight edge is formed. If patterning is done on thin parts, only one etching is required. On the contrary, if patterning is performed with the thickness of the convex portion 18, the thin conductive film is over-etched, and the pattern width is narrowed.

  Thus, by patterning conductive patterns with different thicknesses at the same time on the thin conductive foil side, a thin pattern can be formed at one time. For example, a power pattern and a small signal pattern can be formed by two etchings It becomes possible.

  In addition, the area of the conductive pattern can be widened to cope with a large current, but can be dealt with by increasing the thickness of the conductive pattern, and the planar size of the circuit device can be reduced.

  Furthermore, by disposing a circuit element that generates a large amount of heat on a thick conductive pattern, it is possible to improve heat dissipation.

  With reference to FIG. 2A, the circuit element 25 is mounted on the conductive pattern 20, and the resin sealing body 31 sealed with the sealing resin 28 is formed. Here, the first circuit element 25A is placed on the first conductive pattern 20A, and the second circuit element 25B is placed on the second conductive pattern 20B. As shown in the figure, the circuit element 25 is electrically connected to the conductive pattern 20 through a thin metal wire 27. Of course, face-down is also possible.

  In the present embodiment, a description will be given assuming that the first circuit element 25A through which a relatively small current flows and the second circuit element 25B through which a large current flows are placed.

  A chip capacitor is disclosed as the first circuit element 25A, but a transistor, an LSI chip, a chip resistor, a solenoid, or the like can be employed.

  As the second circuit element 25B, a power-type transistor that supplies a large current, such as a power moss, GTBT, IGBT, thyristor, or the like, can be used. A power IC is also applicable. In recent years, since chips are small in size and thin and have high functionality, a large amount of heat is generated compared to the past. Therefore, heat dissipation can be improved by placing circuit elements that require heat dissipation on the second conductive pattern 20B.

  The circuit element 25 and the conductive pattern are connected to each other by a fine metal wire, a brazing material, a conductive paste, or the like by face-up or down. Thereafter, the circuit element 25 is sealed with a sealing resin 28. Here, resin sealing can be performed by transfer molding, injection molding, dipping or coating. As the resin material, a thermosetting resin such as an epoxy resin or a thermoplastic resin such as a polyimide resin can be employed.

  Here, since the resin sealing body 31 is integrated with the support substrate 11 having a flat surface until the sealing resin 28 is cured, the flatness of the resin sealing body 31 can be maintained.

  With reference to FIG. 2B, the resin sealing body 31 is separated from the support substrate 11. Here, when a thermoplastic resin is employed for the adhesive 12, it can be separated by heating and melting the thermoplastic resin. It is also possible to selectively dissolve the adhesive 12 with a chemical such as an organic solvent.

  When a UV sheet is employed for the adhesive 12, it can be separated by irradiating with ultraviolet rays. At this time, it is possible to perform rapid and efficient separation by adopting a material that transmits ultraviolet rays such as glass for the support substrate 11.

  After separation from the support substrate 11, a part of the adhesive 12 may remain on the back surface of the resin sealing body 31. This is solved again by melting and removing using a chemical such as an organic solvent.

  With reference to FIG. 2 (C), the back surface process of the resin sealing body 31 is performed, and the circuit device 10A is completed by dicing and separating individually. Here, the solder resist 29 is patterned on the back surface of the resin sealing body 31 to expose the conductive pattern, and the external electrode 30, for example, a brazing material is formed at this location. However, the conductive pattern 20 exposed from the back surface of the resin sealing body 31 can also function as an external electrode.

  With the above configuration, a thin conductive pattern and a thick conductive pattern can be formed, and power / small signal elements can be housed in one package. For example, when an inverter module packages six power elements and one control IC, the source and drain of the six power elements have a thick conductive pattern, and the IC that controls the gate and power transistor has a thin conductive pattern. If electrically connected, SIP consisting of one package becomes possible.

<Second Embodiment>
With reference to FIG. 3 to FIG. 5, a method for manufacturing the circuit device of the second embodiment will be described. The circuit device manufacturing method of the present embodiment has the same basic steps as the first embodiment. Therefore, here, the difference will be mainly described.

  First, with reference to FIG. 3A, the convex portion 18 is formed on the first conductive film 33 attached to the support substrate 11 via the adhesive 12. The first conductive film 33 is half-etched using the resist 14 as a mask, so that the convex portions 18 and the thin portions which are thick portions are formed. After the projection 18 is formed, the resist 14 is removed.

  Referring to FIG. 3B, as in the previous embodiment, the thin portion is etched to form a thick conductive pattern and a thin conductive pattern. Here, the resist 14 is patterned so as to cover a wider area than the area of the protrusion 18. Then, the first wiring layer 40 including the first conductive pattern 40A and the second conductive pattern 40B formed thicker than the first conductive pattern 40A is formed by wet etching using the resist 14 as a mask. The

  With reference to FIG. 3C, the second conductive film 34 is stacked on the upper surface of the first wiring layer 40 with the insulating layer 41 interposed therebetween. This is achieved by bringing the second conductive film 34 provided with an insulating layer 41 such as an adhesive layer on the surface into close contact with the first wiring layer 40. It is also possible to stack the second conductive film 34 after applying the insulating layer 41 to the first wiring layer.

  Here, the convex portion 18 is closely attached so as to be embedded in the insulating layer 41. By performing this close contact with a vacuum press, voids generated by air between the first wiring layer 40 and the insulating layer 41 can be prevented. Moreover, the side surface of the convex part 18 formed by isotropic etching is a smooth curved surface. Therefore, when the first wiring layer 40 is embedded in the insulating layer 41, the resin enters along the curved surface, and there is no unfilled portion. For this reason, the generation of voids can also be suppressed by the side shape of the convex portion 18. Furthermore, since the convex portion 18 is embedded in the insulating layer 41, the adhesion strength between the first wiring layer 40 and the insulating layer 41 can be improved.

  In this embodiment, in order to improve heat dissipation, an insulating layer 41 in which a filler is mixed in an insulating resin such as an epoxy resin is employed. Here, the filler to be mixed is SiO2, Al2O3, SiC, AlN or the like. Of course, it is also possible to employ a resin in which no filler is mixed in the insulating layer 41.

  With reference to FIGS. 4A to 4C, a process of forming a connection portion for electrically connecting the first wiring layer 40 and the second conductive film 34 will be described. First, using the resist 14 as a mask, a region where the connection portion 43 is to be formed is etched to form a through hole 42 so that the surface of the insulating layer 41 is exposed. Then, using the second conductive film 34 as a mask, the projection 18 is exposed from the lower portion of the through hole 42 by irradiating a laser. Then, the connecting portion 43 is formed by forming a plated layer in the through hole 42. By forming the connection portion 43, the first wiring layer 40 and the second conductive film 34 can be made conductive.

  Details of the process of forming the connecting portion 43 will be described later with reference to FIGS.

  Referring to FIG. 5A, the second wiring layer 45 is formed by patterning the second conductive film 34. Then, after the circuit element 25 is electrically connected to the second wiring layer 45, the circuit element 25 is sealed with a sealing resin 28.

  Here, the first wiring layer 40 and the second wiring layer 45 can be formed so as to intersect in a plane. The first wiring layer 40 and the second wiring layer 45 are connected to each other at a desired location via the connection portion 43. Accordingly, even when the circuit element 25 has a large number of electrodes, the multi-layer wiring structure of this embodiment enables crossover and wiring can be freely performed. Naturally, it is possible to increase to three layers, four layers, five layers or more depending on the number of electrodes of the circuit elements, the mounting density of the elements, and the like.

  In the present embodiment, the second wiring layer 45 is formed with a pattern having the same thickness. However, as described with reference to FIG. 1, the second wiring layer 45 may be a wiring layer having patterns with different thicknesses. is there. Therefore, by forming a thick conductive pattern, it is possible to ensure electric capacity and to have a function as a heat sink. Furthermore, the connection part 43 can also function as a thermal via.

  With reference to FIG. 5B, the resin sealing body 31 is separated from the support substrate 11. This separation method can be carried out by the method described above. And the back surface process of the resin sealing body 31 is performed, and the circuit element 10B as shown in FIG.5 (C) is completed by dicing and isolate | separating separately.

  A method for forming the connecting portion 43 will be described with reference to FIGS.

  In FIG. 6A, a second conductive film 34 is stacked on the upper surface of the first wiring layer 40 with an insulating layer 41 interposed therebetween. Here, the region where the connection portion 43 is to be formed is removed from the second conductive film 34. The surface of the insulating layer 41 is exposed from the lower part of the through hole 42. Furthermore, a filler is mixed in the insulating layer 41 in consideration of heat dissipation. Here, first, an enlarged view of the connection portion formation region 44 surrounded by a broken line is shown in FIGS. 6B and 6C, and a method of forming the through hole 42 will be described in detail.

  With reference to FIG. 6B, in this embodiment, the thickness of the insulating layer 41 below the through hole 42 is reduced by embedding the convex portion 18. Then, the insulating layer 41 in the thinned region is removed using the laser 39, so that the upper surface of the convex portion 18 is exposed at the lower portion of the through hole 42. In most regions, the thickness T2 of the insulating layer 41 is, for example, about 50 μm. On the other hand, the thickness T1 of the insulating layer 41 in the region corresponding to the lower part of the through hole 42 is as thin as about 10 μm to 25 μm, for example.

  When the connection portion 43 is formed by plating in a later step, it is necessary to form the through hole 42 having a low aspect ratio. This is because when the aspect ratio is high, the formation of the connecting portion 43 becomes difficult due to the deterioration of the fluidity of the plating solution inside the through hole 42 and the insufficient supply of the plating solution.

  Here, since it has been confirmed that the aspect ratio of the through hole 42 in which the highly reliable connection portion 43 can be formed by plating is 1 or less, the aspect ratio of the through hole 42 of this embodiment is 1 or less. It formed so that it might become the following. Here, the aspect ratio is a value represented by L / D, where D is the diameter of the through hole 42 and L is the depth L of the through hole 42.

  Moreover, the filler for ensuring heat dissipation in the insulating layer 41 makes the formation of the through-hole 42 by laser slightly difficult. Under such circumstances, it is meaningful to make the insulating layer 41 in which the through hole 42 is formed thin.

  Referring to FIG. 6C, a cross section after the through hole 42 is formed by the above method is shown. From the lower surface of the through hole 42, the upper surface of the convex portion 18 is exposed. And the filler mixed in the insulating layer 41 is exposed from the side wall of the through-hole 42 formed by laser processing. Insulating layer 41 of this embodiment is mixed with a filler having a wide diameter to improve heat dissipation. Therefore, the side wall of the through hole 42 has a shape with irregularities. If a residue remains at the bottom of the through hole 42 by the laser treatment, cleaning is performed to remove the residue.

  The planar size of the convex portion 18 is larger than the through hole 42 formed above. In other words, since the planar shapes of the through hole 42 and the convex portion 18 are, for example, circular, the diameter of the convex portion 18 is formed larger than the diameter of the through hole 42. As an example, when the diameter W1 of the through hole 42 is about 100 μm, the diameter W2 of the convex portion 18 is formed to be about 150 μm to 200 μm. Further, when the diameter W1 of the through hole 42 is about 30 μm to 50 μm, the diameter W2 of the convex portion 18 is adjusted to about 50 μm or about 70 μm. Thus, even when the through hole 42 is formed with some positional deviation, the planar size of the convex portion 18 is made larger than that of the through hole 42 so that the through hole 42 is located above the convex portion 18. Can be located. Therefore, it is possible to prevent a decrease in connection reliability due to the positional deviation. Moreover, as a planar shape of the convex part 18, shapes other than circular are employable.

  Although not shown, the formation of the through hole 42 can be facilitated by forming the insulating layer 41 from the first resin film and the second resin film. Specifically, the lower layer of the insulating layer 41 is formed by the first resin film. Here, the upper surface of the first resin film is set to the same height as the upper surface of the convex portion 18. Then, a second resin film is formed on the upper surface of the first resin film. Here, the first resin film has a high filler filling rate in order to maintain sufficient heat dissipation, and the second resin film has a low filling rate so that the through holes 42 can be easily formed by a laser. By doing so, clogging of the through-hole 42 due to the filler residue inside the through-hole or the filler peeled off from the side surface of the through-hole 42 can be suppressed. Therefore, a highly reliable connection part can be formed. Moreover, the diameter of the filler mixed in the second resin film may be reduced. Furthermore, the filler may not be mixed into the second resin film.

  Further, in the above description, the through hole 42 is formed after the insulating layer 41 is covered with the second conductive film 34. However, the through hole 42 may be formed by other methods. Specifically, before covering the second conductive film 34, it is possible to form the through hole 42 by removing the insulating layer 41 and expose the upper surface of the convex portion 18 from the lower portion of the through hole 42. is there. Here, a YAG laser or wet etching can be employed as a means for removing the resin. The connection portion 43 and the second conductive film 34 can be formed by electroless plating. Furthermore, a conductive film having a certain thickness can be formed by performing electrolytic plating using the second conductive film 34 formed by electroless plating as a cathode.

  Next, referring to FIG. 7 and FIG. 8, a step of forming a connection portion 43 by forming a plating film in the through hole 42 and electrically connecting the first wiring layer 40 and the second conductive film 34. Will be explained. There are two methods for forming the plating film. The first method is a method of forming a plated film again by electrolytic plating after forming the plated film by electroless plating. The second method is a method of forming a plating film only by electrolytic plating.

  With reference to FIG. 7, the first method for forming a plating film will be described. First, referring to FIG. 7A, a first plating film 46 is formed on the surface of the second conductive film 34 including the side wall of the through hole 42 by electroless plating. The thickness of the first plating film 46 may be about 3 μm to 5 μm.

  Next, referring to FIG. 7B, a new second plating film 47 is formed on the upper surface of the first plating film 46 by electrolytic plating. Specifically, the second plating film 47 is formed by an electrolytic plating method using the second conductive film 34 on which the first plating film 46 is formed as a cathode electrode. A first plating film 46 is formed on the inner wall of the through hole 42 by the electroless plating method described above. Accordingly, the second plating film 47 formed here is formed to have a uniform thickness including the inner wall of the through hole 42. In this way, the connection portion 43 is formed from the plating film. A specific thickness of the second plating film 47 is, for example, about 20 μm. As the material of the first plating film 46 and the second plating film 47 described above, copper which is the same material as that of the second conductive film 34 can be employed. A metal other than copper can be used as the material of the first plating film 46 and the second plating film 47.

  Referring to FIG. 7C, here, through-hole 42 is filled with second plating film 47 by performing filling plating. By performing the filling plating, the mechanical strength of the connection portion 43 can be improved.

  Next, with reference to FIG. 8, a method of forming the connection portion 43 using the electrolytic plating method will be described.

  Referring to FIG. 8A, first, a solution containing metal ions is brought into contact with through-hole 42. Here, as the material of the plating film 48, copper, gold, silver, palladium or the like can be employed. Then, when a current is passed using the second conductive film 34 as a cathode electrode, metal is deposited on the second conductive film 34 that is the cathode electrode to form a plating film. Here, the state of growth of the plating film is represented by 48A and 48B. In the electrolytic plating method, a plating film is preferentially formed at a place where the electric field is strong. In this embodiment, this electric field is strengthened by the second conductive film 34 at the portion facing the peripheral edge of the through hole 42. Therefore, as shown in this figure, a plating film grows preferentially from the portion of the second conductive film 34 facing the peripheral edge of the through hole 42. When the formed plating film comes into contact with the convex portion, the first wiring layer 40 and the second conductive film 34 become conductive. Thereafter, a plating film is uniformly formed in the through hole 42. As a result, a connection portion 43 integrated with the second conductive film 34 is formed inside the through hole 42.

  Next, another method for forming the connection portion 43 will be described with reference to FIG. Here, the eaves 50 are provided in the peripheral portion of the through hole 42 to facilitate the formation of the connection portion 43 by electrolytic plating. Here, the “eave” refers to a portion made of the second conductive film 34 protruding so as to cover the peripheral portion of the through hole 42. A specific method for manufacturing the eaves 50 can be performed by increasing the output of the laser when the through hole 42 is formed by the laser. By increasing the output of the laser, the removal of the second conductive film 34 by the laser proceeds in the lateral direction, so that the resin in the region below the eaves 50 is removed. By performing the electrolytic plating process using the second conductive film 34 as the cathode electrode under the above-described conditions, the plating film grows preferentially from the eaves 50 portion. By growing the plating film from the eaves 50, it is possible to grow the plating film with priority in the downward direction as compared with the case of FIG. Therefore, it is possible to reliably fill the through hole 42 with the plating film.

  As described above, the side wall of the through-hole 42 of this embodiment has a shape with irregularities. Further, the filler mixed in the insulating layer 41 is exposed on the side wall of the through hole 42. For these reasons, it is difficult to form a plating film on the side wall of the through hole 42. In general, a plating film hardly adheres to the surface of a filler that is an inorganic substance. In particular, when AlN is exposed on the side wall of the through hole 42, it is difficult to form a plating film. Therefore, in this embodiment, the connection portion 43 is formed by a method using the electrolytic plating method.

  Furthermore, even when the through hole 42 is embedded by performing filling plating, the through hole 42 is shallowly formed as described above, so that the filling plating can be easily performed.

In this embodiment, the place where the above-described convex portion 18 and the connection portion 43 are in contact is located in the middle portion of the insulating layer 41 in the thickness direction. Here, the intermediate portion means that it is above the upper surface of the first wiring layer 40 and below the lower surface of the second wiring layer 45. Therefore, on the paper surface, the portion where the convex portion 18 and the connection portion 43 are in contact is near the central portion in the thickness direction of the insulating layer 41. And this part can be changed in the range of the above-mentioned intermediate part. In consideration of forming the connection portion 43 by plating, the portion where the projection 18 and the connection portion 43 are in contact is between the upper surface of the first wiring layer 40 and the lower surface of the second wiring layer 45. , It is preferably arranged above the intermediate position. Thus, there is an advantage that the connection portion 43 made of a plating film can be easily formed. That is, the through hole 42 is formed in order to form the connection portion 43, but the depth of the through hole 42 can be reduced. In addition, the diameter of the through hole 42 can be reduced by the shallowness. Furthermore, since the diameter of the through hole 42 is small, the interval between the through holes 42 can be narrowed. Therefore, a fine pattern can be realized as a whole, and the circuit device can be miniaturized.

It is (A) sectional drawing- (C) sectional drawing explaining the manufacturing method of the circuit apparatus of this invention. It is (A) sectional drawing- (C) sectional drawing explaining the manufacturing method of the circuit apparatus of this invention. It is (A) sectional drawing- (C) sectional drawing explaining the manufacturing method of the circuit apparatus of this invention. It is (A) sectional drawing- (C) sectional drawing explaining the manufacturing method of the circuit apparatus of this invention. It is (A) sectional drawing- (C) sectional drawing explaining the manufacturing method of the circuit apparatus of this invention. It is (A) sectional drawing- (C) sectional drawing explaining the manufacturing method of the circuit apparatus of this invention. It is (A) sectional drawing- (C) sectional drawing explaining the manufacturing method of the circuit apparatus of this invention. It is (A) sectional drawing explaining the manufacturing method of the circuit device of this invention, (B) sectional drawing. It is (A) sectional drawing- (C) sectional drawing explaining the manufacturing method of the conventional circuit device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Circuit apparatus 11 Support substrate 12 Adhesive 13 Conductive foil 14 Resist 18 Protrusion 20A 1st conductive pattern 20B 2nd conductive pattern 25A 1st circuit element 25B 2nd circuit element 27 Metal fine wire 28 Sealing resin 29 Solder Resist 30 External electrode 31 Resin encapsulant 33 First conductive film 34 Second conductive film 40 First wiring layer 40A First conductive pattern 40B Second conductive pattern 41 Insulating layer 42 Through-hole 43 Connection 45 2 wiring layers 46 1st plating film 47 2nd plating film 48 plating film 50 eaves

Claims (8)

  1. Prepare a support substrate with conductive foil on the surface,
    The conductive foil is etched so as to have a convex shape, and the convex portion made of the conductive foil having the convex shape is integrated with the convex portion around the convex portion, and the thickness is larger than the thickness of the convex portion. Forming a thin conductive foil ,
    Forming a resist on the thin conductive foil around the convex portion and the convex portion, and further forming the resist in a conductive pattern forming region made of the thin conductive foil;
    The conductive foil is etched using the resist as a mask, and the first conductive pattern made of the thin conductive foil and the thin conductive foil around the convex portion are integrated with the support substrate. Forming a second conductive pattern,
    A circuit element is fixed to the convex portion of the second conductive pattern, the circuit element and the first conductive pattern are electrically connected,
    Sealing the upper surface of the support substrate with a sealing resin so that the circuit element, the first conductive pattern and the second conductive pattern are covered;
    A method of manufacturing a circuit device, wherein the first conductive pattern, the second conductive pattern, and the back surface of the sealing resin are separated from the support substrate.
  2. Prepare a support substrate with conductive foil on the surface,
    The conductive foil is etched to have a convex shape, and the convex portion made of the conductive foil having the convex shape is integrated with the convex portion around the convex portion, and is thinner than the thickness of the convex portion. Forming a conductive foil ,
    Forming a resist on the thin conductive foil around the convex portion and the convex portion, and further forming the resist in a conductive pattern forming region made of the thin conductive foil;
    Etching the conductive foil using the resist as a mask, the the supporting substrate includes a first conductive pattern composed of the thin conductive foil, and the thin conductive foil around the convex portion and the convex portion together Forming a first wiring layer comprising the second conductive pattern,
    A conductive film is laminated on the first wiring layer via an insulating layer;
    Forming a connecting portion for conducting the convex portion and the conductive film;
    By patterning the conductive film, a second wiring layer is formed,
    Electrically connecting the second wiring layer and the circuit element;
    Sealing the upper surface of the support substrate with a sealing resin so that the circuit element is covered;
    A method for manufacturing a circuit device, comprising: separating back surfaces of the first wiring layer and the insulating layer from the support substrate.
  3.   The connecting portion is formed by partially removing the conductive film to expose the insulating layer, removing the exposed insulating layer to form a through hole, and forming a plated film in the through hole. The method of manufacturing a circuit device according to claim 2, wherein:
  4.   The plating film is formed by forming a plating film on the side wall of the through hole by electroless plating and then performing electrolytic plating to form a new plating film in the through hole. A method for manufacturing a circuit device according to claim 3.
  5.   The plating film is formed inside the through hole from the conductive film located in a peripheral portion of the through hole by performing an electrolytic plating process using the conductive film as an electrode. 3. A method of manufacturing a circuit device according to 3.
  6. Forming an eaves made of the conductive film around the through hole;
    6. The method of manufacturing a circuit device according to claim 5, wherein a plating film is formed from the eaves toward the inside of the through hole.
  7.   3. The method for manufacturing a circuit device according to claim 2, wherein a filler is mixed in the insulating layer.
  8.   The support substrate and the first wiring layer are bonded with an adhesive, and the back surface of the first wiring layer, the insulating layer, and the sealing resin is formed by melting the adhesive. 3. The method of manufacturing a circuit device according to claim 1, wherein the circuit device is separated from the circuit device.
JP2004222115A 2004-07-29 2004-07-29 Circuit device manufacturing method Expired - Fee Related JP4596846B2 (en)

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JP2004222115A JP4596846B2 (en) 2004-07-29 2004-07-29 Circuit device manufacturing method
TW094113626A TWI267115B (en) 2004-07-29 2005-04-28 Method for making a circuit device
US11/179,431 US7163841B2 (en) 2004-07-29 2005-07-11 Method of manufacturing circuit device
CNB2005100836419A CN100444342C (en) 2004-07-29 2005-07-13 Method of manufacturing circuit device
KR1020050066260A KR100728855B1 (en) 2004-07-29 2005-07-21 Circuit device manufacturing method

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JP4596846B2 true JP4596846B2 (en) 2010-12-15

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CN1728353A (en) 2006-02-01
CN100444342C (en) 2008-12-17
US7163841B2 (en) 2007-01-16
TW200605160A (en) 2006-02-01
US20060024862A1 (en) 2006-02-02
JP2006041376A (en) 2006-02-09
KR100728855B1 (en) 2007-06-15
TWI267115B (en) 2006-11-21

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