JP3417388B2 - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve design for the electric characteristics of a semiconductor device having an RF signal system chip and a high speed digital signal system chip mixed together. SOLUTION: A first CSP semiconductor chip 3f using a wiring board 9 having area array electrodes 7 is connected to a lead frame 1, laminated with a second semiconductor chip 3s for RF analog signals, and packaged with a seal resin 6. Thus, a laminated compact and high-performance semiconductor device can be realized at a low cost which ensures required electric characteristics for a high speed digital signal system semiconductor chip and reduces the mounting area of a semiconductor chip for RF analog signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a plurality of semiconductor chips mounted in one package.

[0002]

2. Description of the Related Art A conventional semiconductor device will be described below with reference to the drawings. 5 and 6 are main cross-sectional views showing a conventional semiconductor device.

First, in the conventional semiconductor device shown in FIG. 5, a semiconductor chip 3 is mounted on a die pad 2 portion of a lead frame 1 by die bonding via an adhesive 4, and a bonding pad of the semiconductor chip 3 (not shown). And the tip of the inner lead 1a of the lead frame 1 are wire-bonded with a thin metal wire 5 to make an electrical connection,
A semiconductor device is configured by molding with a sealing resin 6 in a mold having a predetermined shape. After the resin is sealed and the resin is cured, the outer lead 1b of the lead frame 1 of the semiconductor device taken out from the mold is processed into a predetermined lead shape by the lead forming mold.

The semiconductor device shown in FIG. 6 is a two-chip stacked type semiconductor device, in which the first semiconductor chip 3f is mounted on the die pad 2 of the lead frame 1 by die bonding with an adhesive 4. Further, the second semiconductor chip 3s is mounted on it via the adhesive 4,
The bonding pad (not shown) of each semiconductor chip and the tip of the inner lead 1a of the lead frame 1 are wire-bonded with the first thin metal wire 5f and the second thin metal wire 5s to be electrically connected to each other to have a predetermined shape. A semiconductor device is configured by molding with a sealing resin 6 in a mold having a mold. After the resin is sealed and the resin is cured, the outer lead 1b of the lead frame 1 of the semiconductor device taken out from the mold is processed into a predetermined lead shape by the lead forming mold.

After the semiconductor device is completed, electrical connection, signal inspection, and reliability test are carried out, and the products which are judged to be non-defective are packaged and shipped.

[0006]

However, in the above-mentioned conventional semiconductor device, there is a problem that the lead frame and the thin metal wires cause delay, loss and reflection of the transmission signal. This problem is a plurality of types of semiconductor chips in one package. Becomes especially noticeable when equipped with. For example, a transmission line design which is a stack package or a multi-chip package in which an RF analog signal semiconductor chip having different signal components and a high-speed digital signal semiconductor chip are mixed in one package, and which has a lead frame and a metal thin wire (wire). Makes it difficult to design a package for achieving the electrical characteristics of both semiconductor chips. One of the simple solutions is to reduce the package size and use BGA (Ball Gr
dArray) and CSP (Chip Size Pac)
package with good impedance characteristics, especially for high-speed digital signal system semiconductor chips, and at present, if the clock frequency exceeds 400 MHz, use an area array package such as CSP or BGA. ing. On the other hand, R
Some F-type analog signal semiconductor chips exceeding 2 GHz have come out, but there is no need to downsize them in terms of performance, and the aim is merely to reduce the mounting area.
Although it is technically possible to make RF chip analog signal semiconductor chips and high-speed digital signal system semiconductor chips CSP and BGA into multi-chip packages and stacked packages,
The area of the RF-type analog signal semiconductor chip is smaller than that of the high-speed digital signal-type semiconductor chip, and on the contrary, the cost may be increased. Therefore, it is a design that maximizes the performance of a high-speed digital signal, and a mounting area reduction, low cost, and high productivity are problems due to the coexistence of RF signal systems.

The present invention provides a semiconductor device having a plurality of semiconductor chips in one package, which enables tuning of the resonance strength of the RF signal system and can be easily manufactured at low cost. With the goal.

[0008]

In order to solve the above conventional problems, a semiconductor device of the present invention has an area array electrode on the bottom surface thereof, and a bonding pad electrically connected to the area array electrode inside the substrate on the surface. A wiring board having the same, a first semiconductor chip mounted face down with respect to a bonding pad on the upper surface of the wiring board, and a back end portion of the first semiconductor chip bonded to the bonding pad. An inner lead of a lead frame, a second semiconductor chip stacked on the back surface of the first semiconductor chip, a thin metal wire connecting the second semiconductor chip and the inner lead, and the inner lead. And a sealing resin that seals the upper surface region of the wiring substrate including the inner surface of the lead frame exposed from the sealing resin. And more becomes a semiconductor device and outer lead portions that.

Specifically, the first semiconductor chip is a high-speed digital signal system semiconductor chip, and the second semiconductor chip is a semiconductor device for RF system analog signal.

Further, the semiconductor device has a metal cap for shielding in the outer circumference of the sealing resin.

As described above, the CSP using the wiring substrate having the area array electrodes is laminated together with the RF-based analog signal semiconductor chip in the resin-sealed package of the normal method, so that the high-speed digital signal-based semiconductor chip is formed. It is possible to realize a laminated semiconductor device that satisfies the electrical characteristics required for the above and a reduction in the mounting area of the semiconductor chip for RF analog signals.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a semiconductor device of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view showing a semiconductor device of this embodiment.

The semiconductor device shown in FIG. 1 uses a lead frame and a wiring board. First, the area array electrode 7 having a two-dimensional array in the substrate is formed on the bottom surface of the area array electrode 7. The first semiconductor chip 3f is mounted face down on the wiring substrate 9 having the bonding pad 8 which is electrically connected inside the substrate on the surface thereof. In this state, a one-chip chip size package (CSP) is configured, and a sealing resin (not shown) is filled between the chip and the substrate. Then, the back surface (bottom surface) end of the first semiconductor chip 3f and the inner lead 1a of the lead frame are bonded by the adhesive 4
And the second semiconductor chip 3s is adhesively mounted on the back surface of the first semiconductor chip 3f with the adhesive 4 on the bottom side thereof to form a two-chip stacked state. And the second
Bonding pad of semiconductor chip 3s (not shown)
And the inner lead 1a are connected by a thin metal wire 5, and the upper surface region of the wiring board 9 including the inner lead 1a of the lead frame 1 is resin-sealed with a sealing resin 6. Also, the inner lead 1a of the lead frame 1
The outer lead portion 1b connected to is cut and processed so that its tip end surface is exposed on substantially the same surface as the side surface of the sealing resin 6,
QFN (Quad Flat Non-leaded)
Package) structure.

In this embodiment, the first semiconductor chip 3f is a high speed digital signal system semiconductor chip,
The second semiconductor chip 3s is an RF analog signal semiconductor chip.

The semiconductor device of the present embodiment is characterized in that a CSP using a wiring board having area array electrodes is laminated together with a semiconductor chip for RF analog signal in a resin-sealed package of a normal method. Thus, it is possible to realize a stacked semiconductor device that satisfies the electrical characteristics required for a high-speed digital signal semiconductor chip and the mounting area of the RF analog signal semiconductor chip is reduced.

Next, the electrical characteristics of the semiconductor device shown in FIG. 1 will be described.

Especially, the line for transmitting an RF analog signal has an extremely strong resonance strength (Q value) in the frequency band used,
Alternatively, the transmission line, which is either extremely weak or extremely weak, requires tuning. In the formula, f = 1 / 2π√LC, Q = ωL /
Generally, it is represented by R (f is a resonance frequency, L is an inductance, C is a capacitance, Q is a resonance strength, R is a DC resistance, and ω is a phase), and L is an inductance.
Ingredients can be used for tuning. Therefore, the second semiconductor chip 3s needs to be a semiconductor chip for RF analog signals. The tuning of the L component is adjusted by the length of the thin metal wire 5. Further, in the RF system, it is necessary to reduce the influence of electromagnetic radiation noise, and therefore a GND-connected metal shield is required.

On the other hand, the high-speed digital signal of the baseband system from the semiconductor chip of the high-speed digital signal system has a high frequency component which is a plurality of frequency components as a sine wave. It's difficult. The reason is that the transmission line having the lead frame and the thin metal wire of this embodiment is a lossy line having no characteristic impedance. As the speed of baseband digital signals increases, semiconductor devices that use standard plastic packages (resin-sealed packages), lead frames, and thin metal wires (wires) will inevitably become difficult to use. CSPs and BGAs with layers and area array electrodes are required.

The former multilayer substrate has a GND layer and can easily form a microstrip line or a coplanar line,
The characteristic impedance can be designed to be constant. The latter area array electrode can be designed to shorten the wiring length.

Next, another embodiment will be described.

FIG. 2 is a main sectional view showing a semiconductor device of the second embodiment. The basic structure is the same as that of the semiconductor device shown in FIG. 1, and a wiring board 9 having an area array electrode 7 is used. The one-chip CSP is laminated with the semiconductor chip for RF analog signal (second semiconductor chip 3s) by using the lead frame 1 in the resin-sealed package of the normal method. The semiconductor chip envelop has a different molding configuration, and has a structure in which the outer lead 1b of the lead frame 1 is projected from the substantially central portion of the side surface of the sealing resin 6. The semiconductor device shown in FIG. 2 is similar in characteristics and function to the semiconductor device shown in FIG. is there. That is, the conventional QFP (Quad Flat P)
It can be mounted on a substrate by the same equipment as that of an ackage type semiconductor device.

FIG. 3 is a main sectional view showing a semiconductor device according to the third embodiment. The basic structure is the same as that of the QFN type semiconductor device shown in FIG. 1, and a wiring board having an area array electrode 7 is provided. 1-chip CSP using 9 is placed in a resin-sealed package of the normal method using the lead frame 1 for R
Although it is laminated together with the F-type analog signal semiconductor chip (second semiconductor chip 3s), it is shielded by the metal cap 10. Metal cap 10
By covering the outer circumference of the semiconductor device, the role of α-ray countermeasure and electromagnetic shield is fulfilled.

FIG. 4 is a diagram showing a semiconductor device of the fourth embodiment, showing a GND ground state together with a sectional view of the semiconductor device. The semiconductor device shown in FIG. 4 has a semiconductor chip for RF analog signals (second semiconductor chip) for the one-chip CSP using the wiring substrate 9 having the area array electrodes 7 similarly to the CSP shown in FIG. 3s) and the outer circumference is sealed with the sealing resin 6, but the outermost surface is shielded by the metal cap 10. Also, a mounting GN connected to the metal cap 10.
The D terminal 11 is provided at the bottom end portion (package corner portion) of the semiconductor device.

As described above, the semiconductor device of this embodiment has the area array electrode on the bottom surface thereof, and the wiring board having the bonding pads on the surface thereof which are electrically connected to the area array electrode inside the substrate, and the upper surface of the wiring board. A first semiconductor chip that is mounted face down with respect to the bonding pad, and an inner lead of a lead frame bonded to a rear end portion of the first semiconductor chip;
The second semiconductor chip stacked on the back surface of the first semiconductor chip, the thin metal wire connecting the second semiconductor chip and the inner lead, and the upper surface region of the wiring board including the inner lead are sealed. A semiconductor device comprising an encapsulating resin and an outer lead portion connected to an inner lead of a lead frame whose tip end surface is exposed from the encapsulating resin. The semiconductor device secures electric characteristics required for a high-speed digital signal system semiconductor chip, and RF. And the reduction of the mounting area of the analog analog semiconductor chip.

[0026]

As described above, according to the present invention, the CSP type first semiconductor chip using the wiring substrate having the area array electrodes is connected to the lead frame, and the RF type analog signal semiconductor chip is further used. Satisfying the electrical characteristics required for high-speed digital signal semiconductor chips and the reduction of the mounting area of RF analog signal semiconductor chips by stacking them together with a certain second semiconductor chip and packaging them in one package with sealing resin. The stacked semiconductor device can be realized with small size, high performance and low cost.

[Brief description of drawings]

FIG. 1 is a sectional view showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view showing a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a sectional view showing a semiconductor device according to an embodiment of the present invention.

FIG. 4 is a diagram showing a semiconductor device according to an embodiment of the present invention.

FIG. 5 is a sectional view showing a conventional semiconductor device.

FIG. 6 is a sectional view showing a conventional semiconductor device.

[Explanation of symbols]

1 lead frame 1a Inner lead 1b outer lead 2 die pad 3 semiconductor chips 3f First semiconductor chip 3s Second semiconductor chip 4 adhesive 5 thin metal wires 5f First fine metal wire 5s Second fine metal wire 6 Sealing resin 7 area array electrode 8 Bonding pad 9 wiring board 10 metal caps 11 GND terminal

Claims (3)

(57) [Claims] 1. A wiring board having an area array electrode on a bottom surface thereof and a bonding pad on the surface which is electrically connected to the area array electrode inside the substrate, and a back surface of the wiring board on a bonding pad on an upper surface of the wiring board. A first semiconductor chip mounted face down on top, inner leads of a lead frame adhered to the back end of the first semiconductor chip, and stacked mounting on the back surface of the first semiconductor chip Second semiconductor chip, and the second semiconductor chip
A metal thin wire connecting the semiconductor chip and the inner lead, a sealing resin that seals the upper surface region of the wiring board including the inner lead, and a lead frame of which the front end surface is exposed from the sealing resin. A semiconductor device comprising an outer lead portion connected to an inner lead. 2. The semiconductor device according to claim 1, wherein the first semiconductor chip is a high-speed digital signal system semiconductor chip, and the second semiconductor chip is an RF system analog signal semiconductor chip. 3. The semiconductor device according to claim 1, wherein a metal cap for shielding is provided on the outer circumference of the sealing resin.