TWI767654B - Display device and driving method thereof - Google Patents

Abstract

A display device and driving method thereof are provided. The display device includes a display panel, a source driver, a plurality of first gate drivers, and a plurality of second gate drivers. The display panel has a plurality of display columns and a plurality of gate lines. The source driver generates a plurality of source driving signals to the display panel. The plurality of first gate drivers and the plurality of second gate drivers are respectively arranged on both sides of the display panel, and the plurality of first gate drivers and the plurality of second gate drivers are respectively coupled to the plurality of gate lines to generate the plurality of gate driving signals to the plurality of gate lines. Each display column corresponds to the first gate line and the second gate line. The first gate line is coupled to a plurality of first pixels of the corresponding display column, and the second gate line is coupled to a plurality of second pixels of the corresponding display column.

Description

Display device and driving method thereof

The present invention relates to a display device, and more particularly, to a display device and a driving method thereof.

In today's large-sized panels, under the requirement of a single display area, gate drivers are usually arranged on both sides of the display panel in the prior art, and gate driving signals are provided through a plurality of gate lines running through the display panel. to the corresponding pixel.

However, when the display panel needs to be divided into two or more display areas according to the needs of the product or the user, and each display area can display its own display data independently, the conventional technology usually involves the handover of the divided display areas. The routing of the gate lines is disconnected at the place, so that the gate drivers on both sides can provide gate driving signals to the pixels in the corresponding display areas through the corresponding gate lines. It should be noted that under such a design, these gate lines cannot penetrate the display panel, which will cause the gate driving signal to generate signals at the ends (or boundaries) of each gate line Distortion case.

In view of this, how to effectively improve the signal distortion of the gate driving signal at the end of each gate line when the display panel has the requirement of multiple display areas, so as to improve the display quality of the display screen, will be the present invention. Important topics for those skilled in the field.

The present invention provides a display device and a driving method thereof, which can effectively improve the display quality of a display image when a display panel has multiple display areas.

The display device of the present invention includes a display panel, a source driver, a plurality of first gate drivers and a plurality of second gate drivers. The display panel has multiple display columns and multiple gate lines. The source driver is coupled to the display panel to generate a plurality of source driving signals to the display panel. A plurality of first gate drivers and a plurality of second gate drivers are respectively disposed on two sides of the display panel, and the first gate drivers and the second gate drivers are respectively coupled to the gate lines to generate a plurality of gate drivers Signals to gate lines, wherein each display column corresponds to a first gate line and a second gate line, the first gate line is coupled to a plurality of first pixels of the corresponding display column, and the second gate line is coupled to A plurality of second pixels connected to the corresponding display column.

The driving method of the display device of the present invention includes: providing a display panel with a plurality of display columns and a plurality of gate lines; providing a source driver to generate a plurality of source driving signals to the display panel; a plurality of first gate drivers and a plurality of second gate drivers on the side to respectively generate a plurality of gate driving signals to the gate lines; and corresponding to the first gate lines and the second gate lines by each display column , the first gate line is coupled to a plurality of first pixels of the corresponding display column, and the second gate line is coupled to a plurality of second pixels of the corresponding display column.

Based on the above, the display panel of the display device according to the embodiments of the present invention can be designed with a plurality of gate lines running through the display panel along the extending directions of the plurality of display columns, so that the display panel has a plurality of Under the requirements of the display area, it is not necessary to disconnect the wiring of the gate lines between the multiple display areas. In this way, the display device of the present invention can effectively avoid the occurrence of signal distortion at the end (or at the boundary) of each gate line, thereby improving the quality of the display image.

The term "coupled (or connected)" as used throughout this specification (including the scope of the application) may refer to any direct or indirect means of connection. For example, if it is described in the text that a first device is coupled (or connected) to a second device, it should be interpreted that the first device can be directly connected to the second device, or the first device can be connected to the second device through another device or some other device. indirectly connected to the second device by a connecting means. Also, where possible, elements/components/steps using the same reference numerals in the drawings and embodiments represent the same or similar parts. Elements/components/steps that use the same reference numerals or use the same terminology in different embodiments may refer to relative descriptions of each other.

FIG. 1 is a schematic diagram of a display device 100 according to an embodiment of the present invention. Referring to FIG. 1 , the display device 100 includes a display panel 110 , a plurality of first gate drivers 120_1 ˜ 120_N, a plurality of second gate drivers 130_1 ˜ 130_N, and a source driver 140 .

In this embodiment, the display panel 110 has a first display area DA1 and a second display area DA2. Wherein, the first display area DA1 and the second display area DA2 of the display panel 110 do not overlap with each other, and can be sequentially arranged along the horizontal direction. In other embodiments, the first display area DA1 and the second display area DA2 of the display panel 110 may also be sequentially arranged along the vertical direction according to design requirements, which is not particularly limited in the present invention.

The source driver 140 is coupled to a plurality of source lines (or data lines) DL11 - DL1N and a plurality of source lines (or data lines) DL21 - DL2N of the display panel 110 to respectively provide source driving signals DS11 - DS1N and The source driving signals DS21 ˜ DS2N are sent to the display panel 110 . In this embodiment, the source lines DL11 ˜ DL1N may be arranged in the first display area DA1 of the display panel 110 , and the source lines DL21 ˜ DL2N may be arranged in the second display area DA2 of the display panel 110 .

Therefore, the source driver 140 can respectively write the source driving signals DS11 ˜ DS1N to a plurality of pixels corresponding to the first display area DA1 of the display panel 110 , and write the source driving signals DS21 ˜ DS2N respectively to Corresponding to a plurality of pixels in the second display area DA2 of the display panel 110, so that the first display area DA1 and the second display area DA2 can independently display respective display data.

In particular, the display device 100 may be applied to, for example, an automobile. For example, the display device 100 can perform the function of an instrument panel through the first display area DA1 of the display panel 110 to display relevant information such as speed, fuel consumption, engine speed and/or engine temperature of the vehicle. In addition, the display device 100 can also perform the function of navigation or the central control center in the vehicle through the second display area DA2 of the display panel 110, so as to display relevant information such as the map and/or the temperature of the air conditioner, but this embodiment does not Not limited to this.

Specifically, the first display area DA1 of the display panel 110 has a plurality of first pixels P111-P1NM, and the second display area DA2 of the display panel 110 has a plurality of second pixels P221-P2NM, and the first pixels P111-P1NM and the second pixels P221-P2NM may be arranged in a plurality of display columns CL1-CLN. For example, in this embodiment, the first pixels P111-P11M and the second pixels P221-P22M can be formed as the display column CL1, and the first pixels P1N1-P1NM and the second pixels P2N1-P2NM can be formed In order to display the column CLN, the rest of the first pixel and the second pixel can be deduced by analogy. Among them, the above-mentioned N and M are positive integers greater than 1.

On the other hand, in the present embodiment, each of the display columns CL1 ˜ CLN in the display panel 110 has two corresponding gate lines (ie, a first gate line and a second gate line). For example, the display column CL1 of the display panel 110 has a first gate line GL11 and a second gate line GL21, and the display column CLN of the display panel 110 has a first gate line GL1N and a second gate line GL2N, and The rest of the displayed columns can be deduced by analogy.

In this embodiment, the first gate drivers 120_1 ˜ 120_N and the second gate drivers 130_1 ˜ 130_N may be disposed on both sides of the display panel 110 , respectively. Each of the first gate drivers 120_1 ˜ 120_N in this embodiment includes a first gate driver circuit 121 and a second gate driver circuit 122 , and the first gate driver circuit 121 among the first gate drivers 120_1 ˜ 120_N And the second gate driver circuit 122 is respectively coupled to the first gate lines GL11 -GL1N and the second gate lines GL21 -GL2N in the corresponding display columns CL1 -CLN.

In addition, the first gate driver circuits 121 in the first gate drivers 120_1 ˜ 120_N can be used to generate the first gate driving signals GS11 ˜ GS1N to the first gate lines GL11 ˜GL1N in the corresponding display columns CL1 ˜CLN , and the second gate driver circuits 122 in the first gate drivers 120_1 - 120_N can be used to generate the second gate driving signals GS21 - GS2N to the second gate lines GL21 - GL2N in the corresponding display columns CL1 - CLN .

For example, the first gate driver circuit 121 of the first gate driver 120_1 is coupled to the first end of the first gate line GL11 of the corresponding display column CL1, and the second gate driver of the first gate driver 120_1 The circuit 122 is coupled to the first end of the second gate line GL21 of the corresponding display column CL1, and the first gate driver circuit 121 and the second gate driver circuit 122 of the remaining first gate drivers can be connected accordingly. analogy.

On the other hand, each of the second gate drivers 130_1 ˜ 130_N in the present embodiment includes a first gate driver circuit 121 and a second gate driver circuit 122 , and the first gate driver 130_1 ˜ 130_N among the second gate drivers 130_1 ˜ 130_N The gate driver circuit 121 and the second gate driver circuit 122 are respectively coupled to the first gate lines GL11 ˜GL1N and the second gate lines GL21 ˜GL2N in the corresponding display columns CL1 ˜CLN.

In addition, the first gate driver circuits 121 in the second gate drivers 130_1 ˜ 130_N can be used to generate the first gate driving signals GS11 ˜ GS1N to the first gate lines GL11 ˜GL1N in the corresponding display columns CL1 ˜CLN , and the second gate driver circuit 122 in the second gate drivers 130_1 ˜ 130_N can be used to generate the second gate driving signals GS21 ˜ GS2N to the second gate lines GL21 ˜GL2N in the corresponding display columns CL1 ˜CLN .

For example, the first gate driver circuit 121 of the second gate driver 130_1 is coupled to the second end of the first gate line GL11 of the corresponding display column CL1, and the second gate driver of the second gate driver 130_1 The circuit 122 is coupled to the second end of the second gate line GL21 of the corresponding display column CL1, and the first gate driver circuit 121 and the second gate driver circuit 122 in the remaining second gate drivers can be connected accordingly. analogy.

Regarding the disposition relationship of the first pixels P111 ˜ P1NM and the second pixels P221 ˜ P2NM in the display panel 110 , for example, in the first display area DA1 of the display panel 110 , the first pixel in the display column CL1 is displayed. P111-P11M can be coupled to the first gate line GL11 disposed in the display column CL1, and the first pixels P1N1-P1NM in the display column CLN can be coupled to the first gate line GL1N disposed in the display column CLN , and the first pixels corresponding to the remaining display columns in the first display area DA1 can also be deduced by analogy.

In addition, in the second display area DA2 of the display panel 110, the second pixels P221-P22M in the display column CL1 can be coupled to the second gate line GL21 disposed in the display column CL1, and the second gate line GL21 in the display column CLN The two pixels P2N1 ˜ P2NM can be coupled to the second gate line GL2N disposed in the display row CLN, and the second pixels corresponding to the remaining display rows in the second display area DA2 can also be deduced by analogy.

For the part of the detailed circuits of the plurality of first pixels P111 - P1NM in the first display area DA1, the first pixel P111 is taken as an example for illustration. For example, the first pixel P111 can be controlled by the transistor T1 and the capacitor C1. constitute. The first end of the transistor T1 is coupled to the corresponding source line DL11 to receive the source driving signal DS11, the second end of the transistor T1 is coupled to the first end of the capacitor C1, and the control end of the transistor T1 It is coupled to the first gate line GL11 corresponding to the display column CL1 to receive the gate driving signal GS11. The second terminal of the capacitor C1 is coupled to the reference ground terminal. The part of the detailed circuit of the first pixel corresponding to the remaining display columns in the first display area DA1 can also be deduced by analogy.

For the part of the detailed circuits of the plurality of second pixels P221 ˜ P2NM in the second display area DA2 , the second pixel P221 is used as an example for illustration. For example, the second pixel P221 can be controlled by the transistor T2 and the capacitor C2 constitute. The first end of the transistor T2 is coupled to the corresponding source line DL21 to receive the source driving signal DS21, the second end of the transistor T2 is coupled to the first end of the capacitor C2, and the control end of the transistor T2 It is coupled to the second gate line GL21 corresponding to the display column CL1 to receive the gate driving signal GS21. The second terminal of the capacitor C2 is coupled to the reference ground terminal. The part of the detailed circuit of the second pixel corresponding to the remaining display columns in the second display area DA2 can also be deduced by analogy.

According to the configuration relationship of the above-mentioned embodiment in FIG. 1 , in this embodiment, the first gate lines GL11 ˜ GL1N and the second gate lines GL21 ˜ GL2N corresponding to the display columns CL1 ˜ CLN can be displayed along these display lines. The extending directions of the columns CL1 to CLN extend through the display panel 110 . In this way, in the case where the display panel 110 has two display areas DA1 and DA2, the display panel 110 of this embodiment may not need to disconnect the gate lines between the display areas DA1 and DA2, so as to avoid each Signal distortion occurs at the ends (or borders) of each gate line, thereby improving the quality of the display.

In such a design, when the display panel 110 has two display areas DA1 and DA2, the first gate driver circuits 121 in the first gate drivers 120_1 to 120_N and the second gate drivers 130_1 to 130_N The first gate driving signals GS11 ˜ GS1N can be provided to the first gate lines GL11 ˜ GL1N penetrating the display panel 110 , so that the first pixels P111 ˜ P1NM in the first display area DA1 can respond to the corresponding first gate lines Data is displayed by using the pole drive signals GS11 to GS1N and the source drive signals DS11 to DS1N. In addition, the first gate drivers 120_1 ˜ 120_N and the second gate driver circuits 122 in the second gate drivers 130_1 ˜ 130_N can provide the second gate driving signals GS21 ˜ GS2N to the second gates passing through the display panel 110 The lines GL21-GL2N enable the second pixels P221-P2NM in the second display area DA2 to display data according to the corresponding second gate driving signals GS21-GS2N and source driving signals DS21-DS2N.

FIG. 2 is a schematic diagram of a display device 200 according to another embodiment of the present invention. Referring to FIG. 2 , the display device 200 includes a display panel 210 , a plurality of first gate drivers 220_1 ˜ 220_N, a plurality of second gate drivers 230_1 ˜ 230_N, and a source driver 240 .

Different from the embodiment of FIG. 1 , in this embodiment, the display panel 210 has a first display area DA1 , a second display area DA2 and a third display area DA3 . Wherein, the first display area DA1 , the second display area DA2 and the third display area DA3 of the display panel 210 do not overlap with each other, and can be sequentially arranged along the horizontal direction. In other embodiments, the first display area DA1 , the second display area DA2 and the third display area DA3 of the display panel 210 can also be arranged in sequence along the vertical direction according to design requirements, which is not particularly limited in the present invention. .

The source driver 240 is coupled to a plurality of source lines (or data lines) DL11 -DL1N, a plurality of source lines (or data lines) DL21 -DL2N, and a plurality of source lines (or data lines) DL31 of the display panel 210 ~DL3N, for respectively providing source driving signals DS11 - DS1N, source driving signals DS21 - DS2N and source driving signals DS31 - DS3N to the display panel 210 . In this embodiment, the source lines DL11 - DL1N may be arranged in the first display area DA1 of the display panel 210 , the source lines DL21 - DL2N may be arranged in the second display area DA2 of the display panel 210 , and the source lines DL21 - DL2N may be arranged in the second display area DA2 of the display panel 210 The polar lines DL31 ˜ DL3N may be arranged in the third display area DA3 of the display panel 210 .

Therefore, the source driver 240 can respectively write the source driving signals DS11 ˜ DS1N to a plurality of pixels corresponding to the first display area DA1 of the display panel 210 , and write the source driving signals DS21 ˜ DS2N respectively to Corresponding to the plurality of pixels in the second display area DA2 of the display panel 210 , and writing the source driving signals DS31 ˜ DS3N to the plurality of pixels corresponding to the third display area DA3 of the display panel 210 , respectively. In this way, the display panel 210 of this embodiment can enable the first display area DA1 , the second display area DA2 and the third display area DA3 to independently display respective display data.

Specifically, the first display area DA1 of the display panel 210 has a plurality of first pixels P111-P1NM, the second display area DA2 of the display panel 210 has a plurality of second pixels P221-P2NM, and the first display panel 210 The three display areas DA3 have a plurality of third pixels P331 to P3NM. In addition, the first pixels P111 to P1NM, the second pixels P221 to P2NM, and the third pixels P331 to P3NM may be arranged in a plurality of display columns CL1 to CLN. For example, in this embodiment, the first pixels P111-P11M, the second pixels P221-P22M, and the third pixels P331-P3NM can be formed as the display column CL1, and the first pixels P1N1-P1NM, The second pixels P2N1-P2NM and the third pixels P3N1-P3NM can be formed as a display column CLN, and the remaining first, second, and third pixels can be deduced by analogy. Among them, the above-mentioned N and M are positive integers greater than 1.

On the other hand, different from the embodiment in FIG. 1 , in this embodiment, each display column CL1 ˜ CLN in the display panel 210 has corresponding three gate lines (that is, the first gate line, the two gate lines and a third gate line). For example, the display column CL1 of the display panel 210 has a first gate line GL11, a second gate line GL21 and a third gate line GL31, and the display column CLN of the display panel 210 has a first gate line GL1N, a The second gate line GL2N and the third gate line GL3N, and the rest of the display columns can be deduced by analogy.

In this embodiment, the first gate drivers 220_1 ˜ 220_N and the second gate drivers 230_1 ˜ 230_N may be disposed on both sides of the display panel 210 , respectively. Different from the embodiment of FIG. 1 , each of the first gate drivers 220_1 to 220_N in this embodiment includes a first gate driver circuit 221 , a second gate driver circuit 222 and a third gate driver circuit 223 , and these The first gate driver circuit 221, the second gate driver circuit 222 and the third gate driver circuit 223 in the first gate drivers 220_1-220_N are respectively coupled to the first gates in the corresponding display columns CL1-CLN Lines GL11-GL1N, second gate lines GL21-GL2N, and third gate lines GL31-GL3N.

In addition, the first gate driver circuits 221 in the first gate drivers 220_1 ˜ 220_N can be used to generate the first gate driving signals GS11 ˜ GS1N to the first gate lines GL11 ˜GL1N in the corresponding display columns CL1 ˜CLN , the second gate driver circuit 222 in the first gate drivers 220_1 ˜ 220_N can be used to generate the second gate driving signals GS21 ˜ GS2N to the second gate lines GL21 ˜ GL2N in the corresponding display columns CL1 ˜ CLN, And the third gate driver circuit 223 in the first gate drivers 220_1 ˜ 220_N can be used to generate the third gate driving signals GS31 ˜ GS3N to the third gate lines GL31 ˜GL3N in the corresponding display columns CL1 ˜CLN.

For example, the first gate driver circuit 221 of the first gate driver 220_1 is coupled to the first end of the first gate line GL11 of the corresponding display column CL1, and the second gate driver of the first gate driver 220_1 The circuit 222 is coupled to the first end of the second gate line GL21 of the corresponding display column CL1, and the third gate driver circuit 223 of the first gate driver 220_1 is coupled to the third gate of the corresponding display column CL1 The first end of line GL31. The first gate driver circuit 221 , the second gate driver circuit 222 and the third gate driver circuit 223 in the remaining first gate drivers can be deduced by analogy.

On the other hand, each of the second gate drivers 230_1 to 230_N in this embodiment includes a first gate driver circuit 221 , a second gate driver circuit 222 and a third gate driver circuit 223 . In addition, the first gate driver circuit 221 , the second gate driver circuit 222 and the third gate driver circuit 223 in the second gate drivers 230_1 ˜ 230_N are respectively coupled to the first gate driver circuit 223 in the corresponding display columns CL1 ˜CLN. A gate line GL11-GL1N, a second gate line GL21-GL2N and a third gate line GL31-GL3N.

In addition, the first gate driver circuits 221 in the second gate drivers 230_1 ˜ 230_N can be used to generate the first gate driving signals GS11 ˜ GS1N to the first gate lines GL11 ˜GL1N in the corresponding display columns CL1 ˜CLN , the second gate driver circuit 222 in the second gate drivers 230_1 ˜ 230_N can be used to generate the second gate driving signals GS21 ˜ GS2N to the second gate lines GL21 ˜ GL2N in the corresponding display columns CL1 ˜ CLN, And the third gate driver circuit 223 in the third gate drivers 230_1 ˜ 230_N can be used to generate the third gate driving signals GS31 ˜ GS3N to the third gate lines GL31 ˜GL3N in the corresponding display columns CL1 ˜CLN.

For example, the first gate driver circuit 221 of the second gate driver 230_1 is coupled to the second end of the first gate line GL11 of the corresponding display column CL1, and the second gate driver of the second gate driver 230_1 The circuit 222 is coupled to the second end of the second gate line GL21 of the corresponding display column CL1, and the third gate driver circuit 223 of the second gate driver 230_1 is coupled to the third gate of the corresponding display column CL1 The second end of line GL31. The first gate driver circuit 221 , the second gate driver circuit 222 and the third gate driver circuit 223 in the remaining second gate drivers can be deduced by analogy.

Regarding the disposition relationship of the first pixels P111-P1NM, the second pixels P221-P2NM, and the third pixels P331-P3NM in the display panel 210, for example, in the first display area DA1 of the display panel 210, the display The first pixels P111-P11M in the column CL1 can be coupled to the first gate line GL11 arranged in the display column CL1, and the first pixels P1N1-P1NM in the display column CLN can be coupled to the first gate line GL11 arranged in the display column CLN The first gate line GL1N in the first display area DA1 and the first pixels corresponding to the remaining display columns in the first display area DA1 can also be deduced and so on.

In addition, in the second display area DA2 of the display panel 210, the second pixels P221-P22M in the display column CL1 can be coupled to the second gate line GL21 disposed in the display column CL1, and the second gate line GL21 in the display column CLN The two pixels P2N1 ˜ P2NM can be coupled to the second gate line GL2N disposed in the display row CLN, and the second pixels corresponding to the remaining display rows in the second display area DA2 can also be deduced by analogy.

Besides, in the third display area DA3 of the display panel 210, the third pixels P331-P33M in the display column CL1 can be coupled to the third gate line GL31 disposed in the display column CL1, and the display column CLN The third pixels P3N1-P3NM in the display column can be coupled to the third gate line GL3N disposed in the display column CLN, and the third pixels corresponding to the remaining display columns in the third display area DA3 can also be deduced by analogy. .

For the detailed circuits of the plurality of first pixels P111 to P1NM of the first display area DA1 and the plurality of second pixels P221 to P2NM of the second display area DA2 shown in FIG. 2 , please refer to FIG. 1 . The descriptions of the plurality of first pixels P111-P1NM of the first display area DA1 and the plurality of second pixels P221-P2NM of the second display area DA2 are analogous, and will not be repeated here.

Different from the embodiment shown in FIG. 1 , for the detailed circuits of the plurality of third pixels P331 ˜ P3NM in the third display area DA3 , the third pixel P331 is used as an example for illustration. For example, the third pixel P331 It can be composed of transistor T3 and capacitor C3. The first end of the transistor T3 is coupled to the corresponding source line DL31 to receive the source driving signal DS31, the second end of the transistor T3 is coupled to the first end of the capacitor C3, and the control end of the transistor T3 It is coupled to the third gate line GL31 corresponding to the display column CL1 to receive the gate driving signal GS31. The second terminal of the capacitor C3 is coupled to the reference ground terminal. The part of the detailed circuit of the third pixel corresponding to the remaining display columns in the third display area DA3 can also be deduced by analogy.

According to the configuration relationship of the above embodiment in FIG. 2 , in this embodiment, the first gate lines GL11 ˜GL1N, the second gate lines GL21 ˜GL2N, and the third gate electrodes corresponding to the display columns CL1 ˜CLN are displayed. The lines GL31 ˜ GL3N may pass through the display panel 210 along the extending direction of the display columns CL1 ˜ CLN. In this way, when the display panel 210 has three display areas DA1 , DA2 and DA3 , the display panel 210 of this embodiment does not need to disconnect the gate lines between the display areas DA1 , DA2 and DA3 , so as to avoid signal distortion at the end (or at the boundary) of each gate line, thereby improving the quality of the display image.

In such a design, when the display panel 210 has three display areas DA1, DA2 and DA3, the first gate driver among the first gate drivers 220_1-220_N and the second gate drivers 230_1-230_N The circuit 221 can provide the first gate driving signals GS11-GS1N to the first gate lines GL11-GL1N running through the display panel 210, so that the first pixels P111-P1NM in the first display area DA1 can A gate driving signal GS11-GS1N and a source driving signal DS11-DS1N display data. In addition, the first gate drivers 220_1 ˜ 220_N and the second gate driver circuits 222 in the second gate drivers 230_1 ˜ 230_N can provide the second gate driving signals GS21 ˜ GS2N to the second gates passing through the display panel 210 The lines GL21-GL2N enable the second pixels P221-P2NM in the second display area DA2 to display data according to the corresponding second gate driving signals GS21-GS2N and source driving signals DS21-DS2N.

In addition, in this embodiment, the first gate drivers 220_1 ˜ 220_N and the third gate driver circuit 223 in the second gate drivers 230_1 ˜ 230_N can provide the third gate driving signals GS31 ˜ GS3N to penetrate through the display panel The third gate lines GL31-GL3N of 210, so that the third pixels P331-P3NM in the third display area DA3 can be displayed according to the corresponding third gate driving signals GS31-GS3N and source driving signals DS31-DS3N material.

In particular, in the above-mentioned embodiments of FIG. 1 and FIG. 2, those skilled in the art can determine the display area, gate driver circuit, display column, gate line, source line, The numbers of the gate driving signals, the source driving signals and the pixels are not limited to the above-mentioned numbers.

FIG. 3 is a flowchart of a driving method of a display device according to an embodiment of the present invention. In step S310, the display device may provide a display panel having a plurality of display columns and a plurality of gate lines. In step S320, the display device may provide a source driver to generate a plurality of source driving signals to the display panel. In S330, the display device may provide a plurality of first gate drivers and a plurality of second gate drivers disposed on two sides of the display panel to respectively generate a plurality of gate driving signals to a plurality of gate lines. In S340, the display device may have each display column corresponding to the first gate line and the second gate line, so that the first gate line is coupled to a plurality of first pixels of the corresponding display column, and the second gate line is The gate lines are coupled to a plurality of second pixels of the corresponding display column.

The implementation details of each step have been described in detail in the foregoing embodiments and implementation manners, and will not be repeated here.

To sum up, the display panel of the display device according to the embodiments of the present invention can be designed with a plurality of gate lines running through the display panel along the extending directions of the plurality of display columns, so that the display panel has Under the requirements of multiple display areas, it is not necessary to disconnect the wiring of the gate lines between the multiple display areas. In this way, the display device of the present invention can effectively avoid the occurrence of signal distortion at the end (or at the boundary) of each gate line, thereby improving the quality of the display image.

100, 200: Display device 110, 210: Display panel 120_1～120_N, 220_1～220_N: the first gate driver 121, 221: The first gate driver circuit 122, 222: Second gate driver circuit 223: Third gate driver circuit 130_1～130_N, 230_1～230_N: the second gate driver 140, 240: source driver C1, C2, C3: capacitors CL1～CLN: Display column DA1: The first display area DA2: The second display area DA3: The third display area DL11~DL1N, DL21~DL2N, DL31~DL3N: source line DS11～DS1N, DS21～DS2N, DS31～DS3N: source drive signal GL11～GL1N: The first gate line GL21～GL2N: The second gate line GL31～GL3N: The third gate line GS11～GS1N: The first gate drive signal GS21～GS2N: The second gate drive signal GS31～GS3N: The third gate drive signal P111～P1NM: The first pixel P221～P2NM: The second pixel P331～P3NM: Second pixel S310～S340: Steps T1, T2, T3: Transistor

FIG. 1 is a schematic diagram of a display device according to an embodiment of the present invention. FIG. 2 is a schematic diagram of a display device according to another embodiment of the present invention. FIG. 3 is a flowchart of a driving method of a display device according to an embodiment of the present invention.

100: Display device

110: Display panel

120_1~120_N: The first gate driver

121: First gate driver circuit

122: Second gate driver circuit

130_1~130_N: The second gate driver

140: source driver

C1, C2: capacitors

CL1~CLN: display columns

DA1: The first display area

DA2: The second display area

DL11~DL1N, DL21~DL2N: source line

DS11~DS1N, DS21~DS2N: source drive signal

GL11~GL1N: The first gate line

GL21~GL2N: The second gate line

GS11~GS1N: The first gate drive signal

GS21~GS2N: The second gate drive signal

P111~P1NM: The first pixel

P221~P2NM: Second pixel

T1, T2: Transistor

Claims (12)

A display device, comprising: a display panel having a plurality of display columns and a plurality of gate lines; a source driver coupled to the display panel to generate a plurality of source driving signals to the display panel; and a plurality of A first gate driver and a plurality of second gate drivers are respectively disposed on both sides of the display panel, and the first gate drivers and the second gate drivers are respectively coupled to the gate lines, so as to generating a plurality of gate driving signals to the gate lines, wherein each of the display columns corresponds to a first gate line, a second gate line and a third gate line, the first gate line is coupled to to a plurality of first pixels corresponding to the display column, the second gate line is coupled to a plurality of second pixels corresponding to the display column, and the third gate line is coupled to the corresponding display column multiple third pixels. The display device of claim 1, wherein the gate lines run through the display panel along the extending direction of the display columns. The display device of claim 1, wherein each of the first gate drivers comprises: a first gate driver circuit coupled to the first end of the first gate line of the corresponding display column to generate a first gate driving signal to the corresponding first pixels of the display column; and a second gate driver circuit, coupled to the first end of the second gate line of the corresponding display row, to generate a second gate driving signal to the second pixels of the corresponding display row , and each of the second gate drivers includes: the first gate driver circuit, coupled to the second end of the first gate line of the corresponding display row, to generate the first gate driving signal to the first pixels corresponding to the display row; and the second gate driver circuit, coupled to the second end of the second gate line corresponding to the display row, to generate the second gate driver signal to the second pixels corresponding to the display column. The display device of claim 1, wherein the first pixels are arranged in a first display area of the display panel, the second pixels are arranged in a second display area of the display panel, and The first display area and the second display area are sequentially arranged along a horizontal direction. The display device of claim 1, wherein each of the first gate drivers comprises: a first gate driver circuit coupled to the first end of the first gate line of the corresponding display column to generate a first gate driving signal to the corresponding first pixels of the display row; a second gate driver circuit coupled to the first end of the second gate line corresponding to the display row, to generating a second gate driving signal to the second pixels corresponding to the display column; and a third gate driver circuit, coupled to the first end of the third gate line corresponding to the display row, to generate a third gate driving signal to the third pixels of the corresponding display row , and each of the second gate drivers includes: the first gate driver circuit, coupled to the second end of the first gate line of the corresponding display row, to generate the first gate driving signal to the first pixels corresponding to the display row; the second gate driver circuit, coupled to the second end of the second gate line corresponding to the display row, to generate the second gate driving signal to the second pixels of the corresponding display row; and the third gate driver circuit, coupled to the second end of the third gate line corresponding to the display row, to generate the third gate driving signals to the third pixels corresponding to the display column. The display device according to claim 1, wherein the first pixels are arranged in a first display area of the display panel, the second pixels are arranged in a second display area of the display panel, the The third pixels are disposed in a third display area of the display panel, and the first display area, the second display area and the third display area are sequentially arranged along a horizontal direction. A driving method of a display device, comprising: providing a display panel with a plurality of display columns and a plurality of gate lines; providing a source driver to generate a plurality of source driving signals to the display panel; providing a plurality of first gate drivers and a plurality of second gate drivers disposed on both sides of the display panel to respectively generate a plurality of gate driving signals to the gate lines; and corresponding to each of the display columns A first gate line, a second gate line and a third gate line, the first gate line is coupled to a plurality of first pixels of the corresponding display row, and the second gate line is connected The pole lines are coupled to the corresponding second pixels of the display column, and the third gate lines are coupled to the corresponding third pixels of the display column. The driving method of claim 7, wherein the gate lines run through the display panel along the extending direction of the display columns. The driving method of claim 7, wherein the first gate drivers and the second gate drivers disposed on both sides of the display panel are provided to respectively generate the gate driving signals to the gates The step of the pole line includes: providing a first gate driver circuit coupled to the first end of the first gate line of the corresponding display column, so as to generate a first gate driving signal to the corresponding display column the first pixels; providing a second gate driver circuit coupled to the first end of the second gate line of the corresponding display row to generate a second gate driving signal to the corresponding displaying the second pixels of the row; providing the first gate driver circuit coupled to the second end of the first gate line of the corresponding display row to generate the first gate driving signal to the corresponding the first pixels of the display row; and providing the second gate driver circuit coupled to the second end of the second gate line of the corresponding display row to generate the second gate driving signal to the second pixels of the corresponding display row . The driving method of claim 7, wherein the first pixels are arranged in a first display area of the display panel, the second pixels are arranged in a second display area of the display panel, and The first display area and the second display area are sequentially arranged along a horizontal direction. The driving method of claim 7, wherein the first gate drivers and the second gate drivers disposed on both sides of the display panel are provided to respectively provide the gate driving signals to the gates The step of the pole line includes: providing a first gate driver circuit coupled to the first end of the first gate line of the corresponding display column, so as to generate a first gate driving signal to the corresponding display column the first pixels; providing a second gate driver circuit coupled to the first end of the second gate line of the corresponding display row to generate a second gate driving signal to the corresponding displaying the second pixels of the row; providing a third gate driver circuit coupled to the first end of the third gate line of the corresponding display row to generate a third gate driving signal to the corresponding the third pixels of the display row; provide the first gate driver circuit coupled to the second end of the first gate line of the corresponding display row to generate the first gate drive signal to the corresponding first pixels of the display row; providing the second gate driver circuit coupled to the second end of the second gate line of the corresponding display row to generate the second gate driving signal to the second pixels of the corresponding display row and providing the third gate driver circuit coupled to the second end of the third gate line of the corresponding display row to generate the third gate driving signal to the third ones of the corresponding display row pixel. The driving method of claim 7, wherein the first pixels are arranged in a first display area of the display panel, the second pixels are arranged in a second display area of the display panel, the The third pixels are disposed in a third display area of the display panel, and the first display area, the second display area and the third display area are sequentially arranged along a horizontal direction.

Images