TWI766979B - 用於半導體封裝處理之方法與設備 - Google Patents
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Abstract
一種使用化學機械平坦化(CMP)的散出處理,降低介於半導體晶粒及重新組成的晶圓之周圍包覆成形之間的段差高度。重新組成的晶圓藉由對至少一個晶粒的背側包覆成形而形成,此至少一個晶粒放置為以反應側面向下。重新組成的晶圓接著定向以暴露晶粒及反應側。接著在重新組成的晶圓上形成聚合物層。CMP處理接著移除部分的聚合物層,直到獲得晶粒表面上方的特定厚度,而降低介於晶粒表面之頂部上的聚合物層及鄰接成形合成表面上的聚合物層之間的段差高度。CMP處理亦可在重新組成的晶圓上形成後續重新分配層之後實行。
Description
本案原理之實施例大致關於在封裝半導體裝置中所使用的半導體處理。
半導體晶圓經處理以在晶圓表面上形成結構。在晶圓的特定區域上的結構可鏈結在一起以形成微電路。在處理期間晶圓可在晶圓的表面上構成許多不同的微電路。一旦晶圓結束處理之後,切割分離或單分化晶圓,以將微電路分離成半導體「晶片」。晶片通常含有需要與外部部件互相作用的複雜電路。晶片的內部電路太小而無法直接連接至外部部件。為了克服外部連接問題,形成引出導線(lead out)以將晶片的內部電路連接至允許用於外部連接的墊片或焊球。引出導線在半導體晶片的接續封裝處理期間,以已知稱為「重新分配層」的方式形成。
來自不同晶圓的晶片可藉由將晶片放置於表面上且在晶片上灌注成形化合物而結合在一起,以再次形成新的晶圓或「重新組成的」晶圓。成形化合物硬化使得晶片可整合處置,而用於重新分配層處理。通用的技術為將重新組成的晶圓結合至暫時的載具,以在處理期間提供剛性。然而,暫時結合及接續的拆解為昂貴且耗時的。此外,使用暫時載具的技術亦需要額外的處理步驟,而對重新分配層處理添加成本且減少產量。
因此,發明人已提供用於重新分配層處理之改良的方法及裝置。
在某些實施例中,一種處理半導體基板之方法,包含以下步驟:對至少一個晶粒的非反應側包覆成形,以形成重新組成的晶圓;定向重新組成的晶圓,以暴露具有至少一個晶粒之反應側的第一側;在重新組成的晶圓之第一側上沉積第一材料層;在重新組成的晶圓之第一側上沉積第一材料層;及平坦化第一材料層而並未暴露至少一個晶粒的反應側。在某些實施例中,方法可進一步包括一個、超過一個或所有的以下步驟:在平坦化第一材料層之後,於第一材料層中形成至少一個貫孔,貫孔與至少一個晶粒電氣連接,且延伸至第一材料層的第一表面;在重新組成的晶圓上形成第一重新分配層,在第一重新分配層上沉積第二材料層,及平坦化形成於第一重新分配層上的第二材料層;在至少一個反應側上形成重新分配層,該重新分配層具有至少兩個引出導線(lead out),該等至少兩個引出導線具有大約大於0/0 µm至小於或等於大約2/2 µm的線及間隔;在平坦化第二材料層之後,於第二材料層中形成至少一個貫孔,貫孔與第一重新分配層電氣連接,且延伸至第二材料層的第二表面;在重新組成的晶圓之第二側上使用載具,以於後續處理期間提供剛性;在重新組成的晶圓上沉積第一材料層之前,於重新組成的晶圓上建立結構;材料層為基於聚合物的材料;平坦化處理為化學機械平坦化處理;及/或使用旋轉塗佈處理在重新組成的晶圓上沉積至少一個材料層。
在某些實施例中,一種處理半導體基板之方法,包含以下步驟:將至少一個晶粒放置在基板表面上,使得至少一個晶粒的至少一個反應側朝向基板表面;對至少一個晶粒的至少一個非反應側包覆成形,以形成重新組成的晶圓;固化包覆成形;從基板表面釋放重新組成的晶圓,且暴露具有至少一個晶粒之至少一個反應側的重新組成的晶圓之第一側;在重新組成的晶圓之第一側上旋轉塗佈第一聚合物層;及化學機械平坦化第一聚合物層,而在靠近至少一個晶粒及鄰接表面之轉換點中降低段差高度距離。在某些實施例中,方法可進一步包括一個、超過一個或所有的以下步驟:降低至少一個段差高度,直到至少一個段差高度大約大於0 µm至小於或等於大約1 µm;在化學機械平坦化第一聚合物層之後,於第一聚合物層中形成至少一個貫孔,貫孔與至少一個晶粒之至少一個反應側電氣連接,且延伸至第一聚合物層的第一表面;在重新組成的晶圓上形成第一重新分配層,在第一重新分配層上旋轉塗佈第二聚合物層,及化學機械平坦化形成於第一重新分配層上的第二聚合物層;在至少一個反應側上形成重新分配層,該重新分配層具有至少兩個引出導線,該等至少兩個引出導線具有大約大於0/0 µm至小於或等於大約2/2 µm的線及間隔;在化學機械平坦化第二聚合物層之後,於第二聚合物層中形成至少一個貫孔,貫孔與第一重新分配層電氣連接,且延伸至第二聚合物層的第二表面;在重新組成的晶圓之第二側上使用載具,以於處理期間提供剛性;在重新組成的晶圓上沉積第一聚合物層之前,於重新組成的晶圓上建立結構。
在某些實施例中,一種半導體部件,包含:具有反應側的回復包覆成形的晶粒;及在反應側上的重新分配層,該重新分配層具有至少兩個引出導線,該等至少兩個引出導線具有大約大於0/0 µm至小於或等於大約2/2 µm的線及間隔。在某些實施例中,至少一個段差高度藉由回復包覆成形的晶粒之反應側的表面及鄰接表面的轉換形成,段差高度大約大於0 µm至小於或等於大約1 µm。
使用一種化學機械平坦化(CMP)處理,以對重新分配層(RDL)精細間距圖案化。精細間距圖案化藉由在重新組成的晶圓上降低介於晶粒及包覆成形之間的段差高度而完成。處理有益地提供建立具有強化的輸入/輸出(I/O)能力之優點的RDL之較低成本及較高產量的方法。處理亦可無須載具而用於實行重新組成的晶圓。另一優點為對不同晶粒或晶片尺寸的段差高度之間的差異藉由處理而自動地補償。自動補償為有益地,因為自動補償對系統中封裝(SiP)整合提供健全的晶粒對晶粒內部連接。處理可以各種方式及處理流程完成。為了簡述起見,給定的範例基於使用成形的晶圓重新組成。
第1A-1D圖分別圖示用於形成重新組成的晶圓之處理100。最初,在第1A圖中,使用基板102以透過沉積、蝕刻及電鍍等等來形成半導體結構。通常在藉由格狀圖案104表示的橫跨基板102之表面上形成相同的結構。各個方格為晶片或「晶粒」,例如晶粒106。為了簡述起見,將使用晶粒106作為後續處理之範例。然而,可以類似於對晶粒106所述的此等處理來處理晶圓之任何一個或所有的晶粒。基板102被切割分離或單分化成個別晶粒(包括晶粒106)。在第1B圖中所顯示的某些實施例中,拾起晶粒106且與其他晶粒(來自相同的晶圓及/或其他單分化的晶圓)一起放置在新的基板108上。以此方式在新的基板108上放置晶粒106,使得待形成RDL之晶粒106的側(「反應側」)定向向下(例如,「面向」下或反應側向下)。晶粒通常分隔開來以在後續RDL形成期間允許用於形成引出導線的空間。此空間允許引出導線「散出」,且完成引出導線間隔的處理通常稱為散出晶圓級封裝(FOWLP)。在第1C圖中,包覆成形化合物110接著灌注於反應側向下的晶粒上,包括晶粒106。包覆成形化合物110通常覆蓋晶粒的整個背側。當包覆成形化合物110固化時,包覆成形化合物110從新的基板108釋放而形成重新組成的晶圓112。如第1D圖中所描繪,重新組成的晶圓112接著定向(例如,翻面)以暴露諸如晶粒106之晶粒的反應側。若使用在包覆成形化合物110中懸吊的晶粒,其中包覆成形化合物110以反應側向上的方式固化,則重新組成的晶圓112在後續處理之前無須翻面。在第1D圖中的晶粒106現嵌入重新組成的晶圓112中,且在反應側向上的定向(暴露RDL側)中。
第2圖顯示晶粒106及部分的重新組成的晶圓112之剖面視圖200。晶粒106顯示為以反應側向上的定向(暴露RDL側)嵌入包覆成形化合物110中。晶粒106的頂部表面216通常向上突出超過鄰接頂部表面218,例如超過包覆成形化合物110的頂部表面222。突出在晶粒106及鄰接頂部表面218之間靠近轉換點220處建立段差高度214的距離 h
。段差高度界定為晶粒上方表面及鄰接表面之間介於晶粒及另一材料之間轉換點處的高度差異距離。段差高度214限制RDL圖案化解析度(RDL中的線寬及引出導線的間隔)。可取得的當前技術正因為段差高度214,而並未解決在段差高度上生產超精細間距RDL,例如在後續處理層中所形成的此等RDL。
使用本案原理之實施例來降低藉由段差高度214所造成的後續段差高度有益地准許RDL中的精細間距。某些實施例降低段差高度以產生於晶粒/鄰接表面轉換點處大約0.0 µm至小於或等於大約1.0 µm的段差高度,用於後續處理層。段差高度的降低允許具有降低的L/S(線及間隔)之更精細間距的RDL,而有益地准許在給定的空間中構成更小的晶片及/或更多的引出導線。本案原理之某些實施例有益地准許橫跨晶粒/鄰接表面轉換點處小於大約2/2 µm的L/S。某些實施例比傳統方法亦有利地具有更少的處理、耗能及裝備,而節省成本、時間且使用較少的裝備。
在第3圖中,於重新組成的晶圓112上沉積第一材料層302,如晶粒106及部分的重新組成的晶圓112的剖面視圖300中所顯示地覆蓋包覆成形化合物110及晶粒106。第一材料層302的厚度通常為均勻的,且將對包覆成形化合物110而言比晶粒106的絕對高度更高。高度差(段差高度 h’
314)為無法在橫跨晶粒成形界面上圖案化精細間距RDL的原因。目前,所得到的段差高度 h’
在工業上並未解決。沉積材料層302使得在包覆成形化合物110的頂部表面222上的第一材料層302之厚度304大約等於或大於晶粒106的頂部表面216。舉例而言,第一材料層302可包括基於聚合物的材料及其他材料。在某些實施例中,可在沉積第一材料層302之後,於重新組成的晶圓112上形成額外的結構(未顯示)(例如,銅內部連接等等)。
在第4圖中,於平坦化處理之後顯示晶粒106及部分的重新組成的晶圓112之剖面視圖400。諸如CMP處理的平坦化處理降低第一材料層302,直到獲得在晶粒106的頂部表面216上方特定的厚度 t
428。在靠近轉換點220中介於晶粒106上方的表面430及鄰接頂部表面218’(現為包覆成形化合物110上方第一材料層302的頂部表面426)的段差高度414與段差高度 h’
314比較時實質上降低。亦可平坦化後續的RDL以降低段差高度。若初始段差高度(例如,段差高度 h’
314)實質上降低,則降低可消除實行後續平坦化的任何因素。在某些實施例中,可於平坦化之後在材料層302中建立至少一個貫孔432。至少一個貫孔432與晶粒106電氣連接,且延伸至第一材料層302的表面430。
第5圖顯示在重新組成的晶圓112上形成第二材料層502之後的剖面視圖500。RDL 504已在第一材料層302上形成。可選擇性地在第二材料層502上實行額外的平坦化處理,以降低任何段差高度轉換,且進一步改善後續材料層中後續RDL的間距。此外,可形成貫孔532以與RDL 504電氣連接,且延伸至第二材料層502的頂部表面506。第6圖顯示在重新組成的晶圓112上已形成第(N+1)層的材料層602之後的剖面視圖600。在第N層材料層(例如,第二材料層502)上已經形成第N層RDL 604。可選擇性地在第(N+1)層材料層602上實行額外的平坦化處理,以降低任何段差高度轉換且進一步改善後續材料層中後續RDL的間距。此外,可形成貫孔632以與第N層RDL 604電氣連接,且延伸至第(N+1)層材料層602的頂部表面606。N代表大淤1的正整數。
在第7圖中,描繪一種用於處理半導體的方法。儘管方法700以特定順序顯示功能性方塊圖,但處理並非必須以一個特定順序實行。某些處理可重複且某些處理的群組可重複。以相同的方式,某些處理可在其他處理之前完成,且依此類推。方法700藉由將晶粒回復包覆成形以建立重新組成的晶圓702而開始。舉例而言,晶粒從一或更多單分化的晶圓拾起且放置。晶粒可來自不同的晶圓,且亦可具有各種尺寸及厚度。當晶粒的反應側面向下的同時將包覆成形化合物灌注在晶粒的背側(非反應側)上。接著定向(例如,翻面)重新組成的晶圓以用於進一步處理704。定向處理暴露重新組成的晶圓之晶粒的反應側。在某些實施例中,可使用載具以在後續處理期間提供重新組成的晶圓之剛性。接著如先前所述,在重新組成的晶圓上沉積材料層706。諸如銅內部連接/結構及其他結構的連接性結構亦可與材料層一起形成於重新組成的晶圓上。材料層可為基於聚合物的材料或其他材料。可使用例如旋轉塗佈及其他處理的處理來沉積材料層。旋轉塗佈可使用旋轉塗佈工具及/或其他沉積工具來完成,例如原子層沉積(ALD)工具或物理氣相沉積(PVD)工具及類似者。
接著在重新組成的晶圓上實行平坦化處理,以降低介於晶粒及鄰接表面(例如,包覆成形化合物的表面)之間的段差高度轉換708。平坦化處理可包括CMP、背研磨及/或其他處理,以平坦化重新組成的晶圓。在某些實施例中,可實行CMP處理達大約1分鐘至大約30分鐘的時間。平坦化處理通常在室溫(大約攝氏15度至大約攝氏30度)下實行。可增加平坦化處理溫度且僅受限於包覆成形化合物之溫度限制。舉例而言,典型的包覆成形化合物在小於大約攝氏160度的溫度中為可作用的。接著在重新組成的晶圓上形成RDL 710。在某些實施例中,可在諸如聚合物層的後續材料層上實行平坦化。在某些實施例中,本案原理之處理有益地提供大約大於0 µm至小於或等於大約1 µm之降低的段差高度,及具有至少兩個引出導線的重新分配層,此至少兩個引出導線具有大約大於0/0 µm至小於或等於大約2/2 µm之線及間隔。
第8圖圖示圖表800,顯示本處理之某些實施例可達成的段差高度之實質上降低。顯示介於晶粒的表面810及鄰接表面808之間的轉換點802。垂直軸804從0至無限大代表介於表面之間的段差高度距離。水平軸806代表自轉換點802的距離,其中轉換點802使用作為原點「0」。在典型的處理中,段差高度值以虛線812顯示。如從圖表800可見,鄰接表面808的段差高度從低處開始且於轉換點802處大幅度增加至晶粒的表面810(在圖表800中從左移動至右)。本案原理之某些實施例有益地產生如實線814所顯示的結果。當使用藉由實線814所代表的本處理之實施例時,與藉由虛線812代表的典型處理相比較。段差高度實質上降低的優點可見於圖表800中。
儘管以上導向本案原理之實施例,可衍生本案原理之其他及進一步實施例而並未悖離本案的基本範疇。
100‧‧‧處理102‧‧‧基板104‧‧‧格狀圖案106‧‧‧晶粒108‧‧‧基板110‧‧‧化合物112‧‧‧晶圓200‧‧‧剖面視圖214‧‧‧段差高度216‧‧‧頂部表面218‧‧‧頂部表面220‧‧‧轉換點222‧‧‧頂部表面300‧‧‧剖面視圖302‧‧‧材料304‧‧‧厚度314‧‧‧段差高度400‧‧‧剖面視圖414‧‧‧段差高度426‧‧‧頂部表面428‧‧‧厚度430‧‧‧表面432‧‧‧貫孔500‧‧‧剖面視圖502‧‧‧材料504‧‧‧RDL506‧‧‧頂部表面532‧‧‧貫孔600‧‧‧剖面視圖602‧‧‧材料604‧‧‧RDL606‧‧‧表面632‧‧‧貫孔700‧‧‧方法702-710‧‧‧步驟800‧‧‧圖表802‧‧‧轉換點804‧‧‧垂直軸806‧‧‧水平軸808‧‧‧表面810‧‧‧表面812‧‧‧虛線814‧‧‧實線
如上簡要概述且在以下更詳細討論的本案原理之實施例可藉由參考隨附圖式中描繪的原理之圖示性實施例而理解。然而,隨附圖式僅圖示本案原理之通常實施例,且因此不應考慮為範疇之限制,因為本案原理認可其他均等效果的實施例。
第1A-1D圖分別描繪處理之階段,以根據本案原理之某些實施例建立重新組成的晶圓。
第2圖根據本案原理的某些實施例,描繪重新組成的晶圓之剖面視圖。
第3圖根據本案原理的某些實施例,描繪具有聚合物層之重新組成的晶圓之剖面視圖。
第4圖根據本案原理的某些實施例,描繪在化學機械處理之後重新組成的晶圓之剖面視圖。
第5圖根據本案原理的某些實施例,描繪具有單一重新分配層之重新組成的晶圓之剖面視圖。
第6圖根據本案原理的某些實施例,描繪具有多重重新分配層之重新組成的晶圓之剖面視圖。
第7圖為根據本案原理的某些實施例之處理重新組成的晶圓之方法。
第8圖為圖表,根據本案原理的某些實施例圖示所獲得的改良。
為了促進理解,已儘可能地使用相同的元件符號來代表共通圖式中相同的元件。圖式並非按照尺寸繪製且可能為了清楚起見而簡化。一個實施例的元件及特徵可有利地併入其他實施例中而無須進一步說明。
國內寄存資訊 (請依寄存機構、日期、號碼順序註記) 無
國外寄存資訊 (請依寄存國家、機構、日期、號碼順序註記) 無
106‧‧‧晶粒
110‧‧‧化合物
112‧‧‧晶圓
214‧‧‧段差高度
216‧‧‧頂部表面
220‧‧‧轉換點
222‧‧‧頂部表面
300‧‧‧剖面視圖
302‧‧‧材料
304‧‧‧厚度
314‧‧‧段差高度
Claims (17)
- 一種處理一半導體基板之方法,包含以下步驟:對至少一個晶粒的一非反應側包覆成形(overmolding),以形成一重新組成的晶圓;定向該重新組成的晶圓,以暴露具有該至少一個晶粒之至少一個反應側的一第一側;在該重新組成的晶圓之該第一側上沉積一第一基於聚合物材料層;及平坦化該第一基於聚合物材料層而並未暴露該至少一個晶粒的該反應側。
- 如請求項1所述之方法,進一步包含以下步驟:在平坦化該第一基於聚合物材料層之後,於該第一基於聚合物材料層中形成至少一個貫孔,該貫孔與該至少一個晶粒電氣連接,且延伸至該第一基於聚合物材料層的一第一表面。
- 如請求項1所述之方法,進一步包含以下步驟:在該重新組成的晶圓上形成一第一重新分配層;在該第一重新分配層上沉積一第二基於聚合物材料層;及 平坦化形成於該第一重新分配層上的該第二基於聚合物材料層。
- 如請求項3所述之方法,進一步包含以下步驟:在該至少一個反應側上形成一重新分配層,該重新分配層具有至少兩個引出導線(lead out),該等至少兩個引出導線具有大約大於0/0μm至小於或等於大約2/2μm的線及間隔。
- 如請求項3所述之方法,進一步包含以下步驟:在平坦化該第二基於聚合物材料層之後,於該第二基於聚合物材料層中形成至少一個貫孔,該貫孔與該第一重新分配層電氣連接,且延伸至該第二基於聚合物材料層的一第二表面。
- 如請求項1所述之方法,進一步包含以下步驟:在該重新組成的晶圓之一第二側上使用一載具,以於後續處理期間提供剛性。
- 如請求項1所述之方法,進一步包含以下步驟:在該重新組成的晶圓上沉積該第一基於聚合物材料層之前,於該重新組成的晶圓上建立結構。
- 如請求項1所述之方法,進一步包含以下步驟: 使用化學機械平坦化來平坦化該第一基於聚合物材料層。
- 如請求項1所述之方法,進一步包含以下步驟:使用一旋轉塗佈處理在該重新組成的晶圓上沉積至少一個基於聚合物材料層。
- 一種處理一半導體基板之方法,包含以下步驟:將至少一個晶粒放置在一基板表面上,使得該至少一個晶粒的至少一個反應側朝向該基板表面;對該至少一個晶粒的至少一個非反應側包覆成形,以形成一重新組成的晶圓;固化該包覆成形;從該基板表面釋放該重新組成的晶圓,且暴露具有該至少一個晶粒之該至少一個反應側的該重新組成的晶圓之一第一側;在該重新組成的晶圓之該第一側上旋轉塗佈一第一聚合物層;及化學機械平坦化該第一聚合物層,而在靠近該至少一個晶粒及一鄰接表面之一轉換點中降低段差高度距離。
- 如請求項10所述之方法,進一步包含以下 步驟:降低至少一個段差高度,直到該至少一個段差高度大約大於0μm至小於或等於大約1μm。
- 如請求項10所述之方法,進一步包含以下步驟:在化學機械平坦化該第一聚合物層之後,於該第一聚合物層中形成至少一個貫孔,該貫孔與該至少一個晶粒之該至少一個反應側電氣連接,且延伸至該第一聚合物層的一第一表面。
- 如請求項10所述之方法,進一步包含以下步驟:在該重新組成的晶圓上形成一第一重新分配層;在該第一重新分配層上旋轉塗佈一第二聚合物層;及化學機械平坦化形成於該第一重新分配層上的該第二聚合物層。
- 如請求項13所述之方法,進一步包含以下步驟:在該至少一個反應側上形成一重新分配層,該重新分配層具有至少兩個引出導線,該等至少兩個引出導線具有大約大於0/0μm至小於或等於大約2/2μm的線及間隔。
- 如請求項13所述之方法,進一步包含以下步驟:在化學機械平坦化該第二聚合物層之後,於該第二聚合物層中形成至少一個貫孔,該貫孔與該第一重新分配層電氣連接,且延伸至該第二聚合物層的一第二表面。
- 如請求項10所述之方法,進一步包含以下步驟:在該重新組成的晶圓之一第二側上使用一載具,以於處理期間提供剛性。
- 如請求項10所述之方法,進一步包含以下步驟:在該重新組成的晶圓上沉積該第一聚合物層之前,於該重新組成的晶圓上建立結構。
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US15/634,012 US10515927B2 (en) | 2017-04-21 | 2017-06-27 | Methods and apparatus for semiconductor package processing |
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US11605570B2 (en) | 2020-09-10 | 2023-03-14 | Rockwell Collins, Inc. | Reconstituted wafer including integrated circuit die mechanically interlocked with mold material |
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US10515927B2 (en) | 2019-12-24 |
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CN110520975A (zh) | 2019-11-29 |
CN110520975B (zh) | 2023-09-19 |
US20180308822A1 (en) | 2018-10-25 |
KR20190132550A (ko) | 2019-11-27 |
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