TWI754023B - Pick-up method, pick-up device, and mounting device - Google Patents

Pick-up method, pick-up device, and mounting device Download PDF

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TWI754023B
TWI754023B TW107108652A TW107108652A TWI754023B TW I754023 B TWI754023 B TW I754023B TW 107108652 A TW107108652 A TW 107108652A TW 107108652 A TW107108652 A TW 107108652A TW I754023 B TWI754023 B TW I754023B
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semiconductor wafer
transfer plate
electrostatic transfer
carrying surface
charging
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TW201903912A (en
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岩出卓
新井義之
稲垣潤
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日商東麗工程股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67712—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Die Bonding (AREA)
  • Supply And Installment Of Electrical Components (AREA)
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Abstract

本發明之課題在於降低黏著力等保持力之影響而可靠性較高地進行半導體晶片之拾取及安裝。具體而言，本發明之拾取方法之特徵在於，其係藉由最表層具有半導體晶片載持面13之靜電轉印板而拾取半導體晶片1之方法，且至少具有以下步驟：帶電步驟，其係於半導體晶片載持面13形成所需之帶電圖案；及拾取步驟，其係自所排列之複數個半導體晶片1中，藉由根據所需之帶電圖案而吸附於半導體晶片載持面13來選擇性地拾取半導體晶片1。The subject of this invention is to reduce the influence of retention force, such as an adhesive force, and to perform pickup and mounting of a semiconductor wafer with high reliability. Specifically, the pickup method of the present invention is characterized in that it is a method of picking up the semiconductor wafer 1 by using an electrostatic transfer plate having a semiconductor wafer carrying surface 13 in the outermost layer, and at least has the following steps: a charging step, which is forming a desired charging pattern on the semiconductor wafer carrying surface 13; and a pick-up step, which is selected from the plurality of semiconductor wafers 1 arranged by being adsorbed on the semiconductor wafer supporting surface 13 according to the required charging pattern The semiconductor wafer 1 is selectively picked up.

Description

拾取方法、拾取裝置及安裝裝置Pick-up method, pick-up device, and mounting device

本發明係關於一種自所排列之複數個半導體晶片拾取所需之半導體晶片之拾取方法、拾取裝置、及安裝裝置。The present invention relates to a pickup method, a pickup device, and a mounting device for picking up a desired semiconductor wafer from a plurality of arranged semiconductor wafers.

半導體晶片為了降低成本而小型化，且著手用以將小型化之半導體晶片高速、高精度地安裝。尤其對用於顯示器之LED(light-emitting diode，發光二極體)，要求將被稱為微LED之50 μm×50 μm以下之LED晶片以數μm之精度高速安裝。 專利文獻1中，記載有如下構成，即，對晶圓上形成為格子狀之半導體晶片照射帶狀之雷射光且針對每1列或複數列一次性轉印至轉印基板200之後，對轉印至轉印基板200之後之複數個半導體晶片照射帶狀之雷射光且針對每1列或複數列一次性轉印至轉印基板300。 先前技術文獻 專利文獻 專利文獻1：日本專利特開2010-161221號公報Semiconductor wafers are miniaturized in order to reduce costs, and it has been attempted to mount the miniaturized semiconductor wafers at high speed and with high precision. In particular, for LEDs (light-emitting diodes) used in displays, LED chips of 50 μm×50 μm or less called micro LEDs are required to be mounted at high speed with an accuracy of several μm. Patent Document 1 describes a configuration in which a semiconductor wafer formed in a lattice shape on a wafer is irradiated with a strip-shaped laser light and transferred to the transfer substrate 200 at a time for each row or a plurality of rows, and then reversed. The plurality of semiconductor wafers after being printed on the transfer substrate 200 are irradiated with a band-shaped laser light and transferred to the transfer substrate 300 at one time for each row or rows. Prior Art Document Patent Document Patent Document 1: Japanese Patent Laid-Open No. 2010-161221

[發明所欲解決之問題] 然而，專利文獻1所記載之構成存在如下問題，即，於將半導體晶片自一轉印基板轉印(拾取)至另一轉印基板時，有於保持半導體晶片之黏著力等之影響下無法自一轉印基板分離從而無法順利地轉印至另一轉印基板之虞。 本發明之課題在於解決上述問題點，消除黏著力等之影響，且可靠性較高地進行半導體晶片之拾取及安裝。 [解決問題之技術手段] 為解決上述課題，本發明提供一種拾取方法，特徵在於，其係藉由最表層具有半導體晶片載持面之靜電轉印板而拾取半導體晶片之方法，且至少具有以下步驟： 帶電步驟，其係於上述半導體晶片載持面形成所需之帶電圖案；及 拾取步驟，其係自所排列之複數個上述半導體晶片中，藉由根據上述所需之帶電圖案而吸附於上述半導體晶片載持面來選擇性地拾取上述半導體晶片。 根據該構成，由帶電之靜電拾取半導體晶片，以此可消除黏著力等之影響，且可靠性較高地進行半導體晶片之拾取。 亦可設為如下構成，即，上述靜電轉印板具備絕緣層，上述絕緣層之表面為上述半導體晶片載持面，且於上述帶電步驟中，藉由使上述半導體晶片載持面選擇性地接觸或接近施加有高電壓之電極而於上述靜電轉印板之上述半導體晶片載持面形成上述所需之帶電圖案。 根據該構成，可確實地形成所需之帶電圖案。 亦可設為如下構成，即，上述靜電轉印板具備具有光導電性之絕緣層，上述絕緣層之表面為上述半導體晶片載持面， 且上述帶電步驟藉由使上述半導體晶片載持面均勻地帶電之均勻帶電步驟、及 根據上述所需之帶電圖案而對上述半導體晶片載持面照射光能之曝光步驟，而於上述靜電轉印板之上述半導體晶片載持面形成上述所需之帶電圖案。 根據該構成，亦可確實地形成所需之帶電圖案。 又，為解決上述課題，本發明提供一種拾取裝置，特徵在於，其係藉由最表層具有半導體晶片載持面之靜電轉印板而拾取半導體晶片之裝置，且至少具備： 帶電圖案形成裝置，其於上述半導體晶片載持面形成所需之帶電圖案； 載置台，其排列複數個半導體晶片；及 靜電轉印板傳送頭，其將上述靜電轉印板傳送；且 上述靜電轉印板傳送頭將上述靜電轉印板傳送至上述載置台，並根據上述所需之帶電圖案，自排列於上述載置台之複數個上述半導體晶片中選擇性地將上述半導體晶片吸附於上述半導體晶片載持面而拾取。 根據該構成，由帶電之靜電拾取半導體晶片，以此可消除黏著力等之影響，且可靠性較高地進行半導體晶片之拾取。 亦可設為如下構成，即，上述靜電轉印板具備絕緣層，上述絕緣層之表面為上述半導體晶片載持面，上述帶電圖案形成裝置係藉由使施加有電壓之電極選擇性地接觸或接近於上述半導體晶片載持面而將上述所需之帶電圖案形成於上述靜電轉印板之上述半導體晶片載持面。 根據該構成，可確實地形成所需之帶電圖案。 亦可設為如下構成，即，上述絕緣層係具有光導電性者，上述絕緣層之表面為上述半導體晶片載持面，上述帶電圖案形成裝置具有使上述半導體晶片載持面均勻地帶電之均勻帶電裝置、及根據上述所需之帶電圖案而對上述半導體晶片載持面照射光能之曝光裝置。 根據該構成，亦可確實地形成所需之帶電圖案。 亦可設為如下構成，即，將藉由拾取裝置所拾取之上述半導體晶片一次性安裝於基板上。 根據該構成，可消除黏著力等之影響，且可靠性較高地進行被拾取至靜電轉印板之半導體晶片之安裝。 亦可設為如下構成，即，上述半導體晶片係具有50 μm×50 μm以下之投影面積之LED晶片。 根據該構成，可實現高精細之顯示器裝置。 [發明之效果] 藉由本發明之拾取方法、拾取裝置、及安裝裝置而可消除黏著力等之影響，且可靠性較高地進行半導體晶片之拾取及安裝。THE PROBLEM TO BE SOLVED BY THE INVENTION However, the structure described in Patent Document 1 has a problem in that, when the semiconductor wafer is transferred (picked up) from one transfer substrate to the other transfer substrate, it is difficult to hold the semiconductor wafer. Under the influence of the adhesive force, etc., it cannot be separated from one transfer substrate and thus cannot be transferred to another transfer substrate smoothly. An object of the present invention is to solve the above-mentioned problems, to eliminate the influence of adhesive force and the like, and to perform pickup and mounting of semiconductor wafers with high reliability. [Technical Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention provides a pick-up method, which is a method of picking up a semiconductor wafer by an electrostatic transfer plate having a semiconductor wafer-bearing surface in its outermost layer, and has at least the following Steps: A charging step, which is to form a desired charging pattern on the above-mentioned semiconductor wafer carrier surface; and a pick-up step, which is based on the above-mentioned required charging pattern from among the plurality of arranged semiconductor wafers. The said semiconductor wafer carrying surface selectively picks up the said semiconductor wafer. According to this configuration, the semiconductor wafer is picked up by the charged static electricity, thereby eliminating the influence of adhesive force and the like, and the semiconductor wafer can be picked up with high reliability. The electrostatic transfer plate may include an insulating layer, the surface of the insulating layer is the semiconductor wafer mounting surface, and in the charging step, the semiconductor wafer mounting surface may be selectively The desired charging pattern is formed on the semiconductor wafer carrying surface of the electrostatic transfer plate by contacting or approaching an electrode to which a high voltage is applied. According to this configuration, a desired electrification pattern can be surely formed. The electrostatic transfer plate may have a photoconductive insulating layer, the surface of the insulating layer is the semiconductor wafer mounting surface, and the charging step may be performed by making the semiconductor wafer mounting surface uniform. The uniform charging step of charging and the exposure step of irradiating the semiconductor wafer carrying surface with light energy according to the above-mentioned required charging pattern, to form the above-mentioned required electrification on the above-mentioned semiconductor wafer carrying surface of the above-mentioned electrostatic transfer plate pattern. According to this structure, a desired electrification pattern can also be reliably formed. Furthermore, in order to solve the above-mentioned problems, the present invention provides a pickup device, which is a device for picking up a semiconductor wafer by an electrostatic transfer plate having a semiconductor wafer carrying surface in its outermost layer, and at least comprising: a charging pattern forming device, It forms a desired charging pattern on the semiconductor wafer carrying surface; a stage, which arranges a plurality of semiconductor wafers; and an electrostatic transfer board transfer head, which transfers the electrostatic transfer board; and the electrostatic transfer board transfer head The electrostatic transfer plate is transferred to the mounting table, and the semiconductor wafer is selectively adsorbed on the semiconductor wafer mounting surface from among a plurality of the semiconductor wafers arranged on the mounting table according to the desired charging pattern. pick up. According to this configuration, the semiconductor wafer is picked up by the charged static electricity, thereby eliminating the influence of adhesive force and the like, and the semiconductor wafer can be picked up with high reliability. The electrostatic transfer plate may include an insulating layer, the surface of the insulating layer is the semiconductor wafer mounting surface, and the charging pattern forming device may be configured by selectively contacting or applying a voltage to an electrode. The above-mentioned desired charging pattern is formed on the above-mentioned semiconductor wafer carrying surface of the above-mentioned electrostatic transfer plate close to the above-mentioned semiconductor wafer carrying surface. According to this configuration, a desired electrification pattern can be surely formed. The above-mentioned insulating layer may have photoconductivity, the surface of the above-mentioned insulating layer may be the above-mentioned semiconductor wafer mounting surface, and the above-mentioned electrification pattern forming apparatus may have a uniform structure for uniformly electrifying the above-mentioned semiconductor wafer mounting surface. A charging device, and an exposure device for irradiating the above-mentioned semiconductor wafer supporting surface with light energy according to the above-mentioned desired charging pattern. According to this structure, a desired electrification pattern can also be reliably formed. A configuration in which the above-mentioned semiconductor wafer picked up by a pickup device is mounted on a substrate at one time may be employed. According to this structure, the influence of adhesive force etc. can be eliminated, and mounting of the semiconductor wafer picked up to the electrostatic transfer board can be performed with high reliability. The configuration in which the above-mentioned semiconductor wafer is an LED chip having a projected area of 50 μm×50 μm or less may also be employed. According to this configuration, a high-definition display device can be realized. [Effects of the Invention] With the pickup method, pickup device, and mounting device of the present invention, the effects of adhesion and the like can be eliminated, and semiconductor wafers can be picked up and mounted with high reliability.

[實施例1] 參照圖1～圖5對本發明之實施例1進行說明。圖1係說明本發明之實施例1之載置台帶電步驟及載體基板分離步驟之圖。圖2係說明本發明之實施例1之帶電步驟之圖。圖3係說明本發明之實施例1之拾取步驟之前半之圖。圖4係說明本發明之實施例1之拾取步驟之後半之圖。圖5係說明本發明之實施例1之安裝步驟之圖。 如圖1(b)、圖1(c)所示，於包含藍寶石之載體基板3上成長而形成半導體晶片1，半導體晶片1之與保持於載體基板3之一面相反側之面即另一面露出於外部且形成凸塊2。又，載體基板3具有圓形或四角形，且除包含藍寶石以外亦有包含砷化鎵者。又，將半導體晶片1切割且於載體基板3上以2維排列複數個(數百個～數萬個)。關於被稱為微LED之小型之半導體晶片1，其為50 μm×50 μm以下之尺寸，且以該尺寸加上切割寬度後之間距而排列。要求將此種小型之半導體晶片1高精度(例如，1 μm以下之精度)地安裝於電路基板。對於實施例1之半導體晶片1，事先檢查各半導體晶片1且去除不良之LED晶片。具體而言，照射較下述雷射剝離之情形更強之雷射光，使不良晶片燒毀。 首先，為了將載體基板3及保持於載體基板3之半導體晶片1牢固地保持於載置台50，如圖1(a)所示，執行使載置台50之表面全域帶電之載置台帶電步驟。於載置台帶電步驟中，使載置台帶電裝置60之表面接觸或接近於載置台50之表面全域，施加約1 KV之正電壓70。載置台50包含台51及絕緣體52，上述台51包含鐵等金屬，上述絕緣體52包含設置於台51之與載置台帶電裝置60接觸之側之表面之玻璃。藉由對該載置台50之絕緣體52施加正電壓而使載置台50之表面全域帶電成正電位。 再者，於實施例1中，使載置台50帶電成正電位，但並非必須限定於此，而是能夠適當變更。例如，亦可帶電成負電位。於該情形時，根據帶電序列而由鐵氟龍(註冊商標)或聚丙烯等材料構成絕緣體52即可。 又，於實施例1中，設為如下構成，即，為了使載置台50之表面帶電而使載置台帶電裝置60之表面接觸或接近載置台50之表面全域，但並非必須限定於此，而是能夠適當變更。例如，亦可設為如下構成，即，使用將電暈放電部排列成一行之帶電棒，使該帶電棒與載置台50之表面接觸或接近且朝與電暈放電部之排列方向正交之方向相對於載置台50進行相對移動。藉此可以簡單之構成使載置台50之表面帶電。 其次，去除載置台帶電裝置60之後，藉由未圖示之載體基板傳送頭將一面保持於載體基板3之複數個半導體晶片1之另一面載置於表面帶電之載置台50(參照圖1(b))。藉此，將保持有載體基板3之半導體晶片1之另一面藉由靜電而保持於載置台50。 繼而，執行將半導體晶片1之一面自載體基板3分離之載體基板分離步驟。於實施例1中，藉由未圖示之載體基板分離裝置而對載體基板3以線狀照射包含準分子雷射之雷射光90，使載體基板3或線狀之雷射光90之任一者朝與雷射光90之光線正交之方向相對移動而對載體基板3整體照射雷射光(參照圖1(c))。然後，使由藍寶石構成之載體基板3上之GaN層之一部分分解為Ga與N，將半導體晶片1自載體基板3分離。該方法稱為雷射剝離。分離後之載體基板3可藉由載體基板傳送頭20而去除。 以上，將欲安裝之半導體晶片1保持於載置台50。然後，與載體基板分離步驟並行地執行、或於載體基板分離步驟之後執行帶電步驟，即，藉由最表層具有半導體晶片載持面13之靜電轉印板10而拾取半導體晶片1(參照圖2)。靜電轉印板10具有包含鐵等金屬之板11、及於板11之一側之絕緣層12。於本說明書中，將該絕緣層12之與板11側相反側之表面稱為半導體晶片載持面。於帶電步驟中，使半導體晶片載持面13與帶電圖案形成裝置30接觸或接近而於半導體晶片載持面13形成所需之帶電圖案。 亦即，如圖2所示，帶電圖案形成裝置30具備表面之一部分突出之複數個突出電極部31與未突出之複數個非突出部32。對帶電圖案形成裝置30施加約1 KV之正電壓40，突出電極部31以與排列於載置台50之複數個半導體晶片1中之所需之半導體晶片1之排列間距相應之間距而2維地(亦朝圖2之深度方向)突出。由靜電轉印板傳送頭20將靜電轉印板10真空吸附並保持，使該帶電圖案形成裝置30之突出電極部31之前端部接觸或接近靜電轉印板10之半導體晶片載持面13。 然後，藉由施加至帶電圖案形成裝置30之突出電極部31之高電壓而使靜電轉印板10中之與突出電極部31接觸之半導體晶片載持面13之部分帶有正電位。亦即，使與帶電圖案形成裝置30中之形成有突出電極部31之所需區域接觸之靜電轉印板10之半導體晶片載持面13帶有正電位而形成所需之帶電圖案。此時，實際上除與突出電極部31接觸之部分之外，有使周圍之微小區域帶電之情形，故亦可以接觸較所需區域小之面積之方式構成突出電極部31。 亦即，於帶電步驟中，對於靜電轉印板10之半導體晶片載持面13，藉由以使施加有電壓之突出電極31與所需區域接觸、且使施加有電壓之突出電極31不與所需區域以外之區域接觸之方式形成有非突出部32之帶電圖案形成裝置30而形成所需之帶電圖案。 再者，於實施例1中，構成為使靜電轉印板10之半導體晶片載持面13接觸或接近具備複數個突出電極部31與複數個非突出部32之帶電圖案形成裝置30而形成所需之帶電圖案，但並非必須限定於此，而是能夠適當變更。例如，亦可構成為使單一之電極部一面移動一面與靜電轉印板10之絕緣層12接觸或接近而形成所需之帶電圖案。即，於帶電步驟中，藉由使絕緣層12選擇性地接觸或接近施加有高電壓之電極而形成所需之帶電圖案即可。 又，於實施例1中，構成為以拾取複數個半導體晶片1之方式形成所需之帶電圖案，但並非必須限定於此，而是能夠適當變更。例如，亦可構成為以拾取一個半導體晶片1之方式形成所需之帶電圖案。 進而，於實施例1中，使靜電轉印板10帶電成正電位，但並非必須限定於此，而是能夠適當變更。例如，亦可帶電成負電位。於該情形時，根據帶電序列而由鐵氟龍(註冊商標)或聚丙烯等材料構成絕緣層12即可。 其次，使靜電轉印板10與載置台50上之半導體晶片1重疊接觸且拾取，但於即將執行此動作之前對載置台50之表面所帶之電位進行去靜電。去靜電可藉由對載置台50進行光放電或AC(Alternating Current，交流)去靜電等進行。去靜電後，亦有藉由靜電而保持於載置台50之半導體晶片1跳躍之情形，故於即將藉由靜電轉印板10拾取之前進行去靜電。 然後，執行拾取步驟，於所排列之複數個上述半導體晶片中，藉由根據所需之帶電圖案而吸附於半導體晶片載持面13來選擇性地拾取半導體晶片。即，對帶電成所需之帶電圖案之靜電轉印板10而言，靜電轉印板傳送頭20將其吸附且傳送至載置於載置台50之半導體晶片1(參照圖3(a))，靜電轉印板10之帶電成所需之帶電圖案之半導體晶片載持面13選擇性地與半導體晶片1以重疊之方式接觸(參照圖3(b))。然後，隨著靜電轉印板傳送頭20自載置台50分離，靜電轉印板10亦自載置台50分離。此時，於靜電轉印板10上，藉由靜電而吸附且拾取對應於所需之帶電圖案之複數個半導體晶片1(參照圖4)。 此處，只要根據所需之帶電圖案而拾取，則無需自載置台50上之半導體晶片1之集合之特定之位置進行拾取，而是自任何部分拾取均可。 於實施例1中，藉由選擇性地拾取與基板上之安裝之間距及排列數相當之半導體晶片1而可效率良好地移行至下述安裝步驟。 再者，於實施例1中，構成為於拾取步驟之前對載置台50之表面所帶有之電位進行去靜電，但並非必須限定於此，而是能夠適當變更。例如，亦可構成為使載置台50之表面維持帶電之狀態，於帶電步驟中使靜電轉印板10之半導體晶片載持面13帶有較載置台50所帶之電位高之電位(例如，2 KV左右)而執行拾取步驟。藉此，無需對載置台50之表面所帶之電位進行去靜電，並且可容易地拾取半導體晶片1。 其次，執行安裝步驟而將保持於靜電轉印板10之半導體晶片1安裝於基板80。即，將靜電轉印板傳送頭20吸附靜電轉印板10並傳送至基板80而將保持於靜電轉印板10之半導體晶片1安裝於基板80。於安裝時係藉由將半導體晶片1之凸塊2與基板80之電極實施金屬接合而進行(參照圖5(a))。然後，靜電轉印板傳送頭20解除真空吸附而自靜電轉印板10分離，藉此靜電轉印板10與半導體晶片1殘留於基板80，安裝步驟完成。亦即，靜電轉印板傳送頭20將被靜電轉印板10所拾取之半導體晶片1與靜電轉印板10一同安裝。 其後，視需要可進行靜電轉印板10之去靜電，將靜電轉印板10自半導體晶片1去除。去靜電可藉由對靜電轉印板10實施光放電或AC去靜電等而進行。又，由於半導體晶片1與基板接合，故若靜電轉印板10之帶電較輕微，則即便不去靜電亦可由靜電轉印板傳送頭20真空吸附而去除。 再者，於實施例1中，構成為藉由載體基板傳送頭將載體基板傳送，且藉由靜電轉印板傳送頭將靜電轉印板傳送，但並非必須限定於此，而是能夠適當變更。例如，亦可構成為藉由共通之傳送頭將載體基板及靜電轉印板傳送。 如此，於實施例1中，藉由如下之拾取方法而可消除黏著力等之影響，且可靠性較高地進行被靜電轉印板所拾取之半導體晶片之安裝，該拾取方法之特徵在於，其係藉由最表層具有半導體晶片載持面之靜電轉印板而拾取半導體晶片之方法，且至少具有： 帶電步驟，其係於上述半導體晶片載持面形成所需之帶電圖案；及 拾取步驟，其係自所排列之複數個上述半導體晶片中，藉由根據上述所需之帶電圖案而吸附於上述半導體晶片載持面來選擇性地拾取上述半導體晶片。 又，藉由如下之拾取裝置而可消除黏著力等之影響，且可靠性較高地進行被靜電轉印板拾取之半導體晶片之安裝，該拾取裝置之特徵在於，其係藉由最表層具有半導體晶片載持面之靜電轉印板而拾取半導體晶片之裝置，且至少具備： 帶電圖案形成裝置，其於上述半導體晶片載持面形成所需之帶電圖案； 載置台，其排列複數個半導體晶片；及 靜電轉印板傳送頭，其將上述靜電轉印板傳送；且 上述靜電轉印板傳送頭將上述靜電轉印板傳送至上述載置台，並根據上述所需之帶電圖案，自排列於上述載置台之複數個上述半導體晶片中選擇性地將上述半導體晶片吸附於上述半導體晶片載持面而拾取。 [實施例2] 本發明之實施例2中，帶電圖案形成裝置及帶電步驟之構成與實施例1不同。參照圖6、圖7對實施例2進行說明。圖6係說明本發明之實施例2之均勻帶電步驟之圖。圖7係說明本發明之實施例2之曝光步驟之圖。 於實施例2中，帶電圖案形成裝置執行之帶電步驟係由均勻帶電步驟與曝光步驟構成。 實施例2之靜電轉印板110具備：包含鐵等金屬之板11、及於板11之一面之具有光導電性之絕緣層112，且該靜電轉印板110之表面為半導體晶片載持面113。均勻帶電步驟中，使靜電轉印板傳送頭20吸附保持之靜電轉印板110之半導體晶片載持面113、與帶電圖案形成裝置13之表面為均勻之平坦面之均勻帶電部131接觸或接近(參照圖6)。均勻帶電部131被施加約1 KV之電壓，藉此，靜電轉印板110之半導體晶片載持面113均勻地帶有正電位。其後，藉由靜電轉印板傳送頭20將靜電轉印板110自均勻帶電部131分離。 其次，執行曝光步驟，於靜電轉印板110之半導體晶片載持面113形成所需之帶電圖案。即，自未圖示之曝光部對靜電轉印板傳送頭20吸附保持之靜電轉印板110之半導體晶片載持面113照射雷射光190(參照圖7(a))。藉由對半導體晶片載持面113照射雷射光190而使具有光導電性之絕緣層112之電導率增加且使所帶電之電位消失。因此，可使照射有雷射光190之區域帶電消失，且使未照射雷射光190之區域維持帶電狀態。於實施例2中，利用該性質，根據所需之帶電圖案而對靜電轉印板110之半導體晶片載持面113選擇未照射雷射光190之區域與照射雷射光190之區域。藉此，可於靜電轉印板110之半導體晶片載持面113形成所需之帶電圖案(參照圖7(b))。 為了選擇未照射雷射光190之區域與照射雷射光190之區域，使曝光部具備檢流計鏡，且藉由對檢流計鏡照射雷射光束而控制照射雷射光190之位置來進行。 再者，於實施例2中，構成為藉由檢流計鏡而控制照射雷射光190之位置，但並非必須限定於此，而是能夠適當變更。例如，亦可構成為，將遮蔽所需之帶電圖案之區域之遮罩配置於曝光部與靜電轉印板110之半導體晶片載持面113之間，藉由對遮罩全部照射雷射光190而根據靜電轉印板110之半導體晶片載持面113之所需之帶電圖案進行照射。 又，亦可構成為，使用以2維排列有發光元件之雷射陣列，以僅對所需之帶電圖案以外之區域照射雷射光190之方式控制雷射陣列，且根據所需之帶電圖案而對靜電轉印板110之半導體晶片載持面113進行照射。 進而，於實施例2中，以將雷射光190照射至半導體晶片載持面113之方式構成曝光步驟，但並非必須限定於此，而是能夠適當變更。例如，亦可以將可見光等光而非雷射光照射至半導體晶片載持面113之方式構成曝光步驟。亦即，只要以根據所需之帶電圖案而對半導體晶片載持面113照射光能之方式構成曝光步驟即可。 如此，於實施例2中，上述靜電轉印板具備具有光導電性之絕緣層，上述絕緣層之表面為上述半導體晶片載持面， 上述帶電步驟藉由使上述半導體晶片載持面均勻地帶電之均勻帶電步驟、及 根據上述所需之帶電圖案而對上述半導體晶片載持面照射光能之曝光步驟而於上述靜電轉印板之上述半導體晶片載持面形成上述所需之帶電圖案，藉此可確實地形成所需之帶電圖案。 又，上述絕緣層係具有光導電性者，上述絕緣層之表面為上述半導體晶片載持面， 上述帶電圖案形成裝置藉由具有 使上述半導體晶片載持面均勻地帶電之均勻帶電裝置、及 根據上述所需之帶電圖案而對上述半導體晶片載持面照射光能之曝光裝置而可確實地形成所需之帶電圖案。 [產業上之可利用性] 本發明之拾取方法、拾取裝置、及安裝裝置可廣泛地應用於自所排列之複數個半導體晶片拾取所需之半導體晶片之領域。[Example 1] Example 1 of the present invention will be described with reference to Figs. 1 to 5 . FIG. 1 is a diagram illustrating the step of charging the stage and the step of separating the carrier substrate according to Embodiment 1 of the present invention. FIG. 2 is a diagram illustrating a charging step in Embodiment 1 of the present invention. FIG. 3 is a diagram illustrating the first half of the pickup step in the first embodiment of the present invention. FIG. 4 is a diagram illustrating the second half of the pickup step in Embodiment 1 of the present invention. FIG. 5 is a diagram illustrating the installation steps of Embodiment 1 of the present invention. As shown in FIGS. 1( b ) and 1 ( c ), a semiconductor wafer 1 is formed by growing on a carrier substrate 3 including sapphire, and the other surface of the semiconductor wafer 1 is exposed on the opposite side to the surface held on the carrier substrate 3 . on the outside and form bumps 2 . In addition, the carrier substrate 3 has a circular shape or a quadrangular shape, and includes gallium arsenide in addition to sapphire. Moreover, the semiconductor wafer 1 is diced, and a plurality (several hundreds to tens of thousands) are arranged two-dimensionally on the carrier substrate 3 . A small semiconductor wafer 1 called a micro LED has a size of 50 μm×50 μm or less, and is arranged at a pitch after adding the dicing width to the size. Such a small semiconductor chip 1 is required to be mounted on a circuit board with high accuracy (eg, an accuracy of 1 μm or less). Regarding the semiconductor wafers 1 of Example 1, each semiconductor wafer 1 was inspected in advance, and defective LED chips were removed. Specifically, a laser light stronger than that in the case of laser lift-off described below is irradiated to burn the defective chip. First, in order to firmly hold the carrier substrate 3 and the semiconductor wafer 1 held on the carrier substrate 3 on the mounting table 50, as shown in FIG. In the step of charging the stage, the surface of the stage charging device 60 is brought into contact with or close to the entire surface of the stage 50, and a positive voltage 70 of about 1 KV is applied. The stage 50 includes a stage 51 including a metal such as iron, and an insulator 52 , and the insulator 52 includes glass provided on the surface of the stage 51 on the side in contact with the stage charging device 60 . By applying a positive voltage to the insulator 52 of the mounting table 50 , the entire surface of the mounting table 50 is charged to a positive potential. In addition, in Example 1, although the mounting table 50 was charged to a positive potential, it is not necessarily limited to this, It can change suitably. For example, it may be charged to a negative potential. In this case, the insulator 52 may be formed of a material such as Teflon (registered trademark) or polypropylene according to the electrification sequence. In addition, in Embodiment 1, in order to charge the surface of the mounting table 50, the surface of the mounting table charging device 60 is brought into contact with or close to the entire surface of the mounting table 50, but it is not necessarily limited to this, but can be appropriately changed. For example, a configuration may be adopted in which a charging bar in which the corona discharge parts are arranged in a line is used, and the charging bar is brought into contact with or close to the surface of the mounting table 50 in a direction perpendicular to the direction in which the corona discharge parts are arranged. The direction moves relatively with respect to the mounting table 50 . Thereby, the surface of the stage 50 can be charged with a simple structure. Next, after removing the stage charging device 60, the other surfaces of the plurality of semiconductor wafers 1 held on one side of the carrier substrate 3 are mounted on the surface-charging stage 50 by the carrier substrate transfer head (not shown) (refer to FIG. 1 ( b)). Thereby, the other surface of the semiconductor wafer 1 holding the carrier substrate 3 is held on the stage 50 by static electricity. Next, a carrier substrate separation step of separating one side of the semiconductor wafer 1 from the carrier substrate 3 is performed. In Example 1, the carrier substrate 3 is irradiated with the laser light 90 including the excimer laser in a linear shape by the carrier substrate separation device not shown, so that either the carrier substrate 3 or the linear laser light 90 is irradiated. The entire carrier substrate 3 is irradiated with the laser light by relative movement in the direction orthogonal to the ray of the laser light 90 (refer to FIG. 1( c )). Then, a part of the GaN layer on the carrier substrate 3 made of sapphire is decomposed into Ga and N, and the semiconductor wafer 1 is separated from the carrier substrate 3 . This method is called laser lift-off. The separated carrier substrate 3 can be removed by the carrier substrate transfer head 20 . As described above, the semiconductor wafer 1 to be mounted is held on the mounting table 50 . Then, in parallel with the carrier substrate separation step, or after the carrier substrate separation step, a charging step is performed, that is, the semiconductor wafer 1 is picked up by the electrostatic transfer plate 10 having the semiconductor wafer carrying surface 13 in the outermost layer (refer to FIG. 2 ). ). The electrostatic transfer plate 10 has a plate 11 made of metal such as iron, and an insulating layer 12 on one side of the plate 11 . In this specification, the surface on the opposite side to the board 11 side of the insulating layer 12 is referred to as a semiconductor wafer mounting surface. In the charging step, the semiconductor wafer carrier surface 13 is brought into contact with or close to the charging pattern forming device 30 to form a desired charging pattern on the semiconductor wafer carrier surface 13 . That is, as shown in FIG. 2 , the charging pattern forming apparatus 30 includes a plurality of protruding electrode portions 31 partially protruding from a surface and a plurality of non-protruding portions 32 that are not protruded. A positive voltage 40 of about 1 KV is applied to the electrification patterning device 30 , and the protruding electrode portion 31 is two-dimensionally arranged at a pitch corresponding to a desired arrangement pitch of the semiconductor wafers 1 among the plurality of semiconductor wafers 1 arranged on the stage 50 . (also in the depth direction of Figure 2) protruding. The electrostatic transfer plate 10 is vacuum adsorbed and held by the electrostatic transfer plate transfer head 20 , and the front end of the protruding electrode portion 31 of the charging patterning device 30 is brought into contact with or close to the semiconductor wafer carrying surface 13 of the electrostatic transfer plate 10 . Then, the portion of the semiconductor wafer mounting surface 13 of the electrostatic transfer plate 10 that is in contact with the protruding electrode portion 31 is charged with a positive potential by a high voltage applied to the protruding electrode portion 31 of the charging patterning device 30 . That is, the semiconductor wafer mounting surface 13 of the electrostatic transfer plate 10 in contact with the desired region of the charging pattern forming apparatus 30 where the protruding electrode portion 31 is formed is charged with a positive potential to form a desired charging pattern. At this time, the protruding electrode portion 31 may be formed by contacting a smaller area than the desired area because, in fact, in addition to the portion in contact with the protruding electrode portion 31 , the surrounding minute area may be charged. That is, in the charging step, with respect to the semiconductor wafer carrying surface 13 of the electrostatic transfer plate 10, the protruding electrodes 31 to which the voltage is applied are brought into contact with a desired area, and the protruding electrodes 31 to which the voltage is applied are not in contact with each other. A desired charging pattern is formed by forming the charging pattern forming device 30 with the non-protruding portion 32 in such a manner that the area other than the desired area is contacted. Furthermore, in Example 1, the charging pattern forming apparatus 30 having the plurality of protruding electrode portions 31 and the plurality of non-protruding portions 32 is configured so that the semiconductor wafer mounting surface 13 of the electrostatic transfer plate 10 is brought into contact with or close to the charging pattern forming apparatus 30 to form the electrode. The required electrification pattern is not necessarily limited to this, and can be appropriately changed. For example, it is also possible to form a desired electrification pattern by making a single electrode part move while contacting or approaching the insulating layer 12 of the electrostatic transfer plate 10 . That is, in the charging step, a desired charging pattern may be formed by selectively contacting or approaching the electrode to which a high voltage is applied to the insulating layer 12 . In addition, in Example 1, although it is comprised so that a desired electrification pattern may be formed by picking up several semiconductor wafers 1, it is not necessarily limited to this, It can change suitably. For example, it is also possible to form a desired electrification pattern by picking up one semiconductor wafer 1 . Furthermore, in Example 1, the electrostatic transfer plate 10 was charged to a positive potential, but it is not necessarily limited to this, and can be appropriately changed. For example, it may be charged to a negative potential. In this case, the insulating layer 12 may be formed of a material such as Teflon (registered trademark) or polypropylene according to the electrification sequence. Next, the electrostatic transfer plate 10 is brought into overlapping contact with the semiconductor wafer 1 on the mounting table 50 and picked up, but the electric potential on the surface of the mounting table 50 is destaticized immediately before the operation. The static electricity removal can be performed by performing light discharge on the stage 50 or AC (Alternating Current) static electricity removal, or the like. After the static electricity is removed, the semiconductor wafer 1 held on the mounting table 50 may jump due to static electricity. Therefore, the static electricity is removed immediately before being picked up by the electrostatic transfer plate 10 . Then, a pick-up step is performed to selectively pick up the semiconductor wafers by being adsorbed on the semiconductor wafer carrying surface 13 according to a desired electrification pattern among the plurality of arranged semiconductor wafers. That is, for the electrostatic transfer plate 10 charged into a desired charging pattern, the electrostatic transfer plate transfer head 20 attracts and transfers it to the semiconductor wafer 1 placed on the stage 50 (see FIG. 3( a )). , the semiconductor wafer carrying surface 13 of the electrostatic transfer plate 10 charged into a desired charging pattern selectively contacts the semiconductor wafer 1 in an overlapping manner (refer to FIG. 3( b )). Then, as the electrostatic transfer plate transfer head 20 is separated from the mounting table 50 , the electrostatic transfer plate 10 is also separated from the mounting table 50 . At this time, on the electrostatic transfer plate 10, a plurality of semiconductor wafers 1 (refer to FIG. 4) corresponding to a desired charging pattern are adsorbed and picked up by static electricity. Here, as long as it is picked up according to a desired electrification pattern, it is not necessary to pick up from a specific position of the set of semiconductor wafers 1 on the stage 50 , but can be picked up from any part. In Embodiment 1, by selectively picking up the semiconductor wafers 1 having the mounting pitch and arrangement number on the substrate, it is possible to efficiently move to the following mounting steps. In addition, in Example 1, it was comprised so that the electric potential with which the surface of the mounting table 50 was destaticized before a pick-up process is not necessarily limited to this, It can change suitably. For example, the surface of the mounting table 50 may be maintained in a charged state, and the semiconductor wafer mounting surface 13 of the electrostatic transfer plate 10 may have a higher potential than that of the mounting table 50 in the charging step (for example, 2 KV or so) to perform the pick-up step. Thereby, it is not necessary to destaticize the electric potential on the surface of the mounting table 50, and the semiconductor wafer 1 can be picked up easily. Next, a mounting step is performed to mount the semiconductor wafer 1 held on the electrostatic transfer plate 10 on the substrate 80 . That is, the electrostatic transfer plate transfer head 20 attracts the electrostatic transfer plate 10 and transports it to the substrate 80 to mount the semiconductor wafer 1 held on the electrostatic transfer plate 10 on the substrate 80 . During mounting, the bumps 2 of the semiconductor chip 1 and the electrodes of the substrate 80 are metal-bonded (see FIG. 5( a )). Then, the electrostatic transfer plate transfer head 20 releases the vacuum suction and is separated from the electrostatic transfer plate 10 , whereby the electrostatic transfer plate 10 and the semiconductor wafer 1 remain on the substrate 80 , and the mounting step is completed. That is, the electrostatic transfer plate transfer head 20 mounts the semiconductor wafer 1 picked up by the electrostatic transfer plate 10 together with the electrostatic transfer plate 10 . After that, the electrostatic transfer plate 10 may be destaticized as necessary, and the electrostatic transfer plate 10 may be removed from the semiconductor wafer 1 . Destaticizing can be performed by applying light discharge to the electrostatic transfer plate 10, AC destaticizing, or the like. In addition, since the semiconductor wafer 1 is bonded to the substrate, if the electrostatic transfer plate 10 is slightly charged, it can be removed by the electrostatic transfer plate transfer head 20 by vacuum suction even if the static electricity is not removed. In addition, in Example 1, the carrier substrate is conveyed by the carrier substrate conveying head, and the electrostatic transfer plate is conveyed by the electrostatic transfer plate conveying head, but it is not necessarily limited to this, and can be appropriately changed. . For example, the carrier substrate and the electrostatic transfer plate may be configured to be transported by a common transport head. In this way, in Example 1, the following pick-up method can eliminate the influence of adhesive force and the like, and mount the semiconductor wafer picked up by the electrostatic transfer plate with high reliability. The pick-up method is characterized in that the A method for picking up semiconductor wafers by using an electrostatic transfer plate whose outermost layer has a semiconductor wafer carrying surface, and at least includes: a charging step of forming a desired charging pattern on the semiconductor wafer carrying surface; and a picking up step, It selectively picks up the above-mentioned semiconductor wafers by being adsorbed on the above-mentioned semiconductor wafer carrying surface according to the above-mentioned desired electrification pattern from among the plurality of arranged above-mentioned semiconductor wafers. In addition, the following pickup device can eliminate the influence of adhesive force and the like, and can mount the semiconductor wafer picked up by the electrostatic transfer plate with high reliability. An apparatus for picking up semiconductor wafers by electrostatic transfer plates on a wafer carrying surface, and at least comprising: a charging pattern forming device for forming a desired charging pattern on the semiconductor wafer carrying surface; a mounting table for arranging a plurality of semiconductor wafers; and an electrostatic transfer plate conveying head, which conveys the electrostatic transfer plate; and the electrostatic transfer plate conveying head conveys the electrostatic transfer plate to the mounting table, and self-arranges on the above-mentioned charging pattern according to the above-mentioned required charging pattern Among the plurality of the semiconductor wafers on the mounting table, the semiconductor wafers are selectively adsorbed and picked up on the semiconductor wafer mounting surface. [Example 2] In Example 2 of the present invention, the configurations of the charging pattern forming apparatus and the charging step are different from those of Example 1. Embodiment 2 will be described with reference to FIGS. 6 and 7 . FIG. 6 is a diagram illustrating the uniform charging step of Embodiment 2 of the present invention. FIG. 7 is a diagram illustrating an exposure step of Example 2 of the present invention. In Embodiment 2, the charging step performed by the charging pattern forming apparatus is composed of a uniform charging step and an exposure step. The electrostatic transfer plate 110 of the second embodiment includes a plate 11 made of metal such as iron, and an insulating layer 112 having photoconductivity on one surface of the plate 11 , and the surface of the electrostatic transfer plate 110 is a semiconductor chip carrier surface 113. In the uniform charging step, the semiconductor wafer carrying surface 113 of the electrostatic transfer plate 110 held by the electrostatic transfer plate transfer head 20 is in contact with or close to the uniform charging portion 131 whose surface is a uniform flat surface of the charging pattern forming device 13 (refer to Fig. 6). The uniform charging portion 131 is applied with a voltage of about 1 KV, whereby the semiconductor wafer carrying surface 113 of the electrostatic transfer plate 110 is uniformly charged with a positive potential. Thereafter, the electrostatic transfer plate 110 is separated from the uniform charging portion 131 by the electrostatic transfer plate transfer head 20 . Next, an exposure step is performed to form a desired charging pattern on the semiconductor wafer carrying surface 113 of the electrostatic transfer plate 110 . That is, the laser beam 190 is irradiated to the semiconductor wafer mounting surface 113 of the electrostatic transfer plate 110 which is adsorbed and held by the electrostatic transfer plate transfer head 20 from an exposure portion (not shown) (see FIG. 7( a )). By irradiating the semiconductor wafer mounting surface 113 with the laser light 190, the electrical conductivity of the insulating layer 112 having photoconductivity is increased and the charged potential is eliminated. Therefore, the area irradiated with the laser light 190 can be charged to disappear, and the area not irradiated with the laser light 190 can be maintained in a charged state. In Embodiment 2, using this property, according to the required charging pattern, the semiconductor chip carrying surface 113 of the electrostatic transfer plate 110 is selected from the region not irradiated with the laser light 190 and the region irradiated with the laser light 190 . Thereby, a desired charging pattern can be formed on the semiconductor wafer carrying surface 113 of the electrostatic transfer plate 110 (refer to FIG. 7( b )). In order to select the region not irradiated with the laser light 190 and the region irradiated with the laser light 190 , the exposure unit is provided with a galvanometer mirror, and the position of the irradiated laser light 190 is controlled by irradiating the galvanometer mirror with the laser beam. In addition, in Example 2, although the position where the laser beam 190 is irradiated is comprised so that it may control by a galvanometer mirror, it is not necessarily limited to this, It can change suitably. For example, a mask for shielding a region of a desired electrification pattern may be arranged between the exposure portion and the semiconductor chip mounting surface 113 of the electrostatic transfer plate 110 , and the entire mask may be irradiated with the laser light 190 . Irradiation is performed according to a desired charging pattern of the semiconductor wafer carrying surface 113 of the electrostatic transfer plate 110 . In addition, it is also possible to use a laser array in which light-emitting elements are arranged two-dimensionally, control the laser array so as to irradiate the laser light 190 only to the area other than the desired charging pattern, and control the laser array according to the desired charging pattern. The semiconductor wafer mounting surface 113 of the electrostatic transfer plate 110 is irradiated. Furthermore, in Example 2, although the exposure process is comprised so that the laser beam 190 may be irradiated to the semiconductor wafer mounting surface 113, it is not necessarily limited to this, It can change suitably. For example, the exposure step may be constituted by irradiating the semiconductor wafer support surface 113 with light such as visible light instead of laser light. That is, the exposure step may be configured so as to irradiate the semiconductor wafer mounting surface 113 with light energy according to a desired electrification pattern. In this way, in Example 2, the electrostatic transfer plate is provided with an insulating layer having photoconductivity, the surface of the insulating layer is the semiconductor wafer carrying surface, and the charging step is performed by uniformly charging the semiconductor wafer carrying surface. The uniform charging step and the exposure step of irradiating the semiconductor wafer carrying surface with light energy according to the above-mentioned required charging pattern form the above-mentioned required charging pattern on the above-mentioned semiconductor wafer carrying surface of the above-mentioned electrostatic transfer plate. This can reliably form the desired charging pattern. In addition, the insulating layer has photoconductivity, the surface of the insulating layer is the semiconductor wafer mounting surface, the charging pattern forming device has a uniform charging device for uniformly charging the semiconductor wafer mounting surface, and the The exposure apparatus which irradiates light energy to the said semiconductor wafer mounting surface with the said desired electrification pattern can form a desired electrification pattern reliably. [Industrial Applicability] The pickup method, pickup apparatus, and mounting apparatus of the present invention can be widely used in the field of picking up a desired semiconductor wafer from a plurality of arranged semiconductor wafers.

1‧‧‧半導體晶片2‧‧‧凸塊3‧‧‧載體基板10‧‧‧靜電轉印板11‧‧‧板12‧‧‧絕緣層13‧‧‧半導體晶片載持面20‧‧‧靜電轉印板傳送頭30‧‧‧帶電圖案形成裝置31‧‧‧突出電極部32‧‧‧非突出部40‧‧‧正電壓50‧‧‧載置台51‧‧‧台52‧‧‧絕緣體60‧‧‧載置台帶電裝置70‧‧‧正電壓80‧‧‧基板90‧‧‧雷射光110‧‧‧靜電轉印板112‧‧‧絕緣層113‧‧‧半導體晶片載持面130‧‧‧帶電圖案形成裝置131‧‧‧均勻帶電部190‧‧‧雷射光1‧‧‧Semiconductor Chip 2‧‧‧Bumps 3‧‧‧Carrier Substrate 10‧‧‧Electrostatic Transfer Plate 11‧‧‧Board 12‧‧‧Insulating Layer 13‧‧‧Semiconductor Chip Mounting Surface 20‧‧‧ Electrostatic Transfer Plate Transfer Head 30‧‧‧Charging Patterning Device 31‧‧‧Protruding Electrode Part 32‧‧‧Non-protruding Part 40‧‧‧Positive Voltage 50‧‧‧Place 51‧‧‧Table 52‧‧‧Insulator 60‧‧‧Charging device for mounting table 70‧‧‧Positive voltage 80‧‧‧Substrate 90‧‧‧Laser light 110‧‧‧Electrostatic transfer plate 112‧‧‧Insulating layer 113‧‧‧Semiconductor chip mounting surface 130‧ ‧‧Charging pattern forming apparatus 131‧‧‧Uniform charging section 190‧‧‧Laser light

圖1(a)～(c)係說明本發明之實施例1之載置台帶電步驟及載體基板分離步驟之圖。 圖2係說明本發明之實施例1之帶電步驟之圖。 圖3(a)、(b)係說明本發明之實施例1之拾取步驟之前半之圖。 圖4係說明本發明之實施例1之拾取步驟之後半之圖。 圖5(a)、(b)係說明本發明之實施例1之安裝步驟之圖。 圖6係說明本發明之實施例2之均勻帶電步驟之圖。 圖7(a)、(b)係說明本發明之實施例2之曝光步驟之圖。FIGS. 1( a ) to ( c ) are diagrams illustrating the step of charging the stage and the step of separating the carrier substrate according to Embodiment 1 of the present invention. FIG. 2 is a diagram illustrating a charging step in Embodiment 1 of the present invention. FIGS. 3( a ) and ( b ) are diagrams illustrating the first half of the pick-up step in Embodiment 1 of the present invention. FIG. 4 is a diagram illustrating the second half of the pickup step in Embodiment 1 of the present invention. 5(a) and (b) are diagrams illustrating the installation steps of Embodiment 1 of the present invention. FIG. 6 is a diagram illustrating the uniform charging step of Embodiment 2 of the present invention. FIGS. 7( a ) and ( b ) are diagrams illustrating the exposure steps of Example 2 of the present invention.

1‧‧‧半導體晶片 1‧‧‧Semiconductor chip

2‧‧‧凸塊 2‧‧‧Bumps

10‧‧‧靜電轉印板 10‧‧‧Electrostatic transfer plate

11‧‧‧板 11‧‧‧Board

12‧‧‧絕緣層 12‧‧‧Insulation layer

13‧‧‧半導體晶片載持面 13‧‧‧Semiconductor chip carrier surface

20‧‧‧靜電轉印板傳送頭 20‧‧‧Electrostatic transfer plate transfer head

50‧‧‧載置台 50‧‧‧Place

51‧‧‧台 51‧‧‧ Taiwan

52‧‧‧絕緣體 52‧‧‧Insulators

Claims (6)

一種拾取方法，特徵在於，其係藉由最表層具有半導體晶片載持面之靜電轉印板而拾取半導體晶片之方法，且至少具有以下步驟：帶電步驟，其係於上述半導體晶片載持面形成所需之帶電圖案；及拾取步驟，其係於所排列之複數個上述半導體晶片中，藉由根據上述所需之帶電圖案而吸附於上述半導體晶片載持面來選擇性地拾取上述半導體晶片；其中上述靜電轉印板具備絕緣層，上述絕緣層之表面為上述半導體晶片載持面，且於上述帶電步驟中，藉由使上述半導體晶片載持面選擇性地接觸或接近施加有高電壓之電極而於上述靜電轉印板之上述半導體晶片載持面形成上述所需之帶電圖案。 A pickup method, characterized in that it is a method of picking up semiconductor wafers by using an electrostatic transfer plate whose outermost layer has a semiconductor wafer carrying surface, and at least has the following steps: a charging step, which is formed on the semiconductor wafer carrying surface a desired electrification pattern; and a pick-up step of selectively picking up the above-mentioned semiconductor wafers by being adsorbed on the above-mentioned semiconductor wafer carrying surface according to the above-mentioned desired electrification pattern among the plurality of the above-mentioned semiconductor wafers arranged; The electrostatic transfer plate is provided with an insulating layer, the surface of the insulating layer is the semiconductor chip carrying surface, and in the charging step, the semiconductor chip carrying surface is selectively contacted or brought close to the surface to which a high voltage is applied. Electrodes are used to form the desired electrification pattern on the semiconductor wafer carrying surface of the electrostatic transfer plate. 一種拾取方法，特徵在於，其係藉由最表層具有半導體晶片載持面之靜電轉印板而拾取半導體晶片之方法，且至少具有以下步驟：帶電步驟，其係於上述半導體晶片載持面形成所需之帶電圖案；及拾取步驟，其係於所排列之複數個上述半導體晶片中，藉由根據上述所需之帶電圖案而吸附於上述半導體晶片載持面來選擇性地拾取上述半導體晶片；其中上述靜電轉印板具備具有光導電性之絕緣層，上述絕緣層之表面為上述半導體晶片載持面，且上述帶電步驟藉由使上述半導體晶片載持面均勻地帶電之均勻帶 電步驟、及根據上述所需之帶電圖案而對上述半導體晶片載持面照射光能之曝光步驟，而於上述靜電轉印板之上述半導體晶片載持面形成上述所需之帶電圖案。 A pickup method, characterized in that it is a method of picking up semiconductor wafers by using an electrostatic transfer plate whose outermost layer has a semiconductor wafer carrying surface, and at least has the following steps: a charging step, which is formed on the semiconductor wafer carrying surface a desired electrification pattern; and a pick-up step of selectively picking up the above-mentioned semiconductor wafers by being adsorbed on the above-mentioned semiconductor wafer carrying surface according to the above-mentioned desired electrification pattern among the plurality of the above-mentioned semiconductor wafers arranged; The electrostatic transfer plate is provided with an insulating layer having photoconductivity, the surface of the insulating layer is the semiconductor wafer carrying surface, and the charging step is performed by a uniform belt that uniformly charges the semiconductor wafer carrying surface. The electrification step and the exposure step of irradiating the semiconductor wafer carrying surface with light energy according to the desired electrification pattern described above form the desired electrification pattern on the semiconductor wafer support surface of the electrostatic transfer plate. 一種拾取裝置，特徵在於，其係藉由最表層具有半導體晶片載持面之靜電轉印板而拾取半導體晶片之裝置，且至少具備：帶電圖案形成裝置，其於上述半導體晶片載持面形成所需之帶電圖案；載置台，其排列複數個半導體晶片；及靜電轉印板傳送頭，其將上述靜電轉印板傳送；其中上述靜電轉印板具備絕緣層，上述絕緣層之表面為上述半導體晶片載持面，上述帶電圖案形成裝置係藉由使施加有電壓之電極選擇性地接觸或接近於上述半導體晶片載持面而將上述所需之帶電圖案形成於上述靜電轉印板之上述半導體晶片載持面者，且上述靜電轉印板傳送頭將上述靜電轉印板傳送至上述載置台，並根據上述所需之帶電圖案，自排列於上述載置台之複數個上述半導體晶片中選擇性地將上述半導體晶片吸附於上述半導體晶片載持面而拾取。 A pickup device, characterized in that it is a device for picking up semiconductor wafers by an electrostatic transfer plate having a semiconductor wafer carrying surface in its outermost layer, and at least comprising: a charging pattern forming device that forms a place on the semiconductor wafer carrying surface. A required charging pattern; a stage for arranging a plurality of semiconductor wafers; and an electrostatic transfer plate transfer head for transporting the electrostatic transfer plate; wherein the electrostatic transfer plate is provided with an insulating layer, and the surface of the insulating layer is the semiconductor A wafer carrying surface, wherein the charging pattern forming device forms the desired charging pattern on the semiconductor of the electrostatic transfer plate by selectively contacting or approaching the semiconductor wafer carrying surface with an electrode to which a voltage is applied On the wafer carrying surface, and the electrostatic transfer plate transfer head transfers the electrostatic transfer plate to the mounting table, and selects from a plurality of the semiconductor wafers arranged on the mounting table according to the required charging pattern The above-mentioned semiconductor wafer is sucked and picked up on the above-mentioned semiconductor wafer carrying surface. 一種拾取裝置，特徵在於，其係藉由最表層具有半導體晶片載持面之靜電轉印板而拾取半導體晶片之裝置，且至少具備：帶電圖案形成裝置，其於上述半導體晶片載持面形成所需之帶電圖案； 載置台，其排列複數個半導體晶片；及靜電轉印板傳送頭，其將上述靜電轉印板傳送；其中上述靜電轉印板具備絕緣層，上述絕緣層係具有光導電性者，上述絕緣層之表面為上述半導體晶片載持面，上述帶電圖案形成裝置具有：均勻帶電裝置，其使上述半導體晶片載持面均勻地帶電；及曝光裝置，其根據上述所需之帶電圖案而對上述半導體晶片載持面照射光能；且上述靜電轉印板傳送頭將上述靜電轉印板傳送至上述載置台，並根據上述所需之帶電圖案，自排列於上述載置台之複數個上述半導體晶片中選擇性地將上述半導體晶片吸附於上述半導體晶片載持面而拾取。 A pickup device, characterized in that it is a device for picking up semiconductor wafers by an electrostatic transfer plate having a semiconductor wafer carrying surface in its outermost layer, and at least comprising: a charging pattern forming device that forms a place on the semiconductor wafer carrying surface. The required electrification pattern; a stage on which a plurality of semiconductor wafers are arranged; and an electrostatic transfer plate transfer head for transferring the electrostatic transfer plate; wherein the electrostatic transfer plate is provided with an insulating layer, the insulating layer has photoconductivity, and the insulating layer The surface is the above-mentioned semiconductor wafer carrying surface, and the above-mentioned charging pattern forming apparatus has: uniform charging means for uniformly charging the above-mentioned semiconductor wafer carrying surface; and exposure means for charging the above-mentioned semiconductor wafer according to the required charging pattern The bearing surface is irradiated with light energy; and the electrostatic transfer plate transfer head transports the electrostatic transfer plate to the mounting table, and selects from a plurality of the semiconductor wafers arranged on the mounting table according to the required charging pattern The said semiconductor wafer is adsorb|sucked to the said semiconductor wafer carrying surface, and it picks up. 一種安裝裝置，特徵在於，其係將藉由請求項3或4之拾取裝置所拾取之上述半導體晶片一次性安裝於基板上。 A mounting apparatus which mounts the above-mentioned semiconductor wafer picked up by the pick-up apparatus of claim 3 or 4 on a substrate at one time. 如請求項5之安裝裝置，其中上述半導體晶片係具有50μm×50μm以下之投影面積之LED晶片。The mounting device according to claim 5, wherein the semiconductor chip is an LED chip having a projected area of 50 μm×50 μm or less.
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