TWI729546B - 電性貼附結構及其形成方法 - Google Patents

電性貼附結構及其形成方法 Download PDF

Info

Publication number
TWI729546B
TWI729546B TW108139120A TW108139120A TWI729546B TW I729546 B TWI729546 B TW I729546B TW 108139120 A TW108139120 A TW 108139120A TW 108139120 A TW108139120 A TW 108139120A TW I729546 B TWI729546 B TW I729546B
Authority
TW
Taiwan
Prior art keywords
contact pad
electrode
contact
pad group
substrate
Prior art date
Application number
TW108139120A
Other languages
English (en)
Other versions
TW202040771A (zh
Inventor
陳立宜
Original Assignee
薩摩亞商美科米尚技術有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 薩摩亞商美科米尚技術有限公司 filed Critical 薩摩亞商美科米尚技術有限公司
Publication of TW202040771A publication Critical patent/TW202040771A/zh
Application granted granted Critical
Publication of TWI729546B publication Critical patent/TWI729546B/zh

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/07Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L24/08Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29109Indium [In] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29166Titanium [Ti] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32238Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bonding area protruding from the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
    • H01L2224/83002Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a removable or sacrificial coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053Bonding environment
    • H01L2224/83054Composition of the atmosphere
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053Bonding environment
    • H01L2224/83095Temperature settings
    • H01L2224/83096Transient conditions
    • H01L2224/83097Heating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83102Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus using surface energy, e.g. capillary forces
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83193Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83447Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • H01L2224/83805Soldering or alloying involving forming a eutectic alloy at the bonding interface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector

Abstract

一種電性貼附結構,其包含基板、接觸墊組以及微型元件以及一電極之組合。接觸墊組位於基板之上,接觸墊組包含至少一接觸墊,並且至少一接觸墊是導電的。該組合位於接觸墊組之上。電極之相對兩側分別與微型元件以及接觸墊組相接觸,至少接觸墊組與電極定義至少一體積空間。至少一體積空間於基板上之垂直投影重疊於接觸墊組與電極之一於基板上之垂直投影,並且被微型元件之外周邊於基板上之垂直投影所包圍。

Description

電性貼附結構及其形成方法
本揭露是關於一種電性貼附結構以及一種形成電性貼附結構的方法。
本段中之陳述僅提供與本揭露相關的背景資訊,並不必然構成先前技術。
用於轉移元件的傳統技術包含藉由晶片接合從轉移晶片轉移到接收基板。一種這樣的實施方式是「直接接合」,其涉及從轉移晶片到接收基板之元件陣列的一個接合步驟,然後再移除轉移晶片。另一種這樣的實施方式是「間接接合」,其涉及兩個接合/剝離步驟。在間接接合中,轉移頭可以從施主基板拾取元件陣列,再將元件陣列接合到接收基板,然後移除轉移頭。
可能影響轉移品質的重要議題之一是元件與接收晶片接觸的瞬間。依據本揭露一些實施例,提供一種電性貼附結構,其包含基板、接觸墊組以及微型元件以及電極之組合。 接觸墊組位於基板之上,其中接觸墊組包含至少一接觸墊,並且至少一接觸墊是導電的。微型元件以及電極之組合位於接觸墊組之上,電極之相對兩側分別與微型元件以及接觸墊組相接觸,其中至少接觸墊組與電極定義至少一體積空間。至少一體積空間於基板上之垂直投影重疊於接觸墊組與電極之一者於基板上之垂直投影。至少一體積空間於基板上之垂直投影被微型元件之外周邊於基板上之垂直投影所包圍。
依據本揭露一些實施例,提供一種形成電性貼附結構的方法,其包含:於基板上形成接觸墊組,其中接觸墊組包含至少一接觸墊,並且至少一接觸墊是導電的;將微型元件以及電極之組合放置於接觸墊組之上,而使電極之相對兩側分別與微型元件以及接觸墊組接觸,其中至少接觸墊組以及電極定義至少一體積空間,至少一體積空間於基板上之垂直投影重疊於接觸墊組與電極之一者於基板上之垂直投影,並且至少一體積空間於基板上之垂直投影被該微型元件之一外周邊於該基板上之一垂直投影所包圍;於電極以及接觸墊組之間形成一液體層,以使微型元件被液體層所產生之毛細力抓住;以及蒸發液體層,使得電極貼附至接觸墊組並且與接觸墊組電性連接。
為了讓本揭露的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。
100A/100B/100E‧‧‧電性貼附結構
110‧‧‧基板
120A/120A’/120A”/120A”’/120B/120B’/120C/120D/120E/120F‧‧‧接觸墊組
120A-1/120C-1‧‧‧接觸墊
120A-2/120A’-2/120A”-2/120A”’-2/130B-2/130B’-2/120C-2/120D-2/120E-2/120F-2‧‧‧體積空間
120A-tcs/120A’-tcs/120A”-tcs/120B-tcs/120B’-tcs/120D-tcs‧‧‧頂接觸表面
120A”-tncs‧‧‧頂部非接觸表面
130A/130A’/130B/130B’/130C/130D/130E/130F‧‧‧電極
130A-bcs/130A’-bcs/130B-bcs/130B’-bcs/130D-bcs‧‧‧底接觸表面
130A-bcs-1‧‧‧重疊部分
130A-bcs-2‧‧‧非重疊部分
140‧‧‧微型元件
150‧‧‧液體層
152‧‧‧彎月面
200‧‧‧方法
L‧‧‧側向長度
OP‧‧‧外周邊
CP/CP1/CP2‧‧‧接觸周邊
PCP‧‧‧原始接觸周邊
210-240‧‧‧操作
T‧‧‧厚度
當結合隨附圖式閱讀時,自以下詳細描述將最佳地理解本揭露之態樣。應注意,根據工業中之標準實務,各特 徵未必依比例繪示。實際上,可出於論述清晰之目的而增減所說明的特徵之尺寸。
第1A圖係為依據本揭露一些實施例之一電性貼附結構的剖面示意圖;
第1B圖係為依據本揭露一些實施例之一電性貼附結構的透視圖;
第1C圖係為依據本揭露一些實施例之一接觸墊組之一頂接觸表面的底視圖;
第1D圖係為依據本揭露一些實施例之一電極之一底接觸表面的底視圖;
第1E圖係為依據本揭露一些實施例當電極靠近或接觸接觸墊組時,第1C圖中的接觸墊組以及第1D圖中的電極的底視圖;
第1F圖係為依據本揭露一些實施例之一接觸周邊的示意圖;
第1G圖係為依據本揭露一些實施例之一原始接觸周邊的示意圖;
第1H圖係為依據本揭露一些實施例之分別與一電極以及一接觸墊組相接觸之一液體層的示意性透視圖;
第2A圖係為依據本揭露一些實施例之一接觸墊組之一頂接觸表面的底視圖;
第2B圖係為依據本揭露一些實施例之一電極之一底接觸表面的底視圖;
第2C圖係為依據本揭露一些實施例當電極靠近或接觸接觸墊組時,第2A圖中的接觸墊組以及第2B圖中的電極的底 視圖;
第3A圖係為依據本揭露一些實施例之一種類型的接觸墊組的剖面圖;
第3B圖係為依據本揭露一些實施例之一種類型的接觸墊組的剖面圖;
第3C圖係為依據本揭露一些實施例之一種類型的接觸墊組的剖面圖;
第3D圖係為依據本揭露一些實施例之一種類型的接觸墊組的剖面圖;
第4A圖係為依據本揭露一些實施例之一電性貼附結構的剖面示意圖;
第4B圖係為依據本揭露一些實施例之一接觸墊組之一頂接觸表面的底視圖;
第4C圖係為依據本揭露一些實施例之一電極之一底接觸表面的底視圖;
第4D圖係為依據本揭露一些實施例當電極靠近或接觸接觸墊組時,第4B圖中的接觸墊組以及第4C圖中的電極的頂視圖;
第4E圖係為依據本揭露一些實施例之一接觸墊組之一頂接觸表面的底視圖;
第4F圖係為依據本揭露一些實施例之一電極之一底接觸表面的底視圖;
第4G圖係為依據本揭露一些實施例當電極靠近或接觸接觸墊組時,第4E圖中的接觸墊組以及第4F圖中的電極的頂視圖;
第5圖係為依據本揭露一些實施例當一電極靠近或接觸一接觸墊組時,接觸墊組以及電極的底視圖;
第6A圖係為依據本揭露一些實施例之一接觸墊組之一頂接觸表面的底視圖;
第6B圖係為依據本揭露一些實施例之一電極之一底接觸表面的底視圖;
第6C圖係為依據本揭露一些實施例當電極靠近或接觸接觸墊組時,第6A圖中的接觸墊組以及第6B圖中的電極的底視圖;
第7A圖係為依據本揭露一些實施例之一電性貼附結構的剖面示意圖;
第7B圖係為依據本揭露一些實施例當一電極靠近或接觸接一觸墊組時,接觸墊組以及電極的底視圖;
第8圖係為依據本揭露一些實施例當一電極靠近或接觸一接觸墊組時,接觸墊組以及電極的底視圖;
第9圖係為依據本揭露一些實施例之一形成一電性貼附結構的方法的流程圖;
第10A圖係為依據本揭露一些實施例之形成電性貼附結構的方法之中間階段剖面示意圖;
第10B圖係為依據本揭露一些實施例之形成電性貼附結構的方法之中間階段剖面示意圖;
第10C圖係為依據本揭露一些實施例之形成電性貼附結構的方法之中間階段剖面示意圖;
第10D圖係為依據本揭露一些實施例之形成電性貼附結構的方法之中間階段剖面示意圖;
第11圖係為依據本揭露一些實施例之一電性貼附結構的分解示意圖;
第12圖係為依據本揭露一些實施例說明一電極之一底接觸表面於一基板上之一投影與一接觸墊組之一頂接觸表面於基板上之一投影間之重疊的簡化分解圖;以及
第13圖係為依據本揭露一些實施例之與第3B圖相同並具有額外標示之接觸墊組的剖面圖。
以下將以圖式及詳細說明闡述本揭露之精神,任何所屬技術領域中具有通常知識者在瞭解本揭露之較佳實施例後,當可由本揭露所教示之技術,加以改變及修飾,其並不脫離本揭露之精神與範圍。
在各種實施例中,參考附圖進行描述。然而,某些實施例可以在沒有這些實務細節中的一個或多個的情況下實施,或者與其他已知方法及配置組合實施。在以下的敘述中,為明確說明起見,許多實務上的細節,例如實務上的配置、尺寸、及製程等,將在以下敘述中一併說明。此外,一些習知慣用的半導體製程與製造技術並沒有被特別詳細地描述,以免不必要地模糊本揭露。貫穿全篇說明書對「一個實施例」、「實施例」等的引用意味著與該實施例相關的描述的特定特徵、結構、配置或者特性係包含在本揭露的至少一個實施例中。因此,貫穿全篇說明書在各個地方出現的片語「在一個實施例中」、「在實施例中」等不一定是指本揭露的相同實施例。此外,特定特徵、結構、配置或者特性可以在一個或多個實施例中以任何適合的方式組合。
這裡使用的術語「在......之上方」、「到」、「在......之間」、及「在...之上」可以指一層相對於其他層的相對位置。一層在另一層「之上方」或「之上」或接合「到」另一層可以是直接與另一層接觸,或者可以具有一個或多個中間層。多個層「之間」的一層可以直接與這些層接觸,或者可以具有一個或多個中間層。
請參照第1A圖至第1H圖,第1A圖係為依據本揭露一些實施例之一電性貼附結構100A的剖面示意圖。電性貼附結構100A包含一基板110、一接觸墊組120A、以及一微型元件140以及一電極130A之一組合。接觸墊組120A係位於基板110之上,其中接觸墊組120A包含至少一接觸墊120A-1,並且接觸墊120A-1係為導電的。於一些實施例中,接觸墊組120A之一厚度係小於或等於約2微米(μm),並且優選地小於或等於約0.5微米。微型元件140以及電極130A之組合係位於接觸墊組120A之上。於一些實施例中,電極130A之一厚度範圍係為約0.2微米至約2微米,並且優選地範圍為約0.3微米至約1微米。電極130A之相對兩側分別與微型元件140以及接觸墊組120A相接觸,其中至少接觸墊組120A與電極130A定義至少一體積空間120A-2。於一些實施例中,至少一體積空間120A-2的數量為複數個。至少一體積空間120A-2於基板110上之一垂直投影係重疊於接觸墊組120A與電極130A之一於基板110上之一垂直投影。具體地,至少一體積空間120A-2於基板110上之垂直投影係重疊於接觸墊組120A與電極130A中之僅一於基板110上之一垂直投影。在第1A圖所示的實施例中,體積空間120A-2於基板110上之垂直投影係重疊於電極130A於基板110上之一垂直投影,但並不重疊於接觸墊組120A於基板110 上之一垂直投影。體積空間120A-2於基板110上之垂直投影係被微型元件140之一外周邊OP於基板110上之一垂直投影所包圍。
第1B圖係為依據本揭露一些實施例之電性貼附結構100A的透視圖,第1C圖係為依據本揭露一些實施例之接觸墊組120A的底視圖,第1D圖係為依據本揭露一些實施例之電極130A的底視圖,第1E圖係為依據本揭露一些實施例當電極130A靠近或接觸接觸墊組120A時,第1C圖中的接觸墊組120A以及第1D圖中的電極130A的底視圖,第1F圖係為依據本揭露一些實施例之一接觸周邊CP的示意圖,第1G圖係為依據本揭露一些實施例之一原始接觸周邊PCP的示意圖,第1H圖係為依據本揭露一些實施例之分別與電極130A以及接觸墊組120A相接觸之一液體層150的示意性透視圖。
第1B圖至第1D圖示出了第1A圖所示的可能配置之一。第1B圖提供了三維視圖,其使得電性貼附結構100A的結構特徵更容易理解。於一些實施例中,由於接觸墊組120A(之一頂接觸表面120A-tcs)(例如如在第1C圖中所例示的「H」的形狀)以及電極130A(之一底接觸表面130A-bcs)(例如如在第1D圖中所例示的一正方形或一長方形)形狀上的不同,當接觸墊組120A與電極130A靠近它們之間的液體層150(例如一水層)並且液體層150之相對兩側分別接觸接觸墊組120A與電極130A時,接觸周邊CP(如第1F圖所示),即在頂接觸表面120A-tcs與底接觸表面130A-bcs接觸之後形成之一周邊,的一總長度係大於原始接觸周邊PCP的總長度,其中接觸墊組120A的形狀並非「故意設計」的(如第1G圖所示)。第1H圖可能也有助於理解所敘述的實施例。這些「故意設計」的形狀係被設計以增加接觸墊組120A與電極 130A之間的接觸周邊CP的總長度。以第1C圖與第1D圖所示的實施例為例,當接觸墊組120A的形狀為「H」並且電極130A的形狀為正方形(或長方形)時,接觸周邊CP係大於原始接觸周邊PCP,其中接觸墊組120A與電極130A兩者的形狀均為正方形或長方形。值得注意的是,如果重新填充所述「H」的兩個凹陷部分,則被填充後的H的區域(即,也是一正方形或是一長方形)將與由原始接觸周邊PCP所包圍的區域相同。說明上述實施例之透視(三維視)圖係如第1B圖及第1H圖所示。在第1C圖至第1E圖所示的實施例中,體積空間120A-2係被電極130A從頂部、接觸墊組120A從側邊、基板110從底部、以及微型元件140之外周邊OP相對於X-Y平面之一垂直投影從側邊所定義。
於一些實施例中,電極130A可靠近接觸墊組120A並與它們之間的液體層150相接觸,使得電極130A與其上的微型元件140被液體層150所產生的毛細力抓住(例如,參考第1H圖,其中由於毛細力而形成的液體層150的彎月面152)。然後,液體層150被蒸發使得電極130A黏附固定並貼附至接觸墊組120A。於這些實施例中,由於接觸墊組120A被設計為「H」形,此毛細力係大於當電極130A與接觸墊組120A都被設計成正方形時的情況。此較大的毛細力對於貼附的品質以及隨後電極130A與接觸墊組120A之間的黏合有很大幫助,因為當電極130A黏附於液體層150時,毛細力可以幫助將電極130A固定在可控區域內。進一步地,在液體層150蒸發時和液體層150蒸發之後,此毛細力可以有助於在電極130A與接觸墊組120A之間形成貼附(以及亦形成黏合)。此貼附係為這些種類的液體層150中發現的特殊現象,有助於抓住與接觸。此黏合是兩個物體(通常為金屬)相接觸並且原 子在兩物體間擴散時產生的現象。於一些實施例中,微型元件140的側向長度L係小於或等於約100微米,側向長度L的限制是為了確保毛細力顯著地幫助並支配電極130A與接觸墊組120A之間的貼附。
值得注意的是,當電極130A的底接觸表面130A-bcs與接觸墊組120A的頂接觸表面120A-tcs接觸時,所述的接觸周邊CP以及原始接觸周邊PCP可被解釋為單個接觸周邊(或是複數個分離的接觸周邊,如稍後將在一些實施例中所提到的)。當液體層150的相對兩側係介於並分別與電極130A以及接觸墊組120A相接觸時,它們也可以被解釋為單個接觸周邊(或是多個接觸周邊)。在這種情形之下,接觸周邊CP(以及原始接觸周邊PCP)係被視為具有一厚度T(如第1H圖所示)的周邊,而厚度T係為從電極130A的底接觸表面130A-bcs經由液體層150的周邊測量到接觸墊組120A的頂接觸表面120A-tcs。
請參照第2A圖至第2C圖,第2A圖係為依據本揭露一些實施例之一接觸墊組120A’之一頂接觸表面120A’-tcs的底視圖,第2B圖係為依據本揭露一些實施例之一電極130A’之一底接觸表面130A’-bcs的底視圖,第2C圖係為依據本揭露一些實施例當電極130A’靠近或接觸接觸墊組120A’時,第2A圖中的接觸墊組120A’以及第2B圖中的電極130A’的底視圖。注意第1A圖也可以被第2A圖至第2C圖所解釋,因為第1A圖是剖面圖。第2A圖至第2C圖所示的實施例與第1C圖至第1E圖所示的實施例,差別在於一體積空間120A’-2與接觸墊組120A’之間的幾何關係不同於體積空間120A-2與接觸墊組120A之間的幾何關係。具體而言,第2A圖至第2C圖所示的體積空間120A’-2完全被X-Y平面上的接觸墊 120A’所包圍,而第1C圖至第1E圖所示體積空間120A-2於X-Y平面上,在一側邊被暴露,並且由接觸墊120A圍繞四個側邊中的三個側邊。然而,如第2A圖至第2C圖所示的實施例的技術效果係類似於第1C圖至第1E圖所示實施例的技術效果,將不再詳細描述。值得注意的是,接觸周邊CP包含彼此分離的兩個不同的接觸周邊CP1、CP2,接觸周邊CP為接觸周邊CP1、CP2的和。在以下不同實施例的內容中,即使存在不同形狀的接觸周邊CP,接觸周邊為簡單起見僅被標示為「CP」。在第2A圖至第2C圖所示的實施例中,體積空間120A’-2係被電極130A’從頂部、接觸墊組120A’從側邊、以及基板110從底部所定義。
請參照第3A圖至第3D圖,第3A圖至第3D圖係分別為依據本揭露一些實施例之四種類型的接觸墊組的剖面圖,第3A圖所示的接觸墊120A(120A’)可被視為與第1A圖至第2C圖所示的相同。在第3B圖、第3C圖以及第3D圖所示的接觸墊組120A”及120A”’中,部分的接觸墊組120A”及120A”’係位於體積空間120A”-2及120A”’-2之下,以至於體積空間120A”-2及120A”’-2僅由電極130A(130A’)、接觸墊組120A”(120A”’)、以及選擇性地由微型元件140之外周邊OP藉由如上所述的「垂直投影」限制所定義。在第3B圖、第3C圖以及第3D圖所示的實施例中,體積空間120A”-2及120A”’-2係分別被電極130A(130A’)從頂部、接觸墊組120A”、120A”’從側邊與底部、以及選擇性地由微型元件140之外周邊OP相對於X-Y平面之垂直投影從側邊所定義。
請參照第4A圖至第4G圖,第4A圖至第4G圖所示的實施例與第1A圖至第3C圖所示的實施例,差別在於接觸墊組 (120A系列)之一結構特徵以及電極(130A系列)之一結構特徵係互換。具體而言,故意設計的形狀現在被形成於電極上。第4A圖係為依據本揭露一些實施例之一電性貼附結構100B的剖面示意圖,第4B圖係為依據本揭露一些實施例之一接觸墊組120B之一頂接觸表面120B-tcs的底視圖,第4C圖係為依據本揭露一些實施例之一電極130B之一底接觸表面130B-bcs的底視圖,第4D圖係為依據本揭露一些實施例當電極130B靠近或接觸接觸墊組120B時,第4B圖中的接觸墊組120B以及第4C圖中的電極130B的頂視圖。體積空間130B-2係被電極130B從側邊、接觸墊組120B從底部、微型元件140從頂部、以及選擇性地由微型元件140之外周邊OP相對於X-Y平面之垂直投影從側邊所定義。
請參照第4E圖至第4G圖,第4E圖係為依據本揭露一些實施例之一接觸墊組120B’之一頂接觸表面120B’-tcs的底視圖,第4F圖係為依據本揭露一些實施例之一電極130B’之一底接觸表面130B’-bcs的底視圖,第4G圖係為依據本揭露一些實施例當電極130B’靠近或接觸接觸墊組120B’時,第4E圖中的接觸墊組120B’以及第4F圖中的電極130B’的頂視圖。體積空間130B’-2係被電極130B’從側邊、微型元件140從頂部、以及接觸墊組120B’從底部所定義。
請參照第5圖,第5圖係為依據本揭露一些實施例當一電極130C靠近或接觸一接觸墊組120C時,接觸墊組120C以及電極130C的底視圖。在這些實施例中,接觸墊組120C包含複數個接觸墊120C-1,這些接觸墊120C-1的至少一係被電性連接至一施加電壓源(未顯示於圖中),而其他的接觸墊120C-1(單個或多個)可被電性浮接(在電極130C接觸接觸墊120C-1之前),因為 它/它們係被用於增加電極130C與接觸墊組120C之間的毛細力。值得注意的是,此處的體積空間120C-2並未延伸到微型元件140的外周邊OP之外。具體而言,體積空間120C-2的有效性應總是遵守上面提到的「垂直投影」限制。也就是說,體積空間120C-2於基板110上之垂直投影係被微型元件140之外周邊OP於基板110上之一垂直投影所包圍。儘管在微型元件140的外周邊OP之外可能存在連續延伸的「空間」,但是這些「空間」不會有助於如上所述液體層150所產生的毛細力的增加。另外值得注意的是,如同前面提到的實施例一樣,接觸墊組120C以及電極130C的結構特徵可被互換。
請參照第6A圖至第6C圖,第6A圖係為依據本揭露一些實施例之一接觸墊組120D之一頂接觸表面120D-tcs的底視圖,第6B圖係為依據本揭露一些實施例之一電極130D之一底接觸表面130D-bcs的底視圖,第6C圖係為依據本揭露一些實施例當電極130D靠近或接觸接觸墊組120D時,第6A圖中的接觸墊組120D以及第6B圖中的電極130D的底視圖。在這些實施例中,微型元件140的尺寸(或側向長度)係小於接觸墊組120D,因此,一體積空間120D-2的邊界明顯受到微型元件140之外周邊OP的限制,其也遵守上面提到的「垂直投影」限制。
請參照第7A圖、第7B圖以及第8圖,第7A圖係為依據本揭露一些實施例之一電性貼附結構100E的剖面示意圖,第7B圖係為依據本揭露一些實施例當一電極130E靠近或接觸接一觸墊組120E時,接觸墊組120E以及電極130E的底視圖,第8圖係為依據本揭露一些實施例當一電極130F靠近或接觸一接觸墊組120F時,接觸墊組120F以及電極130F的底視圖。第7A圖與第7B 圖示出了接觸墊組120E具有一鋸齒形(zigzag)(或類似於鋸齒形)的實施例,而第8圖示出了具有類似一螺旋形的接觸墊組120F的實施例。上述實施例展示了一些其他可能的結構特徵,這些結構特徵遵守如上所述的所有限制,並且也能夠增加所述毛細力。
第9圖係為依據本揭露一些實施例之一形成電性貼附結構100A的方法200的流程圖,第10A圖至第10D圖係為第9圖的方法200的中間階段剖面示意圖。請參照第9圖至第10D圖,方法200開始於操作210,其中一接觸墊組120A係形成於一基板110上,而其中接觸墊組120A包含至少一接觸墊120A-1,並且接觸墊120A-1係為導電的(參照第10A圖)。於一些實施例中,在形成接觸墊組120A之前,於基板110上形成一黏著層(未顯示於圖中)。方法200繼續進行操作220,其中一微型元件140以及一電極130A之一組合係被放置於接觸墊組120A之上,而使電極130A之相對兩側分別與微型元件140以及接觸墊組120A相接觸。至少接觸墊組120A以及電極130A定義至少一體積空間120A-2。體積空間120A-2於基板110上之一垂直投影係重疊於接觸墊組120A與電極130A之一於基板110上之一垂直投影。於本實施例中,體積空間120A-2於基板110上之垂直投影係重疊於電極130A於基板110上之一垂直投影。所述體積空間120A-2於基板110上之垂直投影係被微型元件140之一外周邊OP於基板110上之一垂直投影所包圍(參照第10B圖)。
方法200繼續進行操作230,其中液體層150係被形成於電極130A以及接觸墊組120A之間,以使微型元件140被液體層150所產生之一毛細力抓住。於一些實施例中,液體層150包含水。值得注意的是,操作220與操作230可以被互換。於一些其他 實施例中,液體層150係被形成於接觸墊組120A之上,接著電極130A以及微型元件140之組合被放置於接觸墊組120A之上,使得電極130A接觸液體層150,並且被液體層150所產生的毛細力抓住。於一些實施例中,液體層150可藉由在包含蒸氣之一環境降低接觸墊組120A之一溫度而形成,使至少一部份之此蒸氣凝結以形成液體層150。於一些實施例中,液體層150在大約露點的溫度下形成。在一些實施例中,液體層150可以藉由在基板110上噴灑蒸氣來形成,使得至少一部分的蒸氣凝結以形成液體層150。於一些實施例中,此蒸氣之水蒸氣壓高於環境之水蒸氣壓,蒸氣基本上由氮及水所組成。在一些實施例中,當微型元件140被液體層150所產生的毛細力抓住時,介於電極130A以及接觸墊組120A間之液體層150之一厚度係小於微型元件140之一厚度。
方法200繼續進行操作240,其中液體層150被蒸發,使得電極130A黏附固定並貼附至接觸墊組120A並且與接觸墊組120A電性連接。於一些實施例中,藉由升高接觸墊組120A之一溫度來蒸發液體層150。在一些實施例中,接觸墊組120A與電極130A之一包含一黏合材料,並且接觸墊組120A之溫度可被進一步升高到一溫度點,以將電極130A黏合到接觸墊組120A。此溫度點可高於黏合材料之一熔點,低於黏合材料之熔點並高於液體層150之一沸點,或是高於接觸墊組120A與電極130A之一共晶點。接觸墊組120A與電極130A之一可包含銅(copper)及富含銅(copper rich)的材料之一。此黏合材料可為一富含錫(tin rich)的材料、一富含銦(indium rich)的材料、或是一富含鈦(titanium rich)的材料。這裡的「富含」意味著佔原子總數的一半以上。
在上述接觸周邊CP大於上述原始接觸周邊PCP的 條件下,電性貼附結構(例如,電性貼附結構100A、100B與100E可被以其他方式說明,其也可以實現增加用於抓住電極(例如,電極130A、130A’、130B、130B’、130C、130D、130E及130F)至接觸墊組(例如,接觸墊組120A、120A’、120A”、120A”’、120B、120B’、120C、120D、120E及120F)的毛細力。
請參照第11圖至第13圖,第11圖係為依據本揭露一些實施例之電性貼附結構100A的分解示意圖,第12圖係為依據本揭露一些實施例說明電極130A的底接觸表面130A-bcs於基板110上之投影與接觸墊組120A的頂接觸表面120A-tcs於基板110上之投影間之重疊的簡化分解圖,第13圖係為依據本揭露一些實施例之與第3B圖相同並具有額外標示之接觸墊組120A”的剖面圖。以電性貼附結構100A為例(但不應限於此),電極130A之底接觸表面130A-bcs係與接觸墊組120A的頂接觸表面120A-tcs相接觸,其中底接觸表面130A-bcs以及頂接觸表面120A-tcs其中之一於基板110上之一垂直投影,基於底接觸表面130A-bcs以及頂接觸表面120A-tcs之另一於基板110上之一垂直投影,被分成至少一個重疊部分與至少一個非重疊部分。注意,在本實施例中,是電極130A的底接觸表面130A-bcs之垂直投影被分成一重疊部分130A-bcs-1以及一非重疊部分130A-bcs-2(參照第12圖)。
具體而言,重疊部分130A-bcs-1係重疊於頂接觸表面120A-tcs於基板110上之垂直投影,而非重疊部分130A-bcs-2係不重疊於頂接觸表面120A-tcs於基板110上之垂直投影。重疊部分130A-bcs-1與非重疊部分130A-bcs-2兩者都被微型元件140之外周邊OP於基板110上之垂直投影所包圍,並且僅有那些被微型元件140之外周邊OP於基板110上之垂直投影所包圍的才可以被 視為重疊部分130A-bcs-1與非重疊部分130A-bcs-2。值得注意的是,在接觸墊組120A”具有位於體積空間120A”-2下方的之一表面的實施例中,所述表面是接觸墊組120A”之一頂部非接觸表面120A”-tncs,因為當電極130A與接觸墊組120A”接觸時,它並不會與電極130A接觸(如圖13所示)。顯然地,頂部非接觸表面120A”-tncs是不同於並且區別於一頂接觸表面120A”-tcs。
在像第4A圖所示的一些其他實施例中,情況可以顛倒(亦即,接觸墊組120B之一頂接觸表面於基板110上之一垂直投影被分成一重疊部分以及一非重疊部分)。
綜上所述,一種電性貼附結構及其形成方法提供以幫助電極與接觸墊組間之液體層抓住電極並將電極貼附至接觸墊組。此電性貼附結構正如同說明書所述,可使接觸周邊大於原始接觸周邊,以增強由液體層所產生用於抓住電極的毛細力。
雖然本揭露已以實施例發明如上,然其並非用以限定本揭露,任何熟習此技藝者,在不脫離本揭露之精神和範圍內,當可作各種之更動與潤飾,因此本揭露之保護範圍當視後附之申請專利範圍所界定者為準。
120A‧‧‧接觸墊組
120A-1‧‧‧接觸墊
120A-2‧‧‧體積空間
130A‧‧‧電極
140‧‧‧微型裝置

Claims (20)

  1. 一種電性貼附結構,包含:一基板;一接觸墊組位於該基板之上,其中該接觸墊組包含至少一接觸墊,並且該至少一接觸墊是導電的;以及一微型元件以及一電極之組合,位於該接觸墊組之上,該電極之相對兩側分別與該微型元件以及該接觸墊組相接觸,其中至少該接觸墊組與該電極定義至少一體積空間,該接觸墊組和該電極之間的一接觸周邊的總長度大於如同當該接觸墊組與該體積空間在同一平面上時,該接觸墊組填充該體積空間而在該接觸墊組和該電極之間形成的一原始接觸周邊的總長度,該至少一體積空間於該基板上之垂直投影重疊於該接觸墊組與該電極之一者於該基板上之垂直投影,並且被該微型元件之外周邊於該基板上之垂直投影所包圍。
  2. 如請求項1所述之電性貼附結構,還包含一黏著層介於該接觸墊組與該基板之間。
  3. 如請求項1所述之電性貼附結構,其中該至少一接觸墊的數量為複數個。
  4. 如請求項1所述之電性貼附結構,其中該微型元件之一側向長度小於或等於約100微米。
  5. 如請求項1所述之電性貼附結構,其中該至少一體積空間的數量為複數個。
  6. 一種形成一電性貼附結構的方法,包含:於一基板上形成一接觸墊組,其中該接觸墊組包含至少一接觸墊,並且該至少一接觸墊是導電的;將一微型元件以及一電極之組合放置於該接觸墊組之上,而使該電極之相對兩側分別與該微型元件以及該接觸墊組相接觸,其中至少該接觸墊組以及該電極定義至少一體積空間,該接觸墊組和該電極之間的一接觸周邊的總長度大於如同當該接觸墊組與該體積空間在同一平面上時,該接觸墊組填充該體積空間而在該接觸墊組和該電極之間形成的一原始接觸周邊的總長度,該至少一體積空間於該基板上之垂直投影係重疊於該接觸墊組與該電極之一者於該基板上之垂直投影,並且係被該微型元件之外周邊於該基板上之垂直投影所包圍;於該電極以及該接觸墊組之間形成一液體層,以使該微型元件被該液體層所產生之毛細力抓住;以及蒸發該液體層,使得該電極貼附至該接觸墊組並且與該接觸墊組電性連接。
  7. 如請求項6所述之方法,其中形成該液體層包含:於包含一蒸氣之環境,降低該接觸墊組之溫度,使至少一部份之該蒸氣凝結以形成該液體層。
  8. 如請求項6所述之方法,其中該至少一接觸墊的數量為複數個。
  9. 如請求項6所述之方法,其中形成該液體層包含: 於該基板上噴灑一蒸氣,使得至少一部分的該蒸氣凝結以形成該液體層。
  10. 如請求項9所述之方法,其中該蒸氣之水蒸氣壓高於環境水蒸氣壓。
  11. 如請求項9所述之方法,其中該蒸氣基本上由氮及水所組成。
  12. 如請求項6所述之方法,還包含在形成該接觸墊組之前,於該基板上形成一黏著層。
  13. 如請求項6所述之方法,其中該液體層包含水。
  14. 如請求項7所述之方法,其中該液體層在大約露點的溫度下形成。
  15. 如請求項6所述之方法,其中蒸發該液體層包含:於該液體層被蒸發後,升高該接觸墊組之溫度,使得該電極黏附固定至該接觸墊組。
  16. 如請求項6所述之方法,其中該接觸墊組以及該電極之至少一者包含一黏合材料,並且該方法還包含:於蒸發該液體層後,升高該接觸墊組之溫度至高於該黏合材料之熔點。
  17. 如請求項6所述之方法,其中該接觸墊組以及該電極之至少一者包含一黏合材料,並且該方法還包含:於蒸發該液體層後,升高該接觸墊組之溫度至低於該黏合材料之熔點並高於該液體層之沸點。
  18. 如請求項6所述之方法,還包含:於蒸發該液體層後,升高該接觸墊組之溫度至高於該接觸墊組與該電極之共晶點。
  19. 如請求項6所述之方法,其中當該微型元件被該毛細力抓住時,介於該電極以及該接觸墊組之間的該液體層之厚度小於該微型元件之厚度。
  20. 一種電性貼附結構,包含:一基板;一接觸墊組位於該基板之上,其中該接觸墊組包含至少一接觸墊,並且該至少一接觸墊是導電的;以及一微型元件以及一電極之組合位於該接觸墊組之上,該電極之相對兩側分別與該微型元件以及該接觸墊組相接觸,該電極之一底接觸表面與該接觸墊組之一頂接觸表面相接觸,其中該底接觸表面以及該頂接觸表面其中之一者於該基板上之垂直投影,基於該底接觸表面以及該頂接觸表面之另一於該基板上之垂直投影,被分成至少一重疊部分與至少一非重疊部分,並且該至少一重疊部分以及該至少一非重疊部分被該微型元件之外周邊於該基板上之垂直投影所包圍,使得該接觸墊組和該電極之間的一 接觸周邊的總長度大於如同當該接觸墊組與該非重疊部分在同一平面上時,該接觸墊組填充該非重疊部分而在該接觸墊組和該電極之間形成的一原始接觸周邊的總長度。
TW108139120A 2019-04-22 2019-10-29 電性貼附結構及其形成方法 TWI729546B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/390,018 US10916518B2 (en) 2019-04-22 2019-04-22 Electrical binding structure and method of forming the same
US16/390,018 2019-04-22

Publications (2)

Publication Number Publication Date
TW202040771A TW202040771A (zh) 2020-11-01
TWI729546B true TWI729546B (zh) 2021-06-01

Family

ID=72829312

Family Applications (1)

Application Number Title Priority Date Filing Date
TW108139120A TWI729546B (zh) 2019-04-22 2019-10-29 電性貼附結構及其形成方法

Country Status (3)

Country Link
US (1) US10916518B2 (zh)
CN (1) CN111834318B (zh)
TW (1) TWI729546B (zh)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040169249A1 (en) * 2000-08-24 2004-09-02 Heetronix High temperature circuit structures with thin film layer
US20180158706A1 (en) * 2016-11-04 2018-06-07 Xiamen Sanan Optoelectronics Technology Co., Ltd. Micro Elements Transfer Device and Method

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI232072B (en) * 2004-04-05 2005-05-01 Wistron Corp Method and structure for printed circuit board assembly and jig for assembling structure
US7781324B2 (en) * 2005-06-30 2010-08-24 Brother Kogyo Kabushiki Kaisha Method of producing wire-connection structure, and wire-connection structure
JP4042798B2 (ja) * 2006-09-11 2008-02-06 セイコーエプソン株式会社 配線パターンの形成方法及びデバイスの製造方法
GB0717055D0 (en) * 2007-09-01 2007-10-17 Eastman Kodak Co An electronic device
US9754803B2 (en) * 2013-03-27 2017-09-05 Seiko Epson Corporation Electronic device, electronic apparatus, moving object, and method for manufacturing electronic device
US10270008B2 (en) * 2015-03-16 2019-04-23 Seoul Viosys Co., Ltd. Light emitting element including metal bulk

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040169249A1 (en) * 2000-08-24 2004-09-02 Heetronix High temperature circuit structures with thin film layer
US20180158706A1 (en) * 2016-11-04 2018-06-07 Xiamen Sanan Optoelectronics Technology Co., Ltd. Micro Elements Transfer Device and Method

Also Published As

Publication number Publication date
CN111834318A (zh) 2020-10-27
TW202040771A (zh) 2020-11-01
CN111834318B (zh) 2023-11-24
US20200335464A1 (en) 2020-10-22
US10916518B2 (en) 2021-02-09

Similar Documents

Publication Publication Date Title
TWI534970B (zh) 封裝堆疊裝置及其製法
TWI446501B (zh) 承載板、半導體封裝件及其製法
TW200917391A (en) Three-dimensional circuitry formed on integrated circuit device using two-dimensional fabrication
CN106206509B (zh) 电子封装件及其制法与基板结构
TWI451543B (zh) 封裝結構及其製法暨封裝堆疊式裝置
TWI680550B (zh) 堆疊式封裝結構及其製法
TWI434629B (zh) 半導體封裝結構及其製法
TW201501265A (zh) 層疊式封裝件及其製法
TW202011619A (zh) 晶片封裝構造及其晶片
TW202008043A (zh) 陣列基板及其製造方法,及應用此陣列基板的顯示裝置及其製造方法
TWI729546B (zh) 電性貼附結構及其形成方法
TWI734235B (zh) 電性貼附結構及其形成方法
TWI758014B (zh) 用於直接晶片附接之具有毛細流動結構的半導體晶粒
KR102599631B1 (ko) 반도체 칩, 반도체 장치, 및 이를 포함하는 반도체 패키지
TWI759698B (zh) 電子封裝件及其承載結構
TW202230711A (zh) 半導體封裝
TWI732509B (zh) 電子封裝件
TWI421995B (zh) 半導體封裝結構及其製法
TW201521164A (zh) 封裝堆疊結構及其製法
CN115312406A (zh) 芯片封装结构及制备方法
US20170309589A1 (en) Semiconductor device and method for manufacturing the same
TWI750598B (zh) 半導體封裝件及製造半導體封裝件的方法
TW200908246A (en) Adhesion structure for a package apparatus
TWI576979B (zh) 封裝基板及其製造方法
US20160043239A1 (en) Package structure