TWI718421B - Method for producing lead frame and lead frame - Google Patents
Method for producing lead frame and lead frame Download PDFInfo
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- TWI718421B TWI718421B TW107135960A TW107135960A TWI718421B TW I718421 B TWI718421 B TW I718421B TW 107135960 A TW107135960 A TW 107135960A TW 107135960 A TW107135960 A TW 107135960A TW I718421 B TWI718421 B TW I718421B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 39
- 238000000926 separation method Methods 0.000 claims description 58
- 238000000034 method Methods 0.000 claims description 49
- 238000003825 pressing Methods 0.000 claims description 21
- 239000004065 semiconductor Substances 0.000 claims description 21
- 238000005520 cutting process Methods 0.000 claims description 14
- 239000000463 material Substances 0.000 abstract description 5
- 230000000881 depressing effect Effects 0.000 abstract 1
- 238000004080 punching Methods 0.000 description 50
- 229920005989 resin Polymers 0.000 description 7
- 239000011347 resin Substances 0.000 description 7
- 238000007747 plating Methods 0.000 description 6
- 238000007789 sealing Methods 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 238000005452 bending Methods 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 238000012858 packaging process Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910000640 Fe alloy Inorganic materials 0.000 description 1
- 230000000994 depressogenic effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- -1 for example Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
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- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
本發明涉及引線框架的製造方法和引線框架。The present invention relates to a manufacturing method of a lead frame and a lead frame.
引線框架在半導體封裝中被用於連接半導體元件與外部佈線。已知的一種引線框架包括將支承並固定半導體元件的晶片座分割形成的多個分離晶片座(例如參照日本專利公開公報特開2000-22036號)。Lead frames are used in semiconductor packages to connect semiconductor components and external wiring. A known lead frame includes a plurality of separate wafer holders formed by dividing a wafer holder supporting and fixing a semiconductor element (for example, refer to Japanese Patent Laid-Open No. 2000-22036).
在引線框架的製造工序中,存在進行下壓加工的情況。在該下壓加工中,使晶片座朝向下方位移預定高度,以使搭載在晶片座上的半導體元件與內部引線的頂端處於同一平面上。如此,上述的包括分離晶片座的引線框架由於進行下壓加工,從而存在分離晶片座彼此之間產生臺階的情況。In the manufacturing process of the lead frame, press processing may be performed. In this pressing process, the wafer holder is displaced downward by a predetermined height so that the semiconductor element mounted on the wafer holder and the top end of the inner lead are on the same plane. In this way, the lead frame including the separated wafer holders may be stepped between the separated wafer holders due to the pressing process.
因此,在本發明中,對能夠抑制在分離晶片座彼此之間產生的臺階的引線框架的製造方法和引線框架進行說明。Therefore, in the present invention, a method of manufacturing a lead frame and a lead frame capable of suppressing the step between the separated wafer holders will be described.
本發明一個實施方式的引線框架的製造方法依次包括:(A)將被加工體加工成包括晶片座部的引線框架的形狀的工序;(B)對被加工體進行下壓加工的工序;以及(C)將晶片座部分割而形成分離晶片座的工序。A method of manufacturing a lead frame according to an embodiment of the present invention sequentially includes: (A) a process of processing a processed body into the shape of a lead frame including a wafer seat; (B) a process of pressing down the processed body; and (C) A step of dividing the wafer seat portion to form a separated wafer seat.
本發明一個實施方式的引線框架包括:第一內部引線和第二內部引線;第一晶片座,與所述第一內部引線連接;第二晶片座,與所述第一晶片座分離,且與所述第二內部引線連接;第一突出部,配置於所述第一晶片座,且朝向與所述第二晶片座對置的方向突出;以及第二突出部,配置於所述第二晶片座,且朝向與所述第一晶片座對置的方向突出。The lead frame of an embodiment of the present invention includes: a first inner lead and a second inner lead; a first die holder connected to the first inner lead; a second die holder separated from the first die holder and connected to The second inner lead connection; a first protrusion that is arranged on the first wafer holder and protrudes in a direction opposite to the second wafer holder; and a second protrusion that is arranged on the second wafer Seat, and protrudes toward a direction opposite to the first wafer seat.
根據本發明的引線框架的製造方法和引線框架,能夠抑制在分離的晶片座彼此之間產生臺階。According to the manufacturing method of the lead frame and the lead frame of the present invention, it is possible to suppress the generation of steps between the separated wafer holders.
在下面的詳細說明中,出於說明的目的,為了提供對所公開的實施方式的徹底的理解,提出了許多具體的細節。然而,顯然可以在沒有這些具體細節的前提下實施一個或更多的實施方式。在其它的情況下,為了簡化製圖,示意性地示出了公知的結構和裝置。In the following detailed description, for illustrative purposes, many specific details are proposed in order to provide a thorough understanding of the disclosed embodiments. However, it is obvious that one or more implementation manners can be implemented without these specific details. In other cases, in order to simplify the drawing, well-known structures and devices are schematically shown.
以下說明的本發明的實施方式是用於說明本發明的例示。本發明不應當被限定於以下的內容。The embodiments of the present invention described below are examples for explaining the present invention. The present invention should not be limited to the following content.
〈實施方式的概要〉<Outline of Implementation Mode>
[1]本發明一個實施方式的引線框架的製造方法依次包括:(A)將被加工體加工成包括晶片座部的引線框架的形狀的工序;(B)對所述被加工體進行下壓加工的工序;以及(C)將所述晶片座部分割而形成分離晶片座的工序。[1] A method of manufacturing a lead frame according to an embodiment of the present invention sequentially includes: (A) a process of processing a processed body into the shape of a lead frame including a wafer seat; (B) pressing down the processed body A process of processing; and (C) a process of dividing the wafer seat portion to form a separated wafer seat.
在上述引線框架的製造方法中,將被加工體加工成包括晶片座部的引線框架的形狀。接著,對被加工體進行下壓加工。之後,將晶片座部分割而形成分離晶片座。此處,晶片座部至少包括晶片座和與該晶片座連接的內部引線。此外,後述的連結部也包含於該晶片座部。在對包括分割的晶片座部的引線框架進行下壓加工的情況下,有可能在分離晶片座彼此之間產生臺階(位置偏移)。關於這一點,如本實施方式那樣,在進行下壓加工之後分割晶片座部的製造方法的情況下,當進行下壓加工時,晶片座部尚未被分割。因此,能夠抑制因下壓加工而產生的分離晶片座彼此之間的臺階(位置偏移)。In the manufacturing method of the lead frame described above, the body to be processed is processed into the shape of the lead frame including the wafer seat portion. Next, the to-be-processed body is pressed down. After that, the wafer seat portion is divided to form a separated wafer seat. Here, the wafer seat portion includes at least a wafer seat and internal leads connected to the wafer seat. In addition, the connection part mentioned later is also included in this wafer seat part. In the case where the lead frame including the divided wafer holders is pressed down, there is a possibility that a step (positional shift) between the separated wafer holders may occur. In this regard, as in the present embodiment, in the case of the manufacturing method of dividing the wafer seat portion after the press-down processing is performed, when the press-down processing is performed, the wafer seat portion is not yet divided. Therefore, it is possible to suppress the step (positional shift) between the separated wafer holders caused by the pressing down process.
[2]在上述[1]的製造方法中,優選的是,(A)工序包括形成連結部,所述連結部構成為將相當於分離晶片座的多個分離預定區域彼此連結。在該情況下,(C)工序包括切斷連結部。這樣,通過切斷與分離預定區域區分形成的連結部而分割晶片座部,從而能夠在晶片座的所希望的區域可靠地形成分離晶片座。[2] In the manufacturing method of [1] described above, it is preferable that the step (A) includes forming a connecting portion configured to connect a plurality of predetermined separation regions corresponding to the separation wafer seat to each other. In this case, the step (C) includes cutting the connecting portion. In this way, by cutting the connecting portion formed separately from the planned separation area to divide the wafer seat portion, it is possible to reliably form the separated wafer seat in the desired area of the wafer seat.
[3]在上述[2]的製造方法中,優選的是,(A)工序包括形成相互分離的多個所述連結部。當切斷連結部時,分離預定區域中的與連結部對應(例如與連結部連續)的部分由脫料件等抑制,來進行連結部的沖裁等。此處,在切斷連結部之前,對分離預定區域進行鍍敷處理等表面處理。因此,優選的是,由上述的脫料件等抑制的部分儘量小。關於這一點,通過將多個連結部相互分離設置,從而在多個分離預定區域存在不與連結部對應的部分。因此,例如與沿著多個分離預定區域之間的邊界設置唯一的連結部等情況相比,能夠減小切斷連結部時由脫料件等抑制的部分。 [3] In the manufacturing method of [2] above, it is preferable that the step (A) includes forming a plurality of the connection portions separated from each other. When the connection part is cut, the part corresponding to the connection part (for example, continuous to the connection part) in the planned separation area is suppressed by a stripper or the like, and the connection part is punched out. Here, before cutting the connection portion, surface treatment such as plating treatment is performed on the planned separation area. Therefore, it is preferable that the part suppressed by the above-mentioned stripper etc. is as small as possible. Regarding this point, by arranging a plurality of connecting portions apart from each other, there are portions that do not correspond to the connecting portions in the plurality of planned separation regions. Therefore, for example, compared with a case where a unique connection portion is provided along the boundary between a plurality of predetermined separation regions, it is possible to reduce a portion suppressed by a stripper or the like when the connection portion is cut.
[4]在上述[2]或者[3]的製造方法中,優選的是,(A)工序包括在與多個分離預定區域彼此對置的方向交叉的方向上的分離預定區域的兩端部形成連結部。在分離預定區域的兩端部(與分離預定區域彼此對置的方向交叉的方向上的兩端部),連接內部引線等。因此,當進行下壓加工時,容易對該兩端部側施加使分離預定區域從其原本的位置偏移的旋轉力。由此,有可能會產生分離預定區域的變形。關於這一點,通過在分離預定區域的兩端部設置連結部,能夠抑制因對兩端部側施加的力而導致分離預定區域變形。 [4] In the manufacturing method of [2] or [3] above, it is preferable that the step (A) includes both ends of the planned separation region in a direction intersecting the direction in which the plurality of planned separation regions are opposed to each other. Form a connection. To the both ends of the planned separation region (the both ends in the direction intersecting the direction in which the planned separation region faces each other), inner leads and the like are connected. Therefore, when pressing down, it is easy to apply a rotational force that shifts the planned separation area from its original position to the both end portions. As a result, there is a possibility of deformation that separates the predetermined area. In this regard, by providing the connecting portions at both ends of the planned separation region, it is possible to suppress the deformation of the planned separation region due to the force applied to the both ends.
[5]在上述[1]的製造方法中,優選的是,(A)工序包括:以相當於分離晶片座的多個分離預定區域分別與彼此不同的內部引線連接的方式形成分離預定區域;以及在彼此不同的內部引線之間形成連結部。在該情況下,也通過在(C)工序中切斷連結部來分割晶片座部。通過在內部引線之間設置連結部,從而在切斷連結部時,能夠減小由脫料件抑制的分離預定區域的部分。 [5] In the manufacturing method of [1] above, it is preferable that the step (A) includes: forming a predetermined separation region in such a manner that a plurality of predetermined separation regions corresponding to the separation wafer seat are respectively connected to different internal leads; And a connecting portion is formed between the inner leads that are different from each other. Also in this case, the wafer seat portion is divided by cutting the connection portion in the step (C). By providing the connecting portion between the inner leads, when the connecting portion is cut, it is possible to reduce the portion of the planned separation area suppressed by the stripper.
[6]本發明一個實施方式的引線框架包括:第一內部引線和第二內部引線;第一晶片座,與第一內部引線連接;第二晶片座,與第一晶片座分離,且與第二內部引線連接;第一突出部,配置於第一晶片座,且朝向與第二晶片座對置的方向突出;以及第二突出部,配置於第二晶片座,且朝向與第一晶片座對置的方向突出。根據上述的製造方法,通過在下壓加工之後分割晶片座,能夠獲得引線框架。該引線框架在分離晶片座(第一晶片座和第二晶片座)之間,包括朝向對置的晶片座方向突出的部分(第一突出部和第二突出部),該突出的部分為被切斷的連結部的剩餘部分。在這樣的引線框架中,在製造工序中(具體為下壓加工時),能夠抑制晶片座變形。因此,能夠抑制在分離晶片座彼此之間產生臺階。此外,通過設置第一突出部和第二突出部,能夠增加分離晶片座的側面(與其他的晶片座對置的面)的表面積。因此,能夠提高工序(C)之後的封裝工序中進行樹脂密封時的樹脂密合性。[6] The lead frame of an embodiment of the present invention includes: a first inner lead and a second inner lead; a first die holder connected to the first inner lead; a second die holder separated from the first die holder and connected to the first die holder. Two internal lead connections; a first protrusion arranged on the first wafer seat and protruding in a direction opposite to the second wafer seat; and a second protrusion arranged on the second wafer seat and facing the first wafer seat The opposite direction is prominent. According to the above-mentioned manufacturing method, the lead frame can be obtained by dividing the wafer holder after the press-down process. The lead frame is between the separated wafer holders (the first wafer holder and the second wafer holder), and includes portions (first protrusions and second protrusions) protruding toward the opposite wafer holders, and the protruding portions are The remaining part of the cut connection. In such a lead frame, deformation of the wafer seat can be suppressed in the manufacturing process (specifically, during press processing). Therefore, it is possible to suppress the generation of steps between the separated wafer holders. In addition, by providing the first protrusion and the second protrusion, it is possible to increase the surface area of the side surface (the surface facing the other wafer holder) of the separated wafer holder. Therefore, the resin adhesion at the time of resin sealing in the sealing process after the process (C) can be improved.
〈實施方式的例示〉<Illustration of Implementation Mode>
以下,參照附圖對本發明的實施方式的一例進行更詳細的說明。在以下的說明中,對於相同要素或者具有相同功能的要素使用相同的附圖標記。省略對這些要素的重複說明。Hereinafter, an example of an embodiment of the present invention will be described in more detail with reference to the drawings. In the following description, the same reference numerals are used for the same elements or elements having the same functions. Repetitive description of these elements will be omitted.
[引線框架][Lead Frame]
首先參照圖1,對引線框架1的結構進行說明。引線框架1是IC(Integrated Circuit)或LSI(Large-Scale Integratedcircuit)等積體電路所包含的部件,或者是半導體封裝所包含的部件,所述半導體封裝包含分立半導體、光電耦合器或LED(Light Emitting Diode)等半導體元件。引線框架1在這些積體電路和半導體封裝中固定半導體元件,並且將半導體元件與外部佈線連接。例如通過對金屬原材料的薄板(被加工體)進行沖裁(沖壓)加工或者蝕刻加工而形成引線框架1,所述金屬原材料例如為銅合金系原材料或者鐵合金原材料。在以下的說明中,對引線框架1通過沖裁加工而形成的例子進行說明。First, referring to FIG. 1, the structure of the lead frame 1 will be described. The lead frame 1 is a component included in an integrated circuit such as IC (Integrated Circuit) or LSI (Large-Scale Integrated circuit), or a component included in a semiconductor package that includes discrete semiconductors, photocouplers, or LEDs (Light Emitting Diode) and other semiconductor components. The lead frame 1 fixes semiconductor elements in these integrated circuits and semiconductor packages, and connects the semiconductor elements with external wiring. For example, the lead frame 1 is formed by punching (pressing) or etching a thin plate (worked body) of a metal raw material, such as a copper alloy-based raw material or an iron alloy raw material. In the following description, an example in which the lead frame 1 is formed by punching processing will be described.
如圖1所示,引線框架1俯視呈大致長方形。引線框架1具備晶片座12、內部引線13、外部引線14、狹縫15和突出部16。在以下的說明中,存在將俯視時的引線框架1的短邊方向記載為X方向、長邊方向記載為Y方向的情況。As shown in FIG. 1, the lead frame 1 has a substantially rectangular shape in plan view. The lead frame 1 includes a
配置於引線框架1的中央部的晶片座12支承並固定半導體元件(IC晶片)。通過在塗布於晶片座12上的黏接材料(貼片材料)上承載半導體元件,將半導體元件支承並固定於晶片座12。貼片材料例如使用在環氧類的樹脂中混合銀粉而得到的銀漿料等。晶片座12在X方向的中央位置被分割成兩部分,具有分離晶片座21、22。即,分離晶片座21、22沿著X方向以預定的間隔分離且相鄰形成。分離晶片座21(第一晶片座)在Y方向的兩端部處與後述的內部引線31、33(第一內部引線)連接。分離晶片座22(第二晶片座)在Y方向的兩端部處與後述的內部引線32、34(第二內部引線)連接。The
配置於晶片座12周邊的內部引線13將晶片座12上的半導體元件與外部佈線連接。內部引線13包括:與分離晶片座21的Y方向的一端部側對置的內部引線31(第一內部引線);與分離晶片座22的一端部側對置的內部引線32(第二內部引線);與分離晶片座21的另一端部側對置的內部引線33(第一內部引線);以及與分離晶片座22的另一端部側對置的內部引線34(第二內部引線)。The inner leads 13 arranged on the periphery of the
內部引線31、32、33、34分別包含在X方向上並排且沿著Y方向延伸的3根引線。在內部引線31所包含的並排的3根引線之中,僅正中間的引線與分離晶片座21(具體為分離晶片座21的Y方向一端部側的X方向中央部)連接。同樣地,在內部引線32所包含的3根引線之中,僅正中間的引線與分離晶片座22(具體為分離晶片座22的Y方向一端部側的X方向中央部)連接。在內部引線33所包含的並排的3根引線之中,僅外側的引線與分離晶片座21(具體為分離晶片座21的Y方向另一端部側的X方向外側部分)連接。同樣地,在內部引線34所包含的3根引線之中,僅外側的引線與分離晶片座22(具體為分離晶片座22的Y方向另一端部側的X方向外側部分)連接。在引線框架1中,內部引線31、32、33、34中的與晶片座12連接的引線利用下壓加工(具體後述)而朝向與X方向和Y方向交叉的方向(高度方向、更具體為下方向)彎折。由此,晶片座12朝向下方位移預定高度。通過進行該下壓加工,能夠將承載在晶片座12上的半導體元件與內部引線13的頂端配置在同一平面上。內部引線13的頂端通過使用了金線等的引線接合(wire bonding)而與半導體元件連接。The inner leads 31, 32, 33, and 34 each include three leads that are arranged side by side in the X direction and extend along the Y direction. Among the three side-by-side leads included in the
在Y方向上配置於內部引線13的外側的外部引線14將內部引線13與外部佈線連接。外部引線14包括:外部引線41,包含與內部引線31的各引線連接的引線;外部引線42,包含與內部引線32的各引線連接的引線;外部引線43,包含與內部引線33的各引線連接的引線;以及外部引線44,包含與內部引線34的各引線連接的引線。The
狹縫15配置於引線框架1的Y方向兩端部。狹縫15是形成於引線框架1的X方向大致整個區域的沖裁部分。狹縫15與形成於引線框架1的四角的引導孔17相比形成於X方向內側。形成狹縫15是為了吸收應力。當進行沖裁加工時,將定位銷插入引導孔17。引線框架1有時會由於從晶片座12和內部引線13朝向Y方向兩端部側產生的應力而變形。在該情況下,存在引導孔17相對於晶片座12等產生位置偏移的情況。在該情況下,有可能對沖裁加工造成影響。關於這一點,通過形成狹縫15,能夠使從晶片座12和內部引線13等朝向Y方向兩端部側產生的應力從狹縫15釋放。因此,能夠抑制由於上述的應力而導致引線框架1變形,即,能夠抑制引導孔17相對於晶片座12等產生位置偏移。The
突出部16配置於分離晶片座21、22。突出部16朝向對置的分離晶片座22、21的方向突出。突出部16包括突出部61和突出部62。突出部61配置於分離晶片座21中的與分離晶片座22對置的部分的Y方向兩端部。突出部62配置於分離晶片座22中的與分離晶片座21對置的部分的Y方向兩端部。即,突出部61(第一突出部)配置於分離晶片座21,且朝向與分離晶片座22對置的方向突出。此外,突出部62(第二突出部)配置於分離晶片座22,且朝向與分離晶片座21對置的方向突出。在引線框架1的製造工序中,將連結部90(參照圖2的(a)。具體後述)的一部分切除後殘留的連結部90的部分形成為突出部61、62。突出部61、62的突出長度與引線框架1的X方向的長度以及分離晶片座21(或者分離晶片座22)的X方向的長度中的任意一方相比都極短。例如,突出部61、62的突出長度被設定為50 μm~100 μm。但是,該突出部61、62的突出長度為一例。該突出長度並不限定於該例子。The protruding
[引線框架的製造方法][Manufacturing method of lead frame]
接下來,參照圖2~圖8對具有被分割成多個部分的晶片座12(分離晶片座21、22)的引線框架1的製造方法進行說明。引線框架1經由引線框架形狀形成工序(參照下述的(A)工序、圖2的(a))、下壓加工工序(參照下述的(B)工序、圖2的(b))、連結部切斷工序(參照下述的(C)工序、圖2的(c))而製造。更具體而言,圖2所示的引線框架1的製造方法依次包括以下的工序。 (A)將金屬原材料的薄板、即帶狀的被加工體80加工成引線框架的形狀的工序 (B)對所述被加工體80進行下壓加工的工序 (C)通過切斷所述被加工體80的連結部90而將晶片座分割成分離晶片座21、22的工序Next, a method of manufacturing the lead frame 1 having the wafer holder 12 (separated
另外,在表示引線框架1的製造工序的圖2的(a)~圖2的(c)中,為了便於說明而僅示出一個引線框架1的形狀。但是,實際上在上述的(A)工序中,帶狀的被加工體80被加工成多個引線框架1的形狀。然後,對具有多個引線框架1的形狀的被加工體80進行上述的(B)工序和(C)工序。之後進行封裝工序。之後,將多個引線框架1相互切分。在封裝工序中,首先,在引線框架1的分離晶片座21、22上接合半導體元件。接著,通過引線接合將該半導體元件與內部引線31、32、33、34的頂端連接。最後,例如利用熱固性樹脂,將分離晶片座21、22和內部引線31、32、33、34連同半導體元件一起模製。In addition, in FIGS. 2( a) to 2 (c) showing the manufacturing process of the lead frame 1, for convenience of description, only the shape of one lead frame 1 is shown. However, actually, in the step (A) described above, the strip-shaped
最初,實施上述的(A)工序。在(A)工序中,利用模具(沖裁裝置)的沖頭對被加工體80進行沖裁,由此形成引線框架形狀。模具例如對由一對輥朝向一個方向間歇地送出的帶狀的被加工體80依次進行沖裁(參照圖3)。(A)工序依次包括以下的工序。 (a-0)在帶狀的被加工體80上形成引導孔17的工序 (a-1)在被加工體80上形成狹縫15的工序 (a-2)在被加工體80上形成外部引線14的工序 (a-3)在被加工體80上形成內部引線13的工序 (a-4)形成分離預定區域210、220和連結部90的工序Initially, the step (A) described above is carried out. In the step (A), the
參照圖3~圖8對(A)工序進行說明。(a-0)工序是在帶狀的被加工體80的寬度方向(Y方向)兩端部形成引導孔17的工序(參照圖3的(a)和圖4的(a))。引導孔17是在沖裁加工時對被加工體80進行定位的定位銷所插入的孔。在(a-0)工序中,模具的沖頭同時沖裁被加工體80的Y方向兩端部,由此同時形成兩個引導孔17。在由輥間歇地送出的帶狀的被加工體80的Y方向兩端部形成引導孔17。由此,在一個引線框架形狀的周圍(四角)形成引導孔17。The step (A) will be described with reference to FIGS. 3 to 8. The step (a-0) is a step of forming guide holes 17 at both ends in the width direction (Y direction) of the belt-shaped workpiece 80 (see FIG. 3(a) and FIG. 4(a)). The
(a-1)工序是在被加工體80的Y方向兩端部形成沿著X方向延伸的狹縫15的工序(參照圖3的(b)和圖4的(b))。更詳細來說,狹縫15與形成在引線框架1的四角的引導孔17相比,沿著X方向形成於內側。在(a-1)工序中,模具的沖頭沿著X方向同時沖裁被加工體80的Y方向兩端部。由此,同时形成沿着X方向延伸的两个狭缝15。The step (a-1) is a step of forming
在(a-2)工序中,沿著Y方向在相比狹縫15更靠內側形成外部引線14(參照圖3的(c)、(d)和圖5的(a)、(b))。在(a-2)工序中,首先,模具的沖頭沿著Y方向,在分別相比形成於Y方向兩端部的狹縫15更靠內側的四處形成沖裁區域45。四個沖裁區域45沿著Y方向延伸相同的長度,且沿著X方向等間隔地配置(參照圖5的(a))。接下來,模具的沖頭在彼此相鄰的沖裁區域45之間分別各形成一個沖裁區域46。沖裁區域46沿著Y方向延伸與沖裁區域45相同的長度(參照圖5的(b))。即,模具的沖頭分別在Y方向兩端部側在三處形成沖裁區域46。In the step (a-2), the
由此,如圖5的(b)所示,在彼此相鄰的沖裁區域45、46之間形成沿著Y方向延伸的外部引線14。更詳細來說,在Y方向一端部側,形成包含與內部引線31(參照圖6的(b))連接的3根引線的外部引線41,以及包含與內部引線32(參照圖6的(b))連接的3根引線的外部引線42。進而,在Y方向另一端部側,形成包含與內部引線33(參照圖6的(b))連接的3根引線的外部引線43,以及包含與內部引線34(參照圖6的(b))連接的3根引線的外部引線44。Thereby, as shown in FIG. 5( b ), the
在(a-3)工序中,沿著Y方向在相比外部引線14更靠內側形成內部引線13(參照圖3的(e)、(f)和圖6的(a)、(b))。在(a-3)工序中,首先,模具的沖頭在X方向兩端部形成沿著Y方向延伸的沖裁區域35。與此同時,模具的沖頭在X方向中央部形成沿著Y方向延伸的沖裁區域36(參照圖6的(a))。通過對Y方向兩端部的沖裁區域45之間的大致整個區域進行沖裁而形成沖裁區域35。沖裁區域36沿著Y方向形成於分別相比形成於Y方向兩端部的沖裁區域45更靠內側的四處。四個沖裁區域36沿著Y方向延伸相同的長度(比沖裁區域35短的長度)。四個沖裁區域36中的兩個沖裁區域36形成於Y方向一端部側。剩餘的兩個沖裁區域36形成於Y方向另一端部側。並且,Y方向一端部側的兩個沖裁區域36與Y方向另一端部側的兩個沖裁區域36相同,配置成沿著X方向相互對置。並且,在Y方向兩端側,X方向一端部側的沖裁區域35、靠近X方向一端部側的沖裁區域35的沖裁區域36、靠近X方向另一端部側的沖裁區域35的沖裁區域36、以及X方向另一端部側的沖裁區域35沿著X方向等間隔地配置。接下來,模具的沖頭在彼此相鄰的沖裁區域35、36之間、沖裁區域36、36之間和沖裁區域36、35之間分別各形成一個沖裁區域37。此處,沖裁區域37沿著Y方向以與沖裁區域36相同的長度延伸。與此同時,模具沖頭在引線框架1的中央部形成沿著Y方向延伸的沖裁區域95(參照圖6的(b))。In the step (a-3), the
由此,如圖6的(b)所示,在彼此相鄰的沖裁區域35、37之間、沖裁區域37、36之間、沖裁區域36、37之間、沖裁區域37、36之間、沖裁區域36、37之間和沖裁區域37、35之間,形成沿著Y方向延伸的內部引線13。更詳細來說,在Y方向一端部側,形成包含與外部引線41連接的3根引線的內部引線31,以及包含與外部引線42連接的3根引線的內部引線32。進而,在Y方向另一端部側,形成包含與外部引線43連接的3根引線的內部引線33,以及包含與外部引線44連接的3根引線的內部引線34。Thus, as shown in FIG. 6(b), between the
在(a-4)工序中,通過對上述的內部引線13的頂端(與連接有外部引線14的一側相反側)進一步進行沖裁,劃定分離預定區域210、220和連結部90的區域。即,在該工序中,形成分離預定區域210、220和連結部90(參照圖3的(g)~(i)、圖7的(a)、(b)和圖8)。通過在後述的(C)工序中切斷連結部90,由此從分離預定區域210、220分別形成分離晶片座21、22。連結部90構成為將多個分離預定區域210、220彼此連結。In the step (a-4), the top end of the inner lead 13 (the side opposite to the side to which the
在(a-4)工序中,首先,模具的沖頭在內部引線31、32的頂端形成沖裁區域51。與此同時,模具的沖頭在內部引線33、34的頂端形成沖裁區域52(參照圖7的(a))。沖裁區域51例如被沖裁成四邊形。沖裁區域51在兩個沖裁區域36之間沿著X方向延伸。進而,沖裁區域51沿著Y方向從沖裁區域36的大致中央部分延伸至相比沖裁區域36的頂端更靠前方。沖裁區域52例如被沖裁成四邊形。沖裁區域52在X方向兩端部側的沖裁區域37之間沿著X方向延伸。進而,沖裁區域52沿著Y方向從沖裁區域37的大致中央部分延伸至相比沖裁區域37的頂端更靠前方。接下來,模具的沖頭在沿著X方向位於最外側的內部引線31、32各自的頂端形成沖裁區域53(參照圖7的(b))。沖裁區域53例如是被沖裁成四邊形的區域。沖裁區域53從沖裁區域35起在鄰接的沖裁區域37之間沿著X方向延伸。進而,沖裁區域53沿著Y方向從沖裁區域37的大致中央部分延伸至相比沖裁區域37的頂端更靠前方。In the step (a-4), first, the punch of the die forms a punching
如此形成沖裁區域51、52、53。由此,如圖8所示,劃定分離預定區域210、220和連結部90的區域。分離預定區域210僅與內部引線31的X方向正中間的引線和沿著X方向位於最外側的內部引線33的引線連接。分離預定區域220僅與內部引線32的X方向正中間的引線和沿著X方向位於最外側的內部引線34的引線連接。In this way, blanking
此外,如圖8所示,形成連結部90,作為將分離預定區域210、220彼此連結的部分。連結部90包括相互分離的多個連結部91、92。連結部91、92構成為將分離預定區域210、220的Y方向兩端部連結。即,連結部91將分離預定區域210、220的Y方向一端部連結。連結部92將分離預定區域210、220的Y方向另一端部連結。這樣,在(a-4)工序中,形成相互分離的多個連結部91、92。此時,該連結部91、92配置於分離預定區域210、220的Y方向兩端部。In addition, as shown in FIG. 8, a connecting
實施上述的(a-0)~(a-4)工序而結束(A)工序,由此將帶狀的被加工體80加工成包含晶片座部的引線框架的形狀。也可以在(A)工序之後且(B)工序的下壓加工之前,對分離預定區域210、220的表面等進行鍍敷處理。例如從以往使用的鍍敷裝置的鍍敷噴嘴朝向分離預定區域210、220的表面噴塗包含銀、鎳或者鈀等貴金屬的鍍敷液,由此進行鍍敷處理。The above-mentioned (a-0) to (a-4) steps are performed to complete the (A) step, thereby processing the strip-shaped
接下來,實施上述的(B)工序(參照圖2的(b))。在(B)工序中,將在(A)工序後進行了鍍敷處理的被加工體80(被加工成引線框架的形狀的被加工體80)一邊利用輥朝向一個方向間歇地送出一邊利用模具進行下壓加工。例如利用具備上模和下模的模具進行下壓加工,所述上模配備有彎折用沖頭,所述下模具有與彎折量對應的開口部。即,在(B)工序中,配備有彎折用沖頭的上模下降,朝向下方下壓晶片座所包含的分離預定區域210、220。由此,能夠將配置在分離晶片座21、22上的半導體元件與內部引線13的頂端配置在同一平面上。Next, the step (B) described above is carried out (refer to (b) of FIG. 2 ). In the step (B), the processed body 80 (the processed
接下來,實施上述的(C)工序(參照圖2的(c))。在(C)工序中,將(B)工序之後的被加工體80的連結部90切斷。由此,晶片座被分割成分離晶片座21、22。具體而言,連結分離預定區域210、220的Y方向兩端部的連結部91、92(參照圖2的(b))由模具的沖頭同時沖裁,從而切斷連結部91、92。這樣,形成圖2(c)所示的分離晶片座21、22。在(C)工序後,切斷的連結部91、92的一部分作為突出部16(參照圖1)而殘留於分離晶片座21、22。突出部16包括突出部61和突出部62。突出部61配置於分離晶片座21的與分離晶片座22對置的部分中的Y方向兩端部。突出部62配置於分離晶片座22的與分離晶片座21對置的部分中的Y方向兩端部。利用以上的工序,製造出的引線框架1包括被分割成多個分離晶片座21、22的晶片座12。Next, the step (C) described above is implemented (see (c) of FIG. 2 ). In the (C) step, the
接下來,對上述的引線框架1的製造方法和引線框架1的作用效果進行說明。Next, the manufacturing method of the above-mentioned lead frame 1 and the effects of the lead frame 1 will be described.
例如,在圖9所示的比較例的引線框架600的製造方法中,如圖9的(a)所示,將被加工體580加工成引線框架的形狀,所述引線框架包括被分割成分離晶片座521、522的晶片座512。之後,如圖9的(b)所示,利用下壓加工使分離晶片座521、522朝向下方位移預定高度。這樣,被加工體被加工成包括被分割的晶片座的引線框架的形狀,在該被加工體的下壓加工中,存在由於下壓加工而在分離晶片座521、522彼此之間產生臺階的情況。例如,在分離晶片座521、522的兩端部分別與內部引線(懸吊引線)連接的情況下,容易對懸掛於內部引線的狀態下的分離晶片座521、522作用有因下壓加工而產生的旋轉力。例如在與兩端部連接的內部引線的粗細彼此不同的情況下,或者與兩端部連接的內部引線的X方向的位置(懸吊位置)彼此不同的情況下,這樣的旋轉力會顯著變大。並且,例如由於該旋轉力在分離晶片座521、522彼此之間不同,從而有可能在分離晶片座521、522彼此之間產生臺階(位置偏移)。For example, in the manufacturing method of the
為了解決這樣的課題,本實施方式的包括被分割成多個分離晶片座21、22的晶片座12的引線框架1的製造方法依次包括:(A)將被加工體80加工成包括晶片座部的引線框架的形狀的工序;(B)對被加工成引線框架的形狀的被加工體80進行下壓加工的工序;以及(C)分割被加工體80的晶片座部而形成分離晶片座21、22的工序。In order to solve such a problem, the manufacturing method of the lead frame 1 including the
在本實施方式的引線框架1的製造方法中,對被加工成引線框架的形狀的被加工體80進行下壓加工。之後,分割包括晶片座12的晶片座部。這樣,由於在下壓加工之後分割晶片座部,所以在進行下壓加工時,對未被分割的晶片座部施加因下壓加工而產生的力(例如上述的旋轉力)。在這樣的製造方法中,能夠抑制在上述的比較例的引線框架600的製造方法中出現的問題,即,在分離晶片座彼此之間產生臺階(位置偏移)。根據以上內容可知,按照本實施方式的引線框架1的製造方法,能夠抑制在分離晶片座521、522彼此之間產生臺階。In the manufacturing method of the lead frame 1 of this embodiment, the to-
在將被加工體80加工成引線框架的形狀的工序中,形成連結部90,該連結部90構成為將相當於分離晶片座21、22的多個分離預定區域210、220彼此連結。並且,在隨後的工序中,通過切斷連結部90而分割包括晶片座12的晶片座部。這樣,切斷與分離預定區域210、220區分形成的連結部90,從而分割晶片座部。由此,能夠從晶片座12的所希望的區域可靠地形成分離晶片座21、22。In the process of processing the
在將被加工體80加工成引線框架的形狀的工序中,形成相互分離的多個連結部91、92。當切斷連結部91、92時,分離預定區域210、220中的與連結部91、92對應(例如與連結部91、92連續)的部分由脫料件等抑制,進行連結部91、92的沖裁等。此處,在切斷連結部91、92之前,對分離預定區域210、220進行鍍敷處理等表面處理。因此,優選的是,由上述的脫料件等抑制的部分儘量小。關於這一點,通過將多個連結部91、92相互分離設置,從而在多個分離預定區域210、220存在不與連結部91、92對應的部分。因此,例如與沿著多個分離預定區域210、220之間的邊界設置唯一的連結部等情況相比,能夠減小切斷連結部91、92時由脫料件等抑制的部分。In the process of processing the
在將被加工體80加工成引線框架的形狀的工序中,在沿著與多個分離預定區域210、220彼此對置的方向交叉的方向(Y方向)的分離預定區域210、220的兩端部,配置有連結部91、92。由於在分離預定區域210、220的Y方向兩端部連接內部引線31、32、33、34,所以當進行下壓加工時,容易對該兩端部側施加旋轉力,由此有可能會產生分離預定區域的變形。關於這一點,通過在分離預定區域210、220的兩端部設置連結部91、92,能夠抑制因朝向兩端部側施加的力而導致分離預定區域210、220變形。In the process of processing the
如圖1所示,本實施方式的引線框架1包括:內部引線31、32、33、34;與內部引線31、33連接的分離晶片座21;與該分離晶片座21分離,且與內部引線32、34連接的分離晶片座22;配置於分離晶片座21,且以與分離晶片座22對置的方式突出的突出部61;以及配置於分離晶片座22,且以與分離晶片座21對置的方式突出的突出部62。利用突出部61和突出部62,能夠增加分離晶片座21、22的側面(相互對置的面)的表面積。因此,能夠提高封裝工序中進行樹脂密封時的樹脂密合性。As shown in FIG. 1, the lead frame 1 of the present embodiment includes: inner leads 31, 32, 33, 34; a
以上對本發明的實施方式進行了說明,但本發明的實施方式並不限定於上述實施方式。例如,本實施方式並不限定於連結部91、92將晶片座部所包含的分離預定區域210、220彼此直接連結的上述實施方式。例如,也可以將連結部配置於晶片座部所包含的內部引線之間。在該情況下,如圖10的(a)所示,在將被加工體80加工成引線框架的形狀的工序中,也能夠以多個分離預定區域分別與內部引線31、32連接,且在內部引線31、32之間形成連結部190的方式進行沖裁加工。在該狀態下,如圖10的(b)所示,利用下壓加工朝向下方下壓分離預定區域。最後,如圖10的(c)所示,切斷連結部190,形成分離晶片座121、122。由此,製造了引線框架100。在引線框架100中,也與引線框架1相同,通過切斷連結部而產生突出部116。即,如圖10的(c)所示,在與分離晶片座121連接的內部引線31中,形成以與內部引線32對置的方式突出的突出部161。同樣地,在與分離晶片座122連接的內部引線32中,形成以與內部引線31對置的方式突出的突出部162。The embodiments of the present invention have been described above, but the embodiments of the present invention are not limited to the above-mentioned embodiments. For example, the present embodiment is not limited to the above-mentioned embodiment in which the
此外,在上述實施方式中,在分離晶片座21、22形成突出部61、62,突出部61、62作為在引線框架1的製造工序中被切斷的連結部90的剩餘部分。但是,例如也可以在引線框架的製造工序中,當切斷連結部365(圖11中的陰影部位)時,如圖11所示,在分離晶片座321、322分別形成凹部361、362。即,通過切斷連結部而產生的形狀可以是圖1所示的凸形狀。或者,該形狀也可以是像圖11的凹部361、362那樣為凹形狀。另外,如圖11所示,形成凹部361、362的沖頭369對包括連結部365的周圍在內的區域進行沖裁。凹部361、362的深度並無特別限定。優選的深度為50 μm~100 μm。在該情況下,通過增加分離晶片座321、322的側面(相互對置的面)的表面積,也能夠提高封裝工序中進行樹脂密封時的樹脂密合性。In addition, in the above-described embodiment, the protruding
出於示例和說明的目的已經給出了所述詳細的說明。根據上面的教導,許多變形和改變都是可能的。所述的詳細說明並非沒有遺漏或者旨在限制在這裡說明的主題。儘管已經通過文字以特有的結構特徵和/或方法過程對所述主題進行了說明,但應當理解的是,申請專利範圍中所限定的主題不是必須限於所述的具體特徵或者具體過程。更確切地說,將所述的具體特徵和具體過程作為實施申請專利範圍的示例進行了說明。The detailed description has been given for the purpose of example and description. Based on the above teachings, many modifications and changes are possible. The detailed description is not without omission or intended to limit the subject matter described here. Although the subject has been described with specific structural features and/or method processes through text, it should be understood that the subject matter defined in the scope of the patent application is not necessarily limited to the specific features or specific processes described. More precisely, the specific features and specific processes described are described as examples of implementing the scope of the patent application.
1、600‧‧‧引線框架12、512‧‧‧晶片座13、31、32、33、34‧‧‧內部引線14、41、42、43、44‧‧‧外部引線15‧‧‧狹縫16、61、62、116、161、162‧‧‧突出部17‧‧‧引導孔21、22、121、122、321、322、521、522‧‧‧分離晶片座35、36、37、45、46、51、52、95‧‧‧沖裁區域80、180、580‧‧‧被加工體90、91、92、190、365‧‧‧連結部210、220‧‧‧分離預定區域361、362‧‧‧凹部369‧‧‧沖頭1,600‧‧‧Lead frame 12,512‧‧‧
圖1是表示引線框架的一例的俯視圖。 圖2是對引線框架的製造工序進行說明的俯視圖。圖2的(a)是對引線框架形狀形成工序進行說明的俯視圖。圖2的(b)是對下壓加工工序進行說明的俯視圖。圖2的(c)是對連結部切斷工序進行說明的俯視圖。 圖3是表示引線框架形狀形成工序的沖裁加工的整體佈局的俯視圖。 圖4的(a)和(b)是放大表示圖3所示的佈局中的圖3的(a)和(b)的俯視圖。 圖5的(a)和(b)是放大表示圖3所示的佈局中的圖3的(c)和(d)的俯視圖。 圖6的(a)和(b)是放大表示圖3所示的佈局中的圖3的(e)和(f)的俯視圖。 圖7的(a)和(b)是放大表示圖3所示的佈局中的圖3的(g)和(h)的俯視圖。 圖8是放大表示圖3所示的佈局中的圖3的(i)的俯視圖。 圖9是對比較例的引線框架的製造工序進行說明的圖。圖9的(a)是對引線框架形狀成型工序進行說明的俯視圖。圖9的(b)是表示下壓加工工序的俯視圖。 圖10是表示變形例的引線框架的一例的俯視圖。 圖11是表示變形例的引線框架的一例的俯視圖。Fig. 1 is a plan view showing an example of a lead frame. FIG. 2 is a plan view explaining the manufacturing process of the lead frame. FIG. 2(a) is a plan view explaining the lead frame shape forming step. Fig. 2(b) is a plan view explaining the press working step. FIG.2(c) is a top view explaining the connection part cutting process. 3 is a plan view showing the overall layout of the punching process in the lead frame shape forming step. (A) and (b) of FIG. 4 are enlarged plan views showing (a) and (b) of FIG. 3 in the layout shown in FIG. 3. (A) and (b) of FIG. 5 are enlarged plan views showing (c) and (d) of FIG. 3 in the layout shown in FIG. 3. (A) and (b) of FIG. 6 are enlarged plan views showing (e) and (f) of FIG. 3 in the layout shown in FIG. 3. (A) and (b) of FIG. 7 are enlarged plan views showing (g) and (h) of FIG. 3 in the layout shown in FIG. 3. Fig. 8 is an enlarged plan view showing (i) of Fig. 3 in the layout shown in Fig. 3. Fig. 9 is a diagram illustrating a manufacturing process of a lead frame of a comparative example. (A) of FIG. 9 is a plan view explaining the lead frame shape forming step. Fig. 9(b) is a plan view showing a pressing process. Fig. 10 is a plan view showing an example of a lead frame of a modification. FIG. 11 is a plan view showing an example of a lead frame of a modification.
1‧‧‧引線框架 1‧‧‧Lead frame
12‧‧‧晶片座 12‧‧‧Chip Block
21、22‧‧‧分離晶片座 21、22‧‧‧Separation chip holder
80‧‧‧被加工體 80‧‧‧Processed body
90、91、92‧‧‧連結部 90, 91, 92‧‧‧Connecting part
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000022036A (en) * | 1998-07-02 | 2000-01-21 | Nec Corp | Semiconductor device package structure and method for measuring characteristic of semiconductor device |
US20120164794A1 (en) * | 2010-12-28 | 2012-06-28 | Yan Xun Xue | Method of making a copper wire bond package |
US20130075885A1 (en) * | 2011-09-27 | 2013-03-28 | STMICROELECTRONICS (SHENZHEN) MANUFACTURING Co., Ltd. | Lead frame and packaging method |
US9224677B1 (en) * | 2005-04-01 | 2015-12-29 | Marvell International Ltd. | Semiconductor package |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0582696A (en) * | 1991-09-19 | 1993-04-02 | Mitsubishi Electric Corp | Lead frame of semiconductor device |
JPH06236959A (en) * | 1993-02-10 | 1994-08-23 | Ibiden Co Ltd | Lead frame and electronic component mounting board |
JP3226244B2 (en) * | 1993-12-03 | 2001-11-05 | 株式会社東芝 | Resin-sealed semiconductor device |
JP2002353395A (en) * | 2001-05-25 | 2002-12-06 | Shinko Electric Ind Co Ltd | Manufacturing method of lead frame, the lead frame and semiconductor device |
JP4294405B2 (en) * | 2003-07-31 | 2009-07-15 | 株式会社ルネサステクノロジ | Semiconductor device |
JP2006108359A (en) * | 2004-10-05 | 2006-04-20 | Yamaha Corp | Lead frame and physical quantity sensor |
US8933548B2 (en) * | 2010-11-02 | 2015-01-13 | Dai Nippon Printing Co., Ltd. | Lead frame for mounting LED elements, lead frame with resin, method for manufacturing semiconductor devices, and lead frame for mounting semiconductor elements |
US9134193B2 (en) * | 2013-12-06 | 2015-09-15 | Freescale Semiconductor, Inc. | Stacked die sensor package |
CN105336631B (en) * | 2014-06-04 | 2019-03-01 | 恩智浦美国有限公司 | The semiconductor device assembled using two lead frames |
JP6539956B2 (en) * | 2014-08-08 | 2019-07-10 | 株式会社カネカ | Lead frame, resin molded body, surface mount type electronic component, surface mount type light emitting device, and lead frame manufacturing method |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000022036A (en) * | 1998-07-02 | 2000-01-21 | Nec Corp | Semiconductor device package structure and method for measuring characteristic of semiconductor device |
US9224677B1 (en) * | 2005-04-01 | 2015-12-29 | Marvell International Ltd. | Semiconductor package |
US20120164794A1 (en) * | 2010-12-28 | 2012-06-28 | Yan Xun Xue | Method of making a copper wire bond package |
US20130075885A1 (en) * | 2011-09-27 | 2013-03-28 | STMICROELECTRONICS (SHENZHEN) MANUFACTURING Co., Ltd. | Lead frame and packaging method |
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