TWI706527B - 動態隨機存取記憶體（ｄｒａｍ）安裝技術 - Google Patents

動態隨機存取記憶體（ｄｒａｍ）安裝技術 Download PDF

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TWI706527B
TWI706527B TW105134776A TW105134776A TWI706527B TW I706527 B TWI706527 B TW I706527B TW 105134776 A TW105134776 A TW 105134776A TW 105134776 A TW105134776 A TW 105134776A TW I706527 B TWI706527 B TW I706527B
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ring
processor
package
dram
random access
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TW105134776A
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TW201733050A (zh
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榮發 吳
惠田 張
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美商英特爾公司
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Abstract

環形動態隨機存取記憶體(DRAM)包括配適可圍繞一處理器的一孔，使得該DRAM及該處理器在一積體電路(IC)封裝上彼此鄰接。在一實施例中，一散熱器被安裝在該處理器的上面並且覆蓋該DRAM的一頂部而不接觸該DRAM。

Description

動態隨機存取記憶體(DRAM)安裝技術 發明領域
本文所描述的實施例一般係涉及在微電子裝置中的電氣互連。
發明背景
諸如IC(積體電路)封裝的微電子裝置可能包含有基於安裝在矽/系統單晶片(SOC)上面之記憶體的Z值(厚度值)。該記憶體安裝在一散熱器上面，其影響該IC的熱性能因為當該SOC處理時熱量上升到該散熱器，其位於該記憶體下方。由於該SOC及該記憶體的該組合厚度，因此，對於具有IC之微電子裝置的當前設計而言，在這種裝置能夠有多薄的這方面受到限制。此外，這種微電子裝置具有熱量的熱限制，因為安裝在該IC之該SOC的上面的該記憶體，其阻止了熱散逸(即使使用了散熱器)並且在該IC的操作期間過度地加熱該SOC。
依據本發明之一實施例，係特地提出一種積體電路封裝，其包含：安裝至一封裝板之一環形記憶體 裝置；以及安裝在該封裝板上之該環形DRAM的一孔區域中的一處理器。
100、200‧‧‧IC封裝
110‧‧‧IC晶粒
112‧‧‧互連
114‧‧‧背面
120‧‧‧基片
122‧‧‧第一層級互連
130‧‧‧整合式散熱器
140‧‧‧熱介面材料
150‧‧‧散熱裝置
152‧‧‧散熱片
210、620‧‧‧封裝
220、610、712‧‧‧處理器
230‧‧‧散熱器
230A、230B、300、300A、300B、400、630A、630B‧‧‧DRAM
310‧‧‧SOC
640A、640B‧‧‧去耦電容
650‧‧‧母板
702‧‧‧系統匯流排
710‧‧‧電子裝配
714‧‧‧通信電路
716‧‧‧顯示器
718‧‧‧揚聲器
720‧‧‧外部記憶體
722‧‧‧主記憶體(RAM)
724‧‧‧硬碟
726‧‧‧可移除式媒體
730‧‧‧鍵盤/控制器
800‧‧‧方法
810~831‧‧‧方塊
圖1根據本發明的一些實施例係一IC封裝的一橫截面視圖。
圖2展示出該SOC/處理器呈現出與具側面安裝RAM之一散熱器有良好接觸的一示意圖，根據本發明的一些實施例。
圖3以本發明的一些實施例展示出環形DRAM及DRAM側面安裝堆疊的示意圖。
圖4以本發明的一些實施例展示出用於側面堆疊DRAM安裝的示意圖。
圖5以本發明的一些實施例係一環形DRAM之樣本大小的一示意圖。
圖6A以本發明的一些實施例係展示安裝在該IC板上之SOC/處理器及環形DRAM的一示意圖。
圖6B以本發明的一些實施例係展示出不同環形DRAM製造的一示意圖。
圖7根據本發明的一些實施例係一電子系統的方塊圖。
圖8以本發明的一些實施例係一種用於安裝及封裝DRAM之方法的一示意圖。
較佳實施例之詳細說明
以下的描述及該等附圖充分地圖示出具體的實施例，以使得本領域的習知技藝者能夠實踐它們。其他的實施例可以結合結構、邏輯、電氣、過程、以及其他的改變。一些實施例的部分及特徵可被包括在其他實施例的部分及特徵中，或替代其他實施例的部分及特徵。在發明專利申請範圍中所闡述的實施例包括那些請求項之所有可用的等同物。
圖1根據本發明的一些實施例係一IC封裝100的一橫截面視圖。在該IC晶粒係一處理器晶粒的實施例中，該IC封裝100可稱為一處理器裝配。IC封裝100包括以「覆晶」方向安裝的一IC晶粒110，其主動側朝下以與一基片120的一上表面耦合，透過諸如焊球或凸塊的互連112。該基片120也在其相對的表面上展示出一第二數量之第一層級互連122，用於與諸如板(圖中未示出)之額外的封裝結構來匹配。
晶粒110從位於其主動側附近之包括佈線跡線的內部結構產生其熱量；然而，該熱量的一大部分透過其背面114來散逸。集中在該晶粒內的熱量散逸到一大表面，該大表面以一整合式散熱器130的該形式與該晶粒接觸。一熱介面材料140位在該晶粒110與整合式散熱器130之間。在一實施例中，為了從該整合式散熱器130散熱，一可選擇地具有散熱片152的一散熱裝置150耦合到該整合式散熱器130。
根據本發明的一些實施例，圖2展示出一 示意圖，其中該矽/系統單晶片(SOC-此後稱為「處理器」)220呈現出與具有側面安裝DRAM 230A及230B的一散熱器230有良好的接觸。
目前，在提供DRAM時，IC封裝被限制為小於2瓦特的總設計功率(<2W TDP)。傳統的DRAM被放置在該處理器的上面或被放置在該母板中。這兩種方法都會導致出較大的IC封裝尺寸。
圖2的IC封裝200展示出一種可以實現較薄Z封裝的能力，因為該DRAM 230A及230B與該處理器220並行放置(而不是以DRAM放在該處理器上面的一種傳統的方式)。
在一實施例中，該DRAM 230A及/或230B會比該處理器220厚得多(Z尺寸)。因此，該處理器220可以比較厚用以改進該IC 200的該裝配及測試。
在一實施例中，在DRAM被製造之該方式中的該等變化可能導致IC費用上升，但是一旦採用發生了，該IC費用可大大地降低。
圖3以本發明的一些實施例展示出環形DRAM及DRAM側面安裝堆疊的示意圖。該DRAM 300A及300B在該中間係中空的，因此，當該處理器310被放置在該處理器封裝的上面時會露出該處理器310。也就是說，圖3的該DRAM 300包括一孔，當被放置在該處理器310封裝上時會創建一環形DRAM 300。
在一實施例中，該等環形DRAM 300A及 300B中的多個彼此疊置以形成堆疊，如圖3的該等底部圖所示。這減小了具該有IC封裝之該整合式裝置的XY底面積，同時減小了該IC封裝的厚度(Z尺寸)。
圖4以本發明的一些實施例展示出了用於側面堆疊DRAM安裝的示意圖。該DRAM 400被展示為具有5 X5.4mm尺寸的4Gb/x16部分。該DRAM 400係可堆疊的以在該IC封裝上與處理器形成並排放置。這導致出更薄的IC封裝及具有更佳熱散逸之一較冷的運行晶片，因為該DRAM 400不再放在該散熱器及該處理器的上面。
在一實施例中，該圖4展示出一種15X15mm三星低功率雙倍資料速率(LPDDR4)POP(堆疊式封裝)DRAM 400。
圖5以本發明的一些實施例係一環形DRAM之樣本尺寸的一示意圖。
圖5展示出具有現有4Gb/x16裸晶的該環形DRAM 500。在一實施例中，環形DRAM 500可以從15X15mm增大到大約20.5X15mm用以當它們被放置在該處理器封裝的上面時可容納更大的晶粒。
「環形DRAM」一詞包括在至少兩側面圍繞該處理器層的DRAM。在一實施例中，該環形DRAM被堆疊在彼此的上面。
在一實施例中，該等圖4-5說明了使用來自三星之經選擇的POP及4Gb/x16低功率雙倍資料速率 (LPDDR4)裸晶來圖示出安裝在該IC封裝上之環形DRAM 500堆疊的案例研究。
圖6A以本發明的一些實施例係展示出安裝在該IC板650上之一處理器及一環形DRAM(630A及630B)堆疊的一示意圖。
該處理器610被展示出為透過該封裝620被安裝在該板650上在一環形DRAM 630A及630B的該中間(的孔)之中。該DRAM 630A及630B懸置在該板650上的一封裝620上。額外的裝置，諸如低輪廓去耦電容640A及640B可被放置在該懸置區域下方，而沒有任何空間的浪費。
圖6B以本發明的一些實施例係展示出不同環形DRAM製造的一示意圖。圖6B展示出了用於該環形DRAM(A. 進入基片；B. DRAM附接；C. 電線接合；D. 事後成型；E. 錫球附接)的各種製造。
圍繞及/或平行於該處理器在該IC封裝上創建環形DRAM安裝可產生一較小的XY底面積並允許實現較薄的(Z)裝置。該環形DRAM也可被堆疊在其自身上面以進一步減少該XY底面積而不損失記憶體大小。
此外，在IC封裝上的處理器加上環形DRAM提供了來自該處理器的經改善的熱散逸。
在一實施例中，該IC封裝的客制化係基於該裝置及其尺寸，使得該處理器側身於該環形DRAM的一孔中。這種組配暴露出在該孔之該中間的該晶片。與傳 統的IC封裝相比，該IC封裝更薄且該處理器熱散逸得到改善。
圖7根據本發明的一些實施例係一電子系統的方塊圖。
使用在本揭示中所描述之環形DRAM裝配及環形DRAM堆疊裝配的一電子裝置的一實例被包括用以展示出用於本發明之一較高階裝置應用的一實例。圖7係一電子裝置700的一方塊圖，該裝置併入了根據本發明之至少一個實施例的至少一種環形DRAM IC方法。電子裝置700僅是本發明的實施例使用在其中之一電子系統的一實例。電子裝置700的實例包括，但不侷限於個人電腦、平板電腦、行動電話、遊戲裝置、MP3或其他數位音樂播放器、等等。在這個實例中，電子裝置700包括一資料處理系統，其包括一系統匯流排702以耦合該系統的該等各種組件。系統匯流排702提供在該電子裝置700之該等各種組件之間的通信鏈路，並且被實現成一單一匯流排、匯流排的一種組合、或以任何其他合適的方式。
一電子裝配710耦合到系統匯流排702。該電子裝配710可包括任何的電路或電路的組合。在一實施例中，該電子裝配710包括一處理器712，其可以是任何的類型。一「處理器」係指任何類型的運算電路，諸如但不侷限於一微處理器、一微控制器、一複雜指令集運算(CISC)微處理器、一精簡指令集運算(RISC)微處理器、一超長指令字組(VLIW)微處理器、一圖形處理器、一數 位信號處理器(DSP)、多核心處理器、或任何其他類型的處理器或處理電路。
可被包括在電子裝配710中其他類型的電路係一定制電路、一特定應用積體電路(ASIC)、或類似物，諸如，例如一或多個電路(諸如一通信電路714)用於使用在像是行動電話、個人資料助理、可攜式電腦、雙向無線電、以及類似電子系統的無線裝置中。該IC可以執行任何其他類型的功能。
該電子裝置700還可以包括一外部記憶體720，接下來可包括適合於特定應用之一或多個記憶體元件，諸如具隨機存取記憶體(RAM)之形式的一主記憶體722、一或多個硬碟724、及/或處理諸如光碟(CD)、快閃記憶體卡、數位視頻碟(DVD)、和類似之可移除式媒體726的一或多個碟。
該電子裝置700還可以包括一顯示器裝置716、一或多個揚聲器718、以及一鍵盤及/或控制器730，其可以包括一滑鼠、軌跡球、觸控螢幕、語音識別裝置、或允許一系統使用者可向該電子裝置700輸入資訊及從該電子裝置700接收資訊的任何其他裝置。
圖8以本發明的一些實施例係一種用於安裝及封裝DRAM之方法800的一示意圖。在一實施例中，該方法800包括在一非暫時性電腦可讀取儲存媒體上被實現為可執行指令之一或多個部分，當由一電腦(諸如一3D印表機及其他裝置)執行時，會執行在圖8中所描繪的該處 理。
在810，該處理形成具有一孔的一環形DRAM，該孔具有圍繞一積體電路(IC)封裝之一處理器放置的尺寸。
在一實施例中，在811，該處理在該環形DRAM的上面形成多個經堆疊的環形DRAM。
在實施例中，在812，該處理組配該孔的尺寸用以圍繞及適配該處理器。
在820，該處理把該環形DRAM安裝在該IC封裝的該處理器上。
根據一實施例，在830，該處理把一散熱器安裝在該處理器的上面。
在830的一實施例中及在831，該處理確保該散熱器在該環形DRAM上擴展但不接觸該環形DRAM。
在830的一實施例中及在840，該處理把該IC封裝安裝在一母板上。
為了可更佳地展示出本文所揭示的該等方法及設備，在此提供了實施例的一非限制性列表。
實例1包括一積體電路封裝，其包括，安裝在一封裝板上的一環形記憶體裝置以及安裝在該封裝板上之該環形記憶體裝置的一孔區域中的一矽/系統單晶片(SOC-「處理器」)。
實例2包括如請求項1之該積體電路封 裝，其中該環形記憶體裝置圍繞該孔區域，並且當被放置在該封裝板上時，鄰接並平行於該處理器地安裝在該封裝板上。
實例3包括實例1-2中之任一項之該積體電路封裝，其中該環形記憶體裝置被調適成可與在該封裝板上的其他環形記憶體裝置做堆疊。
實例4包括實例1-3中之任一項之該積體電路封裝，其中該環形記憶體裝置的該部分懸置在該封裝板的一端部。
實例5包括如實例4之該積體電路封裝，其中該部分被放置在安裝在積體電路之一母板上的去耦電容的上方。
實例6包括實例1-5中之任一項之該積體電路封裝，進一步包含有該封裝板被安裝至的一母板。
實例7包括如實例6之該積體電路封裝，進一步包括安裝在該母板上並且在該環形記憶體裝置之一部分的下方的分佈電容。
實例8包括實例1-7中之任一項之該積體電路封裝，進一步包括數個其他的環形記憶體裝置，該等其他的環形記憶體裝置堆疊並安裝於彼此及該環形記憶體裝置之上。
實例9包括一種方法，其包括形成具有一孔的一環形動態隨機存取記憶體模組(DRAM)，該孔具有圍繞一積體電路(IC)封裝之一處理器放置的尺寸，以及把 該環形DRAM安裝在該IC封裝上的該處理器上。
實例10包括如實例9之該方法，進一步包括把一散熱器安裝在該處理器的上面。
實例11包括如實例10之該方法，進一步包括把該IC封裝安裝在一母板上。
實例12包括如實例10之該方法，進一步包括安裝該散熱器用於確保該散熱器在該環形DRAM上擴展但不接觸該環形DRAM。
實例13包括實例9-12中之任一項之該方法，其中形成進一步包括在該環形DRAM的上面形成多個經堆疊的環形DRAM。
實例14包括實例9-13中之任一項之該方法，其中形成進一步包括把該環形DRAM模組折疊或堆疊在其自身之上以圍繞該處理器堆疊該環形DRAM模組。
實例15包括一種設備，該設備包括有一環形DRAM組配有一孔在其中心，以及一處理器組配成適配在該DRAM之該孔內。
實例16包括如實例15之該設備，進一步包括組配成用以安裝該處理器及該環形DRAM的一封裝板。
實例17包括如實例16之該設備，進一步包括組配成用以安裝該封裝板的一母板。
實例18包括如實例17之該設備，進一步 包括具有該設備的一整合式裝置。
實例19包括實例15-18中之任一項之該設備，進一步包括安裝在彼此之上面及該環形DRAM之上面的數個其他環形DRAM。
實例20包括實例15-19中之任一項之該設備，進一步包括安裝在該處理器的上面並且覆蓋該環形DRAM的一頂部而不接觸該環形DRAM的一散熱器。
本發明的環形DRAM系統的這些及其他的實例及特徵，以及相關的方法將在以下的詳細描述中做部分地闡述。該概述旨在提供本技術主題之非限制性的實例-並不旨在提供一種排他或窮盡解釋。以下的詳細描述被包括用以提供有關於本發明的環形DRAM IC封裝、方法、以及設備的進一步資訊。
以上的詳細描述包括對該等附圖的參考，其形成了該詳細描述的一部分。該等附圖藉由說明的方式展示出本發明可被實踐在其中的具體實施例。這些實施例在本文中也被稱為「實例」。這些實例可以包括除了那些經展示或經描述之元件之外的元件。然而，本發明人也設想了在其中僅提供那些經展示或經描述之元件的實例。而且，本發明人也設想了使用那些經展示或經描述之元件的任何組合或排列的實例(或其一或多個方面)，不是針對一特定的實例(或其一或多個方面)，就是針對在本文中所展示或描述之其他的實例(或其一或多個方面)。
在本文件中，如在專利文獻中常見的， 「一」或「一個」等用詞被使用來包括一或多於一個，獨立於「至少一個」或「一或多個」之任何其他的實例或用法。在本文中，除非另有說明，「或」一詞被使用來指一種非互斥性的或，使得「A或B」包括「A但不是B」、「B但不是A」、以及「A及B」。在本文中，「包括」及「其中」用詞被使用作為該等相應用詞「包含」及「於其中」的該簡單英語等同語。此外，在所附的請求項中，「包括」及「包含」等用詞係開放式的，即，在一請求項中，若一系統、裝置、物品、組合物、配方、或程序除了在如此用詞之後所列出元件之外還包括其他的元件，仍然被認定為落在該請求項的範圍之內。而且，在該等以下的請求項中，「第一」、「第二」、及「第三」、等等用詞僅被使用作為標記，並不旨在對其對象強加數字上的要求。
以上的描述旨在係為說明性的，而不是限制性的。例如，該等上述實例(或其之一或多個方面)可被彼此組合的使用。其他的實施例可被使用，諸如由本領域的普通技術人員之一在閱讀該上述描述時可想到的。摘要被提供以符合37 C.F.R.§1.72(b)，用以使得該讀者可快速地判定該技術揭示的該本質。它係以它將不會被用來解釋或限制發明申請專利範圍或含義之理解的前提下被提交的。另外，在前述較佳實施例之詳細說明中，各種特徵可被組合在一起用以流線化本揭示。這不應被解釋為意圖一未經聲明之揭示的特徵對於任何的請求項係必要的。相反的是，發明技術主題可能存在於少於一特別揭示之實施例 之所有的特徵中。因此，該等以下的請求項因此被結合到較佳實施例之詳細說明中，每一個請求項獨立地作為一單獨的實施例，並且可被設想的是這些實施例可以以各種組合或排列的方式來彼此地結合。本發明的範圍應當以參考該等所附的請求項以及這些請求項所賦予之等同者的全部範圍來判定。
300、300A、300B‧‧‧DRAM
310‧‧‧SOC

Claims (15)

  1. 一種積體電路封裝，其包含：安裝至一封裝板之一環形記憶體裝置；安裝在該封裝板上之該環形記憶體裝置的一孔區域中的一處理器；以及複數個其他環形記憶體裝置，該等其他環形記憶體裝置於彼此及該環形記憶體裝置的上面堆疊及安裝以作為堆疊記憶體裝置，且其中用於該等堆疊記憶體裝置的一堆疊高度係小於或等於用於該處理器的一處理器高度。
  2. 如請求項1之積體電路封裝，其中該環形記憶體裝置及該等其他環形記憶體裝置圍繞該孔區域，並且當被放置在該封裝板上時，鄰接且平行於該處理器地安裝在該封裝板上。
  3. 如請求項1之積體電路封裝，其中該環形記憶體裝置及該等其他環形記憶體裝置的一部分懸置在該封裝板的一端部。
  4. 如請求項3之積體電路封裝，其中該部分被放置於被安裝在該積體電路封裝之一母板上之去耦電容的上方。
  5. 如請求項1之積體電路封裝，其進一步包含該封裝板被安裝至的一母板。
  6. 如請求項5之積體電路封裝，其進一步包括安裝在該母板上並且在該環形記憶體裝置之一部分的下方之分佈電容。
  7. 一種用以形成一積體電路封裝之方法，其包含：形成複數個環形動態隨機存取記憶體模組(DRAM)，各個環形動態隨機存取記憶體模組具有一孔，該孔具有放置圍繞一積體電路(IC)封裝之一處理器的尺寸；堆疊且安裝該等環形動態隨機存取記憶體模組於彼此之上面以作為堆疊記憶體裝置，且其中用於該等堆疊記憶體裝置的一堆疊高度係小於或等於用於該處理器的一處理器高度；以及把該等環形動態隨機存取記憶體模組安裝在該IC封裝上的該處理器上。
  8. 如請求項7之方法，其進一步包含將一散熱器安裝在該處理器的上面。
  9. 如請求項8之方法，其進一步包含將該IC封裝安裝在一母板上。
  10. 如請求項8之方法，其中安裝該散熱器進一步包括安裝該散熱器在該等環形動態隨機存取記憶體模組之上但不接觸該環形動態隨機存取記憶體模組之頂部。
  11. 一種運算設備，其包含：複數個環形動態隨機存取記憶體(DRAM)，各個環形動態隨機存取記憶體模組經組配有一孔在其中心；以及一處理器，其經組配用以適配在該等環形動態隨機存取記憶體之該孔內，其中，該等環形動態隨機存取記憶體經組配要被堆疊 且安裝於彼此之上面以作為堆疊記憶體裝置，且其中用於該等堆疊記憶體裝置的一堆疊高度係小於或等於用於該處理器的一處理器高度。
  12. 如請求項11之運算設備，其進一步包括經組配用以安裝該處理器及該等環形動態隨機存取記憶體的一封裝板。
  13. 如請求項12之運算設備，其進一步包括經組配用以安裝該封裝板的一母板。
  14. 如請求項13之運算設備，其中該設備被整合到一電子裝置中。
  15. 如請求項11之運算設備，其進一步包括被安裝在該處理器的上面並且遮蓋該堆疊記憶體裝置的一頂部而不接觸該等環形動態隨機存取記憶體的一散熱器。
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