TWI667756B - 具有高效率熱路徑及模製底部填充之堆置半導體晶粒組件 - Google Patents

具有高效率熱路徑及模製底部填充之堆置半導體晶粒組件 Download PDF

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Publication number
TWI667756B
TWI667756B TW106134849A TW106134849A TWI667756B TW I667756 B TWI667756 B TW I667756B TW 106134849 A TW106134849 A TW 106134849A TW 106134849 A TW106134849 A TW 106134849A TW I667756 B TWI667756 B TW I667756B
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die
semiconductor die
stack
semiconductor
top surface
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TW106134849A
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TW201830616A (zh
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大衛 R 亨布里
威廉 R 史黛芬森
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美商美光科技公司
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    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
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Abstract

本發明揭示具有高效率熱路徑及模製底部填充材料之半導體晶粒組件。在一項實施例中，一種半導體晶粒組件包括一第一晶粒及複數個第二晶粒。第一晶粒具有一第一功能性、一橫向區及一堆置位點。第二晶粒具有與第一晶粒不同之一功能性且第二晶粒係在一晶粒堆疊中，晶粒堆疊包含安裝至第一晶粒之堆置位點之一底部第二晶粒及界定晶粒堆疊之一頂部表面之一頂部第二晶粒。一熱轉移結構附接至第一晶粒之至少橫向區且具有其中定位有第二晶粒之一腔。一底部填充材料在腔中位於第二晶粒與熱轉移結構之間，且底部填充材料覆蓋晶粒堆疊之頂部表面。

Description

具有高效率熱路徑及模製底部填充之堆置半導體晶粒組件
所揭示實施例係關於半導體晶粒組件。特定而言，本技術係關於具有高效率熱路徑及一模製底部填充材料之堆置半導體晶粒組件以及相關聯系統及方法。
包含記憶體晶片、微處理器晶片及成像器晶片之封裝式半導體晶粒通常包含安裝於一基板上且包封於一塑膠保護覆蓋物中之一半導體晶粒。晶粒包含功能特徵，諸如記憶體單元、處理器電路及成像器裝置以及電連接至該等功能特徵之接合墊。接合墊可電連接至保護覆蓋物外部之端子以將晶粒連接至較高階電路。 半導體製造商努力減小晶粒封裝之大小以裝配於電子裝置之空間約束內，同時增加每一封裝之功能能力以滿足操作參數。用於在不實質上增加由封裝覆蓋之表面面積(亦即，「佔用面積」)之情況下增加一半導體封裝之處理能力及/或儲存能力之一種方法係在一單個封裝中在彼此之頂部上垂直堆置多個半導體晶粒。此等垂直堆置之封裝中之晶粒可藉由使用穿矽導通體(TSV)將個別晶粒之接合墊與毗鄰晶粒之接合墊電耦合來互連。一混合記憶體立方體(HMC)係包含堆置於一邏輯晶粒之頂部上之複數個記憶體晶粒之一個尤其有用裝置。
下文闡述具有高效率熱路徑及模製底部填充材料之堆置半導體晶粒組件以及相關聯系統及方法之數個實施例之具體細節。術語「半導體晶粒」通常係指具有積體電路或部件、資料儲存元件、處理部件及/或製造於半導體基板上之其他特徵之一晶粒。舉例而言，半導體晶粒可包含積體記憶體電路及/或邏輯電路。可認為半導體晶粒及/或半導體晶粒封裝中之其他特徵彼此「熱接觸」(若兩個結構可透過熱經由(舉例而言)傳導、對流及/或輻射來交換能量的話)。熟習相關技術者亦將理解，本技術可具有額外實施例，且可在無下文參考圖1至圖5所闡述之實施例之數個細節之情況下實踐本技術。 如本文中所使用，術語「垂直」、「橫向」、「上部」及「下部」可係指鑒於圖中所展示之定向之半導體晶粒組件中之特徵之相對方向或位置。舉例而言，「上部」或「最上部」可係指經定位比另一特徵更接近於一頁之頂部之一特徵。然而，此等術語應廣泛地解釋為包含具有其他定向(諸如反轉或傾斜定向)之半導體裝置，其中頂部/底部、上方/下方、上面/下面、上/下及左/右可取決於定向而互換。 堆置晶粒配置(諸如具有附接至一邏輯晶粒之頂部之複數個記憶體晶粒之一堆疊之一HMC)具有數個製造挑戰。舉例而言，在垂直堆置晶粒封裝中來自個別晶粒之熱累積且所聚集之熱難以耗散。此增加個別晶粒、晶粒之間的接面及封裝之總體操作溫度，此可致使堆置晶粒達到超過其最大操作溫度(Tmax)之溫度。該問題亦隨著封裝中之晶粒之密度增加而加重。此外，當在晶粒堆疊中存在不同類型之晶粒時，整個裝置之T(max)限於具有最低T(max)之晶粒之T(max)。 堆置晶粒組件之另一挑戰係製造能夠自晶粒耗散充足熱之封包係昂貴的。諸多現有設計首先使一液體施配底部填充材料在晶粒之間流動且然後用完全封圍記憶體晶粒堆疊之頂部及側之一導熱「蓋」覆蓋晶粒堆疊。然而，此製程構成成品裝置之總成本之一相當大部分。 為解決此等挑戰，本技術之一項實施例係一半導體晶粒組件，該半導體晶粒組件包括：一封裝支撐基板；一第一半導體晶粒，其安裝至該封裝支撐基板；及一晶粒堆疊，其包含彼此上下堆置之複數個第二半導體晶粒。該第一半導體晶粒具有一堆置位點及自堆置位點橫向延伸之一橫向區。晶粒堆疊具有安裝至第一半導體晶粒之堆置位點之一底部第二半導體晶粒、具有界定晶粒堆疊之一頂部表面面積之一頂部表面之一頂部第二半導體晶粒，及若干個側。半導體晶粒組件進一步包含附接至第一半導體晶粒之橫向區之一熱轉移結構，且該熱轉移結構環繞晶粒堆疊。熱轉移結構具有其中定位有第二半導體晶粒之一腔及比晶粒堆疊之頂部表面面積大之一開口。半導體晶粒組件進一步在該腔中在第二半導體晶粒與熱轉移結構之間包括一模製底部填充材料。底部填充材料覆蓋晶粒堆疊之側。 本技術之另一實施例係一半導體晶粒組件，該半導體晶粒組件包括一封裝支撐基板、安裝至封裝支撐基板之一第一半導體晶粒及具有複數個第二半導體晶粒之一晶粒堆疊。第一半導體晶粒具有一橫向區及自橫向區向內之一堆置區域，且該晶粒堆疊包含安裝至第一晶粒之堆置區域之一底部第二半導體晶粒及具有一頂部表面之一頂部第二半導體晶粒。此實施例之半導體晶粒組件亦包含圍繞晶粒堆疊之一導熱框架及導熱框架與晶粒堆疊之間的一經注入底部填充材料。導熱框架具有安裝至第一半導體晶粒之橫向區之一底部表面及位於處於或高於頂部第二晶粒之頂部表面之一高度處之一上部表面。經注入底部填充材料具有與導熱框架之上部表面至少共面之一高度。在某些實施例中，經注入底部填充材料可覆蓋頂部第二半導體晶粒之頂部表面。 圖1係圖解說明根據本技術之一實施例之一半導體晶粒組件100 (「組件100」)之一剖面圖。組件100包含一封裝支撐基板102、安裝至封裝支撐基板102之一第一半導體晶粒110及在第一晶粒110之一堆置區域111 (諸如一中心區或一偏離中心區)處配置成一堆疊122之複數個第二半導體晶粒120。第一晶粒110進一步包含在第一晶粒110之至少一側上自第二晶粒120橫向向外之至少一個橫向區112。在圖1中所展示之實施例中，第一晶粒110具有自晶粒堆疊122之相對側向外之兩個橫向區112。晶粒堆疊122可包含安裝至第一晶粒110之一底部第二晶粒120a及具有一頂部表面124之一頂部第二晶粒120b。頂部表面124界定處於一高度E1處的晶粒堆疊122之一頂部表面面積。 組件100可進一步包含圍繞晶粒堆疊122之一熱轉移結構(TTS) 130。在圖1中所圖解說明之實施例中，TTS 130係一框架，該框架具有藉由一黏合劑133黏合至第一晶粒110之橫向部分112及支撐基板102之一底部表面132、處於一高度E2處之一上部表面134及一內側壁136。在所圖解說明之實例中，上部表面134之高度E2高於頂部第二晶粒120b之頂部表面124之高度E1。在其他實施例中，上部表面134可與頂部表面124至少實質上共面。內側壁136界定其中定位有第二晶粒120之一腔138及由在其處側壁136與上部表面134相接之上部邊緣139界定之一開口。圖1中所展示之開口大於頂部表面124之頂部表面面積。TTS 130由具有高導熱性之一材料製成，諸如銅、鋁、矽或其他適合導熱材料。在數個實施例中，TTS 130亦具有類似於第一晶粒110之基板材料之熱膨脹係數(CTE)之一CTE以減小在正常使用中之溫度循環期間所導致之對晶粒110/120之應力同時仍具有一高導熱性以有效地自第一晶粒110轉移熱。此預期減輕晶粒110/120中之裂縫或TTS 130之脫層。用於TTS 130之適合CTE匹配材料包含但不限於鉬(Mo)、銅鎢之合金(Cu-W)、銅鉬之合金(Cu-Mo)、碳化矽(SiC)及/或氮化鋁(AlN)。在某些例項中，此等材料亦可比銅輕且造成顯著較輕封裝。在TTS 130係由一金屬製成之情況下，TTS 130可被衝壓或被雷射切割成一適合形狀以形成開口且環繞晶粒堆疊122之第二晶粒120。黏合劑133可係一熱介面材料(「TIM」)或另一適合黏合劑。舉例而言，TIM及其他黏合劑可包含摻雜有傳導材料(例如，碳奈米管、焊料材料、類鑽碳(DLC)等)之基於聚矽氧之油脂、凝膠或黏合劑以及相變材料。 組件100進一步包含位於第二晶粒120中之每一者之間且位於第一晶粒110與底部第二晶粒120a之間的一底部填充材料160 (分別由元件符號160a及160b識別之個別部分)。圖1中所展示之底部填充材料160之實施例具有延伸或否則覆蓋晶粒堆疊122之側之一側底部填充部分160a及頂部第二晶粒120b之頂部表面124上方之一頂部底部填充部分160b。頂部底部填充部分160b可直接接觸頂部第二晶粒120b之頂部表面124。 組件100可視情況包含藉由一黏合劑172黏合至TTS 130之上部表面134及頂部底部填充部分160b之一導熱蓋170。傳導蓋170可係由具有一高導熱性之一材料(諸如銅、鋁、矽或其他適合材料)製成之一板。 預期組件100提供對來自第一晶粒110及第二晶粒120之堆疊122之熱之經增強熱耗散。舉例而言，由於TTS 130係由具有一高導熱性之一材料製成且經由一TIM直接安裝於第一晶粒110之橫向區112上，因此TTS 130沿著一路徑直接高效地將熱自第一晶粒110之橫向區112轉移至熱蓋170。TTS 130亦係簡單的且易於安裝，因此TTS 130提供一簡單成本有效方式來高效地將來自第一晶粒110之橫向部分112之高溫度之熱耗散。此外，TTS 130亦易於將底部填充材料160射出模製至腔138中，此乃因TTS 130中之大開口使得能夠將一簡單射出模製壓板直接放置於TTS 130上。 圖1中所展示之組件100之數個實施例可因此減小組件100中之個別晶粒110、120之操作溫度使得該等操作溫度低於其指定最大溫度(Tmax)。在組件100係配置為一HMC之情況下此可係極有用的，此乃因第一晶粒110通常係一較大邏輯晶粒且第二晶粒120通常係記憶體晶粒，並且邏輯晶粒通常以比記憶體晶粒高得多的一功率位準操作(例如，與0.628 W相比之5.24 W)。邏輯晶粒HMC組態通常在第一晶粒110之橫向區112處聚集顯著量之熱。邏輯晶粒亦可在橫向區112處具有一較高功率密度，此進一步聚集熱且藉此在橫向區112中產生較高溫度。如此，藉由經由黏合劑133將第一晶粒110之一大百分比之橫向區112直接耦合至高傳導TTS 130，因此熱可被高效地自第一晶粒之橫向區112移除。 圖2A至圖2J圖解說明根據本技術之實施例之製造組件100之一方法之順序態樣。圖2A係TTS及底部填充材料已被安裝之前之組件100之一剖面圖且圖2B係TTS及底部填充材料已被安裝之前之組件100之一俯視平面圖。參考圖2A，封裝支撐基板102經組態以將第一晶粒110及第二晶粒120連接至較高階封裝(未展示)之外部電部件。舉例而言，封裝支撐基板102可係一中介層或印刷電路板，該中介層或印刷電路板包含半導體部件(例如，經摻雜矽晶圓或砷化鎵晶圓)、非導電部件(例如，各種陶瓷基板，諸如氧化鋁(Al2 O3 )、氮化鋁(AlN)等)及/或導電部分(例如，互連電路、TSV等)。在圖2A中所圖解說明之實施例中，封裝支撐基板102經由複數個第一電連接器104a在封裝支撐基板102之一第一側103a處電耦合至第一晶粒110且經由複數個第二電連接器104b (統稱為「電連接器104」)在封裝支撐基板102之一第二側103b處電耦合至外部電路(未展示)。電連接器104可係焊料球、導電凸塊及導電柱、導電環氧樹脂及/或其他適合導電元件。在各種實施例中，封裝支撐基板102可由具有一相對較高導熱性之一材料製成以增強第一半導體晶粒110之背側處之熱耗散。 如圖2A及圖2B中所展示，第一晶粒110可具有比堆置第二晶粒120大之一佔用面積。第一晶粒110及第二晶粒120可係矩形、圓形及/或其他適合形狀且可具有各種不同尺寸。舉例而言，參考圖2B，第一晶粒110可具有一長度L1及一寬度W1，且個別第二晶粒120可各自具有一長度L2及一寬度W2。第一晶粒110之每一橫向區112 (熟習此項技術者已知為一「廊」或「架」)可由第一晶粒110及第二晶粒120之相對尺寸及晶粒堆疊122在第一晶粒110之一面向前表面114 (圖2A)上之位置界定。在圖2A及圖2B中所圖解說明之實施例中，晶粒堆疊122相對於第一晶粒110之長度W1居中使得橫向區112橫向延伸超出堆疊122之兩個相對側達相等距離。在其中第一晶粒110之寬度及長度兩者皆大於居中晶粒堆疊122之寬度及長度之實施例中，一連續橫向區112可圍繞第二晶粒120之整個周界延伸。在其他實施例中，堆疊122可相對於第一晶粒110之面向前表面114 (圖2A)偏移使得僅一個橫向區112自堆疊122之僅一個側向外延伸。在其他實施例中，第一晶粒110及第二晶粒120可係圓形者，且因此第一晶粒110及第二晶粒120之相對直徑界定橫向區112。 第一晶粒110及第二晶粒120可包含各種類型之半導體部件及功能特徵，諸如動態隨機存取記憶體(DRAM)、靜態隨機存取記憶體(SRAM)、快閃記憶體、其他形式之積體電路記憶體、處理電路、成像部件及/或其他半導體特徵。舉例而言，在各種實施例中，組件100組態為一HMC，在該HMC中堆置第二晶粒120係提供資料儲存之記憶體晶粒且第一晶粒110係提供HMC內之記憶體控制(例如，DRAM控制)之一高速邏輯晶粒。在其他實施例中，第一晶粒110及第二晶粒120可包含其他半導體部件，及/或堆疊122中之個別第二晶粒120之半導體部件可不同。 如圖2A中所展示，第二晶粒120可在堆疊122中彼此電耦合且藉由定位於毗鄰晶粒110、120之間的複數個導電元件125電耦合至下伏第一晶粒110。儘管圖2A中所展示之堆疊122包含電耦合於一起之八個第二晶粒120，但在其他實施例中，堆疊122可包含多於或少於八個晶粒(例如，2個至4個晶粒或至少9個晶粒等)。導電元件125可具有各種適合結構(諸如柱、圓柱、栓柱，凸塊)，且可由銅、鎳、焊料(例如，基於SnAg之焊料)、填充有導體之環氧樹脂及/或其他導電材料製成。在選定實施例中，舉例而言，導電元件125可係銅柱，而在其他實施例中，導電元件125可包含較複雜結構(諸如氮化物上凸塊結構)。 如圖2A中進一步展示，個別第二晶粒120可各自包含複數個TSV 126，該複數個TSV在一個或兩個側上與對應導電元件125對準以提供第二晶粒120之相對側處之電連接。每一TSV 126可包含完全穿過個別第二晶粒120之一導電材料(例如，銅)及環繞導電材料以將TSV 126與第二晶粒120之剩餘部分電隔離之一電絕緣材料。儘管圖2A中未展示，但第一晶粒110亦可包含複數個TSV以將第一晶粒110電耦合至更高階電路。除了電連通，TSV 126及導電元件125亦提供熱導管，透過該等熱導管可將熱轉移遠離第一晶粒110及第二晶粒120。在某些實施例中，可增加導電元件125及/或TSV 126之尺寸以增強垂直穿過堆疊122之熱轉移。舉例而言，個別導電元件125可各自具有約15 µm至30 µm或其他適合尺寸之一直徑以增強穿過晶粒110、120之熱路徑。在其他實施例中，第二晶粒120可使用其他類型之電連接器(例如，線接合)彼此電耦合且電耦合至第一晶粒110，該等其他類型之電連接器亦可提供穿過堆疊122之熱路徑。 在各種實施例中，組件100視情況包含間隙地定位於導電元件125之間的複數個導熱元件128 (以虛線展示)。個別導熱元件128通常可至少在結構及組成成分上與導電元件125 (例如，銅柱)之結構及組成成分類似。然而，導熱元件128並不電耦合至TSV 126或晶粒110及120之其他電作用部件，且因此導熱元件128並不提供第二晶粒120之間的電連接。而是，導熱元件128係增加穿過堆疊122之總導熱性以增強向上穿過晶粒堆疊122之熱轉移之電隔離「啞元件」。舉例而言，在其中組件100組態為一HMC之實施例中，已展示在導電元件125之間添加導熱元件128以將HMC之操作溫度降低數度(例如，約6℃至7℃)。 圖2C係圖解說明TTS 130已被附接至第一晶粒110及封裝支撐基板102之後之組件100之一剖面圖且圖2D係圖解說明TTS 130已被附接至第一晶粒110及封裝支撐基板102之後之組件100之一俯視平面圖。參考圖2C，TTS 130之一內部分經組態以定位於第一晶粒110之橫向區112上方。TTS 130之側壁136延伸至相對於第二晶粒120之堆疊122處於或高於頂部第二晶粒120b之頂部表面124之高度一高度(H1)。側壁136亦與第二晶粒120之堆疊122間隔開一間隙(G)使得TTS 130覆蓋一顯著百分比之橫向區112且由邊緣139界定之開口大於頂部第二晶粒120b之頂部表面124之表面面積。黏合劑133可係一TIM。在圖2D中所展示之實施例中，TTS 130係完全環繞第二晶粒120且曝露頂部第二晶粒120b之頂部表面124之一框架或一環。 圖2E係圖解說明在抵靠TTS 130之上部表面134放置一模製壓板210之後製造組件100之方法之另一階段之一剖面圖，且圖2F係第一晶粒110、晶粒堆疊120及TTS 130上方之模製壓板210之一俯視圖。模製壓板具有一入口212，一底部填充材料可透過該入口在壓力下注入至由TTS 130界定之腔138 (圖2E)中。模製壓板210亦可在晶粒堆疊122相對於入口212之一相對側處包含一通氣孔214 (圖2F)。 圖2G係圖解說明當底部填充材料160經注入穿過入口212並進入至腔138中時之組件100之一剖面圖。底部填充材料160在頂部第二晶粒120b之頂部表面124上方且沿著晶粒堆疊122之側流動直至底部填充材料160處於以下各組件之間為止：(a)第二晶粒120中之每一者之間；(b)第一晶粒110與底部第二晶粒120a之間；及(c)晶粒堆疊122之側與TTS 130之內側壁136之間。底部填充材料160通常係一可注入模製底部填充材料。 圖2H係圖解說明處於圖2G之階段處之方法之一俯視平面圖。如圖2H中所展示，模製底部填充材料160流動跨越頂部第二晶粒120b之頂部表面(箭頭F)，此乃因模製壓板210與頂部第二晶粒120b之頂部表面間隔開。模製底部填充材料160因此具有沿著頂部第二晶粒120b之頂部表面蔓延之一前導邊緣162。隨著模製底部填充材料160填充腔138 (圖2G)，自腔138置換出之空氣自通氣孔214流出。 圖2I係圖解說明在底部填充材料160已被注入至腔中直至其到達模製壓板210之底部為止之後的組件100之一剖面圖。因此，在數個實施例中，模製壓板210之底部表面可界定底部填充材料之頂部表面。在其他實施例中，模製壓板210之底部表面可經形成以產生處於、低於或高於TTS 130之上部表面134之高度的底部填充材料160之頂部表面之所要高度。 圖2J係圖解說明模製壓板210已被移除之後的組件100之一剖面圖。頂部底部填充部分160b因此覆蓋頂部第二晶粒120b之頂部表面124，且頂部底部填充部分160b之頂部表面與TTS 130之上部表面134至少實質上共面。側底部填充部分160a完全覆蓋晶粒堆疊122中之所有第二晶粒之側且填充腔138之剩餘部分，該剩餘部分包含第二晶粒120之間的間隙空間及第一晶粒110與底部第二晶粒120a之間的空間。可視情況使用一黏合劑(例如，一TIM)將一導熱蓋(諸如圖1中所展示之導熱蓋170)附接至TTS 130之上部表面134及頂部底部填充部分160b之頂部表面163。 預期製造圖2A至圖2J中所圖解說明之組件100之製程經濟地產生具有高導熱性以高效地耗散由第一晶粒110產生之熱之一封裝式混合半導體裝置。代替完全包封第二晶粒之晶粒堆疊之側且覆蓋第二晶粒之晶粒堆疊之頂部之習用蓋，組件100之TTS 130製造廉價、能夠直接透過可重新使用模製壓板210容易地射出模製底部填充材料160且容易安裝。此預期減小製造封裝式混合半導體裝置之成本。另外，由於係在將底部填充材料160注入至腔138中之前經由一導熱黏合劑將TTS 130黏合至第一晶粒110之橫向區112，因此TTS 130能夠接觸第一晶粒110之一大百分比之橫向區112。此預期進一步增強自第一晶粒110移除熱之熱效率。 圖3係根據本技術之另一實施例之一半導體晶粒組件300之一剖面圖。在圖1及圖3中，相同元件符號指代相同部件。組件100與組件300之間的差異在於組件300之TTS 130之上部表面134與頂部第二晶粒120b之頂部表面124共面。因此，模製底部填充材料160完全覆蓋晶粒堆疊122之側但不覆蓋頂部第二晶粒120b之頂部表面124。在頂部第二晶粒120b之頂部表面124上方一模製帽之缺少使得能夠藉由黏合劑172將導熱蓋170直接黏合至頂部第二晶粒120b之頂部表面124。製造組件300之製程類似於上文相對於圖2A至圖2J中之組件100所闡述之製程，但在射出模製製程期間模製壓板可直接留在TTS 130之上部表面134及頂部第二晶粒120b之頂部表面124上，或可在模製板210與TTS 130及頂部第二晶粒120b之頂部表面124之間存在一薄的可移除保護膜。底部填充材料160因此被限制為圍繞晶粒堆疊122之側流動。因此，組件300增強自晶粒堆疊122直接至導熱蓋170之中心部分之熱轉移。 圖4係製造類似於上文所闡述之半導體晶粒組件100及300之一半導體晶粒組件400之一態樣之一俯視平面圖。在此實施例中，一模製壓板410在一端處具有一入口412但在另一端處無通氣孔。代替提供穿過模製壓板410之一通氣孔，將TTS 130附接至第一晶粒110之黏合劑133在裝置之一端處具有通氣孔通道414。底部填充材料可因此流動穿過由TTS 130界定之腔(如上文參考圖2G、圖2H及圖3所闡述)，但透過黏合劑133中之通氣孔通道414將空氣自腔置換出。 可將上文參考圖1至圖4所闡述之堆置半導體晶粒組件中之任一者併入至無數個較大及/或較複雜系統中之任一者中，該等系統之一代表實例係圖5中示意性地展示之系統500。系統500可包含一半導體晶粒組件510、一電源520、一驅動器530、一處理器540及/或其他子系統或組件550。半導體晶粒組件510可包含大體上類似於上文闡述之堆置半導體晶粒組件之彼等特徵之特徵，且因此可包含具有增強熱耗散的對第一晶粒110之橫向區112之良好覆蓋的多個熱路徑。所得系統500可執行各種各樣之功能(諸如記憶體儲存、資料處理及/或其他適合功能)中之任一者。因此，代表系統500可無限制地包含手持式裝置(例如，行動電話、平板電腦、數位讀取器及數位音訊播放器)、電腦及電器。系統500之組件可裝納於一單個單元中或(例如，透過一通信網路)分佈於多個經互連單元上。系統500之組件亦可包含遠端裝置及各種各樣之電腦可讀媒體中之任一者。 依據前述內容，將瞭解，雖然本文中已出於圖解說明的目的而闡述本技術之特定實施例，但可在不背離本發明之情況下做出各種修改。舉例而言，儘管關於HMC闡述了半導體晶粒組件之實施例中之諸多實施例，但在其他實施例中，半導體晶粒組件可如其他記憶體裝置或其他類型之堆置晶粒組件一般組態。另外，圖1至圖5中所圖解說明之半導體晶粒組件具有配置於第一半導體晶粒上之一堆疊中之複數個第二半導體晶粒，但其他實施例可具有堆置於第二半導體晶粒中之一或多者上之一個第一半導體晶粒。亦可在其他實施例中組合或消除在特定實施例之內容脈絡中所闡述之本新技術之特定態樣。此外，儘管已在本新技術之特定實施例之內容脈絡中闡述與彼等實施例相關聯之優點，但其他實施例亦可展現此等優點且並非所有實施例皆必須展現此等優點以歸屬於本技術之範疇內。因此，本發明及相關聯技術可囊括本文中未明確展示或闡述之其它實施例。
100‧‧‧半導體晶粒組件/組件
102‧‧‧封裝支撐基板/支撐基板
103a‧‧‧第一側
103b‧‧‧第二側
104a‧‧‧第一電連接器
104b‧‧‧第二電連接器
110‧‧‧第一半導體晶粒/第一晶粒/晶粒/下伏第一晶粒
111‧‧‧堆置區域
112‧‧‧橫向區/橫向部分
114‧‧‧面向前表面
120‧‧‧第二半導體晶粒/第二晶粒/晶粒
120a‧‧‧底部第二晶粒
120b‧‧‧頂部第二晶粒
122‧‧‧堆疊/晶粒堆疊
124‧‧‧頂部表面
125‧‧‧導電元件
126‧‧‧穿矽導通體
128‧‧‧導熱元件
130‧‧‧熱轉移結構
132‧‧‧底部表面
133‧‧‧黏合劑
134‧‧‧上部表面
136‧‧‧內側壁/側壁
138‧‧‧腔
139‧‧‧上部邊緣/邊緣
160‧‧‧底部填充材料/模製底部填充材料/模製底部填充材料
160a‧‧‧側底部填充部分
160b‧‧‧頂部底部填充部分
162‧‧‧前導邊緣
163‧‧‧頂部表面
170‧‧‧導熱蓋/傳導蓋
172‧‧‧黏合劑
210‧‧‧模製板/模製壓板
212‧‧‧入口
214‧‧‧通氣孔
300‧‧‧半導體晶粒組件/組件
400‧‧‧半導體晶粒組件
410‧‧‧模製壓板
412‧‧‧入口
414‧‧‧通氣孔通道
500‧‧‧系統
510‧‧‧半導體晶粒組件
520‧‧‧電源
530‧‧‧驅動器
540‧‧‧處理器
550‧‧‧子系統/組件
E1‧‧‧高度
E2‧‧‧高度
F‧‧‧箭頭
G‧‧‧間隙
H1‧‧‧高度
L1‧‧‧長度
L2‧‧‧長度
W1‧‧‧寬度
W2‧‧‧寬度
圖1係圖解說明根據本技術之實施例之一半導體晶粒組件之一剖面圖。 圖2A係圖解說明根據本技術之實施例之製造一半導體晶粒組件之一方法之一態樣之一剖面圖且圖2B係圖解說明根據本技術之實施例之製造一半導體晶粒組件之一方法之一態樣之一俯視平面圖。 圖2C係圖解說明根據本技術之實施例之製造一半導體晶粒組件之一方法之一態樣之一剖面圖且圖2D係圖解說明根據本技術之實施例之製造一半導體晶粒組件之一方法之一態樣之一俯視平面圖。 圖2E係圖解說明根據本技術之實施例之製造一半導體晶粒組件之一方法之一態樣之一剖面圖且圖2F係圖解說明根據本技術之實施例之製造一半導體晶粒組件之一方法之一態樣之一俯視平面圖。 圖2G係圖解說明根據本技術之實施例之製造一半導體晶粒組件之一方法之一態樣之一剖面圖且圖2H係圖解說明根據本技術之實施例之製造一半導體晶粒組件之一方法之一態樣之一俯視平面圖。 圖2I係圖解說明根據本技術之實施例之製造一半導體晶粒組件之一方法之一態樣之一剖面圖。 圖2J係圖解說明根據本技術之製造一半導體晶粒組件之一方法之一態樣之一剖面圖。 圖3係圖解說明根據本技術之一實施例之一半導體晶粒組件之一剖面圖。 圖4係圖解說明根據本技術之一實施例之一半導體晶粒組件之一俯視平面圖。 圖5係包含根據本技術之實施例組態之一半導體晶粒組件之一系統之一示意圖。

Claims (22)

  1. 一種半導體晶粒組件，其包括：一封裝支撐基板；一第一半導體晶粒，其安裝至該封裝支撐基板，該第一晶粒具有一堆置位點及自該堆置位點在一第一方向上橫向延伸之一橫向區；一晶粒堆疊，其包含彼此上下堆置之複數個第二半導體晶粒，其中該晶粒堆疊具有安裝至該第一晶粒之該堆置位點之一底部第二半導體晶粒、具有界定該晶粒堆疊之一頂部表面面積之一頂部表面的一頂部第二半導體晶粒，及若干個側；一熱轉移結構，其附接至該第一晶粒之該橫向區且環繞該晶粒堆疊，該熱轉移結構具有其中定位有該等第二晶粒之一腔，且該熱轉移結構具有比該晶粒堆疊之該頂部表面面積大之一開口，其中該開口在大體上垂直於該第一方向之一第二方向上橫向延伸；及一模製底部填充材料，其在該腔中位於該等第二半導體晶粒與該熱轉移結構之間，且該底部填充材料覆蓋該晶粒堆疊之該等側直至該晶粒堆疊之至少該頂部表面。
  2. 如請求項1之半導體晶粒組件，其中該熱轉移結構包括與該晶粒堆疊之該等側橫向地間隔開之一內側壁及處於或高於該頂部第二半導體晶粒之該頂部表面之一上部表面。
  3. 如請求項2之半導體晶粒組件，其中該熱轉移結構之該內側壁界定該熱轉移結構之該開口。
  4. 如請求項2之半導體晶粒組件，其中：該熱轉移結構之該上部表面定位於高於該頂部第二半導體晶粒之該頂部表面之一高度處；且該底部填充材料覆蓋該頂部第二半導體晶粒之該頂部表面。
  5. 如請求項4之半導體晶粒組件，其中該底部填充材料直接接觸該頂部第二半導體晶粒之該頂部表面且延伸至與該熱轉移結構之該上部表面至少實質上共面之一高度。
  6. 如請求項1之半導體晶粒組件，其中該底部填充材料覆蓋該第二半導體晶粒之該頂部表面。
  7. 如請求項1之半導體晶粒組件，其中該熱轉移結構包括一框架。
  8. 如請求項7之半導體晶粒組件，其中該框架係一金屬、金屬合金或陶瓷。
  9. 如請求項8之半導體晶粒組件，其中該框架係銅的。
  10. 如請求項1之半導體晶粒組件，其中該腔具有具一上部邊緣之一側壁，且其中該開口係由該側壁之該上部邊緣界定。
  11. 一種半導體晶粒組件，其包括：一封裝支撐基板；一第一半導體晶粒，其安裝至該封裝支撐基板，該第一晶粒具有一堆置區域及自該堆置區域在一第一方向上橫向延伸之一橫向區；一晶粒堆疊，其具有複數個第二半導體晶粒，該複數個第二半導體晶粒包含附接至該第一晶粒之該堆置區域之一底部第二晶粒及界定該晶粒堆疊之一頂部表面之一頂部第二晶粒；一導熱框架，其圍繞該晶粒堆疊，其中該導熱框架具有圍繞該晶粒堆疊之該頂部表面之一開口、附接至該第一半導體晶粒之該橫向區之一底部表面及處於高於該頂部第二晶粒之該頂部表面之一高度處之一上部表面，及其中該開口在大體上垂直於該第一方向之一第二方向上橫向延伸；及一經注入底部填充材料，其位於該導熱框架與該晶粒堆疊之間，其中該經注入底部填充材料具有延伸至該導熱框架之該上部表面之一高度。
  12. 如請求項11之半導體晶粒組件，其中該框架之該開口大於該頂部第二晶粒之該頂部表面。
  13. 如請求項11之半導體晶粒組件，其中該頂部第二晶粒之該頂部表面具有一周界，且該框架之該開口與該頂部第二晶粒之該頂部表面之該周界橫向地間隔開一間隙。
  14. 如請求項11之半導體晶粒組件，其中該框架包括一金屬、金屬合金或陶瓷。
  15. 如請求項11之半導體晶粒組件，其中該框架包括銅。
  16. 一種半導體晶粒組件，其包括：一第一晶粒，其具有一第一功能性，該第一晶粒具有一堆置位點及自該堆置位點在一第一方向上橫向延伸之一橫向區；複數個第二晶粒，其具有與該第一晶粒不同之一第二功能性，該等第二晶粒配置成包含安裝至該第一晶粒之該堆置位點之一底部第二晶粒及界定該晶粒堆疊之一頂部表面之一頂部第二晶粒的一晶粒堆疊；一熱轉移結構，其附接至該第一晶粒之至少該橫向區，該熱轉移結構具有其中定位有該等第二晶粒之一腔，其中該腔在大體上垂直於該第一方向之一第二方向上橫向延伸；及一底部填充材料，其在該腔中位於該等第二晶粒與該熱轉移結構之間，其中該底部填充材料覆蓋該晶粒堆疊之該頂部表面。
  17. 如請求項16之半導體晶粒組件，其中該熱轉移結構包括具有比該頂部第二晶粒之該頂部表面之一周界大之一開口的一框架。
  18. 如請求項16之半導體晶粒組件，其中該框架包括金屬。
  19. 如請求項16之半導體晶粒組件，其中該框架具有一上部表面，且該底部填充材料與該框架之該上部表面共面。
  20. 一種製造一半導體裝置之方法，其包括：將一熱轉移框架附接至一第一半導體晶粒之一外部區，該第一晶粒具有一堆置區域，該外部區自該堆置區域在一第一方向上橫向延伸，該熱轉移框架具有在大體上垂直於該第一方向之一第二方向上橫向延伸之一腔，且安裝於該第一半導體晶粒上之第二半導體晶粒之一晶粒堆疊係在該熱轉移框架之該腔內；及用一底部填充材料填充該腔使得該底部填充材料延伸至該晶粒堆疊之至少一頂部表面。
  21. 如請求項20之方法，其中該框架具有一上部表面，且填充該底部填充材料包括抵靠該框架之該上部表面放置一模製壓板且將該底部填充材料注入至該腔中。
  22. 如請求項21之方法，其中該模製壓板與該晶粒堆疊中之一頂部第二半導體晶粒之一頂部表面間隔開，且其中該底部填充材料覆蓋該頂部第二半導體晶粒之該頂部表面。
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