TWI646515B - Display device - Google Patents

Abstract

The invention provides a display device. The display device includes a pixel circuit, a timing controller, and a driver. The pixel circuit has an organic light emitting diode. The timing controller is used for receiving image data, generating a data signal according to the image data, and generating a bias signal. The driver is used to generate a driving voltage according to the data signal, and the bias signal is used to set the bias voltage according to the driving voltage. The driver provides a driving voltage to drive the light-emitting diode during the first frame time, and provides a bias voltage to perform the reverse bias operation on the organic light-emitting diode during the second frame time. The second frame time is adjacent to the first frame time and occurs after the first frame time.

Description

Display device

The invention relates to a display device.

In recent years, light-emitting diodes have been widely used in display technology, and Active-Matrix Organic Light-Emitting Diode (AMOLED) has been one of the main development focuses of display technology.

However, with the increase of driving time or driving current, the light-emitting characteristics of organic light-emitting diodes continue to deteriorate, which leads to uneven display effects of organic light-emitting diode display devices under long-term driving. Bad situation. If the organic light emitting diode display device enters higher-level applications, such as in the automotive field, the reliability of its display effect will face greater challenges. Therefore, slowing down the degradation of the light emitting characteristics of the organic light emitting diode and maintaining the display uniformity of the display device driven for a long time is one of the important improvement issues.

The present invention provides a display device capable of slowing down the degradation of the light emitting characteristics of an organic light emitting diode.

The display device of the present invention includes a pixel circuit, a timing controller, and a driver. The pixel circuit has an organic light emitting diode. The timing controller is used for receiving image data, generating a data signal according to the image data, and generating a bias signal. The driver is coupled to the timing controller to generate a driving voltage according to the data signal, and set the bias voltage according to the driving voltage. The driver provides a driving voltage to drive the light-emitting diode during the first frame time, and provides a bias voltage to perform the reverse bias operation on the organic light-emitting diode during the second frame time. The second frame time is adjacent to the first frame time and occurs after the first frame time.

The display device of the present invention includes a pixel circuit, a driver, and a timing controller. The pixel circuit includes a first transistor and an organic light emitting diode. The first transistor has a first terminal, a second terminal, and a control terminal, and the second terminal is coupled to the organic light emitting diode. The driver is coupled to the pixel circuit. The timing controller receives the first image data and the second image data, and is coupled to the driver. During the first frame time, the driver provides a first driving voltage to the first terminal of the first transistor. At the second frame time, the driver provides a second driving voltage to the first terminal of the first transistor and a bias voltage to the organic light emitting diode. The first driving voltage and the bias voltage are respectively formed according to the first image data, and the second driving voltage is formed according to the first image data.

The display device of the present invention includes a plurality of pixel circuits, a driving circuit, and a frame time. The pixel circuit includes a first scan line, a second scan line, an organic light emitting diode, a first transistor, and a second transistor. The first transistor has a first terminal, a second terminal, and a control terminal. A first terminal of the first transistor receives a driving voltage. The second terminal of the first transistor is coupled to the organic light emitting diode. The control terminal of the first transistor is coupled to the first scan line. The second transistor has a first terminal, a second terminal, and a control terminal. A first terminal of the second transistor receives a bias voltage. The second terminal of the second transistor is connected to the organic light emitting diode. The control terminal of the second transistor is coupled to the second scan line. The driving circuit is configured to provide a scan signal to the first scan line and a bias control signal to the second scan line. The frame time includes the first sub-frame time and the second sub-frame time in sequence. During the first sub-frame time, the scan signal disables the first transistor, and the bias control signal enables the second transistor. During the second sub-frame time, the scan signal enables the first transistor, and the bias control signal disables the second transistor.

Based on the above, the display device of the present invention generates a data signal and a bias signal according to the image data, and sets the bias voltage according to the driving voltage. The display device provides a driving voltage to drive the light emitting diode in one frame time, and provides a bias voltage to the image data in another frame time to perform a reverse bias operation on the organic light emitting diode, thereby slowing down the organic light emitting diode. Degradation of the light emitting characteristics of the body.

In order to make the above features and advantages of the present invention more comprehensible, embodiments are hereinafter described in detail with reference to the accompanying drawings.

Please refer to FIG. 1, which is a schematic diagram of a display device according to an embodiment of the present invention. In the embodiment of FIG. 1, the display device 100 includes a pixel circuit 110, a timing controller 120, and a driver 130. The pixel circuit 110 includes an organic light emitting diode D. The timing controller 120 is configured to receive the image data SV. The timing controller 120 may generate a data signal SDATA and generate a bias signal Sbias according to the image data SV. The driver 130 is coupled to the timing controller 120. The driver 130 may generate the driving voltage Vdr according to the data signal SDATA, and set the bias signal Sbias according to the driving voltage Vdr to set the bias voltage Vbias. In this embodiment, the driver 130 may be a source driver. In addition, the driver 130 provides a driving voltage Vdr to drive the organic light emitting diode D during the first frame time, and provides a bias voltage Vbias to perform a reverse bias operation on the organic light emitting diode D during the second frame time. The second frame time may be adjacent to the first frame time and occur after the first frame time. In the embodiment of the present invention, there may be one or more pixel circuits, and there is no fixed limit.

For further explanation, please refer to FIG. 2, which is a schematic diagram of a display device according to another embodiment of the present invention. In the display device 200, the timing controller 220 further includes an image input interface 221, a register 222, a computing unit 223, a signal output interface 224, and a lookup table 225. The image input interface 221 is used for receiving image data SV, and generating a data signal SDATA according to the image data SV. The register 222 is coupled to the image input interface 221 and is configured to store a data signal SDATA from the image input interface 221. The register 222 may be any type of random access memory (RAM), flash memory, or similar elements or a combination of the foregoing elements. The computing unit 223 is coupled to the register 222, and the computing unit 223 can adjust the bias signal Sbias according to the data signal SDATA. The signal output interface 224 is coupled to the computing unit 223.

In this embodiment, the arithmetic unit 223 may be an arithmetic device having an advanced reduced instruction set machine (Advanced RISC Machine, ARM). In another embodiment, the computing unit 223 may also be implemented by a field-programmable gate array (FPGA). However, the present invention is not limited to this. The signal output interface 224 is used to output a data signal SDATA and a bias signal Sbias to the driver 130. In FIG. 2, the lookup table 225 is coupled to the processor 223, and the lookup table 225 is used to store the display device parameters such as the device parameters, process parameters, and electrical trend parameters of the organic light emitting diode D. In this embodiment, the element parameter may be the diffusivity (Diffusivity), the drift rate (Mobility) of the organic light emitting diode D, and the distance between the cathode and the anode of the organic light emitting diode D. The process parameters may be temperature parameters and film thickness parameters of each stage of manufacturing the organic light emitting diode D. The electrical trend parameter is the initial brightness-current-voltage (L-I-V) trend. That is, the lookup table 225 can record related display element parameters related to the corresponding organic light emitting diode D. In this embodiment, the lookup table 225 may be a non-volatile memory such as a flash memory, and the display element parameters are stored in the lookup table 225 during the manufacturing process of the display device 200. In this embodiment, the display device 200 further includes a gamma circuit 240. The gamma circuit 240 may receive a setting signal Ss and set a range of the bias voltage Vbias according to the setting signal Ss.

In this embodiment, the anode of the organic light emitting diode D receives the bias voltage Vbias provided by the driver 230, and the cathode of the organic light emitting diode D has a low voltage VSS. In this embodiment, the voltage level of the system low voltage VSS is greater than the voltage level of the bias voltage Vbias.

In this embodiment, the pixel circuit 210 may include an organic light emitting diode D, a driving transistor TD, a capacitor C, and transistors T1 and T2. In detail, the first terminal of the driving transistor TD is coupled to the system high voltage VDD, and the second terminal is coupled to the organic light emitting diode D. The capacitor C is coupled between the control terminal and the second terminal of the driving transistor TD. In other words, one terminal of the capacitor C is coupled to the control terminal of the driving transistor TD, and the other terminal is coupled to the organic light emitting diode D. The first terminal of the transistor T1 is coupled to the driver 230 through a data line to receive the driving voltage Vdr, and the second terminal is coupled to the control terminal of the driving transistor, and the control terminal of the transistor T1 is received through the scanning line SL1. Scanning signal S1. The first terminal of the transistor T2 is coupled to the driver 230 to receive the bias voltage Vbias, while the second terminal of the transistor T2 is coupled to the organic light emitting diode D, and the control terminal thereof receives the scan through the scan line SL2 The signal S2, wherein the scanning signal S2 is also a bias control signal.

Next, a display operation method of the display device 200 will be described. Please refer to FIG. 2 and FIG. 3 at the same time. FIG. 3 is a schematic diagram of operation waveforms according to an embodiment of the present invention. The operation waveform diagram of FIG. 3 is applicable to the embodiment of FIG. 2. In the embodiments of FIGS. 2 and 3, the display device includes a plurality of frame times, where the frame time FT1 includes the sub-frame time ST1, the frame time FT2 includes the sub-frame time ST2, and the occurrence of the frame time FT2 occurs. Time follows frame time FT1. In other words, the display device includes a plurality of consecutive frame times, such as the first frame time FT1, the second frame time FT2, and the like. In this embodiment, the frame times FT1 and FT2 are the display times of one display screen, respectively. The frame time FT1 may include the sub-frame time ST1, and the frame time FT2 may include the sub-frame time ST2. The sub-frame times ST1 and ST2 are operating times for driving the corresponding pixel circuit 210. In the sub-frame times ST1 and ST2, the phase of the scanning signal S1 and the phase of the bias control signal S2 are opposite. In other words, the transistors T1 and T2 of the pixel circuit 210 are not turned on or off at the same time during the sub-frame time ST1 and ST2.

In this embodiment, the sub-frame time ST1 further includes times ST11 and ST12, and the sub-frame time ST2 further includes times ST21 and ST22. The voltage level of the scan signal S1 is pulled down to a relatively low voltage level at times ST12 and ST22, so that the pixel circuit 210 can turn on the crystal T1 according to the scan signal S1 at times ST12 and ST22. The voltage level of the scan signal S1 is raised to a relatively high high voltage level at times ST11 and ST21, so that the pixel circuit 210 can turn off the transistor T1 according to the scan signal S1 at times ST11 and ST21. In contrast, the voltage level of the bias control signal S2 is pulled down to a relatively low voltage level at times ST11 and ST21, so that the pixel circuit 210 can turn on the crystal T2 according to the bias control signal S2 at times ST11 and ST21. The voltage level of the bias control signal S2 is raised to a relatively high high voltage level at times ST12 and ST22, so that the pixel circuit 210 can turn off the transistor T2 according to the bias control signal S2 at times ST12 and ST22.

In this embodiment, the time lengths of the times ST11, ST12, ST21, and ST22 may be the same. In other embodiments, the time lengths of the times ST11 and ST12 may be different, and the time lengths of the times ST21 and ST22 may also be different.

In this embodiment, the driver 230 may generate a driving voltage Vdr1 for driving the organic light emitting diode D at the frame time FT1 according to the data signal SDATA. In addition, the driver 230 sets the bias signal Sbias to the bias voltage Vbias1 according to the driving voltage Vdr1. It should be noted that the display device 200 turns on the crystal T1 according to the scanning signal S1 at time ST12 in the frame time FT1, and causes the driving transistor TD to drive the organic light emitting diode D according to the driving voltage Vdr1. The display device 200 turns on the crystal T2 at the time ST21 of the frame time FT2 according to the bias control signal S2 at the low voltage level, thereby providing the bias voltage Vbias1 to the anode of the organic light emitting diode D, so as to The polar body D performs a reverse bias operation. It should be noted that, in the embodiment of the present invention, the bias voltage Vbias1 may be generated according to the driving voltage Vdr1. The absolute value of the bias voltage Vbias1 is positively related to the absolute value of the driving voltage Vdr1.

Subsequently, the display device 200 further provides the driving voltage Vdr2 of the data signal SDATA corresponding to the frame time FT2 at the time ST22 of the frame time FT2 to drive the organic light emitting diode D, and so on. In this way, the display device 200 can perform a reverse bias operation by applying a bias voltage Vbias1 to the organic light emitting diode D at the frame time FT2 according to the driving voltage Vdr1 of the frame time FT1, thereby delaying the organic light emitting diode Deterioration of D and improvement of display uniformity of the display device 200 under degradation.

In this embodiment, the arithmetic unit 223 can further determine whether the degree of change of the corresponding grayscale value is greater than a preset degree of change according to the change of the data signal SDATA corresponding to the pixel circuit 210. When the degree of change of the grayscale value is greater than a preset degree of change, the computing unit 223 adjusts the bias signal Sbias. When the change level of the grayscale value is less than or equal to a preset change level, the arithmetic unit 223 does not adjust the bias signal Sbias. The preset degree of change can be set in advance by a designer and provided to the processor 223 for reading.

In addition, the display device parameters such as the device parameters, process parameters, and electrical trend parameters of the organic light emitting diode D may be different in different batches. Under long-term operation of the display device 200, the degradation conditions of the organic light-emitting diodes D in different production batches may also be different, thereby affecting the effect of the reverse bias operation. Therefore, the display device 200 can determine whether the lookup table 225 needs to be updated according to the test results during the manufacturing process. The arithmetic unit 223 can further adjust the bias signal Sbias according to the display element parameters of the updated look-up table 225.

Next, a method of adjusting the bias signal Sbias by updating the lookup table 225 will be described. Please refer to FIG. 2 and FIG. 4 at the same time. FIG. 4 is a flowchart of generating a bias signal according to an embodiment of the present invention. The flowchart of generating a bias signal of FIG. 4 is applicable to the embodiment of FIG. 2. In the embodiments of FIGS. 2 and 4, the arithmetic unit 223 can receive the data signal SDATA from the register 222 in step S410. In step S420, the arithmetic unit 223 may determine whether the content of the lookup table 225 needs to be updated according to the current data signal SDATA and the previous data signal SDATA. If the arithmetic unit 223 determines that the current data signal SDATA has a significant change compared to the previous data signal SDATA, that is, the arithmetic unit 223 determines that the degree of change of the grayscale value corresponding to the pixel circuit 210 is greater than a preset degree of change , It needs to go to step S430 to receive component parameters, process parameters and electrical trend parameters to update the lookup table 225 to adjust the bias signal Sbias.

In step S450, the arithmetic unit 223 supplies the bias signal Sbias to the driver 230 via the signal output interface 224. In this way, the display device 200 can further delay the degradation of the organic light emitting diode D according to the updated device parameters, process parameters, and electrical trend parameters of the organic light emitting diode D.

Returning to step S420 again, if the arithmetic unit 223 judges that the current data signal SDATA is not significantly changed from the previous data signal SDATA, it proceeds to step S440 without adjusting the bias signal Sbias. The processor 223 then provides the bias signal Sbias to the driver 230 via the signal output interface 224 at step S450. For example, please refer to the embodiment of FIG. 3, if the current data signal SDATA is the driving voltage Vdr2 corresponding to the frame time FT2, the so-called previous data signal SDATA is the driving voltage corresponding to the frame time FT1 Vdr1. Therefore, in this embodiment, the data signal of the current frame time (such as frame time FT2) and the data signal of the previous frame time (such as frame time FT1) can be used to determine whether to perform compensation, and then input the bias voltage. Signal to organic light emitting diode. However, the present invention is not limited to this. In another modified example, the data signal of the current frame time and the data signals of the previous two frame times can be used to determine whether to perform compensation, and then the bias signal is input to the organic light-emitting diode. Polar body, for example, the frame time is frame time FT1, frame time FT2 and frame time FT3 in order, and when the current frame time is frame time FT3, the data of frame time FT3 can be viewed The signal and the data signal of the frame time FT1 determine whether to perform compensation.

Please refer to FIG. 5, which is a schematic diagram of a display device according to another embodiment of the present invention. Different from the embodiment in FIG. 2, the display device 500 in FIG. 5 further includes a display device parameter register 540. The display device parameter register 540 is coupled to the timing controller 520. The display device parameter register 540 is used to store the display device parameters and provide the display device parameters to the lookup table 525 to update the lookup table 525. Display component parameters to the lookup table 525 can be any type of random access memory (RAM), read-only memory (ROM), flash memory (flash memory) or similar components Or a combination of the above.

Please refer to FIG. 6, which is a schematic diagram of a pixel structure according to an embodiment of the present invention. In the embodiment of FIG. 6, the pixel structure includes pixel circuits 610_1 to 610_4. The circuit architecture and operation mode of the pixel circuits 610_1 to 610_4 in this embodiment have been clearly described in the embodiments of FIG. 2 and FIG. 3, so they are not repeated here. The transistor T1_1 of the pixel circuit 610_1 can receive the scan signal S1_1 through the first scan line SL1_1, and the transistor T2_1 of the pixel circuit 610_1 can receive the bias control signal S2_1 through the second scan line SL2_1. The pixel circuit 610_1 may perform a reverse bias operation on the organic light emitting diode D_1 according to the bias control signal S2_1 to receive the bias voltage Vbias1_1 through the transistor T2_1, and then the pixel circuit 610_1 may transmit the voltage according to the first scan signal S1_1. The transistor T1_1 receives the driving voltage Vdr1_1. The driving transistor TD_1 drives the organic light emitting diode D_1 according to the driving voltage Vdr1_1.

Similarly, the transistor T1_2 of the pixel circuit 610_2 can receive the scan signal S1_1 through the first scan line SL1_1, and the transistor T2_2 of the pixel circuit 610_2 can receive the bias control signal S2_1 through the second scan line SL2_1. The pixel circuit 610_2 can perform a reverse bias operation on the organic light emitting diode D_2 according to the bias control signal S2_1 to receive the bias voltage Vbias1_2 through the transistor T2_2, and then the pixel circuit 610_2 can transmit the transistor according to the scan signal S1_1 T1_2 receives the driving voltage Vdr1_2. The driving transistor TD_2 drives the organic light emitting diode D_2 according to the driving voltage Vdr1_2. In this embodiment, the structures and operating principles of the pixel circuit 610_3 and the pixel circuit 610_4 are the same as those described above, and will not be repeated here.

In the embodiment of FIG. 6, during the same frame time, the gate driving circuit (not shown) can sequentially provide scanning signals to the first scanning line SL1_1, the first scanning line SL1_2, and the first scanning line SL1_3 (not (Illustrated) ..., so that the first transistor in each pixel circuit can be enabled by a scanning signal. For example, in the same frame time, the gate driving circuit first provides the scanning signal S1_1 to the first scanning line SL1_1, so that the first transistor T1_1 of the pixel circuit 610_1 and the first transistor of the pixel circuit 610_2 Crystal T1_2. Then, the gate driving circuit provides a scanning signal S1_2 to the first scanning line SL1_2, so that the first transistor T1_3 of the pixel circuit 610_3 and the first transistor T1_4 of the pixel circuit 610_4 can be enabled. After that, the gate driving circuit sequentially provides scanning signals S1_3, scanning signals S1_4, ..., which are not described in detail here. Referring again to the embodiment of FIG. 6 to explain the operation mechanism of the bias control signal, during the same frame time, the gate driving circuit (not shown) can sequentially provide the bias control signal to the second scan line SL2_1, the second The scan lines SL2_2, the second scan lines SL2_3 (not shown), ..., enable the second transistor in each pixel circuit to be enabled via the bias control signal. For example, during the same frame time, the gate driving circuit first provides the bias control signal S2_1 to the second scan line SL2_1, so that the second transistor T2_1 of the pixel circuit 610_1 and the second transistor T2_1 of the pixel circuit 610_2 Two transistor T2_2. Then, the gate driving circuit provides a bias control signal S2_2 to the second scan line SL2_2, so that the second transistor T2_3 of the pixel circuit 610_3 and the second transistor T2_4 of the pixel circuit 610_4 can be enabled. After that, the gate driving circuit sequentially provides a bias control signal S2_3, a bias control signal S1_4, ..., which are not described in detail here.

Please refer to FIG. 3 and FIG. 6 at the same time. In each frame time of this embodiment, corresponding to each pixel circuit, the second transistor is first enabled with a bias control signal S2 to provide a bias voltage. The signal Vbias is applied to the organic light emitting diode, and the first transistor is enabled by the scanning signal S1, and a driving voltage Vdr is provided to the organic light emitting diode.

In summary, the display device of the present invention generates a data signal and a bias signal according to the image data, and sets the bias signal according to the driving voltage. The display device provides a driving voltage to drive the light-emitting diode during the first frame time, and provides a bias voltage to the reverse-biasing operation of the organic light-emitting diode during the second frame time. In this way, the display device can provide a corresponding reverse bias operation to the organic light emitting diode at the next frame time according to the display result of the organic light emitting diode, thereby delaying the degradation of the organic light emitting diode and improving the display device. Display uniformity under degradation.

Although the present invention has been disclosed as above with the examples, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some modifications and retouching without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the attached patent application.

100, 200, 500‧‧‧ electronic devices

110, 210, 610_1 ~ 610_4‧‧‧ pixel circuit

120, 220, 520‧‧‧ timing controller

130, 230, 530‧‧‧ drives

240, 550‧‧‧ Gamma Circuit

D, D_1 ~ D_4‧‧‧organic light emitting diode

SV‧‧‧Image data

SDATA‧‧‧ Data Signal

Sbias‧‧‧ bias signal

Vdr, Vdr1, Vdr2, Vdr1_1, Vdr1_2‧‧‧‧Voltage

Vbias, Vbias1, Vbias2, Vbias1_1, Vbias1_2‧‧‧ bias voltage

221, 521‧‧‧Image input interface

222、522‧‧‧Register

223, 523‧‧‧

224、524‧‧‧‧Signal output interface

225, 525‧‧‧ lookup table

TD, TD_1 ~ TD_4‧‧‧Drive transistor

C, C_1 ~ C_4‧‧‧Capacitor

T1, T2, T1_1 ~ T1_4, T2_1 ~ T2_4‧‧‧Transistors

VDD‧‧‧System high voltage

VSS‧‧‧System Low Voltage

S1, S1_1, S2_1‧‧‧scan signals

S2, S1_2, S2_2‧‧‧ bias control signals

Ss‧‧‧Set signal

SL1, SL2, SL1_1, SL2_1, SL1_2, SL2_2 ‧‧‧ scan lines

FT1, FT2‧‧‧‧Frame time

ST1, ST2‧‧‧‧frame time

ST11, ST12, ST21, ST22

S410 ~ S450‧‧‧step

540‧‧‧Display device parameter register

FIG. 1 is a schematic diagram of a display device according to an embodiment of the invention. FIG. 2 is a schematic diagram of a display device according to another embodiment of the invention. FIG. 3 is a schematic diagram of operation waveforms according to an embodiment of the present invention. FIG. 4 is a flowchart of generating a bias signal according to an embodiment of the present invention. FIG. 5 is a schematic diagram of a display device according to another embodiment of the present invention. FIG. 6 is a schematic diagram of a pixel structure according to an embodiment of the present invention.

Claims (14)

A display device includes: a pixel circuit having an organic light emitting diode; a timing controller for receiving an image data, generating a data signal based on the image data, and generating a bias signal; and a driver Is coupled to the timing controller for generating a driving voltage according to the data signal, and setting the bias signal to set a bias voltage according to the driving voltage, wherein the driver provides the first frame time A driving voltage to drive the organic light emitting diode, and the image data to provide the bias voltage to perform a reverse bias operation on the organic light emitting diode at a second frame time, the second frame time phase It is adjacent to and occurs after the first frame time. The display device according to item 1 of the scope of patent application, wherein the timing controller includes: an image input interface for receiving the image data and generating the data signal according to the image data; a temporary register coupled to the An image input interface for storing the data signal; an arithmetic unit coupled to the register to adjust the bias signal according to the data signal; and a signal output interface coupled to the arithmetic unit to output the data signal and The bias signal is to the driver. The display device according to item 2 of the scope of patent application, wherein the timing controller further comprises: a lookup table coupled to the computing unit, and determining whether to be updated according to the data signal and a previous data signal. The display device according to item 3 of the patent application scope, wherein the display device further comprises: a display device parameter register, coupled to the timing controller, for storing a display device parameter and providing the display device parameter Go to the lookup table to update the lookup table. The display device according to item 1 of the scope of patent application, wherein the display device further comprises: a gamma circuit coupled to the driver, receiving a setting signal, and setting a range of the bias voltage according to the setting signal. The display device according to item 1 of the patent application scope, wherein the organic light emitting diode includes an anode and a cathode, the driver provides the bias voltage to the anode, and provides a system low voltage to the cathode, wherein the system The voltage level of the low voltage is greater than the voltage level of the bias voltage. The display device according to item 1 of the scope of patent application, wherein the pixel circuit includes: a driving transistor having a first terminal, a second terminal and a control terminal, the first terminal is coupled to a system high Voltage, the second terminal is coupled to the organic light emitting diode; a capacitor is coupled between the control terminal of the driving transistor and the second terminal of the driving transistor; a first transistor having A first terminal, a second terminal, and a control terminal, the first terminal is coupled to the driving voltage, the second terminal is coupled to the control terminal of the driving transistor, and the control terminal receives a scanning signal; And a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal is coupled to the bias voltage, the second terminal is coupled to the organic light emitting diode, and the control The terminal receives a bias control signal. The display device according to item 7 of the scope of patent application, wherein the first frame time and the second frame time both include a plurality of sub-frame times, and in one of the sub-frame times, the scan signal and The bias control signal is an inverted potential. The display device according to item 8 of the scope of patent application, wherein the sub-frame time includes a first time and a second time, and the potential of the scan signal at the first time and the potential of the second time are Different, the potential of the bias control signal at the first time is different from the potential of the second time. A display device includes a pixel circuit including a first transistor and an organic light emitting diode. The first transistor has a first terminal, a second terminal, and a control terminal, wherein the second terminal Coupled to the organic light emitting diode; a driver coupled to the pixel circuit; a timing controller receiving a first image data and a second image data, and coupled to the driver; at a first During frame time, the driver provides a first driving voltage to the first terminal of the first transistor; during a second frame time, the driver provides a second driving voltage to the first terminal of the first transistor. And provides a bias voltage to the organic light emitting diode, wherein the first driving voltage and the bias voltage are respectively formed according to the first image data, and the second driving voltage is based on the second image data Formed. The display device as described in claim 10, wherein the second frame time is adjacent to the first frame time and occurs after the first frame time. The display device according to item 10 of the scope of patent application, further comprising: a first scanning line coupled to the control terminal of the first transistor; a second scanning line; and a data line respectively coupled to The first terminal of the first transistor and the driver; and the pixel circuit further includes: a driving transistor having a first terminal, a second terminal, and a control terminal, the first terminal is coupled to a The system has a high voltage. The second terminal is coupled to the organic light emitting diode. A second transistor has a first terminal, a second terminal, and a control terminal. The first terminal is coupled to the bias voltage. The second terminal is coupled to the organic light emitting diode, and the control terminal is coupled to the second scan line. A display device includes: a plurality of pixel circuits, each of which includes: a first scan line; a second scan line; an organic light emitting diode; a first transistor having a first terminal A second terminal and a control terminal, wherein the first terminal receives a driving voltage, the second terminal is coupled to the organic light emitting diode, and the control terminal is coupled to the first scan line; and a second power The crystal has a first terminal, a second terminal, and a control terminal, wherein the first terminal receives a bias voltage, the second terminal is connected to the organic light emitting diode, and the control terminal is coupled to the second scan. Lines; and a driving circuit that provides a scanning signal to the first scanning line and a bias control signal to the second scanning line; and a frame time, including a sequence of a first sub frame time and A second sub-frame time, wherein at the first sub-frame time, the scan signal disables the first transistor, and the bias control signal enables the second transistor at the second sub-frame During time, the scan signal enables the first transistor, and the bias control No. disabling the second transistor. The display device according to item 13 of the patent application, wherein the scan signal and the bias control signal are inverse potentials during the first sub-frame time and the second sub-frame time.